setup.c 7.4 KB

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  1. /*
  2. * linux/arch/sh/board/mpc1211/setup.c
  3. *
  4. * Copyright (C) 2002 Saito.K & Jeanne, Fujii.Y
  5. *
  6. */
  7. #include <linux/init.h>
  8. #include <linux/irq.h>
  9. #include <linux/hdreg.h>
  10. #include <linux/ide.h>
  11. #include <linux/interrupt.h>
  12. #include <asm/io.h>
  13. #include <asm/machvec.h>
  14. #include <asm/mpc1211/mpc1211.h>
  15. #include <asm/mpc1211/pci.h>
  16. #include <asm/mpc1211/m1543c.h>
  17. /* ALI15X3 SMBus address offsets */
  18. #define SMBHSTSTS (0 + 0x3100)
  19. #define SMBHSTCNT (1 + 0x3100)
  20. #define SMBHSTSTART (2 + 0x3100)
  21. #define SMBHSTCMD (7 + 0x3100)
  22. #define SMBHSTADD (3 + 0x3100)
  23. #define SMBHSTDAT0 (4 + 0x3100)
  24. #define SMBHSTDAT1 (5 + 0x3100)
  25. #define SMBBLKDAT (6 + 0x3100)
  26. /* Other settings */
  27. #define MAX_TIMEOUT 500 /* times 1/100 sec */
  28. /* ALI15X3 command constants */
  29. #define ALI15X3_ABORT 0x04
  30. #define ALI15X3_T_OUT 0x08
  31. #define ALI15X3_QUICK 0x00
  32. #define ALI15X3_BYTE 0x10
  33. #define ALI15X3_BYTE_DATA 0x20
  34. #define ALI15X3_WORD_DATA 0x30
  35. #define ALI15X3_BLOCK_DATA 0x40
  36. #define ALI15X3_BLOCK_CLR 0x80
  37. /* ALI15X3 status register bits */
  38. #define ALI15X3_STS_IDLE 0x04
  39. #define ALI15X3_STS_BUSY 0x08
  40. #define ALI15X3_STS_DONE 0x10
  41. #define ALI15X3_STS_DEV 0x20 /* device error */
  42. #define ALI15X3_STS_COLL 0x40 /* collision or no response */
  43. #define ALI15X3_STS_TERM 0x80 /* terminated by abort */
  44. #define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
  45. const char *get_system_type(void)
  46. {
  47. return "Interface MPC-1211(CTP/PCI/MPC-SH02)";
  48. }
  49. static void __init pci_write_config(unsigned long busNo,
  50. unsigned long devNo,
  51. unsigned long fncNo,
  52. unsigned long cnfAdd,
  53. unsigned long cnfData)
  54. {
  55. ctrl_outl((0x80000000
  56. + ((busNo & 0xff) << 16)
  57. + ((devNo & 0x1f) << 11)
  58. + ((fncNo & 0x07) << 8)
  59. + (cnfAdd & 0xfc)), PCIPAR);
  60. ctrl_outl(cnfData, PCIPDR);
  61. }
  62. /*
  63. Initialize IRQ setting
  64. */
  65. static unsigned char m_irq_mask = 0xfb;
  66. static unsigned char s_irq_mask = 0xff;
  67. volatile unsigned long irq_err_count;
  68. static void disable_mpc1211_irq(unsigned int irq)
  69. {
  70. unsigned long flags;
  71. save_and_cli(flags);
  72. if( irq < 8) {
  73. m_irq_mask |= (1 << irq);
  74. outb(m_irq_mask,I8259_M_MR);
  75. } else {
  76. s_irq_mask |= (1 << (irq - 8));
  77. outb(s_irq_mask,I8259_S_MR);
  78. }
  79. restore_flags(flags);
  80. }
  81. static void enable_mpc1211_irq(unsigned int irq)
  82. {
  83. unsigned long flags;
  84. save_and_cli(flags);
  85. if( irq < 8) {
  86. m_irq_mask &= ~(1 << irq);
  87. outb(m_irq_mask,I8259_M_MR);
  88. } else {
  89. s_irq_mask &= ~(1 << (irq - 8));
  90. outb(s_irq_mask,I8259_S_MR);
  91. }
  92. restore_flags(flags);
  93. }
  94. static inline int mpc1211_irq_real(unsigned int irq)
  95. {
  96. int value;
  97. int irqmask;
  98. if ( irq < 8) {
  99. irqmask = 1<<irq;
  100. outb(0x0b,I8259_M_CR); /* ISR register */
  101. value = inb(I8259_M_CR) & irqmask;
  102. outb(0x0a,I8259_M_CR); /* back ro the IPR reg */
  103. return value;
  104. }
  105. irqmask = 1<<(irq - 8);
  106. outb(0x0b,I8259_S_CR); /* ISR register */
  107. value = inb(I8259_S_CR) & irqmask;
  108. outb(0x0a,I8259_S_CR); /* back ro the IPR reg */
  109. return value;
  110. }
  111. static void mask_and_ack_mpc1211(unsigned int irq)
  112. {
  113. unsigned long flags;
  114. save_and_cli(flags);
  115. if(irq < 8) {
  116. if(m_irq_mask & (1<<irq)){
  117. if(!mpc1211_irq_real(irq)){
  118. irq_err_count++;
  119. printk("spurious 8259A interrupt: IRQ %x\n",irq);
  120. }
  121. } else {
  122. m_irq_mask |= (1<<irq);
  123. }
  124. inb(I8259_M_MR); /* DUMMY */
  125. outb(m_irq_mask,I8259_M_MR); /* disable */
  126. outb(0x60+irq,I8259_M_CR); /* EOI */
  127. } else {
  128. if(s_irq_mask & (1<<(irq - 8))){
  129. if(!mpc1211_irq_real(irq)){
  130. irq_err_count++;
  131. printk("spurious 8259A interrupt: IRQ %x\n",irq);
  132. }
  133. } else {
  134. s_irq_mask |= (1<<(irq - 8));
  135. }
  136. inb(I8259_S_MR); /* DUMMY */
  137. outb(s_irq_mask,I8259_S_MR); /* disable */
  138. outb(0x60+(irq-8),I8259_S_CR); /* EOI */
  139. outb(0x60+2,I8259_M_CR);
  140. }
  141. restore_flags(flags);
  142. }
  143. static void end_mpc1211_irq(unsigned int irq)
  144. {
  145. enable_mpc1211_irq(irq);
  146. }
  147. static unsigned int startup_mpc1211_irq(unsigned int irq)
  148. {
  149. enable_mpc1211_irq(irq);
  150. return 0;
  151. }
  152. static void shutdown_mpc1211_irq(unsigned int irq)
  153. {
  154. disable_mpc1211_irq(irq);
  155. }
  156. static struct hw_interrupt_type mpc1211_irq_type = {
  157. .typename = "MPC1211-IRQ",
  158. .startup = startup_mpc1211_irq,
  159. .shutdown = shutdown_mpc1211_irq,
  160. .enable = enable_mpc1211_irq,
  161. .disable = disable_mpc1211_irq,
  162. .ack = mask_and_ack_mpc1211,
  163. .end = end_mpc1211_irq
  164. };
  165. static void make_mpc1211_irq(unsigned int irq)
  166. {
  167. irq_desc[irq].chip = &mpc1211_irq_type;
  168. irq_desc[irq].status = IRQ_DISABLED;
  169. irq_desc[irq].action = 0;
  170. irq_desc[irq].depth = 1;
  171. disable_mpc1211_irq(irq);
  172. }
  173. int mpc1211_irq_demux(int irq)
  174. {
  175. unsigned int poll;
  176. if( irq == 2 ) {
  177. outb(0x0c,I8259_M_CR);
  178. poll = inb(I8259_M_CR);
  179. if(poll & 0x80) {
  180. irq = (poll & 0x07);
  181. }
  182. if( irq == 2) {
  183. outb(0x0c,I8259_S_CR);
  184. poll = inb(I8259_S_CR);
  185. irq = (poll & 0x07) + 8;
  186. }
  187. }
  188. return irq;
  189. }
  190. void __init init_mpc1211_IRQ(void)
  191. {
  192. int i;
  193. /*
  194. * Super I/O (Just mimic PC):
  195. * 1: keyboard
  196. * 3: serial 1
  197. * 4: serial 0
  198. * 5: printer
  199. * 6: floppy
  200. * 8: rtc
  201. * 10: lan
  202. * 12: mouse
  203. * 14: ide0
  204. * 15: ide1
  205. */
  206. pci_write_config(0,0,0,0x54, 0xb0b0002d);
  207. outb(0x11, I8259_M_CR); /* mater icw1 edge trigger */
  208. outb(0x11, I8259_S_CR); /* slave icw1 edge trigger */
  209. outb(0x20, I8259_M_MR); /* m icw2 base vec 0x08 */
  210. outb(0x28, I8259_S_MR); /* s icw2 base vec 0x70 */
  211. outb(0x04, I8259_M_MR); /* m icw3 slave irq2 */
  212. outb(0x02, I8259_S_MR); /* s icw3 slave id */
  213. outb(0x01, I8259_M_MR); /* m icw4 non buf normal eoi*/
  214. outb(0x01, I8259_S_MR); /* s icw4 non buf normal eo1*/
  215. outb(0xfb, I8259_M_MR); /* disable irq0--irq7 */
  216. outb(0xff, I8259_S_MR); /* disable irq8--irq15 */
  217. for ( i=0; i < 16; i++) {
  218. if(i != 2) {
  219. make_mpc1211_irq(i);
  220. }
  221. }
  222. }
  223. /*
  224. Initialize the board
  225. */
  226. static void delay (void)
  227. {
  228. volatile unsigned short tmp;
  229. tmp = *(volatile unsigned short *) 0xa0000000;
  230. }
  231. static void delay1000 (void)
  232. {
  233. int i;
  234. for (i=0; i<1000; i++)
  235. delay ();
  236. }
  237. static int put_smb_blk(unsigned char *p, int address, int command, int no)
  238. {
  239. int temp;
  240. int timeout;
  241. int i;
  242. outb(0xff, SMBHSTSTS);
  243. temp = inb(SMBHSTSTS);
  244. for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); timeout++) {
  245. delay1000();
  246. temp = inb(SMBHSTSTS);
  247. }
  248. if (timeout >= MAX_TIMEOUT){
  249. return -1;
  250. }
  251. outb(((address & 0x7f) << 1), SMBHSTADD);
  252. outb(0xc0, SMBHSTCNT);
  253. outb(command & 0xff, SMBHSTCMD);
  254. outb(no & 0x1f, SMBHSTDAT0);
  255. for(i = 1; i <= no; i++) {
  256. outb(*p++, SMBBLKDAT);
  257. }
  258. outb(0xff, SMBHSTSTART);
  259. temp = inb(SMBHSTSTS);
  260. for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)); timeout++) {
  261. delay1000();
  262. temp = inb(SMBHSTSTS);
  263. }
  264. if (timeout >= MAX_TIMEOUT) {
  265. return -2;
  266. }
  267. if ( temp & ALI15X3_STS_ERR ){
  268. return -3;
  269. }
  270. return 0;
  271. }
  272. /*
  273. * The Machine Vector
  274. */
  275. struct sh_machine_vector mv_mpc1211 __initmv = {
  276. .mv_nr_irqs = 48,
  277. .mv_irq_demux = mpc1211_irq_demux,
  278. .mv_init_irq = init_mpc1211_IRQ,
  279. #ifdef CONFIG_HEARTBEAT
  280. .mv_heartbeat = heartbeat_mpc1211,
  281. #endif
  282. };
  283. ALIAS_MV(mpc1211)
  284. /* arch/sh/boards/mpc1211/rtc.c */
  285. void mpc1211_time_init(void);
  286. int __init platform_setup(void)
  287. {
  288. unsigned char spd_buf[128];
  289. __set_io_port_base(PA_PCI_IO);
  290. pci_write_config(0,0,0,0x54, 0xb0b00000);
  291. do {
  292. outb(ALI15X3_ABORT, SMBHSTCNT);
  293. spd_buf[0] = 0x0c;
  294. spd_buf[1] = 0x43;
  295. spd_buf[2] = 0x7f;
  296. spd_buf[3] = 0x03;
  297. spd_buf[4] = 0x00;
  298. spd_buf[5] = 0x03;
  299. spd_buf[6] = 0x00;
  300. } while (put_smb_blk(spd_buf, 0x69, 0, 7) < 0);
  301. board_time_init = mpc1211_time_init;
  302. return 0;
  303. }