setup.c 15 KB

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  1. /*
  2. * 64-bit pSeries and RS/6000 setup code.
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #undef DEBUG
  18. #include <linux/cpu.h>
  19. #include <linux/errno.h>
  20. #include <linux/sched.h>
  21. #include <linux/kernel.h>
  22. #include <linux/mm.h>
  23. #include <linux/stddef.h>
  24. #include <linux/unistd.h>
  25. #include <linux/slab.h>
  26. #include <linux/user.h>
  27. #include <linux/a.out.h>
  28. #include <linux/tty.h>
  29. #include <linux/major.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/reboot.h>
  32. #include <linux/init.h>
  33. #include <linux/ioport.h>
  34. #include <linux/console.h>
  35. #include <linux/pci.h>
  36. #include <linux/utsname.h>
  37. #include <linux/adb.h>
  38. #include <linux/module.h>
  39. #include <linux/delay.h>
  40. #include <linux/irq.h>
  41. #include <linux/seq_file.h>
  42. #include <linux/root_dev.h>
  43. #include <asm/mmu.h>
  44. #include <asm/processor.h>
  45. #include <asm/io.h>
  46. #include <asm/pgtable.h>
  47. #include <asm/prom.h>
  48. #include <asm/rtas.h>
  49. #include <asm/pci-bridge.h>
  50. #include <asm/iommu.h>
  51. #include <asm/dma.h>
  52. #include <asm/machdep.h>
  53. #include <asm/irq.h>
  54. #include <asm/kexec.h>
  55. #include <asm/time.h>
  56. #include <asm/nvram.h>
  57. #include "xics.h"
  58. #include <asm/pmc.h>
  59. #include <asm/mpic.h>
  60. #include <asm/ppc-pci.h>
  61. #include <asm/i8259.h>
  62. #include <asm/udbg.h>
  63. #include <asm/smp.h>
  64. #include "plpar_wrappers.h"
  65. #include "ras.h"
  66. #include "firmware.h"
  67. #ifdef DEBUG
  68. #define DBG(fmt...) udbg_printf(fmt)
  69. #else
  70. #define DBG(fmt...)
  71. #endif
  72. /* move those away to a .h */
  73. extern void smp_init_pseries_mpic(void);
  74. extern void smp_init_pseries_xics(void);
  75. extern void find_udbg_vterm(void);
  76. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  77. static void pseries_shared_idle_sleep(void);
  78. static void pseries_dedicated_idle_sleep(void);
  79. static struct device_node *pSeries_mpic_node;
  80. static void pSeries_show_cpuinfo(struct seq_file *m)
  81. {
  82. struct device_node *root;
  83. const char *model = "";
  84. root = of_find_node_by_path("/");
  85. if (root)
  86. model = get_property(root, "model", NULL);
  87. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  88. of_node_put(root);
  89. }
  90. /* Initialize firmware assisted non-maskable interrupts if
  91. * the firmware supports this feature.
  92. */
  93. static void __init fwnmi_init(void)
  94. {
  95. unsigned long system_reset_addr, machine_check_addr;
  96. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  97. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  98. return;
  99. /* If the kernel's not linked at zero we point the firmware at low
  100. * addresses anyway, and use a trampoline to get to the real code. */
  101. system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
  102. machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
  103. if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
  104. machine_check_addr))
  105. fwnmi_active = 1;
  106. }
  107. void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc,
  108. struct pt_regs *regs)
  109. {
  110. unsigned int cascade_irq = i8259_irq(regs);
  111. if (cascade_irq != NO_IRQ)
  112. generic_handle_irq(cascade_irq, regs);
  113. desc->chip->eoi(irq);
  114. }
  115. static void __init pseries_mpic_init_IRQ(void)
  116. {
  117. struct device_node *np, *old, *cascade = NULL;
  118. const unsigned int *addrp;
  119. unsigned long intack = 0;
  120. const unsigned int *opprop;
  121. unsigned long openpic_addr = 0;
  122. unsigned int cascade_irq;
  123. int naddr, n, i, opplen;
  124. struct mpic *mpic;
  125. np = of_find_node_by_path("/");
  126. naddr = prom_n_addr_cells(np);
  127. opprop = get_property(np, "platform-open-pic", &opplen);
  128. if (opprop != 0) {
  129. openpic_addr = of_read_number(opprop, naddr);
  130. printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
  131. }
  132. of_node_put(np);
  133. BUG_ON(openpic_addr == 0);
  134. /* Setup the openpic driver */
  135. mpic = mpic_alloc(pSeries_mpic_node, openpic_addr,
  136. MPIC_PRIMARY,
  137. 16, 250, /* isu size, irq count */
  138. " MPIC ");
  139. BUG_ON(mpic == NULL);
  140. /* Add ISUs */
  141. opplen /= sizeof(u32);
  142. for (n = 0, i = naddr; i < opplen; i += naddr, n++) {
  143. unsigned long isuaddr = of_read_number(opprop + i, naddr);
  144. mpic_assign_isu(mpic, n, isuaddr);
  145. }
  146. /* All ISUs are setup, complete initialization */
  147. mpic_init(mpic);
  148. /* Look for cascade */
  149. for_each_node_by_type(np, "interrupt-controller")
  150. if (device_is_compatible(np, "chrp,iic")) {
  151. cascade = np;
  152. break;
  153. }
  154. if (cascade == NULL)
  155. return;
  156. cascade_irq = irq_of_parse_and_map(cascade, 0);
  157. if (cascade == NO_IRQ) {
  158. printk(KERN_ERR "xics: failed to map cascade interrupt");
  159. return;
  160. }
  161. /* Check ACK type */
  162. for (old = of_node_get(cascade); old != NULL ; old = np) {
  163. np = of_get_parent(old);
  164. of_node_put(old);
  165. if (np == NULL)
  166. break;
  167. if (strcmp(np->name, "pci") != 0)
  168. continue;
  169. addrp = get_property(np, "8259-interrupt-acknowledge",
  170. NULL);
  171. if (addrp == NULL)
  172. continue;
  173. naddr = prom_n_addr_cells(np);
  174. intack = addrp[naddr-1];
  175. if (naddr > 1)
  176. intack |= ((unsigned long)addrp[naddr-2]) << 32;
  177. }
  178. if (intack)
  179. printk(KERN_DEBUG "mpic: PCI 8259 intack at 0x%016lx\n",
  180. intack);
  181. i8259_init(cascade, intack);
  182. of_node_put(cascade);
  183. set_irq_chained_handler(cascade_irq, pseries_8259_cascade);
  184. }
  185. static void pseries_lpar_enable_pmcs(void)
  186. {
  187. unsigned long set, reset;
  188. set = 1UL << 63;
  189. reset = 0;
  190. plpar_hcall_norets(H_PERFMON, set, reset);
  191. /* instruct hypervisor to maintain PMCs */
  192. if (firmware_has_feature(FW_FEATURE_SPLPAR))
  193. get_lppaca()->pmcregs_in_use = 1;
  194. }
  195. #ifdef CONFIG_KEXEC
  196. static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
  197. {
  198. /* Don't risk a hypervisor call if we're crashing */
  199. if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
  200. unsigned long addr;
  201. addr = __pa(get_slb_shadow());
  202. if (unregister_slb_shadow(hard_smp_processor_id(), addr))
  203. printk("SLB shadow buffer deregistration of "
  204. "cpu %u (hw_cpu_id %d) failed\n",
  205. smp_processor_id(),
  206. hard_smp_processor_id());
  207. addr = __pa(get_lppaca());
  208. if (unregister_vpa(hard_smp_processor_id(), addr)) {
  209. printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
  210. "failed\n", smp_processor_id(),
  211. hard_smp_processor_id());
  212. }
  213. }
  214. }
  215. static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary)
  216. {
  217. pseries_kexec_cpu_down(crash_shutdown, secondary);
  218. mpic_teardown_this_cpu(secondary);
  219. }
  220. static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary)
  221. {
  222. pseries_kexec_cpu_down(crash_shutdown, secondary);
  223. xics_teardown_cpu(secondary);
  224. }
  225. #endif /* CONFIG_KEXEC */
  226. static void __init pseries_discover_pic(void)
  227. {
  228. struct device_node *np;
  229. const char *typep;
  230. for (np = NULL; (np = of_find_node_by_name(np,
  231. "interrupt-controller"));) {
  232. typep = get_property(np, "compatible", NULL);
  233. if (strstr(typep, "open-pic")) {
  234. pSeries_mpic_node = of_node_get(np);
  235. ppc_md.init_IRQ = pseries_mpic_init_IRQ;
  236. ppc_md.get_irq = mpic_get_irq;
  237. #ifdef CONFIG_KEXEC
  238. ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic;
  239. #endif
  240. #ifdef CONFIG_SMP
  241. smp_init_pseries_mpic();
  242. #endif
  243. return;
  244. } else if (strstr(typep, "ppc-xicp")) {
  245. ppc_md.init_IRQ = xics_init_IRQ;
  246. #ifdef CONFIG_KEXEC
  247. ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
  248. #endif
  249. #ifdef CONFIG_SMP
  250. smp_init_pseries_xics();
  251. #endif
  252. return;
  253. }
  254. }
  255. printk(KERN_ERR "pSeries_discover_pic: failed to recognize"
  256. " interrupt-controller\n");
  257. }
  258. static void __init pSeries_setup_arch(void)
  259. {
  260. /* Discover PIC type and setup ppc_md accordingly */
  261. pseries_discover_pic();
  262. /* openpic global configuration register (64-bit format). */
  263. /* openpic Interrupt Source Unit pointer (64-bit format). */
  264. /* python0 facility area (mmio) (64-bit format) REAL address. */
  265. /* init to some ~sane value until calibrate_delay() runs */
  266. loops_per_jiffy = 50000000;
  267. if (ROOT_DEV == 0) {
  268. printk("No ramdisk, default root is /dev/sda2\n");
  269. ROOT_DEV = Root_SDA2;
  270. }
  271. fwnmi_init();
  272. /* Find and initialize PCI host bridges */
  273. init_pci_config_tokens();
  274. find_and_init_phbs();
  275. eeh_init();
  276. pSeries_nvram_init();
  277. /* Choose an idle loop */
  278. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  279. vpa_init(boot_cpuid);
  280. if (get_lppaca()->shared_proc) {
  281. printk(KERN_DEBUG "Using shared processor idle loop\n");
  282. ppc_md.power_save = pseries_shared_idle_sleep;
  283. } else {
  284. printk(KERN_DEBUG "Using dedicated idle loop\n");
  285. ppc_md.power_save = pseries_dedicated_idle_sleep;
  286. }
  287. } else {
  288. printk(KERN_DEBUG "Using default idle loop\n");
  289. }
  290. if (firmware_has_feature(FW_FEATURE_LPAR))
  291. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  292. else
  293. ppc_md.enable_pmcs = power4_enable_pmcs;
  294. }
  295. static int __init pSeries_init_panel(void)
  296. {
  297. /* Manually leave the kernel version on the panel. */
  298. ppc_md.progress("Linux ppc64\n", 0);
  299. ppc_md.progress(system_utsname.release, 0);
  300. return 0;
  301. }
  302. arch_initcall(pSeries_init_panel);
  303. static void pSeries_mach_cpu_die(void)
  304. {
  305. local_irq_disable();
  306. idle_task_exit();
  307. xics_teardown_cpu(0);
  308. rtas_stop_self();
  309. /* Should never get here... */
  310. BUG();
  311. for(;;);
  312. }
  313. static int pseries_set_dabr(unsigned long dabr)
  314. {
  315. return plpar_hcall_norets(H_SET_DABR, dabr);
  316. }
  317. static int pseries_set_xdabr(unsigned long dabr)
  318. {
  319. /* We want to catch accesses from kernel and userspace */
  320. return plpar_hcall_norets(H_SET_XDABR, dabr,
  321. H_DABRX_KERNEL | H_DABRX_USER);
  322. }
  323. /*
  324. * Early initialization. Relocation is on but do not reference unbolted pages
  325. */
  326. static void __init pSeries_init_early(void)
  327. {
  328. DBG(" -> pSeries_init_early()\n");
  329. fw_feature_init();
  330. if (firmware_has_feature(FW_FEATURE_LPAR))
  331. find_udbg_vterm();
  332. if (firmware_has_feature(FW_FEATURE_DABR))
  333. ppc_md.set_dabr = pseries_set_dabr;
  334. else if (firmware_has_feature(FW_FEATURE_XDABR))
  335. ppc_md.set_dabr = pseries_set_xdabr;
  336. iommu_init_early_pSeries();
  337. DBG(" <- pSeries_init_early()\n");
  338. }
  339. static int pSeries_check_legacy_ioport(unsigned int baseport)
  340. {
  341. struct device_node *np;
  342. #define I8042_DATA_REG 0x60
  343. #define FDC_BASE 0x3f0
  344. switch(baseport) {
  345. case I8042_DATA_REG:
  346. np = of_find_node_by_type(NULL, "8042");
  347. if (np == NULL)
  348. return -ENODEV;
  349. of_node_put(np);
  350. break;
  351. case FDC_BASE:
  352. np = of_find_node_by_type(NULL, "fdc");
  353. if (np == NULL)
  354. return -ENODEV;
  355. of_node_put(np);
  356. break;
  357. }
  358. return 0;
  359. }
  360. /*
  361. * Called very early, MMU is off, device-tree isn't unflattened
  362. */
  363. static int __init pSeries_probe_hypertas(unsigned long node,
  364. const char *uname, int depth,
  365. void *data)
  366. {
  367. if (depth != 1 ||
  368. (strcmp(uname, "rtas") != 0 && strcmp(uname, "rtas@0") != 0))
  369. return 0;
  370. if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL)
  371. powerpc_firmware_features |= FW_FEATURE_LPAR;
  372. if (firmware_has_feature(FW_FEATURE_LPAR))
  373. hpte_init_lpar();
  374. else
  375. hpte_init_native();
  376. return 1;
  377. }
  378. static int __init pSeries_probe(void)
  379. {
  380. unsigned long root = of_get_flat_dt_root();
  381. char *dtype = of_get_flat_dt_prop(of_get_flat_dt_root(),
  382. "device_type", NULL);
  383. if (dtype == NULL)
  384. return 0;
  385. if (strcmp(dtype, "chrp"))
  386. return 0;
  387. /* Cell blades firmware claims to be chrp while it's not. Until this
  388. * is fixed, we need to avoid those here.
  389. */
  390. if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") ||
  391. of_flat_dt_is_compatible(root, "IBM,CBEA"))
  392. return 0;
  393. DBG("pSeries detected, looking for LPAR capability...\n");
  394. /* Now try to figure out if we are running on LPAR */
  395. of_scan_flat_dt(pSeries_probe_hypertas, NULL);
  396. DBG("Machine is%s LPAR !\n",
  397. (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
  398. return 1;
  399. }
  400. DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
  401. static void pseries_dedicated_idle_sleep(void)
  402. {
  403. unsigned int cpu = smp_processor_id();
  404. unsigned long start_snooze;
  405. unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
  406. /*
  407. * Indicate to the HV that we are idle. Now would be
  408. * a good time to find other work to dispatch.
  409. */
  410. get_lppaca()->idle = 1;
  411. /*
  412. * We come in with interrupts disabled, and need_resched()
  413. * has been checked recently. If we should poll for a little
  414. * while, do so.
  415. */
  416. if (*smt_snooze_delay) {
  417. start_snooze = get_tb() +
  418. *smt_snooze_delay * tb_ticks_per_usec;
  419. local_irq_enable();
  420. set_thread_flag(TIF_POLLING_NRFLAG);
  421. while (get_tb() < start_snooze) {
  422. if (need_resched() || cpu_is_offline(cpu))
  423. goto out;
  424. ppc64_runlatch_off();
  425. HMT_low();
  426. HMT_very_low();
  427. }
  428. HMT_medium();
  429. clear_thread_flag(TIF_POLLING_NRFLAG);
  430. smp_mb();
  431. local_irq_disable();
  432. if (need_resched() || cpu_is_offline(cpu))
  433. goto out;
  434. }
  435. /*
  436. * If not SMT, cede processor. If CPU is running SMT
  437. * cede if the other thread is not idle, so that it can
  438. * go single-threaded. If the other thread is idle,
  439. * we ask the hypervisor if it has pending work it
  440. * wants to do and cede if it does. Otherwise we keep
  441. * polling in order to reduce interrupt latency.
  442. *
  443. * Doing the cede when the other thread is active will
  444. * result in this thread going dormant, meaning the other
  445. * thread gets to run in single-threaded (ST) mode, which
  446. * is slightly faster than SMT mode with this thread at
  447. * very low priority. The cede enables interrupts, which
  448. * doesn't matter here.
  449. */
  450. if (!cpu_has_feature(CPU_FTR_SMT) || !lppaca[cpu ^ 1].idle
  451. || poll_pending() == H_PENDING)
  452. cede_processor();
  453. out:
  454. HMT_medium();
  455. get_lppaca()->idle = 0;
  456. }
  457. static void pseries_shared_idle_sleep(void)
  458. {
  459. /*
  460. * Indicate to the HV that we are idle. Now would be
  461. * a good time to find other work to dispatch.
  462. */
  463. get_lppaca()->idle = 1;
  464. /*
  465. * Yield the processor to the hypervisor. We return if
  466. * an external interrupt occurs (which are driven prior
  467. * to returning here) or if a prod occurs from another
  468. * processor. When returning here, external interrupts
  469. * are enabled.
  470. */
  471. cede_processor();
  472. get_lppaca()->idle = 0;
  473. }
  474. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  475. {
  476. if (firmware_has_feature(FW_FEATURE_LPAR))
  477. return PCI_PROBE_DEVTREE;
  478. return PCI_PROBE_NORMAL;
  479. }
  480. define_machine(pseries) {
  481. .name = "pSeries",
  482. .probe = pSeries_probe,
  483. .setup_arch = pSeries_setup_arch,
  484. .init_early = pSeries_init_early,
  485. .show_cpuinfo = pSeries_show_cpuinfo,
  486. .log_error = pSeries_log_error,
  487. .pcibios_fixup = pSeries_final_fixup,
  488. .pci_probe_mode = pSeries_pci_probe_mode,
  489. .irq_bus_setup = pSeries_irq_bus_setup,
  490. .restart = rtas_restart,
  491. .power_off = rtas_power_off,
  492. .halt = rtas_halt,
  493. .panic = rtas_os_term,
  494. .cpu_die = pSeries_mach_cpu_die,
  495. .get_boot_time = rtas_get_boot_time,
  496. .get_rtc_time = rtas_get_rtc_time,
  497. .set_rtc_time = rtas_set_rtc_time,
  498. .calibrate_decr = generic_calibrate_decr,
  499. .progress = rtas_progress,
  500. .check_legacy_ioport = pSeries_check_legacy_ioport,
  501. .system_reset_exception = pSeries_system_reset_exception,
  502. .machine_check_exception = pSeries_machine_check_exception,
  503. #ifdef CONFIG_KEXEC
  504. .machine_kexec = default_machine_kexec,
  505. .machine_kexec_prepare = default_machine_kexec_prepare,
  506. .machine_crash_shutdown = default_machine_crash_shutdown,
  507. #endif
  508. };