ras.c 11 KB

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  1. /*
  2. * Copyright (C) 2001 Dave Engebretsen IBM Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. */
  18. /* Change Activity:
  19. * 2001/09/21 : engebret : Created with minimal EPOW and HW exception support.
  20. * End Change Activity
  21. */
  22. #include <linux/errno.h>
  23. #include <linux/threads.h>
  24. #include <linux/kernel_stat.h>
  25. #include <linux/signal.h>
  26. #include <linux/sched.h>
  27. #include <linux/ioport.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/timex.h>
  30. #include <linux/init.h>
  31. #include <linux/slab.h>
  32. #include <linux/pci.h>
  33. #include <linux/delay.h>
  34. #include <linux/irq.h>
  35. #include <linux/random.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/bitops.h>
  38. #include <asm/uaccess.h>
  39. #include <asm/system.h>
  40. #include <asm/io.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/irq.h>
  43. #include <asm/cache.h>
  44. #include <asm/prom.h>
  45. #include <asm/ptrace.h>
  46. #include <asm/machdep.h>
  47. #include <asm/rtas.h>
  48. #include <asm/udbg.h>
  49. #include <asm/firmware.h>
  50. #include "ras.h"
  51. static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
  52. static DEFINE_SPINLOCK(ras_log_buf_lock);
  53. char mce_data_buf[RTAS_ERROR_LOG_MAX];
  54. static int ras_get_sensor_state_token;
  55. static int ras_check_exception_token;
  56. #define EPOW_SENSOR_TOKEN 9
  57. #define EPOW_SENSOR_INDEX 0
  58. #define RAS_VECTOR_OFFSET 0x500
  59. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id,
  60. struct pt_regs * regs);
  61. static irqreturn_t ras_error_interrupt(int irq, void *dev_id,
  62. struct pt_regs * regs);
  63. /* #define DEBUG */
  64. static void request_ras_irqs(struct device_node *np,
  65. irqreturn_t (*handler)(int, void *, struct pt_regs *),
  66. const char *name)
  67. {
  68. int i, index, count = 0;
  69. struct of_irq oirq;
  70. const u32 *opicprop;
  71. unsigned int opicplen;
  72. unsigned int virqs[16];
  73. /* Check for obsolete "open-pic-interrupt" property. If present, then
  74. * map those interrupts using the default interrupt host and default
  75. * trigger
  76. */
  77. opicprop = get_property(np, "open-pic-interrupt", &opicplen);
  78. if (opicprop) {
  79. opicplen /= sizeof(u32);
  80. for (i = 0; i < opicplen; i++) {
  81. if (count > 15)
  82. break;
  83. virqs[count] = irq_create_mapping(NULL, *(opicprop++));
  84. if (virqs[count] == NO_IRQ)
  85. printk(KERN_ERR "Unable to allocate interrupt "
  86. "number for %s\n", np->full_name);
  87. else
  88. count++;
  89. }
  90. }
  91. /* Else use normal interrupt tree parsing */
  92. else {
  93. /* First try to do a proper OF tree parsing */
  94. for (index = 0; of_irq_map_one(np, index, &oirq) == 0;
  95. index++) {
  96. if (count > 15)
  97. break;
  98. virqs[count] = irq_create_of_mapping(oirq.controller,
  99. oirq.specifier,
  100. oirq.size);
  101. if (virqs[count] == NO_IRQ)
  102. printk(KERN_ERR "Unable to allocate interrupt "
  103. "number for %s\n", np->full_name);
  104. else
  105. count++;
  106. }
  107. }
  108. /* Now request them */
  109. for (i = 0; i < count; i++) {
  110. if (request_irq(virqs[i], handler, 0, name, NULL)) {
  111. printk(KERN_ERR "Unable to request interrupt %d for "
  112. "%s\n", virqs[i], np->full_name);
  113. return;
  114. }
  115. }
  116. }
  117. /*
  118. * Initialize handlers for the set of interrupts caused by hardware errors
  119. * and power system events.
  120. */
  121. static int __init init_ras_IRQ(void)
  122. {
  123. struct device_node *np;
  124. ras_get_sensor_state_token = rtas_token("get-sensor-state");
  125. ras_check_exception_token = rtas_token("check-exception");
  126. /* Internal Errors */
  127. np = of_find_node_by_path("/event-sources/internal-errors");
  128. if (np != NULL) {
  129. request_ras_irqs(np, ras_error_interrupt, "RAS_ERROR");
  130. of_node_put(np);
  131. }
  132. /* EPOW Events */
  133. np = of_find_node_by_path("/event-sources/epow-events");
  134. if (np != NULL) {
  135. request_ras_irqs(np, ras_epow_interrupt, "RAS_EPOW");
  136. of_node_put(np);
  137. }
  138. return 0;
  139. }
  140. __initcall(init_ras_IRQ);
  141. /*
  142. * Handle power subsystem events (EPOW).
  143. *
  144. * Presently we just log the event has occurred. This should be fixed
  145. * to examine the type of power failure and take appropriate action where
  146. * the time horizon permits something useful to be done.
  147. */
  148. static irqreturn_t
  149. ras_epow_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  150. {
  151. int status = 0xdeadbeef;
  152. int state = 0;
  153. int critical;
  154. status = rtas_call(ras_get_sensor_state_token, 2, 2, &state,
  155. EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX);
  156. if (state > 3)
  157. critical = 1; /* Time Critical */
  158. else
  159. critical = 0;
  160. spin_lock(&ras_log_buf_lock);
  161. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  162. RAS_VECTOR_OFFSET,
  163. irq_map[irq].hwirq,
  164. RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS,
  165. critical, __pa(&ras_log_buf),
  166. rtas_get_error_log_max());
  167. udbg_printf("EPOW <0x%lx 0x%x 0x%x>\n",
  168. *((unsigned long *)&ras_log_buf), status, state);
  169. printk(KERN_WARNING "EPOW <0x%lx 0x%x 0x%x>\n",
  170. *((unsigned long *)&ras_log_buf), status, state);
  171. /* format and print the extended information */
  172. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
  173. spin_unlock(&ras_log_buf_lock);
  174. return IRQ_HANDLED;
  175. }
  176. /*
  177. * Handle hardware error interrupts.
  178. *
  179. * RTAS check-exception is called to collect data on the exception. If
  180. * the error is deemed recoverable, we log a warning and return.
  181. * For nonrecoverable errors, an error is logged and we stop all processing
  182. * as quickly as possible in order to prevent propagation of the failure.
  183. */
  184. static irqreturn_t
  185. ras_error_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  186. {
  187. struct rtas_error_log *rtas_elog;
  188. int status = 0xdeadbeef;
  189. int fatal;
  190. spin_lock(&ras_log_buf_lock);
  191. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  192. RAS_VECTOR_OFFSET,
  193. irq_map[irq].hwirq,
  194. RTAS_INTERNAL_ERROR, 1 /*Time Critical */,
  195. __pa(&ras_log_buf),
  196. rtas_get_error_log_max());
  197. rtas_elog = (struct rtas_error_log *)ras_log_buf;
  198. if ((status == 0) && (rtas_elog->severity >= RTAS_SEVERITY_ERROR_SYNC))
  199. fatal = 1;
  200. else
  201. fatal = 0;
  202. /* format and print the extended information */
  203. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal);
  204. if (fatal) {
  205. udbg_printf("Fatal HW Error <0x%lx 0x%x>\n",
  206. *((unsigned long *)&ras_log_buf), status);
  207. printk(KERN_EMERG "Error: Fatal hardware error <0x%lx 0x%x>\n",
  208. *((unsigned long *)&ras_log_buf), status);
  209. #ifndef DEBUG
  210. /* Don't actually power off when debugging so we can test
  211. * without actually failing while injecting errors.
  212. * Error data will not be logged to syslog.
  213. */
  214. ppc_md.power_off();
  215. #endif
  216. } else {
  217. udbg_printf("Recoverable HW Error <0x%lx 0x%x>\n",
  218. *((unsigned long *)&ras_log_buf), status);
  219. printk(KERN_WARNING
  220. "Warning: Recoverable hardware error <0x%lx 0x%x>\n",
  221. *((unsigned long *)&ras_log_buf), status);
  222. }
  223. spin_unlock(&ras_log_buf_lock);
  224. return IRQ_HANDLED;
  225. }
  226. /* Get the error information for errors coming through the
  227. * FWNMI vectors. The pt_regs' r3 will be updated to reflect
  228. * the actual r3 if possible, and a ptr to the error log entry
  229. * will be returned if found.
  230. *
  231. * The mce_data_buf does not have any locks or protection around it,
  232. * if a second machine check comes in, or a system reset is done
  233. * before we have logged the error, then we will get corruption in the
  234. * error log. This is preferable over holding off on calling
  235. * ibm,nmi-interlock which would result in us checkstopping if a
  236. * second machine check did come in.
  237. */
  238. static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
  239. {
  240. unsigned long errdata = regs->gpr[3];
  241. struct rtas_error_log *errhdr = NULL;
  242. unsigned long *savep;
  243. if ((errdata >= 0x7000 && errdata < 0x7fff0) ||
  244. (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) {
  245. savep = __va(errdata);
  246. regs->gpr[3] = savep[0]; /* restore original r3 */
  247. memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
  248. memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX);
  249. errhdr = (struct rtas_error_log *)mce_data_buf;
  250. } else {
  251. printk("FWNMI: corrupt r3\n");
  252. }
  253. return errhdr;
  254. }
  255. /* Call this when done with the data returned by FWNMI_get_errinfo.
  256. * It will release the saved data area for other CPUs in the
  257. * partition to receive FWNMI errors.
  258. */
  259. static void fwnmi_release_errinfo(void)
  260. {
  261. int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL);
  262. if (ret != 0)
  263. printk("FWNMI: nmi-interlock failed: %d\n", ret);
  264. }
  265. int pSeries_system_reset_exception(struct pt_regs *regs)
  266. {
  267. if (fwnmi_active) {
  268. struct rtas_error_log *errhdr = fwnmi_get_errinfo(regs);
  269. if (errhdr) {
  270. /* XXX Should look at FWNMI information */
  271. }
  272. fwnmi_release_errinfo();
  273. }
  274. return 0; /* need to perform reset */
  275. }
  276. /*
  277. * See if we can recover from a machine check exception.
  278. * This is only called on power4 (or above) and only via
  279. * the Firmware Non-Maskable Interrupts (fwnmi) handler
  280. * which provides the error analysis for us.
  281. *
  282. * Return 1 if corrected (or delivered a signal).
  283. * Return 0 if there is nothing we can do.
  284. */
  285. static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err)
  286. {
  287. int nonfatal = 0;
  288. if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
  289. /* Platform corrected itself */
  290. nonfatal = 1;
  291. } else if ((regs->msr & MSR_RI) &&
  292. user_mode(regs) &&
  293. err->severity == RTAS_SEVERITY_ERROR_SYNC &&
  294. err->disposition == RTAS_DISP_NOT_RECOVERED &&
  295. err->target == RTAS_TARGET_MEMORY &&
  296. err->type == RTAS_TYPE_ECC_UNCORR &&
  297. !(current->pid == 0 || current->pid == 1)) {
  298. /* Kill off a user process with an ECC error */
  299. printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n",
  300. current->pid);
  301. /* XXX something better for ECC error? */
  302. _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
  303. nonfatal = 1;
  304. }
  305. log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
  306. return nonfatal;
  307. }
  308. /*
  309. * Handle a machine check.
  310. *
  311. * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi)
  312. * should be present. If so the handler which called us tells us if the
  313. * error was recovered (never true if RI=0).
  314. *
  315. * On hardware prior to Power 4 these exceptions were asynchronous which
  316. * means we can't tell exactly where it occurred and so we can't recover.
  317. */
  318. int pSeries_machine_check_exception(struct pt_regs *regs)
  319. {
  320. struct rtas_error_log *errp;
  321. if (fwnmi_active) {
  322. errp = fwnmi_get_errinfo(regs);
  323. fwnmi_release_errinfo();
  324. if (errp && recover_mce(regs, errp))
  325. return 1;
  326. }
  327. return 0;
  328. }