ip22-int.c 11 KB

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  1. /*
  2. * ip22-int.c: Routines for generic manipulation of the INT[23] ASIC
  3. * found on INDY and Indigo2 workstations.
  4. *
  5. * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  6. * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
  7. * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
  8. * - Indigo2 changes
  9. * - Interrupt handling fixes
  10. * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
  11. */
  12. #include <linux/types.h>
  13. #include <linux/init.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/signal.h>
  16. #include <linux/sched.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/irq.h>
  19. #include <asm/mipsregs.h>
  20. #include <asm/addrspace.h>
  21. #include <asm/sgi/ioc.h>
  22. #include <asm/sgi/hpc3.h>
  23. #include <asm/sgi/ip22.h>
  24. /* #define DEBUG_SGINT */
  25. /* So far nothing hangs here */
  26. #undef USE_LIO3_IRQ
  27. struct sgint_regs *sgint;
  28. static char lc0msk_to_irqnr[256];
  29. static char lc1msk_to_irqnr[256];
  30. static char lc2msk_to_irqnr[256];
  31. static char lc3msk_to_irqnr[256];
  32. extern int ip22_eisa_init(void);
  33. static void enable_local0_irq(unsigned int irq)
  34. {
  35. unsigned long flags;
  36. local_irq_save(flags);
  37. /* don't allow mappable interrupt to be enabled from setup_irq,
  38. * we have our own way to do so */
  39. if (irq != SGI_MAP_0_IRQ)
  40. sgint->imask0 |= (1 << (irq - SGINT_LOCAL0));
  41. local_irq_restore(flags);
  42. }
  43. static unsigned int startup_local0_irq(unsigned int irq)
  44. {
  45. enable_local0_irq(irq);
  46. return 0; /* Never anything pending */
  47. }
  48. static void disable_local0_irq(unsigned int irq)
  49. {
  50. unsigned long flags;
  51. local_irq_save(flags);
  52. sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0));
  53. local_irq_restore(flags);
  54. }
  55. #define shutdown_local0_irq disable_local0_irq
  56. #define mask_and_ack_local0_irq disable_local0_irq
  57. static void end_local0_irq (unsigned int irq)
  58. {
  59. if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
  60. enable_local0_irq(irq);
  61. }
  62. static struct irq_chip ip22_local0_irq_type = {
  63. .typename = "IP22 local 0",
  64. .startup = startup_local0_irq,
  65. .shutdown = shutdown_local0_irq,
  66. .enable = enable_local0_irq,
  67. .disable = disable_local0_irq,
  68. .ack = mask_and_ack_local0_irq,
  69. .end = end_local0_irq,
  70. };
  71. static void enable_local1_irq(unsigned int irq)
  72. {
  73. unsigned long flags;
  74. local_irq_save(flags);
  75. /* don't allow mappable interrupt to be enabled from setup_irq,
  76. * we have our own way to do so */
  77. if (irq != SGI_MAP_1_IRQ)
  78. sgint->imask1 |= (1 << (irq - SGINT_LOCAL1));
  79. local_irq_restore(flags);
  80. }
  81. static unsigned int startup_local1_irq(unsigned int irq)
  82. {
  83. enable_local1_irq(irq);
  84. return 0; /* Never anything pending */
  85. }
  86. void disable_local1_irq(unsigned int irq)
  87. {
  88. unsigned long flags;
  89. local_irq_save(flags);
  90. sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1));
  91. local_irq_restore(flags);
  92. }
  93. #define shutdown_local1_irq disable_local1_irq
  94. #define mask_and_ack_local1_irq disable_local1_irq
  95. static void end_local1_irq (unsigned int irq)
  96. {
  97. if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
  98. enable_local1_irq(irq);
  99. }
  100. static struct irq_chip ip22_local1_irq_type = {
  101. .typename = "IP22 local 1",
  102. .startup = startup_local1_irq,
  103. .shutdown = shutdown_local1_irq,
  104. .enable = enable_local1_irq,
  105. .disable = disable_local1_irq,
  106. .ack = mask_and_ack_local1_irq,
  107. .end = end_local1_irq,
  108. };
  109. static void enable_local2_irq(unsigned int irq)
  110. {
  111. unsigned long flags;
  112. local_irq_save(flags);
  113. sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
  114. sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2));
  115. local_irq_restore(flags);
  116. }
  117. static unsigned int startup_local2_irq(unsigned int irq)
  118. {
  119. enable_local2_irq(irq);
  120. return 0; /* Never anything pending */
  121. }
  122. void disable_local2_irq(unsigned int irq)
  123. {
  124. unsigned long flags;
  125. local_irq_save(flags);
  126. sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2));
  127. if (!sgint->cmeimask0)
  128. sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
  129. local_irq_restore(flags);
  130. }
  131. #define shutdown_local2_irq disable_local2_irq
  132. #define mask_and_ack_local2_irq disable_local2_irq
  133. static void end_local2_irq (unsigned int irq)
  134. {
  135. if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
  136. enable_local2_irq(irq);
  137. }
  138. static struct irq_chip ip22_local2_irq_type = {
  139. .typename = "IP22 local 2",
  140. .startup = startup_local2_irq,
  141. .shutdown = shutdown_local2_irq,
  142. .enable = enable_local2_irq,
  143. .disable = disable_local2_irq,
  144. .ack = mask_and_ack_local2_irq,
  145. .end = end_local2_irq,
  146. };
  147. static void enable_local3_irq(unsigned int irq)
  148. {
  149. unsigned long flags;
  150. local_irq_save(flags);
  151. sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
  152. sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3));
  153. local_irq_restore(flags);
  154. }
  155. static unsigned int startup_local3_irq(unsigned int irq)
  156. {
  157. enable_local3_irq(irq);
  158. return 0; /* Never anything pending */
  159. }
  160. void disable_local3_irq(unsigned int irq)
  161. {
  162. unsigned long flags;
  163. local_irq_save(flags);
  164. sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3));
  165. if (!sgint->cmeimask1)
  166. sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
  167. local_irq_restore(flags);
  168. }
  169. #define shutdown_local3_irq disable_local3_irq
  170. #define mask_and_ack_local3_irq disable_local3_irq
  171. static void end_local3_irq (unsigned int irq)
  172. {
  173. if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
  174. enable_local3_irq(irq);
  175. }
  176. static struct irq_chip ip22_local3_irq_type = {
  177. .typename = "IP22 local 3",
  178. .startup = startup_local3_irq,
  179. .shutdown = shutdown_local3_irq,
  180. .enable = enable_local3_irq,
  181. .disable = disable_local3_irq,
  182. .ack = mask_and_ack_local3_irq,
  183. .end = end_local3_irq,
  184. };
  185. static void indy_local0_irqdispatch(struct pt_regs *regs)
  186. {
  187. u8 mask = sgint->istat0 & sgint->imask0;
  188. u8 mask2;
  189. int irq;
  190. if (mask & SGINT_ISTAT0_LIO2) {
  191. mask2 = sgint->vmeistat & sgint->cmeimask0;
  192. irq = lc2msk_to_irqnr[mask2];
  193. } else
  194. irq = lc0msk_to_irqnr[mask];
  195. /* if irq == 0, then the interrupt has already been cleared */
  196. if (irq)
  197. do_IRQ(irq, regs);
  198. return;
  199. }
  200. static void indy_local1_irqdispatch(struct pt_regs *regs)
  201. {
  202. u8 mask = sgint->istat1 & sgint->imask1;
  203. u8 mask2;
  204. int irq;
  205. if (mask & SGINT_ISTAT1_LIO3) {
  206. mask2 = sgint->vmeistat & sgint->cmeimask1;
  207. irq = lc3msk_to_irqnr[mask2];
  208. } else
  209. irq = lc1msk_to_irqnr[mask];
  210. /* if irq == 0, then the interrupt has already been cleared */
  211. if (irq)
  212. do_IRQ(irq, regs);
  213. return;
  214. }
  215. extern void ip22_be_interrupt(int irq, struct pt_regs *regs);
  216. static void indy_buserror_irq(struct pt_regs *regs)
  217. {
  218. int irq = SGI_BUSERR_IRQ;
  219. irq_enter();
  220. kstat_this_cpu.irqs[irq]++;
  221. ip22_be_interrupt(irq, regs);
  222. irq_exit();
  223. }
  224. static struct irqaction local0_cascade = {
  225. .handler = no_action,
  226. .flags = IRQF_DISABLED,
  227. .name = "local0 cascade",
  228. };
  229. static struct irqaction local1_cascade = {
  230. .handler = no_action,
  231. .flags = IRQF_DISABLED,
  232. .name = "local1 cascade",
  233. };
  234. static struct irqaction buserr = {
  235. .handler = no_action,
  236. .flags = IRQF_DISABLED,
  237. .name = "Bus Error",
  238. };
  239. static struct irqaction map0_cascade = {
  240. .handler = no_action,
  241. .flags = IRQF_DISABLED,
  242. .name = "mapable0 cascade",
  243. };
  244. #ifdef USE_LIO3_IRQ
  245. static struct irqaction map1_cascade = {
  246. .handler = no_action,
  247. .flags = IRQF_DISABLED,
  248. .name = "mapable1 cascade",
  249. };
  250. #define SGI_INTERRUPTS SGINT_END
  251. #else
  252. #define SGI_INTERRUPTS SGINT_LOCAL3
  253. #endif
  254. extern void indy_r4k_timer_interrupt(struct pt_regs *regs);
  255. extern void indy_8254timer_irq(struct pt_regs *regs);
  256. /*
  257. * IRQs on the INDY look basically (barring software IRQs which we don't use
  258. * at all) like:
  259. *
  260. * MIPS IRQ Source
  261. * -------- ------
  262. * 0 Software (ignored)
  263. * 1 Software (ignored)
  264. * 2 Local IRQ level zero
  265. * 3 Local IRQ level one
  266. * 4 8254 Timer zero
  267. * 5 8254 Timer one
  268. * 6 Bus Error
  269. * 7 R4k timer (what we use)
  270. *
  271. * We handle the IRQ according to _our_ priority which is:
  272. *
  273. * Highest ---- R4k Timer
  274. * Local IRQ zero
  275. * Local IRQ one
  276. * Bus Error
  277. * 8254 Timer zero
  278. * Lowest ---- 8254 Timer one
  279. *
  280. * then we just return, if multiple IRQs are pending then we will just take
  281. * another exception, big deal.
  282. */
  283. asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
  284. {
  285. unsigned int pending = read_c0_cause();
  286. /*
  287. * First we check for r4k counter/timer IRQ.
  288. */
  289. if (pending & CAUSEF_IP7)
  290. indy_r4k_timer_interrupt(regs);
  291. else if (pending & CAUSEF_IP2)
  292. indy_local0_irqdispatch(regs);
  293. else if (pending & CAUSEF_IP3)
  294. indy_local1_irqdispatch(regs);
  295. else if (pending & CAUSEF_IP6)
  296. indy_buserror_irq(regs);
  297. else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
  298. indy_8254timer_irq(regs);
  299. }
  300. extern void mips_cpu_irq_init(unsigned int irq_base);
  301. void __init arch_init_irq(void)
  302. {
  303. int i;
  304. /* Init local mask --> irq tables. */
  305. for (i = 0; i < 256; i++) {
  306. if (i & 0x80) {
  307. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7;
  308. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7;
  309. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7;
  310. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7;
  311. } else if (i & 0x40) {
  312. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6;
  313. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6;
  314. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 6;
  315. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 6;
  316. } else if (i & 0x20) {
  317. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 5;
  318. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 5;
  319. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 5;
  320. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 5;
  321. } else if (i & 0x10) {
  322. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 4;
  323. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 4;
  324. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 4;
  325. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 4;
  326. } else if (i & 0x08) {
  327. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 3;
  328. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 3;
  329. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 3;
  330. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 3;
  331. } else if (i & 0x04) {
  332. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 2;
  333. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 2;
  334. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 2;
  335. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 2;
  336. } else if (i & 0x02) {
  337. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 1;
  338. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 1;
  339. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 1;
  340. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 1;
  341. } else if (i & 0x01) {
  342. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 0;
  343. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 0;
  344. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 0;
  345. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 0;
  346. } else {
  347. lc0msk_to_irqnr[i] = 0;
  348. lc1msk_to_irqnr[i] = 0;
  349. lc2msk_to_irqnr[i] = 0;
  350. lc3msk_to_irqnr[i] = 0;
  351. }
  352. }
  353. /* Mask out all interrupts. */
  354. sgint->imask0 = 0;
  355. sgint->imask1 = 0;
  356. sgint->cmeimask0 = 0;
  357. sgint->cmeimask1 = 0;
  358. /* init CPU irqs */
  359. mips_cpu_irq_init(SGINT_CPU);
  360. for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) {
  361. struct irq_chip *handler;
  362. if (i < SGINT_LOCAL1)
  363. handler = &ip22_local0_irq_type;
  364. else if (i < SGINT_LOCAL2)
  365. handler = &ip22_local1_irq_type;
  366. else if (i < SGINT_LOCAL3)
  367. handler = &ip22_local2_irq_type;
  368. else
  369. handler = &ip22_local3_irq_type;
  370. irq_desc[i].status = IRQ_DISABLED;
  371. irq_desc[i].action = 0;
  372. irq_desc[i].depth = 1;
  373. irq_desc[i].chip = handler;
  374. }
  375. /* vector handler. this register the IRQ as non-sharable */
  376. setup_irq(SGI_LOCAL_0_IRQ, &local0_cascade);
  377. setup_irq(SGI_LOCAL_1_IRQ, &local1_cascade);
  378. setup_irq(SGI_BUSERR_IRQ, &buserr);
  379. /* cascade in cascade. i love Indy ;-) */
  380. setup_irq(SGI_MAP_0_IRQ, &map0_cascade);
  381. #ifdef USE_LIO3_IRQ
  382. setup_irq(SGI_MAP_1_IRQ, &map1_cascade);
  383. #endif
  384. #ifdef CONFIG_EISA
  385. if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */
  386. ip22_eisa_init ();
  387. #endif
  388. }