sim_smp.c 2.6 KB

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  1. /*
  2. * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
  3. *
  4. * This program is free software; you can distribute it and/or modify it
  5. * under the terms of the GNU General Public License (Version 2) as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  11. * for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along
  14. * with this program; if not, write to the Free Software Foundation, Inc.,
  15. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  16. *
  17. */
  18. /*
  19. * Simulator Platform-specific hooks for SMP operation
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/sched.h>
  23. #include <linux/cpumask.h>
  24. #include <linux/interrupt.h>
  25. #include <asm/atomic.h>
  26. #include <asm/cpu.h>
  27. #include <asm/processor.h>
  28. #include <asm/system.h>
  29. #include <asm/hardirq.h>
  30. #include <asm/mmu_context.h>
  31. #include <asm/smp.h>
  32. #ifdef CONFIG_MIPS_MT_SMTC
  33. #include <asm/smtc_ipi.h>
  34. #endif /* CONFIG_MIPS_MT_SMTC */
  35. /* VPE/SMP Prototype implements platform interfaces directly */
  36. #if !defined(CONFIG_MIPS_MT_SMP)
  37. /*
  38. * Cause the specified action to be performed on a targeted "CPU"
  39. */
  40. void core_send_ipi(int cpu, unsigned int action)
  41. {
  42. #ifdef CONFIG_MIPS_MT_SMTC
  43. smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
  44. #endif /* CONFIG_MIPS_MT_SMTC */
  45. /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
  46. }
  47. /*
  48. * Platform "CPU" startup hook
  49. */
  50. void prom_boot_secondary(int cpu, struct task_struct *idle)
  51. {
  52. #ifdef CONFIG_MIPS_MT_SMTC
  53. smtc_boot_secondary(cpu, idle);
  54. #endif /* CONFIG_MIPS_MT_SMTC */
  55. }
  56. /*
  57. * Post-config but pre-boot cleanup entry point
  58. */
  59. void prom_init_secondary(void)
  60. {
  61. #ifdef CONFIG_MIPS_MT_SMTC
  62. void smtc_init_secondary(void);
  63. smtc_init_secondary();
  64. #endif /* CONFIG_MIPS_MT_SMTC */
  65. }
  66. /*
  67. * Platform SMP pre-initialization
  68. */
  69. void prom_prepare_cpus(unsigned int max_cpus)
  70. {
  71. #ifdef CONFIG_MIPS_MT_SMTC
  72. /*
  73. * As noted above, we can assume a single CPU for now
  74. * but it may be multithreaded.
  75. */
  76. if (read_c0_config3() & (1<<2)) {
  77. mipsmt_prepare_cpus(max_cpus);
  78. }
  79. #endif /* CONFIG_MIPS_MT_SMTC */
  80. }
  81. /*
  82. * SMP initialization finalization entry point
  83. */
  84. void prom_smp_finish(void)
  85. {
  86. #ifdef CONFIG_MIPS_MT_SMTC
  87. smtc_smp_finish();
  88. #endif /* CONFIG_MIPS_MT_SMTC */
  89. }
  90. /*
  91. * Hook for after all CPUs are online
  92. */
  93. void prom_cpus_done(void)
  94. {
  95. #ifdef CONFIG_MIPS_MT_SMTC
  96. #endif /* CONFIG_MIPS_MT_SMTC */
  97. }
  98. #endif /* CONFIG_MIPS32R2_MT_SMP */