ptrace.c 11 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1992 Ross Biro
  7. * Copyright (C) Linus Torvalds
  8. * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
  9. * Copyright (C) 1996 David S. Miller
  10. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  11. * Copyright (C) 1999 MIPS Technologies, Inc.
  12. * Copyright (C) 2000 Ulf Carlsson
  13. *
  14. * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
  15. * binaries.
  16. */
  17. #include <linux/compiler.h>
  18. #include <linux/kernel.h>
  19. #include <linux/sched.h>
  20. #include <linux/mm.h>
  21. #include <linux/errno.h>
  22. #include <linux/ptrace.h>
  23. #include <linux/audit.h>
  24. #include <linux/smp.h>
  25. #include <linux/smp_lock.h>
  26. #include <linux/user.h>
  27. #include <linux/security.h>
  28. #include <linux/signal.h>
  29. #include <asm/byteorder.h>
  30. #include <asm/cpu.h>
  31. #include <asm/dsp.h>
  32. #include <asm/fpu.h>
  33. #include <asm/mipsregs.h>
  34. #include <asm/mipsmtregs.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/page.h>
  37. #include <asm/system.h>
  38. #include <asm/uaccess.h>
  39. #include <asm/bootinfo.h>
  40. #include <asm/reg.h>
  41. /*
  42. * Called by kernel/ptrace.c when detaching..
  43. *
  44. * Make sure single step bits etc are not set.
  45. */
  46. void ptrace_disable(struct task_struct *child)
  47. {
  48. /* Nothing to do.. */
  49. }
  50. /*
  51. * Read a general register set. We always use the 64-bit format, even
  52. * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
  53. * Registers are sign extended to fill the available space.
  54. */
  55. int ptrace_getregs (struct task_struct *child, __s64 __user *data)
  56. {
  57. struct pt_regs *regs;
  58. int i;
  59. if (!access_ok(VERIFY_WRITE, data, 38 * 8))
  60. return -EIO;
  61. regs = task_pt_regs(child);
  62. for (i = 0; i < 32; i++)
  63. __put_user (regs->regs[i], data + i);
  64. __put_user (regs->lo, data + EF_LO - EF_R0);
  65. __put_user (regs->hi, data + EF_HI - EF_R0);
  66. __put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
  67. __put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
  68. __put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
  69. __put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
  70. return 0;
  71. }
  72. /*
  73. * Write a general register set. As for PTRACE_GETREGS, we always use
  74. * the 64-bit format. On a 32-bit kernel only the lower order half
  75. * (according to endianness) will be used.
  76. */
  77. int ptrace_setregs (struct task_struct *child, __s64 __user *data)
  78. {
  79. struct pt_regs *regs;
  80. int i;
  81. if (!access_ok(VERIFY_READ, data, 38 * 8))
  82. return -EIO;
  83. regs = task_pt_regs(child);
  84. for (i = 0; i < 32; i++)
  85. __get_user (regs->regs[i], data + i);
  86. __get_user (regs->lo, data + EF_LO - EF_R0);
  87. __get_user (regs->hi, data + EF_HI - EF_R0);
  88. __get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
  89. /* badvaddr, status, and cause may not be written. */
  90. return 0;
  91. }
  92. int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
  93. {
  94. int i;
  95. if (!access_ok(VERIFY_WRITE, data, 33 * 8))
  96. return -EIO;
  97. if (tsk_used_math(child)) {
  98. fpureg_t *fregs = get_fpu_regs(child);
  99. for (i = 0; i < 32; i++)
  100. __put_user (fregs[i], i + (__u64 __user *) data);
  101. } else {
  102. for (i = 0; i < 32; i++)
  103. __put_user ((__u64) -1, i + (__u64 __user *) data);
  104. }
  105. __put_user (child->thread.fpu.fcr31, data + 64);
  106. if (cpu_has_fpu) {
  107. unsigned int flags, tmp;
  108. preempt_disable();
  109. if (cpu_has_mipsmt) {
  110. unsigned int vpflags = dvpe();
  111. flags = read_c0_status();
  112. __enable_fpu();
  113. __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
  114. write_c0_status(flags);
  115. evpe(vpflags);
  116. } else {
  117. flags = read_c0_status();
  118. __enable_fpu();
  119. __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
  120. write_c0_status(flags);
  121. }
  122. preempt_enable();
  123. __put_user (tmp, data + 65);
  124. } else {
  125. __put_user ((__u32) 0, data + 65);
  126. }
  127. return 0;
  128. }
  129. int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
  130. {
  131. fpureg_t *fregs;
  132. int i;
  133. if (!access_ok(VERIFY_READ, data, 33 * 8))
  134. return -EIO;
  135. fregs = get_fpu_regs(child);
  136. for (i = 0; i < 32; i++)
  137. __get_user (fregs[i], i + (__u64 __user *) data);
  138. __get_user (child->thread.fpu.fcr31, data + 64);
  139. /* FIR may not be written. */
  140. return 0;
  141. }
  142. long arch_ptrace(struct task_struct *child, long request, long addr, long data)
  143. {
  144. int ret;
  145. switch (request) {
  146. /* when I and D space are separate, these will need to be fixed. */
  147. case PTRACE_PEEKTEXT: /* read word at location addr. */
  148. case PTRACE_PEEKDATA: {
  149. unsigned long tmp;
  150. int copied;
  151. copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
  152. ret = -EIO;
  153. if (copied != sizeof(tmp))
  154. break;
  155. ret = put_user(tmp,(unsigned long __user *) data);
  156. break;
  157. }
  158. /* Read the word at location addr in the USER area. */
  159. case PTRACE_PEEKUSR: {
  160. struct pt_regs *regs;
  161. unsigned long tmp = 0;
  162. regs = task_pt_regs(child);
  163. ret = 0; /* Default return value. */
  164. switch (addr) {
  165. case 0 ... 31:
  166. tmp = regs->regs[addr];
  167. break;
  168. case FPR_BASE ... FPR_BASE + 31:
  169. if (tsk_used_math(child)) {
  170. fpureg_t *fregs = get_fpu_regs(child);
  171. #ifdef CONFIG_32BIT
  172. /*
  173. * The odd registers are actually the high
  174. * order bits of the values stored in the even
  175. * registers - unless we're using r2k_switch.S.
  176. */
  177. if (addr & 1)
  178. tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
  179. else
  180. tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
  181. #endif
  182. #ifdef CONFIG_64BIT
  183. tmp = fregs[addr - FPR_BASE];
  184. #endif
  185. } else {
  186. tmp = -1; /* FP not yet used */
  187. }
  188. break;
  189. case PC:
  190. tmp = regs->cp0_epc;
  191. break;
  192. case CAUSE:
  193. tmp = regs->cp0_cause;
  194. break;
  195. case BADVADDR:
  196. tmp = regs->cp0_badvaddr;
  197. break;
  198. case MMHI:
  199. tmp = regs->hi;
  200. break;
  201. case MMLO:
  202. tmp = regs->lo;
  203. break;
  204. case FPC_CSR:
  205. tmp = child->thread.fpu.fcr31;
  206. break;
  207. case FPC_EIR: { /* implementation / version register */
  208. unsigned int flags;
  209. #ifdef CONFIG_MIPS_MT_SMTC
  210. unsigned int irqflags;
  211. unsigned int mtflags;
  212. #endif /* CONFIG_MIPS_MT_SMTC */
  213. if (!cpu_has_fpu)
  214. break;
  215. #ifdef CONFIG_MIPS_MT_SMTC
  216. /* Read-modify-write of Status must be atomic */
  217. local_irq_save(irqflags);
  218. mtflags = dmt();
  219. #endif /* CONFIG_MIPS_MT_SMTC */
  220. preempt_disable();
  221. if (cpu_has_mipsmt) {
  222. unsigned int vpflags = dvpe();
  223. flags = read_c0_status();
  224. __enable_fpu();
  225. __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
  226. write_c0_status(flags);
  227. evpe(vpflags);
  228. } else {
  229. flags = read_c0_status();
  230. __enable_fpu();
  231. __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
  232. write_c0_status(flags);
  233. }
  234. #ifdef CONFIG_MIPS_MT_SMTC
  235. emt(mtflags);
  236. local_irq_restore(irqflags);
  237. #endif /* CONFIG_MIPS_MT_SMTC */
  238. preempt_enable();
  239. break;
  240. }
  241. case DSP_BASE ... DSP_BASE + 5: {
  242. dspreg_t *dregs;
  243. if (!cpu_has_dsp) {
  244. tmp = 0;
  245. ret = -EIO;
  246. goto out;
  247. }
  248. dregs = __get_dsp_regs(child);
  249. tmp = (unsigned long) (dregs[addr - DSP_BASE]);
  250. break;
  251. }
  252. case DSP_CONTROL:
  253. if (!cpu_has_dsp) {
  254. tmp = 0;
  255. ret = -EIO;
  256. goto out;
  257. }
  258. tmp = child->thread.dsp.dspcontrol;
  259. break;
  260. default:
  261. tmp = 0;
  262. ret = -EIO;
  263. goto out;
  264. }
  265. ret = put_user(tmp, (unsigned long __user *) data);
  266. break;
  267. }
  268. /* when I and D space are separate, this will have to be fixed. */
  269. case PTRACE_POKETEXT: /* write the word at location addr. */
  270. case PTRACE_POKEDATA:
  271. ret = 0;
  272. if (access_process_vm(child, addr, &data, sizeof(data), 1)
  273. == sizeof(data))
  274. break;
  275. ret = -EIO;
  276. break;
  277. case PTRACE_POKEUSR: {
  278. struct pt_regs *regs;
  279. ret = 0;
  280. regs = task_pt_regs(child);
  281. switch (addr) {
  282. case 0 ... 31:
  283. regs->regs[addr] = data;
  284. break;
  285. case FPR_BASE ... FPR_BASE + 31: {
  286. fpureg_t *fregs = get_fpu_regs(child);
  287. if (!tsk_used_math(child)) {
  288. /* FP not yet used */
  289. memset(&child->thread.fpu, ~0,
  290. sizeof(child->thread.fpu));
  291. child->thread.fpu.fcr31 = 0;
  292. }
  293. #ifdef CONFIG_32BIT
  294. /*
  295. * The odd registers are actually the high order bits
  296. * of the values stored in the even registers - unless
  297. * we're using r2k_switch.S.
  298. */
  299. if (addr & 1) {
  300. fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
  301. fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
  302. } else {
  303. fregs[addr - FPR_BASE] &= ~0xffffffffLL;
  304. fregs[addr - FPR_BASE] |= data;
  305. }
  306. #endif
  307. #ifdef CONFIG_64BIT
  308. fregs[addr - FPR_BASE] = data;
  309. #endif
  310. break;
  311. }
  312. case PC:
  313. regs->cp0_epc = data;
  314. break;
  315. case MMHI:
  316. regs->hi = data;
  317. break;
  318. case MMLO:
  319. regs->lo = data;
  320. break;
  321. case FPC_CSR:
  322. child->thread.fpu.fcr31 = data;
  323. break;
  324. case DSP_BASE ... DSP_BASE + 5: {
  325. dspreg_t *dregs;
  326. if (!cpu_has_dsp) {
  327. ret = -EIO;
  328. break;
  329. }
  330. dregs = __get_dsp_regs(child);
  331. dregs[addr - DSP_BASE] = data;
  332. break;
  333. }
  334. case DSP_CONTROL:
  335. if (!cpu_has_dsp) {
  336. ret = -EIO;
  337. break;
  338. }
  339. child->thread.dsp.dspcontrol = data;
  340. break;
  341. default:
  342. /* The rest are not allowed. */
  343. ret = -EIO;
  344. break;
  345. }
  346. break;
  347. }
  348. case PTRACE_GETREGS:
  349. ret = ptrace_getregs (child, (__u64 __user *) data);
  350. break;
  351. case PTRACE_SETREGS:
  352. ret = ptrace_setregs (child, (__u64 __user *) data);
  353. break;
  354. case PTRACE_GETFPREGS:
  355. ret = ptrace_getfpregs (child, (__u32 __user *) data);
  356. break;
  357. case PTRACE_SETFPREGS:
  358. ret = ptrace_setfpregs (child, (__u32 __user *) data);
  359. break;
  360. case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
  361. case PTRACE_CONT: { /* restart after signal. */
  362. ret = -EIO;
  363. if (!valid_signal(data))
  364. break;
  365. if (request == PTRACE_SYSCALL) {
  366. set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  367. }
  368. else {
  369. clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  370. }
  371. child->exit_code = data;
  372. wake_up_process(child);
  373. ret = 0;
  374. break;
  375. }
  376. /*
  377. * make the child exit. Best I can do is send it a sigkill.
  378. * perhaps it should be put in the status that it wants to
  379. * exit.
  380. */
  381. case PTRACE_KILL:
  382. ret = 0;
  383. if (child->exit_state == EXIT_ZOMBIE) /* already dead */
  384. break;
  385. child->exit_code = SIGKILL;
  386. wake_up_process(child);
  387. break;
  388. case PTRACE_DETACH: /* detach a process that was attached. */
  389. ret = ptrace_detach(child, data);
  390. break;
  391. case PTRACE_GET_THREAD_AREA:
  392. ret = put_user(task_thread_info(child)->tp_value,
  393. (unsigned long __user *) data);
  394. break;
  395. default:
  396. ret = ptrace_request(child, request, addr, data);
  397. break;
  398. }
  399. out:
  400. return ret;
  401. }
  402. static inline int audit_arch(void)
  403. {
  404. int arch = EM_MIPS;
  405. #ifdef CONFIG_64BIT
  406. arch |= __AUDIT_ARCH_64BIT;
  407. #endif
  408. #if defined(__LITTLE_ENDIAN)
  409. arch |= __AUDIT_ARCH_LE;
  410. #endif
  411. return arch;
  412. }
  413. /*
  414. * Notification of system call entry/exit
  415. * - triggered by current->work.syscall_trace
  416. */
  417. asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
  418. {
  419. if (unlikely(current->audit_context) && entryexit)
  420. audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
  421. regs->regs[2]);
  422. if (!(current->ptrace & PT_PTRACED))
  423. goto out;
  424. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  425. goto out;
  426. /* The 0x80 provides a way for the tracing parent to distinguish
  427. between a syscall stop and SIGTRAP delivery */
  428. ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
  429. 0x80 : 0));
  430. /*
  431. * this isn't the same as continuing with a signal, but it will do
  432. * for normal use. strace only continues with a signal if the
  433. * stopping signal is not SIGTRAP. -brl
  434. */
  435. if (current->exit_code) {
  436. send_sig(current->exit_code, current, 1);
  437. current->exit_code = 0;
  438. }
  439. out:
  440. if (unlikely(current->audit_context) && !entryexit)
  441. audit_syscall_entry(audit_arch(), regs->regs[2],
  442. regs->regs[4], regs->regs[5],
  443. regs->regs[6], regs->regs[7]);
  444. }