time_hpet.c 11 KB

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  1. /*
  2. * linux/arch/i386/kernel/time_hpet.c
  3. * This code largely copied from arch/x86_64/kernel/time.c
  4. * See that file for credits.
  5. *
  6. * 2003-06-30 Venkatesh Pallipadi - Additional changes for HPET support
  7. */
  8. #include <linux/errno.h>
  9. #include <linux/kernel.h>
  10. #include <linux/param.h>
  11. #include <linux/string.h>
  12. #include <linux/init.h>
  13. #include <linux/smp.h>
  14. #include <asm/timer.h>
  15. #include <asm/fixmap.h>
  16. #include <asm/apic.h>
  17. #include <linux/timex.h>
  18. #include <asm/hpet.h>
  19. #include <linux/hpet.h>
  20. static unsigned long hpet_period; /* fsecs / HPET clock */
  21. unsigned long hpet_tick; /* hpet clks count per tick */
  22. unsigned long hpet_address; /* hpet memory map physical address */
  23. int hpet_use_timer;
  24. static int use_hpet; /* can be used for runtime check of hpet */
  25. static int boot_hpet_disable; /* boottime override for HPET timer */
  26. static void __iomem * hpet_virt_address; /* hpet kernel virtual address */
  27. #define FSEC_TO_USEC (1000000000UL)
  28. int hpet_readl(unsigned long a)
  29. {
  30. return readl(hpet_virt_address + a);
  31. }
  32. static void hpet_writel(unsigned long d, unsigned long a)
  33. {
  34. writel(d, hpet_virt_address + a);
  35. }
  36. #ifdef CONFIG_X86_LOCAL_APIC
  37. /*
  38. * HPET counters dont wrap around on every tick. They just change the
  39. * comparator value and continue. Next tick can be caught by checking
  40. * for a change in the comparator value. Used in apic.c.
  41. */
  42. static void __devinit wait_hpet_tick(void)
  43. {
  44. unsigned int start_cmp_val, end_cmp_val;
  45. start_cmp_val = hpet_readl(HPET_T0_CMP);
  46. do {
  47. end_cmp_val = hpet_readl(HPET_T0_CMP);
  48. } while (start_cmp_val == end_cmp_val);
  49. }
  50. #endif
  51. static int hpet_timer_stop_set_go(unsigned long tick)
  52. {
  53. unsigned int cfg;
  54. /*
  55. * Stop the timers and reset the main counter.
  56. */
  57. cfg = hpet_readl(HPET_CFG);
  58. cfg &= ~HPET_CFG_ENABLE;
  59. hpet_writel(cfg, HPET_CFG);
  60. hpet_writel(0, HPET_COUNTER);
  61. hpet_writel(0, HPET_COUNTER + 4);
  62. if (hpet_use_timer) {
  63. /*
  64. * Set up timer 0, as periodic with first interrupt to happen at
  65. * hpet_tick, and period also hpet_tick.
  66. */
  67. cfg = hpet_readl(HPET_T0_CFG);
  68. cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
  69. HPET_TN_SETVAL | HPET_TN_32BIT;
  70. hpet_writel(cfg, HPET_T0_CFG);
  71. /*
  72. * The first write after writing TN_SETVAL to the config register sets
  73. * the counter value, the second write sets the threshold.
  74. */
  75. hpet_writel(tick, HPET_T0_CMP);
  76. hpet_writel(tick, HPET_T0_CMP);
  77. }
  78. /*
  79. * Go!
  80. */
  81. cfg = hpet_readl(HPET_CFG);
  82. if (hpet_use_timer)
  83. cfg |= HPET_CFG_LEGACY;
  84. cfg |= HPET_CFG_ENABLE;
  85. hpet_writel(cfg, HPET_CFG);
  86. return 0;
  87. }
  88. /*
  89. * Check whether HPET was found by ACPI boot parse. If yes setup HPET
  90. * counter 0 for kernel base timer.
  91. */
  92. int __init hpet_enable(void)
  93. {
  94. unsigned int id;
  95. unsigned long tick_fsec_low, tick_fsec_high; /* tick in femto sec */
  96. unsigned long hpet_tick_rem;
  97. if (boot_hpet_disable)
  98. return -1;
  99. if (!hpet_address) {
  100. return -1;
  101. }
  102. hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
  103. /*
  104. * Read the period, compute tick and quotient.
  105. */
  106. id = hpet_readl(HPET_ID);
  107. /*
  108. * We are checking for value '1' or more in number field if
  109. * CONFIG_HPET_EMULATE_RTC is set because we will need an
  110. * additional timer for RTC emulation.
  111. * However, we can do with one timer otherwise using the
  112. * the single HPET timer for system time.
  113. */
  114. #ifdef CONFIG_HPET_EMULATE_RTC
  115. if (!(id & HPET_ID_NUMBER))
  116. return -1;
  117. #endif
  118. hpet_period = hpet_readl(HPET_PERIOD);
  119. if ((hpet_period < HPET_MIN_PERIOD) || (hpet_period > HPET_MAX_PERIOD))
  120. return -1;
  121. /*
  122. * 64 bit math
  123. * First changing tick into fsec
  124. * Then 64 bit div to find number of hpet clk per tick
  125. */
  126. ASM_MUL64_REG(tick_fsec_low, tick_fsec_high,
  127. KERNEL_TICK_USEC, FSEC_TO_USEC);
  128. ASM_DIV64_REG(hpet_tick, hpet_tick_rem,
  129. hpet_period, tick_fsec_low, tick_fsec_high);
  130. if (hpet_tick_rem > (hpet_period >> 1))
  131. hpet_tick++; /* rounding the result */
  132. hpet_use_timer = id & HPET_ID_LEGSUP;
  133. if (hpet_timer_stop_set_go(hpet_tick))
  134. return -1;
  135. use_hpet = 1;
  136. #ifdef CONFIG_HPET
  137. {
  138. struct hpet_data hd;
  139. unsigned int ntimer;
  140. memset(&hd, 0, sizeof (hd));
  141. ntimer = hpet_readl(HPET_ID);
  142. ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
  143. ntimer++;
  144. /*
  145. * Register with driver.
  146. * Timer0 and Timer1 is used by platform.
  147. */
  148. hd.hd_phys_address = hpet_address;
  149. hd.hd_address = hpet_virt_address;
  150. hd.hd_nirqs = ntimer;
  151. hd.hd_flags = HPET_DATA_PLATFORM;
  152. hpet_reserve_timer(&hd, 0);
  153. #ifdef CONFIG_HPET_EMULATE_RTC
  154. hpet_reserve_timer(&hd, 1);
  155. #endif
  156. hd.hd_irq[0] = HPET_LEGACY_8254;
  157. hd.hd_irq[1] = HPET_LEGACY_RTC;
  158. if (ntimer > 2) {
  159. struct hpet __iomem *hpet;
  160. struct hpet_timer __iomem *timer;
  161. int i;
  162. hpet = hpet_virt_address;
  163. for (i = 2, timer = &hpet->hpet_timers[2]; i < ntimer;
  164. timer++, i++)
  165. hd.hd_irq[i] = (timer->hpet_config &
  166. Tn_INT_ROUTE_CNF_MASK) >>
  167. Tn_INT_ROUTE_CNF_SHIFT;
  168. }
  169. hpet_alloc(&hd);
  170. }
  171. #endif
  172. #ifdef CONFIG_X86_LOCAL_APIC
  173. if (hpet_use_timer)
  174. wait_timer_tick = wait_hpet_tick;
  175. #endif
  176. return 0;
  177. }
  178. int hpet_reenable(void)
  179. {
  180. return hpet_timer_stop_set_go(hpet_tick);
  181. }
  182. int is_hpet_enabled(void)
  183. {
  184. return use_hpet;
  185. }
  186. int is_hpet_capable(void)
  187. {
  188. if (!boot_hpet_disable && hpet_address)
  189. return 1;
  190. return 0;
  191. }
  192. static int __init hpet_setup(char* str)
  193. {
  194. if (str) {
  195. if (!strncmp("disable", str, 7))
  196. boot_hpet_disable = 1;
  197. }
  198. return 1;
  199. }
  200. __setup("hpet=", hpet_setup);
  201. #ifdef CONFIG_HPET_EMULATE_RTC
  202. /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
  203. * is enabled, we support RTC interrupt functionality in software.
  204. * RTC has 3 kinds of interrupts:
  205. * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
  206. * is updated
  207. * 2) Alarm Interrupt - generate an interrupt at a specific time of day
  208. * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
  209. * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
  210. * (1) and (2) above are implemented using polling at a frequency of
  211. * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
  212. * overhead. (DEFAULT_RTC_INT_FREQ)
  213. * For (3), we use interrupts at 64Hz or user specified periodic
  214. * frequency, whichever is higher.
  215. */
  216. #include <linux/mc146818rtc.h>
  217. #include <linux/rtc.h>
  218. #define DEFAULT_RTC_INT_FREQ 64
  219. #define RTC_NUM_INTS 1
  220. static unsigned long UIE_on;
  221. static unsigned long prev_update_sec;
  222. static unsigned long AIE_on;
  223. static struct rtc_time alarm_time;
  224. static unsigned long PIE_on;
  225. static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
  226. static unsigned long PIE_count;
  227. static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
  228. static unsigned int hpet_t1_cmp; /* cached comparator register */
  229. /*
  230. * Timer 1 for RTC, we do not use periodic interrupt feature,
  231. * even if HPET supports periodic interrupts on Timer 1.
  232. * The reason being, to set up a periodic interrupt in HPET, we need to
  233. * stop the main counter. And if we do that everytime someone diables/enables
  234. * RTC, we will have adverse effect on main kernel timer running on Timer 0.
  235. * So, for the time being, simulate the periodic interrupt in software.
  236. *
  237. * hpet_rtc_timer_init() is called for the first time and during subsequent
  238. * interuppts reinit happens through hpet_rtc_timer_reinit().
  239. */
  240. int hpet_rtc_timer_init(void)
  241. {
  242. unsigned int cfg, cnt;
  243. unsigned long flags;
  244. if (!is_hpet_enabled())
  245. return 0;
  246. /*
  247. * Set the counter 1 and enable the interrupts.
  248. */
  249. if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
  250. hpet_rtc_int_freq = PIE_freq;
  251. else
  252. hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
  253. local_irq_save(flags);
  254. cnt = hpet_readl(HPET_COUNTER);
  255. cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
  256. hpet_writel(cnt, HPET_T1_CMP);
  257. hpet_t1_cmp = cnt;
  258. local_irq_restore(flags);
  259. cfg = hpet_readl(HPET_T1_CFG);
  260. cfg &= ~HPET_TN_PERIODIC;
  261. cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
  262. hpet_writel(cfg, HPET_T1_CFG);
  263. return 1;
  264. }
  265. static void hpet_rtc_timer_reinit(void)
  266. {
  267. unsigned int cfg, cnt;
  268. if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
  269. cfg = hpet_readl(HPET_T1_CFG);
  270. cfg &= ~HPET_TN_ENABLE;
  271. hpet_writel(cfg, HPET_T1_CFG);
  272. return;
  273. }
  274. if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
  275. hpet_rtc_int_freq = PIE_freq;
  276. else
  277. hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
  278. /* It is more accurate to use the comparator value than current count.*/
  279. cnt = hpet_t1_cmp;
  280. cnt += hpet_tick*HZ/hpet_rtc_int_freq;
  281. hpet_writel(cnt, HPET_T1_CMP);
  282. hpet_t1_cmp = cnt;
  283. }
  284. /*
  285. * The functions below are called from rtc driver.
  286. * Return 0 if HPET is not being used.
  287. * Otherwise do the necessary changes and return 1.
  288. */
  289. int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
  290. {
  291. if (!is_hpet_enabled())
  292. return 0;
  293. if (bit_mask & RTC_UIE)
  294. UIE_on = 0;
  295. if (bit_mask & RTC_PIE)
  296. PIE_on = 0;
  297. if (bit_mask & RTC_AIE)
  298. AIE_on = 0;
  299. return 1;
  300. }
  301. int hpet_set_rtc_irq_bit(unsigned long bit_mask)
  302. {
  303. int timer_init_reqd = 0;
  304. if (!is_hpet_enabled())
  305. return 0;
  306. if (!(PIE_on | AIE_on | UIE_on))
  307. timer_init_reqd = 1;
  308. if (bit_mask & RTC_UIE) {
  309. UIE_on = 1;
  310. }
  311. if (bit_mask & RTC_PIE) {
  312. PIE_on = 1;
  313. PIE_count = 0;
  314. }
  315. if (bit_mask & RTC_AIE) {
  316. AIE_on = 1;
  317. }
  318. if (timer_init_reqd)
  319. hpet_rtc_timer_init();
  320. return 1;
  321. }
  322. int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
  323. {
  324. if (!is_hpet_enabled())
  325. return 0;
  326. alarm_time.tm_hour = hrs;
  327. alarm_time.tm_min = min;
  328. alarm_time.tm_sec = sec;
  329. return 1;
  330. }
  331. int hpet_set_periodic_freq(unsigned long freq)
  332. {
  333. if (!is_hpet_enabled())
  334. return 0;
  335. PIE_freq = freq;
  336. PIE_count = 0;
  337. return 1;
  338. }
  339. int hpet_rtc_dropped_irq(void)
  340. {
  341. if (!is_hpet_enabled())
  342. return 0;
  343. return 1;
  344. }
  345. irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  346. {
  347. struct rtc_time curr_time;
  348. unsigned long rtc_int_flag = 0;
  349. int call_rtc_interrupt = 0;
  350. hpet_rtc_timer_reinit();
  351. if (UIE_on | AIE_on) {
  352. rtc_get_rtc_time(&curr_time);
  353. }
  354. if (UIE_on) {
  355. if (curr_time.tm_sec != prev_update_sec) {
  356. /* Set update int info, call real rtc int routine */
  357. call_rtc_interrupt = 1;
  358. rtc_int_flag = RTC_UF;
  359. prev_update_sec = curr_time.tm_sec;
  360. }
  361. }
  362. if (PIE_on) {
  363. PIE_count++;
  364. if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
  365. /* Set periodic int info, call real rtc int routine */
  366. call_rtc_interrupt = 1;
  367. rtc_int_flag |= RTC_PF;
  368. PIE_count = 0;
  369. }
  370. }
  371. if (AIE_on) {
  372. if ((curr_time.tm_sec == alarm_time.tm_sec) &&
  373. (curr_time.tm_min == alarm_time.tm_min) &&
  374. (curr_time.tm_hour == alarm_time.tm_hour)) {
  375. /* Set alarm int info, call real rtc int routine */
  376. call_rtc_interrupt = 1;
  377. rtc_int_flag |= RTC_AF;
  378. }
  379. }
  380. if (call_rtc_interrupt) {
  381. rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
  382. rtc_interrupt(rtc_int_flag, dev_id, regs);
  383. }
  384. return IRQ_HANDLED;
  385. }
  386. #endif