cx88-dvb.c 47 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc4000.h"
  42. #include "xc5000.h"
  43. #include "nxt200x.h"
  44. #include "cx24123.h"
  45. #include "isl6421.h"
  46. #include "tuner-simple.h"
  47. #include "tda9887.h"
  48. #include "s5h1411.h"
  49. #include "stv0299.h"
  50. #include "z0194a.h"
  51. #include "stv0288.h"
  52. #include "stb6000.h"
  53. #include "cx24116.h"
  54. #include "stv0900.h"
  55. #include "stb6100.h"
  56. #include "stb6100_proc.h"
  57. #include "mb86a16.h"
  58. #include "ds3000.h"
  59. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  60. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  61. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  62. MODULE_LICENSE("GPL");
  63. static unsigned int debug;
  64. module_param(debug, int, 0644);
  65. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  66. static unsigned int dvb_buf_tscnt = 32;
  67. module_param(dvb_buf_tscnt, int, 0644);
  68. MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
  69. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  70. #define dprintk(level,fmt, arg...) if (debug >= level) \
  71. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  72. /* ------------------------------------------------------------------ */
  73. static int dvb_buf_setup(struct videobuf_queue *q,
  74. unsigned int *count, unsigned int *size)
  75. {
  76. struct cx8802_dev *dev = q->priv_data;
  77. dev->ts_packet_size = 188 * 4;
  78. dev->ts_packet_count = dvb_buf_tscnt;
  79. *size = dev->ts_packet_size * dev->ts_packet_count;
  80. *count = dvb_buf_tscnt;
  81. return 0;
  82. }
  83. static int dvb_buf_prepare(struct videobuf_queue *q,
  84. struct videobuf_buffer *vb, enum v4l2_field field)
  85. {
  86. struct cx8802_dev *dev = q->priv_data;
  87. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  88. }
  89. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  90. {
  91. struct cx8802_dev *dev = q->priv_data;
  92. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  93. }
  94. static void dvb_buf_release(struct videobuf_queue *q,
  95. struct videobuf_buffer *vb)
  96. {
  97. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  98. }
  99. static const struct videobuf_queue_ops dvb_qops = {
  100. .buf_setup = dvb_buf_setup,
  101. .buf_prepare = dvb_buf_prepare,
  102. .buf_queue = dvb_buf_queue,
  103. .buf_release = dvb_buf_release,
  104. };
  105. /* ------------------------------------------------------------------ */
  106. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  107. {
  108. struct cx8802_dev *dev= fe->dvb->priv;
  109. struct cx8802_driver *drv = NULL;
  110. int ret = 0;
  111. int fe_id;
  112. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  113. if (!fe_id) {
  114. printk(KERN_ERR "%s() No frontend found\n", __func__);
  115. return -EINVAL;
  116. }
  117. mutex_lock(&dev->core->lock);
  118. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  119. if (drv) {
  120. if (acquire){
  121. dev->frontends.active_fe_id = fe_id;
  122. ret = drv->request_acquire(drv);
  123. } else {
  124. ret = drv->request_release(drv);
  125. dev->frontends.active_fe_id = 0;
  126. }
  127. }
  128. mutex_unlock(&dev->core->lock);
  129. return ret;
  130. }
  131. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  132. {
  133. struct videobuf_dvb_frontends *f;
  134. struct videobuf_dvb_frontend *fe;
  135. if (!core->dvbdev)
  136. return;
  137. f = &core->dvbdev->frontends;
  138. if (!f)
  139. return;
  140. if (f->gate <= 1) /* undefined or fe0 */
  141. fe = videobuf_dvb_get_frontend(f, 1);
  142. else
  143. fe = videobuf_dvb_get_frontend(f, f->gate);
  144. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  145. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  146. }
  147. /* ------------------------------------------------------------------ */
  148. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  149. {
  150. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  151. static const u8 reset [] = { RESET, 0x80 };
  152. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  153. static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  154. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  155. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  156. mt352_write(fe, clock_config, sizeof(clock_config));
  157. udelay(200);
  158. mt352_write(fe, reset, sizeof(reset));
  159. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  160. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  161. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  162. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  163. return 0;
  164. }
  165. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  166. {
  167. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  168. static const u8 reset [] = { RESET, 0x80 };
  169. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  170. static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  171. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  172. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  173. mt352_write(fe, clock_config, sizeof(clock_config));
  174. udelay(200);
  175. mt352_write(fe, reset, sizeof(reset));
  176. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  177. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  178. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  179. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  180. return 0;
  181. }
  182. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  183. {
  184. static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
  185. static const u8 reset [] = { 0x50, 0x80 };
  186. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  187. static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  188. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  189. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  190. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  191. mt352_write(fe, clock_config, sizeof(clock_config));
  192. udelay(2000);
  193. mt352_write(fe, reset, sizeof(reset));
  194. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  195. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  196. udelay(2000);
  197. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  198. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  199. return 0;
  200. }
  201. static const struct mt352_config dvico_fusionhdtv = {
  202. .demod_address = 0x0f,
  203. .demod_init = dvico_fusionhdtv_demod_init,
  204. };
  205. static const struct mt352_config dntv_live_dvbt_config = {
  206. .demod_address = 0x0f,
  207. .demod_init = dntv_live_dvbt_demod_init,
  208. };
  209. static const struct mt352_config dvico_fusionhdtv_dual = {
  210. .demod_address = 0x0f,
  211. .demod_init = dvico_dual_demod_init,
  212. };
  213. static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  214. .demod_address = (0x1e >> 1),
  215. .no_tuner = 1,
  216. .if2 = 45600,
  217. };
  218. static struct mb86a16_config twinhan_vp1027 = {
  219. .demod_address = 0x08,
  220. };
  221. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  222. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  223. {
  224. static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
  225. static const u8 reset [] = { 0x50, 0x80 };
  226. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  227. static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  228. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  229. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  230. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  231. mt352_write(fe, clock_config, sizeof(clock_config));
  232. udelay(2000);
  233. mt352_write(fe, reset, sizeof(reset));
  234. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  235. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  236. udelay(2000);
  237. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  238. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  239. return 0;
  240. }
  241. static const struct mt352_config dntv_live_dvbt_pro_config = {
  242. .demod_address = 0x0f,
  243. .no_tuner = 1,
  244. .demod_init = dntv_live_dvbt_pro_demod_init,
  245. };
  246. #endif
  247. static const struct zl10353_config dvico_fusionhdtv_hybrid = {
  248. .demod_address = 0x0f,
  249. .no_tuner = 1,
  250. };
  251. static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
  252. .demod_address = 0x0f,
  253. .if2 = 45600,
  254. .no_tuner = 1,
  255. };
  256. static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  257. .demod_address = 0x0f,
  258. .if2 = 4560,
  259. .no_tuner = 1,
  260. .demod_init = dvico_fusionhdtv_demod_init,
  261. };
  262. static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  263. .demod_address = 0x0f,
  264. };
  265. static const struct cx22702_config connexant_refboard_config = {
  266. .demod_address = 0x43,
  267. .output_mode = CX22702_SERIAL_OUTPUT,
  268. };
  269. static const struct cx22702_config hauppauge_hvr_config = {
  270. .demod_address = 0x63,
  271. .output_mode = CX22702_SERIAL_OUTPUT,
  272. };
  273. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  274. {
  275. struct cx8802_dev *dev= fe->dvb->priv;
  276. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  277. return 0;
  278. }
  279. static const struct or51132_config pchdtv_hd3000 = {
  280. .demod_address = 0x15,
  281. .set_ts_params = or51132_set_ts_param,
  282. };
  283. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  284. {
  285. struct cx8802_dev *dev= fe->dvb->priv;
  286. struct cx88_core *core = dev->core;
  287. dprintk(1, "%s: index = %d\n", __func__, index);
  288. if (index == 0)
  289. cx_clear(MO_GP0_IO, 8);
  290. else
  291. cx_set(MO_GP0_IO, 8);
  292. return 0;
  293. }
  294. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  295. {
  296. struct cx8802_dev *dev= fe->dvb->priv;
  297. if (is_punctured)
  298. dev->ts_gen_cntrl |= 0x04;
  299. else
  300. dev->ts_gen_cntrl &= ~0x04;
  301. return 0;
  302. }
  303. static struct lgdt330x_config fusionhdtv_3_gold = {
  304. .demod_address = 0x0e,
  305. .demod_chip = LGDT3302,
  306. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  307. .set_ts_params = lgdt330x_set_ts_param,
  308. };
  309. static const struct lgdt330x_config fusionhdtv_5_gold = {
  310. .demod_address = 0x0e,
  311. .demod_chip = LGDT3303,
  312. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  313. .set_ts_params = lgdt330x_set_ts_param,
  314. };
  315. static const struct lgdt330x_config pchdtv_hd5500 = {
  316. .demod_address = 0x59,
  317. .demod_chip = LGDT3303,
  318. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  319. .set_ts_params = lgdt330x_set_ts_param,
  320. };
  321. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  322. {
  323. struct cx8802_dev *dev= fe->dvb->priv;
  324. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  325. return 0;
  326. }
  327. static const struct nxt200x_config ati_hdtvwonder = {
  328. .demod_address = 0x0a,
  329. .set_ts_params = nxt200x_set_ts_param,
  330. };
  331. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  332. int is_punctured)
  333. {
  334. struct cx8802_dev *dev= fe->dvb->priv;
  335. dev->ts_gen_cntrl = 0x02;
  336. return 0;
  337. }
  338. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  339. fe_sec_voltage_t voltage)
  340. {
  341. struct cx8802_dev *dev= fe->dvb->priv;
  342. struct cx88_core *core = dev->core;
  343. if (voltage == SEC_VOLTAGE_OFF)
  344. cx_write(MO_GP0_IO, 0x000006fb);
  345. else
  346. cx_write(MO_GP0_IO, 0x000006f9);
  347. if (core->prev_set_voltage)
  348. return core->prev_set_voltage(fe, voltage);
  349. return 0;
  350. }
  351. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  352. fe_sec_voltage_t voltage)
  353. {
  354. struct cx8802_dev *dev= fe->dvb->priv;
  355. struct cx88_core *core = dev->core;
  356. if (voltage == SEC_VOLTAGE_OFF) {
  357. dprintk(1,"LNB Voltage OFF\n");
  358. cx_write(MO_GP0_IO, 0x0000efff);
  359. }
  360. if (core->prev_set_voltage)
  361. return core->prev_set_voltage(fe, voltage);
  362. return 0;
  363. }
  364. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  365. fe_sec_voltage_t voltage)
  366. {
  367. struct cx8802_dev *dev= fe->dvb->priv;
  368. struct cx88_core *core = dev->core;
  369. cx_set(MO_GP0_IO, 0x6040);
  370. switch (voltage) {
  371. case SEC_VOLTAGE_13:
  372. cx_clear(MO_GP0_IO, 0x20);
  373. break;
  374. case SEC_VOLTAGE_18:
  375. cx_set(MO_GP0_IO, 0x20);
  376. break;
  377. case SEC_VOLTAGE_OFF:
  378. cx_clear(MO_GP0_IO, 0x20);
  379. break;
  380. }
  381. if (core->prev_set_voltage)
  382. return core->prev_set_voltage(fe, voltage);
  383. return 0;
  384. }
  385. static int vp1027_set_voltage(struct dvb_frontend *fe,
  386. fe_sec_voltage_t voltage)
  387. {
  388. struct cx8802_dev *dev = fe->dvb->priv;
  389. struct cx88_core *core = dev->core;
  390. switch (voltage) {
  391. case SEC_VOLTAGE_13:
  392. dprintk(1, "LNB SEC Voltage=13\n");
  393. cx_write(MO_GP0_IO, 0x00001220);
  394. break;
  395. case SEC_VOLTAGE_18:
  396. dprintk(1, "LNB SEC Voltage=18\n");
  397. cx_write(MO_GP0_IO, 0x00001222);
  398. break;
  399. case SEC_VOLTAGE_OFF:
  400. dprintk(1, "LNB Voltage OFF\n");
  401. cx_write(MO_GP0_IO, 0x00001230);
  402. break;
  403. }
  404. if (core->prev_set_voltage)
  405. return core->prev_set_voltage(fe, voltage);
  406. return 0;
  407. }
  408. static const struct cx24123_config geniatech_dvbs_config = {
  409. .demod_address = 0x55,
  410. .set_ts_params = cx24123_set_ts_param,
  411. };
  412. static const struct cx24123_config hauppauge_novas_config = {
  413. .demod_address = 0x55,
  414. .set_ts_params = cx24123_set_ts_param,
  415. };
  416. static const struct cx24123_config kworld_dvbs_100_config = {
  417. .demod_address = 0x15,
  418. .set_ts_params = cx24123_set_ts_param,
  419. .lnb_polarity = 1,
  420. };
  421. static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  422. .demod_address = 0x32 >> 1,
  423. .output_mode = S5H1409_PARALLEL_OUTPUT,
  424. .gpio = S5H1409_GPIO_ON,
  425. .qam_if = 44000,
  426. .inversion = S5H1409_INVERSION_OFF,
  427. .status_mode = S5H1409_DEMODLOCKING,
  428. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  429. };
  430. static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  431. .demod_address = 0x32 >> 1,
  432. .output_mode = S5H1409_SERIAL_OUTPUT,
  433. .gpio = S5H1409_GPIO_OFF,
  434. .inversion = S5H1409_INVERSION_OFF,
  435. .status_mode = S5H1409_DEMODLOCKING,
  436. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  437. };
  438. static const struct s5h1409_config kworld_atsc_120_config = {
  439. .demod_address = 0x32 >> 1,
  440. .output_mode = S5H1409_SERIAL_OUTPUT,
  441. .gpio = S5H1409_GPIO_OFF,
  442. .inversion = S5H1409_INVERSION_OFF,
  443. .status_mode = S5H1409_DEMODLOCKING,
  444. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  445. };
  446. static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  447. .i2c_address = 0x64,
  448. .if_khz = 5380,
  449. };
  450. static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  451. .demod_address = (0x1e >> 1),
  452. .no_tuner = 1,
  453. .if2 = 45600,
  454. };
  455. static const struct zl10353_config cx88_geniatech_x8000_mt = {
  456. .demod_address = (0x1e >> 1),
  457. .no_tuner = 1,
  458. .disable_i2c_gate_ctrl = 1,
  459. };
  460. static const struct s5h1411_config dvico_fusionhdtv7_config = {
  461. .output_mode = S5H1411_SERIAL_OUTPUT,
  462. .gpio = S5H1411_GPIO_ON,
  463. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  464. .qam_if = S5H1411_IF_44000,
  465. .vsb_if = S5H1411_IF_44000,
  466. .inversion = S5H1411_INVERSION_OFF,
  467. .status_mode = S5H1411_DEMODLOCKING
  468. };
  469. static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  470. .i2c_address = 0xc2 >> 1,
  471. .if_khz = 5380,
  472. };
  473. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  474. {
  475. struct dvb_frontend *fe;
  476. struct videobuf_dvb_frontend *fe0 = NULL;
  477. struct xc2028_ctrl ctl;
  478. struct xc2028_config cfg = {
  479. .i2c_adap = &dev->core->i2c_adap,
  480. .i2c_addr = addr,
  481. .ctrl = &ctl,
  482. };
  483. /* Get the first frontend */
  484. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  485. if (!fe0)
  486. return -EINVAL;
  487. if (!fe0->dvb.frontend) {
  488. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  489. "Can't attach xc3028\n",
  490. dev->core->name);
  491. return -EINVAL;
  492. }
  493. /*
  494. * Some xc3028 devices may be hidden by an I2C gate. This is known
  495. * to happen with some s5h1409-based devices.
  496. * Now that I2C gate is open, sets up xc3028 configuration
  497. */
  498. cx88_setup_xc3028(dev->core, &ctl);
  499. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  500. if (!fe) {
  501. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  502. dev->core->name);
  503. dvb_frontend_detach(fe0->dvb.frontend);
  504. dvb_unregister_frontend(fe0->dvb.frontend);
  505. fe0->dvb.frontend = NULL;
  506. return -EINVAL;
  507. }
  508. printk(KERN_INFO "%s/2: xc3028 attached\n",
  509. dev->core->name);
  510. return 0;
  511. }
  512. static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
  513. {
  514. struct dvb_frontend *fe;
  515. struct videobuf_dvb_frontend *fe0 = NULL;
  516. /* Get the first frontend */
  517. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  518. if (!fe0)
  519. return -EINVAL;
  520. if (!fe0->dvb.frontend) {
  521. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  522. "Can't attach xc4000\n",
  523. dev->core->name);
  524. return -EINVAL;
  525. }
  526. fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
  527. cfg);
  528. if (!fe) {
  529. printk(KERN_ERR "%s/2: xc4000 attach failed\n",
  530. dev->core->name);
  531. dvb_frontend_detach(fe0->dvb.frontend);
  532. dvb_unregister_frontend(fe0->dvb.frontend);
  533. fe0->dvb.frontend = NULL;
  534. return -EINVAL;
  535. }
  536. printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name);
  537. return 0;
  538. }
  539. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  540. int is_punctured)
  541. {
  542. struct cx8802_dev *dev = fe->dvb->priv;
  543. dev->ts_gen_cntrl = 0x2;
  544. return 0;
  545. }
  546. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  547. int is_punctured)
  548. {
  549. struct cx8802_dev *dev = fe->dvb->priv;
  550. dev->ts_gen_cntrl = 0;
  551. return 0;
  552. }
  553. static int cx24116_reset_device(struct dvb_frontend *fe)
  554. {
  555. struct cx8802_dev *dev = fe->dvb->priv;
  556. struct cx88_core *core = dev->core;
  557. /* Reset the part */
  558. /* Put the cx24116 into reset */
  559. cx_write(MO_SRST_IO, 0);
  560. msleep(10);
  561. /* Take the cx24116 out of reset */
  562. cx_write(MO_SRST_IO, 1);
  563. msleep(10);
  564. return 0;
  565. }
  566. static const struct cx24116_config hauppauge_hvr4000_config = {
  567. .demod_address = 0x05,
  568. .set_ts_params = cx24116_set_ts_param,
  569. .reset_device = cx24116_reset_device,
  570. };
  571. static const struct cx24116_config tevii_s460_config = {
  572. .demod_address = 0x55,
  573. .set_ts_params = cx24116_set_ts_param,
  574. .reset_device = cx24116_reset_device,
  575. };
  576. static int ds3000_set_ts_param(struct dvb_frontend *fe,
  577. int is_punctured)
  578. {
  579. struct cx8802_dev *dev = fe->dvb->priv;
  580. dev->ts_gen_cntrl = 4;
  581. return 0;
  582. }
  583. static struct ds3000_config tevii_ds3000_config = {
  584. .demod_address = 0x68,
  585. .set_ts_params = ds3000_set_ts_param,
  586. };
  587. static const struct stv0900_config prof_7301_stv0900_config = {
  588. .demod_address = 0x6a,
  589. /* demod_mode = 0,*/
  590. .xtal = 27000000,
  591. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  592. .diseqc_mode = 2,/* 2/3 PWM */
  593. .tun1_maddress = 0,/* 0x60 */
  594. .tun1_adc = 0,/* 2 Vpp */
  595. .path1_mode = 3,
  596. .set_ts_params = stv0900_set_ts_param,
  597. };
  598. static const struct stb6100_config prof_7301_stb6100_config = {
  599. .tuner_address = 0x60,
  600. .refclock = 27000000,
  601. };
  602. static const struct stv0299_config tevii_tuner_sharp_config = {
  603. .demod_address = 0x68,
  604. .inittab = sharp_z0194a_inittab,
  605. .mclk = 88000000UL,
  606. .invert = 1,
  607. .skip_reinit = 0,
  608. .lock_output = 1,
  609. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  610. .min_delay_ms = 100,
  611. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  612. .set_ts_params = cx24116_set_ts_param,
  613. };
  614. static const struct stv0288_config tevii_tuner_earda_config = {
  615. .demod_address = 0x68,
  616. .min_delay_ms = 100,
  617. .set_ts_params = cx24116_set_ts_param,
  618. };
  619. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  620. {
  621. struct cx88_core *core = dev->core;
  622. struct videobuf_dvb_frontend *fe = NULL;
  623. int i;
  624. mutex_init(&dev->frontends.lock);
  625. INIT_LIST_HEAD(&dev->frontends.felist);
  626. if (!core->board.num_frontends)
  627. return -ENODEV;
  628. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  629. core->board.num_frontends);
  630. for (i = 1; i <= core->board.num_frontends; i++) {
  631. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  632. if (!fe) {
  633. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  634. videobuf_dvb_dealloc_frontends(&dev->frontends);
  635. return -ENOMEM;
  636. }
  637. }
  638. return 0;
  639. }
  640. static const u8 samsung_smt_7020_inittab[] = {
  641. 0x01, 0x15,
  642. 0x02, 0x00,
  643. 0x03, 0x00,
  644. 0x04, 0x7D,
  645. 0x05, 0x0F,
  646. 0x06, 0x02,
  647. 0x07, 0x00,
  648. 0x08, 0x60,
  649. 0x0A, 0xC2,
  650. 0x0B, 0x00,
  651. 0x0C, 0x01,
  652. 0x0D, 0x81,
  653. 0x0E, 0x44,
  654. 0x0F, 0x09,
  655. 0x10, 0x3C,
  656. 0x11, 0x84,
  657. 0x12, 0xDA,
  658. 0x13, 0x99,
  659. 0x14, 0x8D,
  660. 0x15, 0xCE,
  661. 0x16, 0xE8,
  662. 0x17, 0x43,
  663. 0x18, 0x1C,
  664. 0x19, 0x1B,
  665. 0x1A, 0x1D,
  666. 0x1C, 0x12,
  667. 0x1D, 0x00,
  668. 0x1E, 0x00,
  669. 0x1F, 0x00,
  670. 0x20, 0x00,
  671. 0x21, 0x00,
  672. 0x22, 0x00,
  673. 0x23, 0x00,
  674. 0x28, 0x02,
  675. 0x29, 0x28,
  676. 0x2A, 0x14,
  677. 0x2B, 0x0F,
  678. 0x2C, 0x09,
  679. 0x2D, 0x05,
  680. 0x31, 0x1F,
  681. 0x32, 0x19,
  682. 0x33, 0xFC,
  683. 0x34, 0x13,
  684. 0xff, 0xff,
  685. };
  686. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe,
  687. struct dvb_frontend_parameters *params)
  688. {
  689. struct cx8802_dev *dev = fe->dvb->priv;
  690. u8 buf[4];
  691. u32 div;
  692. struct i2c_msg msg = {
  693. .addr = 0x61,
  694. .flags = 0,
  695. .buf = buf,
  696. .len = sizeof(buf) };
  697. div = params->frequency / 125;
  698. buf[0] = (div >> 8) & 0x7f;
  699. buf[1] = div & 0xff;
  700. buf[2] = 0x84; /* 0xC4 */
  701. buf[3] = 0x00;
  702. if (params->frequency < 1500000)
  703. buf[3] |= 0x10;
  704. if (fe->ops.i2c_gate_ctrl)
  705. fe->ops.i2c_gate_ctrl(fe, 1);
  706. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  707. return -EIO;
  708. return 0;
  709. }
  710. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  711. fe_sec_tone_mode_t tone)
  712. {
  713. struct cx8802_dev *dev = fe->dvb->priv;
  714. struct cx88_core *core = dev->core;
  715. cx_set(MO_GP0_IO, 0x0800);
  716. switch (tone) {
  717. case SEC_TONE_ON:
  718. cx_set(MO_GP0_IO, 0x08);
  719. break;
  720. case SEC_TONE_OFF:
  721. cx_clear(MO_GP0_IO, 0x08);
  722. break;
  723. default:
  724. return -EINVAL;
  725. }
  726. return 0;
  727. }
  728. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  729. fe_sec_voltage_t voltage)
  730. {
  731. struct cx8802_dev *dev = fe->dvb->priv;
  732. struct cx88_core *core = dev->core;
  733. u8 data;
  734. struct i2c_msg msg = {
  735. .addr = 8,
  736. .flags = 0,
  737. .buf = &data,
  738. .len = sizeof(data) };
  739. cx_set(MO_GP0_IO, 0x8000);
  740. switch (voltage) {
  741. case SEC_VOLTAGE_OFF:
  742. break;
  743. case SEC_VOLTAGE_13:
  744. data = ISL6421_EN1 | ISL6421_LLC1;
  745. cx_clear(MO_GP0_IO, 0x80);
  746. break;
  747. case SEC_VOLTAGE_18:
  748. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  749. cx_clear(MO_GP0_IO, 0x80);
  750. break;
  751. default:
  752. return -EINVAL;
  753. };
  754. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  755. }
  756. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  757. u32 srate, u32 ratio)
  758. {
  759. u8 aclk = 0;
  760. u8 bclk = 0;
  761. if (srate < 1500000) {
  762. aclk = 0xb7;
  763. bclk = 0x47;
  764. } else if (srate < 3000000) {
  765. aclk = 0xb7;
  766. bclk = 0x4b;
  767. } else if (srate < 7000000) {
  768. aclk = 0xb7;
  769. bclk = 0x4f;
  770. } else if (srate < 14000000) {
  771. aclk = 0xb7;
  772. bclk = 0x53;
  773. } else if (srate < 30000000) {
  774. aclk = 0xb6;
  775. bclk = 0x53;
  776. } else if (srate < 45000000) {
  777. aclk = 0xb4;
  778. bclk = 0x51;
  779. }
  780. stv0299_writereg(fe, 0x13, aclk);
  781. stv0299_writereg(fe, 0x14, bclk);
  782. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  783. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  784. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  785. return 0;
  786. }
  787. static const struct stv0299_config samsung_stv0299_config = {
  788. .demod_address = 0x68,
  789. .inittab = samsung_smt_7020_inittab,
  790. .mclk = 88000000UL,
  791. .invert = 0,
  792. .skip_reinit = 0,
  793. .lock_output = STV0299_LOCKOUTPUT_LK,
  794. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  795. .min_delay_ms = 100,
  796. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  797. };
  798. static int dvb_register(struct cx8802_dev *dev)
  799. {
  800. struct cx88_core *core = dev->core;
  801. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  802. int mfe_shared = 0; /* bus not shared by default */
  803. if (0 != core->i2c_rc) {
  804. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  805. goto frontend_detach;
  806. }
  807. /* Get the first frontend */
  808. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  809. if (!fe0)
  810. goto frontend_detach;
  811. /* multi-frontend gate control is undefined or defaults to fe0 */
  812. dev->frontends.gate = 0;
  813. /* Sets the gate control callback to be used by i2c command calls */
  814. core->gate_ctrl = cx88_dvb_gate_ctrl;
  815. /* init frontend(s) */
  816. switch (core->boardnr) {
  817. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  818. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  819. &connexant_refboard_config,
  820. &core->i2c_adap);
  821. if (fe0->dvb.frontend != NULL) {
  822. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  823. 0x61, &core->i2c_adap,
  824. DVB_PLL_THOMSON_DTT759X))
  825. goto frontend_detach;
  826. }
  827. break;
  828. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  829. case CX88_BOARD_CONEXANT_DVB_T1:
  830. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  831. case CX88_BOARD_WINFAST_DTV1000:
  832. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  833. &connexant_refboard_config,
  834. &core->i2c_adap);
  835. if (fe0->dvb.frontend != NULL) {
  836. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  837. 0x60, &core->i2c_adap,
  838. DVB_PLL_THOMSON_DTT7579))
  839. goto frontend_detach;
  840. }
  841. break;
  842. case CX88_BOARD_WINFAST_DTV2000H:
  843. case CX88_BOARD_WINFAST_DTV2000H_J:
  844. case CX88_BOARD_HAUPPAUGE_HVR1100:
  845. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  846. case CX88_BOARD_HAUPPAUGE_HVR1300:
  847. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  848. &hauppauge_hvr_config,
  849. &core->i2c_adap);
  850. if (fe0->dvb.frontend != NULL) {
  851. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  852. &core->i2c_adap, 0x61,
  853. TUNER_PHILIPS_FMD1216ME_MK3))
  854. goto frontend_detach;
  855. }
  856. break;
  857. case CX88_BOARD_HAUPPAUGE_HVR3000:
  858. /* MFE frontend 1 */
  859. mfe_shared = 1;
  860. dev->frontends.gate = 2;
  861. /* DVB-S init */
  862. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  863. &hauppauge_novas_config,
  864. &dev->core->i2c_adap);
  865. if (fe0->dvb.frontend) {
  866. if (!dvb_attach(isl6421_attach,
  867. fe0->dvb.frontend,
  868. &dev->core->i2c_adap,
  869. 0x08, ISL6421_DCL, 0x00))
  870. goto frontend_detach;
  871. }
  872. /* MFE frontend 2 */
  873. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  874. if (!fe1)
  875. goto frontend_detach;
  876. /* DVB-T init */
  877. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  878. &hauppauge_hvr_config,
  879. &dev->core->i2c_adap);
  880. if (fe1->dvb.frontend) {
  881. fe1->dvb.frontend->id = 1;
  882. if (!dvb_attach(simple_tuner_attach,
  883. fe1->dvb.frontend,
  884. &dev->core->i2c_adap,
  885. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  886. goto frontend_detach;
  887. }
  888. break;
  889. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  890. fe0->dvb.frontend = dvb_attach(mt352_attach,
  891. &dvico_fusionhdtv,
  892. &core->i2c_adap);
  893. if (fe0->dvb.frontend != NULL) {
  894. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  895. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  896. goto frontend_detach;
  897. break;
  898. }
  899. /* ZL10353 replaces MT352 on later cards */
  900. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  901. &dvico_fusionhdtv_plus_v1_1,
  902. &core->i2c_adap);
  903. if (fe0->dvb.frontend != NULL) {
  904. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  905. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  906. goto frontend_detach;
  907. }
  908. break;
  909. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  910. /* The tin box says DEE1601, but it seems to be DTT7579
  911. * compatible, with a slightly different MT352 AGC gain. */
  912. fe0->dvb.frontend = dvb_attach(mt352_attach,
  913. &dvico_fusionhdtv_dual,
  914. &core->i2c_adap);
  915. if (fe0->dvb.frontend != NULL) {
  916. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  917. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  918. goto frontend_detach;
  919. break;
  920. }
  921. /* ZL10353 replaces MT352 on later cards */
  922. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  923. &dvico_fusionhdtv_plus_v1_1,
  924. &core->i2c_adap);
  925. if (fe0->dvb.frontend != NULL) {
  926. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  927. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  928. goto frontend_detach;
  929. }
  930. break;
  931. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  932. fe0->dvb.frontend = dvb_attach(mt352_attach,
  933. &dvico_fusionhdtv,
  934. &core->i2c_adap);
  935. if (fe0->dvb.frontend != NULL) {
  936. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  937. 0x61, NULL, DVB_PLL_LG_Z201))
  938. goto frontend_detach;
  939. }
  940. break;
  941. case CX88_BOARD_KWORLD_DVB_T:
  942. case CX88_BOARD_DNTV_LIVE_DVB_T:
  943. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  944. fe0->dvb.frontend = dvb_attach(mt352_attach,
  945. &dntv_live_dvbt_config,
  946. &core->i2c_adap);
  947. if (fe0->dvb.frontend != NULL) {
  948. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  949. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  950. goto frontend_detach;
  951. }
  952. break;
  953. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  954. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  955. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  956. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  957. &dev->vp3054->adap);
  958. if (fe0->dvb.frontend != NULL) {
  959. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  960. &core->i2c_adap, 0x61,
  961. TUNER_PHILIPS_FMD1216ME_MK3))
  962. goto frontend_detach;
  963. }
  964. #else
  965. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  966. core->name);
  967. #endif
  968. break;
  969. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  970. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  971. &dvico_fusionhdtv_hybrid,
  972. &core->i2c_adap);
  973. if (fe0->dvb.frontend != NULL) {
  974. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  975. &core->i2c_adap, 0x61,
  976. TUNER_THOMSON_FE6600))
  977. goto frontend_detach;
  978. }
  979. break;
  980. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  981. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  982. &dvico_fusionhdtv_xc3028,
  983. &core->i2c_adap);
  984. if (fe0->dvb.frontend == NULL)
  985. fe0->dvb.frontend = dvb_attach(mt352_attach,
  986. &dvico_fusionhdtv_mt352_xc3028,
  987. &core->i2c_adap);
  988. /*
  989. * On this board, the demod provides the I2C bus pullup.
  990. * We must not permit gate_ctrl to be performed, or
  991. * the xc3028 cannot communicate on the bus.
  992. */
  993. if (fe0->dvb.frontend)
  994. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  995. if (attach_xc3028(0x61, dev) < 0)
  996. goto frontend_detach;
  997. break;
  998. case CX88_BOARD_PCHDTV_HD3000:
  999. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  1000. &core->i2c_adap);
  1001. if (fe0->dvb.frontend != NULL) {
  1002. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1003. &core->i2c_adap, 0x61,
  1004. TUNER_THOMSON_DTT761X))
  1005. goto frontend_detach;
  1006. }
  1007. break;
  1008. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  1009. dev->ts_gen_cntrl = 0x08;
  1010. /* Do a hardware reset of chip before using it. */
  1011. cx_clear(MO_GP0_IO, 1);
  1012. mdelay(100);
  1013. cx_set(MO_GP0_IO, 1);
  1014. mdelay(200);
  1015. /* Select RF connector callback */
  1016. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  1017. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1018. &fusionhdtv_3_gold,
  1019. &core->i2c_adap);
  1020. if (fe0->dvb.frontend != NULL) {
  1021. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1022. &core->i2c_adap, 0x61,
  1023. TUNER_MICROTUNE_4042FI5))
  1024. goto frontend_detach;
  1025. }
  1026. break;
  1027. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  1028. dev->ts_gen_cntrl = 0x08;
  1029. /* Do a hardware reset of chip before using it. */
  1030. cx_clear(MO_GP0_IO, 1);
  1031. mdelay(100);
  1032. cx_set(MO_GP0_IO, 9);
  1033. mdelay(200);
  1034. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1035. &fusionhdtv_3_gold,
  1036. &core->i2c_adap);
  1037. if (fe0->dvb.frontend != NULL) {
  1038. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1039. &core->i2c_adap, 0x61,
  1040. TUNER_THOMSON_DTT761X))
  1041. goto frontend_detach;
  1042. }
  1043. break;
  1044. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1045. dev->ts_gen_cntrl = 0x08;
  1046. /* Do a hardware reset of chip before using it. */
  1047. cx_clear(MO_GP0_IO, 1);
  1048. mdelay(100);
  1049. cx_set(MO_GP0_IO, 1);
  1050. mdelay(200);
  1051. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1052. &fusionhdtv_5_gold,
  1053. &core->i2c_adap);
  1054. if (fe0->dvb.frontend != NULL) {
  1055. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1056. &core->i2c_adap, 0x61,
  1057. TUNER_LG_TDVS_H06XF))
  1058. goto frontend_detach;
  1059. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1060. &core->i2c_adap, 0x43))
  1061. goto frontend_detach;
  1062. }
  1063. break;
  1064. case CX88_BOARD_PCHDTV_HD5500:
  1065. dev->ts_gen_cntrl = 0x08;
  1066. /* Do a hardware reset of chip before using it. */
  1067. cx_clear(MO_GP0_IO, 1);
  1068. mdelay(100);
  1069. cx_set(MO_GP0_IO, 1);
  1070. mdelay(200);
  1071. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1072. &pchdtv_hd5500,
  1073. &core->i2c_adap);
  1074. if (fe0->dvb.frontend != NULL) {
  1075. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1076. &core->i2c_adap, 0x61,
  1077. TUNER_LG_TDVS_H06XF))
  1078. goto frontend_detach;
  1079. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1080. &core->i2c_adap, 0x43))
  1081. goto frontend_detach;
  1082. }
  1083. break;
  1084. case CX88_BOARD_ATI_HDTVWONDER:
  1085. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1086. &ati_hdtvwonder,
  1087. &core->i2c_adap);
  1088. if (fe0->dvb.frontend != NULL) {
  1089. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1090. &core->i2c_adap, 0x61,
  1091. TUNER_PHILIPS_TUV1236D))
  1092. goto frontend_detach;
  1093. }
  1094. break;
  1095. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1096. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1097. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1098. &hauppauge_novas_config,
  1099. &core->i2c_adap);
  1100. if (fe0->dvb.frontend) {
  1101. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1102. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  1103. goto frontend_detach;
  1104. }
  1105. break;
  1106. case CX88_BOARD_KWORLD_DVBS_100:
  1107. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1108. &kworld_dvbs_100_config,
  1109. &core->i2c_adap);
  1110. if (fe0->dvb.frontend) {
  1111. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1112. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1113. }
  1114. break;
  1115. case CX88_BOARD_GENIATECH_DVBS:
  1116. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1117. &geniatech_dvbs_config,
  1118. &core->i2c_adap);
  1119. if (fe0->dvb.frontend) {
  1120. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1121. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1122. }
  1123. break;
  1124. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1125. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1126. &pinnacle_pctv_hd_800i_config,
  1127. &core->i2c_adap);
  1128. if (fe0->dvb.frontend != NULL) {
  1129. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1130. &core->i2c_adap,
  1131. &pinnacle_pctv_hd_800i_tuner_config))
  1132. goto frontend_detach;
  1133. }
  1134. break;
  1135. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1136. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1137. &dvico_hdtv5_pci_nano_config,
  1138. &core->i2c_adap);
  1139. if (fe0->dvb.frontend != NULL) {
  1140. struct dvb_frontend *fe;
  1141. struct xc2028_config cfg = {
  1142. .i2c_adap = &core->i2c_adap,
  1143. .i2c_addr = 0x61,
  1144. };
  1145. static struct xc2028_ctrl ctl = {
  1146. .fname = XC2028_DEFAULT_FIRMWARE,
  1147. .max_len = 64,
  1148. .scode_table = XC3028_FE_OREN538,
  1149. };
  1150. fe = dvb_attach(xc2028_attach,
  1151. fe0->dvb.frontend, &cfg);
  1152. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  1153. fe->ops.tuner_ops.set_config(fe, &ctl);
  1154. }
  1155. break;
  1156. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1157. case CX88_BOARD_WINFAST_DTV1800H:
  1158. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1159. &cx88_pinnacle_hybrid_pctv,
  1160. &core->i2c_adap);
  1161. if (fe0->dvb.frontend) {
  1162. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1163. if (attach_xc3028(0x61, dev) < 0)
  1164. goto frontend_detach;
  1165. }
  1166. break;
  1167. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1168. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1169. &cx88_pinnacle_hybrid_pctv,
  1170. &core->i2c_adap);
  1171. if (fe0->dvb.frontend) {
  1172. struct xc4000_config cfg = {
  1173. .i2c_address = 0x61,
  1174. .default_pm = 0,
  1175. .dvb_amplitude = 134,
  1176. .set_smoothedcvbs = 1,
  1177. .if_khz = 4560
  1178. };
  1179. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1180. if (attach_xc4000(dev, &cfg) < 0)
  1181. goto frontend_detach;
  1182. }
  1183. break;
  1184. case CX88_BOARD_GENIATECH_X8000_MT:
  1185. dev->ts_gen_cntrl = 0x00;
  1186. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1187. &cx88_geniatech_x8000_mt,
  1188. &core->i2c_adap);
  1189. if (attach_xc3028(0x61, dev) < 0)
  1190. goto frontend_detach;
  1191. break;
  1192. case CX88_BOARD_KWORLD_ATSC_120:
  1193. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1194. &kworld_atsc_120_config,
  1195. &core->i2c_adap);
  1196. if (attach_xc3028(0x61, dev) < 0)
  1197. goto frontend_detach;
  1198. break;
  1199. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1200. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1201. &dvico_fusionhdtv7_config,
  1202. &core->i2c_adap);
  1203. if (fe0->dvb.frontend != NULL) {
  1204. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1205. &core->i2c_adap,
  1206. &dvico_fusionhdtv7_tuner_config))
  1207. goto frontend_detach;
  1208. }
  1209. break;
  1210. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1211. /* MFE frontend 1 */
  1212. mfe_shared = 1;
  1213. dev->frontends.gate = 2;
  1214. /* DVB-S/S2 Init */
  1215. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1216. &hauppauge_hvr4000_config,
  1217. &dev->core->i2c_adap);
  1218. if (fe0->dvb.frontend) {
  1219. if (!dvb_attach(isl6421_attach,
  1220. fe0->dvb.frontend,
  1221. &dev->core->i2c_adap,
  1222. 0x08, ISL6421_DCL, 0x00))
  1223. goto frontend_detach;
  1224. }
  1225. /* MFE frontend 2 */
  1226. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  1227. if (!fe1)
  1228. goto frontend_detach;
  1229. /* DVB-T Init */
  1230. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1231. &hauppauge_hvr_config,
  1232. &dev->core->i2c_adap);
  1233. if (fe1->dvb.frontend) {
  1234. fe1->dvb.frontend->id = 1;
  1235. if (!dvb_attach(simple_tuner_attach,
  1236. fe1->dvb.frontend,
  1237. &dev->core->i2c_adap,
  1238. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1239. goto frontend_detach;
  1240. }
  1241. break;
  1242. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1243. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1244. &hauppauge_hvr4000_config,
  1245. &dev->core->i2c_adap);
  1246. if (fe0->dvb.frontend) {
  1247. if (!dvb_attach(isl6421_attach,
  1248. fe0->dvb.frontend,
  1249. &dev->core->i2c_adap,
  1250. 0x08, ISL6421_DCL, 0x00))
  1251. goto frontend_detach;
  1252. }
  1253. break;
  1254. case CX88_BOARD_PROF_6200:
  1255. case CX88_BOARD_TBS_8910:
  1256. case CX88_BOARD_TEVII_S420:
  1257. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1258. &tevii_tuner_sharp_config,
  1259. &core->i2c_adap);
  1260. if (fe0->dvb.frontend != NULL) {
  1261. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1262. &core->i2c_adap, DVB_PLL_OPERA1))
  1263. goto frontend_detach;
  1264. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1265. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1266. } else {
  1267. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1268. &tevii_tuner_earda_config,
  1269. &core->i2c_adap);
  1270. if (fe0->dvb.frontend != NULL) {
  1271. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1272. &core->i2c_adap))
  1273. goto frontend_detach;
  1274. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1275. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1276. }
  1277. }
  1278. break;
  1279. case CX88_BOARD_TEVII_S460:
  1280. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1281. &tevii_s460_config,
  1282. &core->i2c_adap);
  1283. if (fe0->dvb.frontend != NULL)
  1284. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1285. break;
  1286. case CX88_BOARD_TEVII_S464:
  1287. fe0->dvb.frontend = dvb_attach(ds3000_attach,
  1288. &tevii_ds3000_config,
  1289. &core->i2c_adap);
  1290. if (fe0->dvb.frontend != NULL)
  1291. fe0->dvb.frontend->ops.set_voltage =
  1292. tevii_dvbs_set_voltage;
  1293. break;
  1294. case CX88_BOARD_OMICOM_SS4_PCI:
  1295. case CX88_BOARD_TBS_8920:
  1296. case CX88_BOARD_PROF_7300:
  1297. case CX88_BOARD_SATTRADE_ST4200:
  1298. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1299. &hauppauge_hvr4000_config,
  1300. &core->i2c_adap);
  1301. if (fe0->dvb.frontend != NULL)
  1302. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1303. break;
  1304. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1305. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1306. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1307. &core->i2c_adap);
  1308. if (fe0->dvb.frontend) {
  1309. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1310. if (attach_xc3028(0x61, dev) < 0)
  1311. goto frontend_detach;
  1312. }
  1313. break;
  1314. case CX88_BOARD_PROF_7301:{
  1315. struct dvb_tuner_ops *tuner_ops = NULL;
  1316. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1317. &prof_7301_stv0900_config,
  1318. &core->i2c_adap, 0);
  1319. if (fe0->dvb.frontend != NULL) {
  1320. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1321. &prof_7301_stb6100_config,
  1322. &core->i2c_adap))
  1323. goto frontend_detach;
  1324. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1325. tuner_ops->set_frequency = stb6100_set_freq;
  1326. tuner_ops->get_frequency = stb6100_get_freq;
  1327. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1328. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1329. core->prev_set_voltage =
  1330. fe0->dvb.frontend->ops.set_voltage;
  1331. fe0->dvb.frontend->ops.set_voltage =
  1332. tevii_dvbs_set_voltage;
  1333. }
  1334. break;
  1335. }
  1336. case CX88_BOARD_SAMSUNG_SMT_7020:
  1337. dev->ts_gen_cntrl = 0x08;
  1338. cx_set(MO_GP0_IO, 0x0101);
  1339. cx_clear(MO_GP0_IO, 0x01);
  1340. mdelay(100);
  1341. cx_set(MO_GP0_IO, 0x01);
  1342. mdelay(200);
  1343. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1344. &samsung_stv0299_config,
  1345. &dev->core->i2c_adap);
  1346. if (fe0->dvb.frontend) {
  1347. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1348. samsung_smt_7020_tuner_set_params;
  1349. fe0->dvb.frontend->tuner_priv =
  1350. &dev->core->i2c_adap;
  1351. fe0->dvb.frontend->ops.set_voltage =
  1352. samsung_smt_7020_set_voltage;
  1353. fe0->dvb.frontend->ops.set_tone =
  1354. samsung_smt_7020_set_tone;
  1355. }
  1356. break;
  1357. case CX88_BOARD_TWINHAN_VP1027_DVBS:
  1358. dev->ts_gen_cntrl = 0x00;
  1359. fe0->dvb.frontend = dvb_attach(mb86a16_attach,
  1360. &twinhan_vp1027,
  1361. &core->i2c_adap);
  1362. if (fe0->dvb.frontend) {
  1363. core->prev_set_voltage =
  1364. fe0->dvb.frontend->ops.set_voltage;
  1365. fe0->dvb.frontend->ops.set_voltage =
  1366. vp1027_set_voltage;
  1367. }
  1368. break;
  1369. default:
  1370. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1371. core->name);
  1372. break;
  1373. }
  1374. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1375. printk(KERN_ERR
  1376. "%s/2: frontend initialization failed\n",
  1377. core->name);
  1378. goto frontend_detach;
  1379. }
  1380. /* define general-purpose callback pointer */
  1381. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1382. /* Ensure all frontends negotiate bus access */
  1383. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1384. if (fe1)
  1385. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1386. /* Put the analog decoder in standby to keep it quiet */
  1387. call_all(core, core, s_power, 0);
  1388. /* register everything */
  1389. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1390. &dev->pci->dev, adapter_nr, mfe_shared, NULL);
  1391. frontend_detach:
  1392. core->gate_ctrl = NULL;
  1393. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1394. return -EINVAL;
  1395. }
  1396. /* ----------------------------------------------------------- */
  1397. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1398. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1399. {
  1400. struct cx88_core *core = drv->core;
  1401. int err = 0;
  1402. dprintk( 1, "%s\n", __func__);
  1403. switch (core->boardnr) {
  1404. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1405. /* We arrive here with either the cx23416 or the cx22702
  1406. * on the bus. Take the bus from the cx23416 and enable the
  1407. * cx22702 demod
  1408. */
  1409. /* Toggle reset on cx22702 leaving i2c active */
  1410. cx_set(MO_GP0_IO, 0x00000080);
  1411. udelay(1000);
  1412. cx_clear(MO_GP0_IO, 0x00000080);
  1413. udelay(50);
  1414. cx_set(MO_GP0_IO, 0x00000080);
  1415. udelay(1000);
  1416. /* enable the cx22702 pins */
  1417. cx_clear(MO_GP0_IO, 0x00000004);
  1418. udelay(1000);
  1419. break;
  1420. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1421. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1422. /* Toggle reset on cx22702 leaving i2c active */
  1423. cx_set(MO_GP0_IO, 0x00000080);
  1424. udelay(1000);
  1425. cx_clear(MO_GP0_IO, 0x00000080);
  1426. udelay(50);
  1427. cx_set(MO_GP0_IO, 0x00000080);
  1428. udelay(1000);
  1429. switch (core->dvbdev->frontends.active_fe_id) {
  1430. case 1: /* DVB-S/S2 Enabled */
  1431. /* tri-state the cx22702 pins */
  1432. cx_set(MO_GP0_IO, 0x00000004);
  1433. /* Take the cx24116/cx24123 out of reset */
  1434. cx_write(MO_SRST_IO, 1);
  1435. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1436. break;
  1437. case 2: /* DVB-T Enabled */
  1438. /* Put the cx24116/cx24123 into reset */
  1439. cx_write(MO_SRST_IO, 0);
  1440. /* enable the cx22702 pins */
  1441. cx_clear(MO_GP0_IO, 0x00000004);
  1442. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1443. break;
  1444. }
  1445. udelay(1000);
  1446. break;
  1447. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1448. /* set RF input to AIR for DVB-T (GPIO 16) */
  1449. cx_write(MO_GP2_IO, 0x0101);
  1450. break;
  1451. default:
  1452. err = -ENODEV;
  1453. }
  1454. return err;
  1455. }
  1456. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1457. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1458. {
  1459. struct cx88_core *core = drv->core;
  1460. int err = 0;
  1461. dprintk( 1, "%s\n", __func__);
  1462. switch (core->boardnr) {
  1463. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1464. /* Do Nothing, leave the cx22702 on the bus. */
  1465. break;
  1466. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1467. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1468. break;
  1469. default:
  1470. err = -ENODEV;
  1471. }
  1472. return err;
  1473. }
  1474. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1475. {
  1476. struct cx88_core *core = drv->core;
  1477. struct cx8802_dev *dev = drv->core->dvbdev;
  1478. int err;
  1479. struct videobuf_dvb_frontend *fe;
  1480. int i;
  1481. dprintk( 1, "%s\n", __func__);
  1482. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1483. core->boardnr,
  1484. core->name,
  1485. core->pci_bus,
  1486. core->pci_slot);
  1487. err = -ENODEV;
  1488. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1489. goto fail_core;
  1490. /* If vp3054 isn't enabled, a stub will just return 0 */
  1491. err = vp3054_i2c_probe(dev);
  1492. if (0 != err)
  1493. goto fail_core;
  1494. /* dvb stuff */
  1495. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1496. dev->ts_gen_cntrl = 0x0c;
  1497. err = cx8802_alloc_frontends(dev);
  1498. if (err)
  1499. goto fail_core;
  1500. err = -ENODEV;
  1501. for (i = 1; i <= core->board.num_frontends; i++) {
  1502. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1503. if (fe == NULL) {
  1504. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1505. __func__, i);
  1506. goto fail_probe;
  1507. }
  1508. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1509. &dev->pci->dev, &dev->slock,
  1510. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1511. V4L2_FIELD_TOP,
  1512. sizeof(struct cx88_buffer),
  1513. dev, NULL);
  1514. /* init struct videobuf_dvb */
  1515. fe->dvb.name = dev->core->name;
  1516. }
  1517. err = dvb_register(dev);
  1518. if (err)
  1519. /* frontends/adapter de-allocated in dvb_register */
  1520. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1521. core->name, err);
  1522. return err;
  1523. fail_probe:
  1524. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1525. fail_core:
  1526. return err;
  1527. }
  1528. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1529. {
  1530. struct cx88_core *core = drv->core;
  1531. struct cx8802_dev *dev = drv->core->dvbdev;
  1532. dprintk( 1, "%s\n", __func__);
  1533. videobuf_dvb_unregister_bus(&dev->frontends);
  1534. vp3054_i2c_remove(dev);
  1535. core->gate_ctrl = NULL;
  1536. return 0;
  1537. }
  1538. static struct cx8802_driver cx8802_dvb_driver = {
  1539. .type_id = CX88_MPEG_DVB,
  1540. .hw_access = CX8802_DRVCTL_SHARED,
  1541. .probe = cx8802_dvb_probe,
  1542. .remove = cx8802_dvb_remove,
  1543. .advise_acquire = cx8802_dvb_advise_acquire,
  1544. .advise_release = cx8802_dvb_advise_release,
  1545. };
  1546. static int __init dvb_init(void)
  1547. {
  1548. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1549. (CX88_VERSION_CODE >> 16) & 0xff,
  1550. (CX88_VERSION_CODE >> 8) & 0xff,
  1551. CX88_VERSION_CODE & 0xff);
  1552. #ifdef SNAPSHOT
  1553. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1554. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1555. #endif
  1556. return cx8802_register_driver(&cx8802_dvb_driver);
  1557. }
  1558. static void __exit dvb_fini(void)
  1559. {
  1560. cx8802_unregister_driver(&cx8802_dvb_driver);
  1561. }
  1562. module_init(dvb_init);
  1563. module_exit(dvb_fini);
  1564. /*
  1565. * Local variables:
  1566. * c-basic-offset: 8
  1567. * compile-command: "make DVB=1"
  1568. * End:
  1569. */