smsc911x.c 63 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406
  1. /***************************************************************************
  2. *
  3. * Copyright (C) 2004-2008 SMSC
  4. * Copyright (C) 2005-2008 ARM
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19. *
  20. ***************************************************************************
  21. * Rewritten, heavily based on smsc911x simple driver by SMSC.
  22. * Partly uses io macros from smc91x.c by Nicolas Pitre
  23. *
  24. * Supported devices:
  25. * LAN9115, LAN9116, LAN9117, LAN9118
  26. * LAN9215, LAN9216, LAN9217, LAN9218
  27. * LAN9210, LAN9211
  28. * LAN9220, LAN9221
  29. *
  30. */
  31. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  32. #include <linux/crc32.h>
  33. #include <linux/delay.h>
  34. #include <linux/errno.h>
  35. #include <linux/etherdevice.h>
  36. #include <linux/ethtool.h>
  37. #include <linux/init.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/ioport.h>
  40. #include <linux/kernel.h>
  41. #include <linux/module.h>
  42. #include <linux/netdevice.h>
  43. #include <linux/platform_device.h>
  44. #include <linux/sched.h>
  45. #include <linux/timer.h>
  46. #include <linux/bug.h>
  47. #include <linux/bitops.h>
  48. #include <linux/irq.h>
  49. #include <linux/io.h>
  50. #include <linux/swab.h>
  51. #include <linux/phy.h>
  52. #include <linux/smsc911x.h>
  53. #include <linux/device.h>
  54. #include <linux/of.h>
  55. #include <linux/of_device.h>
  56. #include <linux/of_gpio.h>
  57. #include <linux/of_net.h>
  58. #include "smsc911x.h"
  59. #define SMSC_CHIPNAME "smsc911x"
  60. #define SMSC_MDIONAME "smsc911x-mdio"
  61. #define SMSC_DRV_VERSION "2008-10-21"
  62. MODULE_LICENSE("GPL");
  63. MODULE_VERSION(SMSC_DRV_VERSION);
  64. MODULE_ALIAS("platform:smsc911x");
  65. #if USE_DEBUG > 0
  66. static int debug = 16;
  67. #else
  68. static int debug = 3;
  69. #endif
  70. module_param(debug, int, 0);
  71. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  72. struct smsc911x_data;
  73. struct smsc911x_ops {
  74. u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
  75. void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
  76. void (*rx_readfifo)(struct smsc911x_data *pdata,
  77. unsigned int *buf, unsigned int wordcount);
  78. void (*tx_writefifo)(struct smsc911x_data *pdata,
  79. unsigned int *buf, unsigned int wordcount);
  80. };
  81. struct smsc911x_data {
  82. void __iomem *ioaddr;
  83. unsigned int idrev;
  84. /* used to decide which workarounds apply */
  85. unsigned int generation;
  86. /* device configuration (copied from platform_data during probe) */
  87. struct smsc911x_platform_config config;
  88. /* This needs to be acquired before calling any of below:
  89. * smsc911x_mac_read(), smsc911x_mac_write()
  90. */
  91. spinlock_t mac_lock;
  92. /* spinlock to ensure register accesses are serialised */
  93. spinlock_t dev_lock;
  94. struct phy_device *phy_dev;
  95. struct mii_bus *mii_bus;
  96. int phy_irq[PHY_MAX_ADDR];
  97. unsigned int using_extphy;
  98. int last_duplex;
  99. int last_carrier;
  100. u32 msg_enable;
  101. unsigned int gpio_setting;
  102. unsigned int gpio_orig_setting;
  103. struct net_device *dev;
  104. struct napi_struct napi;
  105. unsigned int software_irq_signal;
  106. #ifdef USE_PHY_WORK_AROUND
  107. #define MIN_PACKET_SIZE (64)
  108. char loopback_tx_pkt[MIN_PACKET_SIZE];
  109. char loopback_rx_pkt[MIN_PACKET_SIZE];
  110. unsigned int resetcount;
  111. #endif
  112. /* Members for Multicast filter workaround */
  113. unsigned int multicast_update_pending;
  114. unsigned int set_bits_mask;
  115. unsigned int clear_bits_mask;
  116. unsigned int hashhi;
  117. unsigned int hashlo;
  118. /* register access functions */
  119. const struct smsc911x_ops *ops;
  120. };
  121. /* Easy access to information */
  122. #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
  123. static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
  124. {
  125. if (pdata->config.flags & SMSC911X_USE_32BIT)
  126. return readl(pdata->ioaddr + reg);
  127. if (pdata->config.flags & SMSC911X_USE_16BIT)
  128. return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
  129. ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
  130. BUG();
  131. return 0;
  132. }
  133. static inline u32
  134. __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
  135. {
  136. if (pdata->config.flags & SMSC911X_USE_32BIT)
  137. return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
  138. if (pdata->config.flags & SMSC911X_USE_16BIT)
  139. return (readw(pdata->ioaddr +
  140. __smsc_shift(pdata, reg)) & 0xFFFF) |
  141. ((readw(pdata->ioaddr +
  142. __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
  143. BUG();
  144. return 0;
  145. }
  146. static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
  147. {
  148. u32 data;
  149. unsigned long flags;
  150. spin_lock_irqsave(&pdata->dev_lock, flags);
  151. data = pdata->ops->reg_read(pdata, reg);
  152. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  153. return data;
  154. }
  155. static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
  156. u32 val)
  157. {
  158. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  159. writel(val, pdata->ioaddr + reg);
  160. return;
  161. }
  162. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  163. writew(val & 0xFFFF, pdata->ioaddr + reg);
  164. writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
  165. return;
  166. }
  167. BUG();
  168. }
  169. static inline void
  170. __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
  171. {
  172. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  173. writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
  174. return;
  175. }
  176. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  177. writew(val & 0xFFFF,
  178. pdata->ioaddr + __smsc_shift(pdata, reg));
  179. writew((val >> 16) & 0xFFFF,
  180. pdata->ioaddr + __smsc_shift(pdata, reg + 2));
  181. return;
  182. }
  183. BUG();
  184. }
  185. static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
  186. u32 val)
  187. {
  188. unsigned long flags;
  189. spin_lock_irqsave(&pdata->dev_lock, flags);
  190. pdata->ops->reg_write(pdata, reg, val);
  191. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  192. }
  193. /* Writes a packet to the TX_DATA_FIFO */
  194. static inline void
  195. smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
  196. unsigned int wordcount)
  197. {
  198. unsigned long flags;
  199. spin_lock_irqsave(&pdata->dev_lock, flags);
  200. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  201. while (wordcount--)
  202. __smsc911x_reg_write(pdata, TX_DATA_FIFO,
  203. swab32(*buf++));
  204. goto out;
  205. }
  206. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  207. writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
  208. goto out;
  209. }
  210. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  211. while (wordcount--)
  212. __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
  213. goto out;
  214. }
  215. BUG();
  216. out:
  217. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  218. }
  219. /* Writes a packet to the TX_DATA_FIFO - shifted version */
  220. static inline void
  221. smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
  222. unsigned int wordcount)
  223. {
  224. unsigned long flags;
  225. spin_lock_irqsave(&pdata->dev_lock, flags);
  226. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  227. while (wordcount--)
  228. __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
  229. swab32(*buf++));
  230. goto out;
  231. }
  232. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  233. writesl(pdata->ioaddr + __smsc_shift(pdata,
  234. TX_DATA_FIFO), buf, wordcount);
  235. goto out;
  236. }
  237. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  238. while (wordcount--)
  239. __smsc911x_reg_write_shift(pdata,
  240. TX_DATA_FIFO, *buf++);
  241. goto out;
  242. }
  243. BUG();
  244. out:
  245. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  246. }
  247. /* Reads a packet out of the RX_DATA_FIFO */
  248. static inline void
  249. smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
  250. unsigned int wordcount)
  251. {
  252. unsigned long flags;
  253. spin_lock_irqsave(&pdata->dev_lock, flags);
  254. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  255. while (wordcount--)
  256. *buf++ = swab32(__smsc911x_reg_read(pdata,
  257. RX_DATA_FIFO));
  258. goto out;
  259. }
  260. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  261. readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
  262. goto out;
  263. }
  264. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  265. while (wordcount--)
  266. *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
  267. goto out;
  268. }
  269. BUG();
  270. out:
  271. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  272. }
  273. /* Reads a packet out of the RX_DATA_FIFO - shifted version */
  274. static inline void
  275. smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
  276. unsigned int wordcount)
  277. {
  278. unsigned long flags;
  279. spin_lock_irqsave(&pdata->dev_lock, flags);
  280. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  281. while (wordcount--)
  282. *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
  283. RX_DATA_FIFO));
  284. goto out;
  285. }
  286. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  287. readsl(pdata->ioaddr + __smsc_shift(pdata,
  288. RX_DATA_FIFO), buf, wordcount);
  289. goto out;
  290. }
  291. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  292. while (wordcount--)
  293. *buf++ = __smsc911x_reg_read_shift(pdata,
  294. RX_DATA_FIFO);
  295. goto out;
  296. }
  297. BUG();
  298. out:
  299. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  300. }
  301. /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
  302. * and smsc911x_mac_write, so assumes mac_lock is held */
  303. static int smsc911x_mac_complete(struct smsc911x_data *pdata)
  304. {
  305. int i;
  306. u32 val;
  307. SMSC_ASSERT_MAC_LOCK(pdata);
  308. for (i = 0; i < 40; i++) {
  309. val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
  310. if (!(val & MAC_CSR_CMD_CSR_BUSY_))
  311. return 0;
  312. }
  313. SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
  314. "MAC_CSR_CMD: 0x%08X", val);
  315. return -EIO;
  316. }
  317. /* Fetches a MAC register value. Assumes mac_lock is acquired */
  318. static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
  319. {
  320. unsigned int temp;
  321. SMSC_ASSERT_MAC_LOCK(pdata);
  322. temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
  323. if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
  324. SMSC_WARN(pdata, hw, "MAC busy at entry");
  325. return 0xFFFFFFFF;
  326. }
  327. /* Send the MAC cmd */
  328. smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
  329. MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
  330. /* Workaround for hardware read-after-write restriction */
  331. temp = smsc911x_reg_read(pdata, BYTE_TEST);
  332. /* Wait for the read to complete */
  333. if (likely(smsc911x_mac_complete(pdata) == 0))
  334. return smsc911x_reg_read(pdata, MAC_CSR_DATA);
  335. SMSC_WARN(pdata, hw, "MAC busy after read");
  336. return 0xFFFFFFFF;
  337. }
  338. /* Set a mac register, mac_lock must be acquired before calling */
  339. static void smsc911x_mac_write(struct smsc911x_data *pdata,
  340. unsigned int offset, u32 val)
  341. {
  342. unsigned int temp;
  343. SMSC_ASSERT_MAC_LOCK(pdata);
  344. temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
  345. if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
  346. SMSC_WARN(pdata, hw,
  347. "smsc911x_mac_write failed, MAC busy at entry");
  348. return;
  349. }
  350. /* Send data to write */
  351. smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
  352. /* Write the actual data */
  353. smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
  354. MAC_CSR_CMD_CSR_BUSY_));
  355. /* Workaround for hardware read-after-write restriction */
  356. temp = smsc911x_reg_read(pdata, BYTE_TEST);
  357. /* Wait for the write to complete */
  358. if (likely(smsc911x_mac_complete(pdata) == 0))
  359. return;
  360. SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
  361. }
  362. /* Get a phy register */
  363. static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
  364. {
  365. struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
  366. unsigned long flags;
  367. unsigned int addr;
  368. int i, reg;
  369. spin_lock_irqsave(&pdata->mac_lock, flags);
  370. /* Confirm MII not busy */
  371. if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  372. SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
  373. reg = -EIO;
  374. goto out;
  375. }
  376. /* Set the address, index & direction (read from PHY) */
  377. addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
  378. smsc911x_mac_write(pdata, MII_ACC, addr);
  379. /* Wait for read to complete w/ timeout */
  380. for (i = 0; i < 100; i++)
  381. if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  382. reg = smsc911x_mac_read(pdata, MII_DATA);
  383. goto out;
  384. }
  385. SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
  386. reg = -EIO;
  387. out:
  388. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  389. return reg;
  390. }
  391. /* Set a phy register */
  392. static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
  393. u16 val)
  394. {
  395. struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
  396. unsigned long flags;
  397. unsigned int addr;
  398. int i, reg;
  399. spin_lock_irqsave(&pdata->mac_lock, flags);
  400. /* Confirm MII not busy */
  401. if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  402. SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
  403. reg = -EIO;
  404. goto out;
  405. }
  406. /* Put the data to write in the MAC */
  407. smsc911x_mac_write(pdata, MII_DATA, val);
  408. /* Set the address, index & direction (write to PHY) */
  409. addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
  410. MII_ACC_MII_WRITE_;
  411. smsc911x_mac_write(pdata, MII_ACC, addr);
  412. /* Wait for write to complete w/ timeout */
  413. for (i = 0; i < 100; i++)
  414. if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  415. reg = 0;
  416. goto out;
  417. }
  418. SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
  419. reg = -EIO;
  420. out:
  421. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  422. return reg;
  423. }
  424. /* Switch to external phy. Assumes tx and rx are stopped. */
  425. static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
  426. {
  427. unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
  428. /* Disable phy clocks to the MAC */
  429. hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
  430. hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  431. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  432. udelay(10); /* Enough time for clocks to stop */
  433. /* Switch to external phy */
  434. hwcfg |= HW_CFG_EXT_PHY_EN_;
  435. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  436. /* Enable phy clocks to the MAC */
  437. hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
  438. hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  439. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  440. udelay(10); /* Enough time for clocks to restart */
  441. hwcfg |= HW_CFG_SMI_SEL_;
  442. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  443. }
  444. /* Autodetects and enables external phy if present on supported chips.
  445. * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
  446. * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
  447. static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
  448. {
  449. unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
  450. if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
  451. SMSC_TRACE(pdata, hw, "Forcing internal PHY");
  452. pdata->using_extphy = 0;
  453. } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
  454. SMSC_TRACE(pdata, hw, "Forcing external PHY");
  455. smsc911x_phy_enable_external(pdata);
  456. pdata->using_extphy = 1;
  457. } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
  458. SMSC_TRACE(pdata, hw,
  459. "HW_CFG EXT_PHY_DET set, using external PHY");
  460. smsc911x_phy_enable_external(pdata);
  461. pdata->using_extphy = 1;
  462. } else {
  463. SMSC_TRACE(pdata, hw,
  464. "HW_CFG EXT_PHY_DET clear, using internal PHY");
  465. pdata->using_extphy = 0;
  466. }
  467. }
  468. /* Fetches a tx status out of the status fifo */
  469. static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
  470. {
  471. unsigned int result =
  472. smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
  473. if (result != 0)
  474. result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
  475. return result;
  476. }
  477. /* Fetches the next rx status */
  478. static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
  479. {
  480. unsigned int result =
  481. smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
  482. if (result != 0)
  483. result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
  484. return result;
  485. }
  486. #ifdef USE_PHY_WORK_AROUND
  487. static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
  488. {
  489. unsigned int tries;
  490. u32 wrsz;
  491. u32 rdsz;
  492. ulong bufp;
  493. for (tries = 0; tries < 10; tries++) {
  494. unsigned int txcmd_a;
  495. unsigned int txcmd_b;
  496. unsigned int status;
  497. unsigned int pktlength;
  498. unsigned int i;
  499. /* Zero-out rx packet memory */
  500. memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
  501. /* Write tx packet to 118 */
  502. txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
  503. txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
  504. txcmd_a |= MIN_PACKET_SIZE;
  505. txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
  506. smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
  507. smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
  508. bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
  509. wrsz = MIN_PACKET_SIZE + 3;
  510. wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
  511. wrsz >>= 2;
  512. pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
  513. /* Wait till transmit is done */
  514. i = 60;
  515. do {
  516. udelay(5);
  517. status = smsc911x_tx_get_txstatus(pdata);
  518. } while ((i--) && (!status));
  519. if (!status) {
  520. SMSC_WARN(pdata, hw,
  521. "Failed to transmit during loopback test");
  522. continue;
  523. }
  524. if (status & TX_STS_ES_) {
  525. SMSC_WARN(pdata, hw,
  526. "Transmit encountered errors during loopback test");
  527. continue;
  528. }
  529. /* Wait till receive is done */
  530. i = 60;
  531. do {
  532. udelay(5);
  533. status = smsc911x_rx_get_rxstatus(pdata);
  534. } while ((i--) && (!status));
  535. if (!status) {
  536. SMSC_WARN(pdata, hw,
  537. "Failed to receive during loopback test");
  538. continue;
  539. }
  540. if (status & RX_STS_ES_) {
  541. SMSC_WARN(pdata, hw,
  542. "Receive encountered errors during loopback test");
  543. continue;
  544. }
  545. pktlength = ((status & 0x3FFF0000UL) >> 16);
  546. bufp = (ulong)pdata->loopback_rx_pkt;
  547. rdsz = pktlength + 3;
  548. rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
  549. rdsz >>= 2;
  550. pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
  551. if (pktlength != (MIN_PACKET_SIZE + 4)) {
  552. SMSC_WARN(pdata, hw, "Unexpected packet size "
  553. "during loop back test, size=%d, will retry",
  554. pktlength);
  555. } else {
  556. unsigned int j;
  557. int mismatch = 0;
  558. for (j = 0; j < MIN_PACKET_SIZE; j++) {
  559. if (pdata->loopback_tx_pkt[j]
  560. != pdata->loopback_rx_pkt[j]) {
  561. mismatch = 1;
  562. break;
  563. }
  564. }
  565. if (!mismatch) {
  566. SMSC_TRACE(pdata, hw, "Successfully verified "
  567. "loopback packet");
  568. return 0;
  569. } else {
  570. SMSC_WARN(pdata, hw, "Data mismatch "
  571. "during loop back test, will retry");
  572. }
  573. }
  574. }
  575. return -EIO;
  576. }
  577. static int smsc911x_phy_reset(struct smsc911x_data *pdata)
  578. {
  579. struct phy_device *phy_dev = pdata->phy_dev;
  580. unsigned int temp;
  581. unsigned int i = 100000;
  582. BUG_ON(!phy_dev);
  583. BUG_ON(!phy_dev->bus);
  584. SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
  585. smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
  586. do {
  587. msleep(1);
  588. temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
  589. MII_BMCR);
  590. } while ((i--) && (temp & BMCR_RESET));
  591. if (temp & BMCR_RESET) {
  592. SMSC_WARN(pdata, hw, "PHY reset failed to complete");
  593. return -EIO;
  594. }
  595. /* Extra delay required because the phy may not be completed with
  596. * its reset when BMCR_RESET is cleared. Specs say 256 uS is
  597. * enough delay but using 1ms here to be safe */
  598. msleep(1);
  599. return 0;
  600. }
  601. static int smsc911x_phy_loopbacktest(struct net_device *dev)
  602. {
  603. struct smsc911x_data *pdata = netdev_priv(dev);
  604. struct phy_device *phy_dev = pdata->phy_dev;
  605. int result = -EIO;
  606. unsigned int i, val;
  607. unsigned long flags;
  608. /* Initialise tx packet using broadcast destination address */
  609. memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
  610. /* Use incrementing source address */
  611. for (i = 6; i < 12; i++)
  612. pdata->loopback_tx_pkt[i] = (char)i;
  613. /* Set length type field */
  614. pdata->loopback_tx_pkt[12] = 0x00;
  615. pdata->loopback_tx_pkt[13] = 0x00;
  616. for (i = 14; i < MIN_PACKET_SIZE; i++)
  617. pdata->loopback_tx_pkt[i] = (char)i;
  618. val = smsc911x_reg_read(pdata, HW_CFG);
  619. val &= HW_CFG_TX_FIF_SZ_;
  620. val |= HW_CFG_SF_;
  621. smsc911x_reg_write(pdata, HW_CFG, val);
  622. smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
  623. smsc911x_reg_write(pdata, RX_CFG,
  624. (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
  625. for (i = 0; i < 10; i++) {
  626. /* Set PHY to 10/FD, no ANEG, and loopback mode */
  627. smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
  628. BMCR_LOOPBACK | BMCR_FULLDPLX);
  629. /* Enable MAC tx/rx, FD */
  630. spin_lock_irqsave(&pdata->mac_lock, flags);
  631. smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
  632. | MAC_CR_TXEN_ | MAC_CR_RXEN_);
  633. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  634. if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
  635. result = 0;
  636. break;
  637. }
  638. pdata->resetcount++;
  639. /* Disable MAC rx */
  640. spin_lock_irqsave(&pdata->mac_lock, flags);
  641. smsc911x_mac_write(pdata, MAC_CR, 0);
  642. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  643. smsc911x_phy_reset(pdata);
  644. }
  645. /* Disable MAC */
  646. spin_lock_irqsave(&pdata->mac_lock, flags);
  647. smsc911x_mac_write(pdata, MAC_CR, 0);
  648. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  649. /* Cancel PHY loopback mode */
  650. smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
  651. smsc911x_reg_write(pdata, TX_CFG, 0);
  652. smsc911x_reg_write(pdata, RX_CFG, 0);
  653. return result;
  654. }
  655. #endif /* USE_PHY_WORK_AROUND */
  656. static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
  657. {
  658. struct phy_device *phy_dev = pdata->phy_dev;
  659. u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
  660. u32 flow;
  661. unsigned long flags;
  662. if (phy_dev->duplex == DUPLEX_FULL) {
  663. u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
  664. u16 rmtadv = phy_read(phy_dev, MII_LPA);
  665. u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
  666. if (cap & FLOW_CTRL_RX)
  667. flow = 0xFFFF0002;
  668. else
  669. flow = 0;
  670. if (cap & FLOW_CTRL_TX)
  671. afc |= 0xF;
  672. else
  673. afc &= ~0xF;
  674. SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
  675. (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
  676. (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
  677. } else {
  678. SMSC_TRACE(pdata, hw, "half duplex");
  679. flow = 0;
  680. afc |= 0xF;
  681. }
  682. spin_lock_irqsave(&pdata->mac_lock, flags);
  683. smsc911x_mac_write(pdata, FLOW, flow);
  684. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  685. smsc911x_reg_write(pdata, AFC_CFG, afc);
  686. }
  687. /* Update link mode if anything has changed. Called periodically when the
  688. * PHY is in polling mode, even if nothing has changed. */
  689. static void smsc911x_phy_adjust_link(struct net_device *dev)
  690. {
  691. struct smsc911x_data *pdata = netdev_priv(dev);
  692. struct phy_device *phy_dev = pdata->phy_dev;
  693. unsigned long flags;
  694. int carrier;
  695. if (phy_dev->duplex != pdata->last_duplex) {
  696. unsigned int mac_cr;
  697. SMSC_TRACE(pdata, hw, "duplex state has changed");
  698. spin_lock_irqsave(&pdata->mac_lock, flags);
  699. mac_cr = smsc911x_mac_read(pdata, MAC_CR);
  700. if (phy_dev->duplex) {
  701. SMSC_TRACE(pdata, hw,
  702. "configuring for full duplex mode");
  703. mac_cr |= MAC_CR_FDPX_;
  704. } else {
  705. SMSC_TRACE(pdata, hw,
  706. "configuring for half duplex mode");
  707. mac_cr &= ~MAC_CR_FDPX_;
  708. }
  709. smsc911x_mac_write(pdata, MAC_CR, mac_cr);
  710. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  711. smsc911x_phy_update_flowcontrol(pdata);
  712. pdata->last_duplex = phy_dev->duplex;
  713. }
  714. carrier = netif_carrier_ok(dev);
  715. if (carrier != pdata->last_carrier) {
  716. SMSC_TRACE(pdata, hw, "carrier state has changed");
  717. if (carrier) {
  718. SMSC_TRACE(pdata, hw, "configuring for carrier OK");
  719. if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
  720. (!pdata->using_extphy)) {
  721. /* Restore original GPIO configuration */
  722. pdata->gpio_setting = pdata->gpio_orig_setting;
  723. smsc911x_reg_write(pdata, GPIO_CFG,
  724. pdata->gpio_setting);
  725. }
  726. } else {
  727. SMSC_TRACE(pdata, hw, "configuring for no carrier");
  728. /* Check global setting that LED1
  729. * usage is 10/100 indicator */
  730. pdata->gpio_setting = smsc911x_reg_read(pdata,
  731. GPIO_CFG);
  732. if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
  733. (!pdata->using_extphy)) {
  734. /* Force 10/100 LED off, after saving
  735. * original GPIO configuration */
  736. pdata->gpio_orig_setting = pdata->gpio_setting;
  737. pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
  738. pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
  739. | GPIO_CFG_GPIODIR0_
  740. | GPIO_CFG_GPIOD0_);
  741. smsc911x_reg_write(pdata, GPIO_CFG,
  742. pdata->gpio_setting);
  743. }
  744. }
  745. pdata->last_carrier = carrier;
  746. }
  747. }
  748. static int smsc911x_mii_probe(struct net_device *dev)
  749. {
  750. struct smsc911x_data *pdata = netdev_priv(dev);
  751. struct phy_device *phydev = NULL;
  752. int ret;
  753. /* find the first phy */
  754. phydev = phy_find_first(pdata->mii_bus);
  755. if (!phydev) {
  756. netdev_err(dev, "no PHY found\n");
  757. return -ENODEV;
  758. }
  759. SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
  760. phydev->addr, phydev->phy_id);
  761. ret = phy_connect_direct(dev, phydev,
  762. &smsc911x_phy_adjust_link, 0,
  763. pdata->config.phy_interface);
  764. if (ret) {
  765. netdev_err(dev, "Could not attach to PHY\n");
  766. return ret;
  767. }
  768. netdev_info(dev,
  769. "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
  770. phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
  771. /* mask with MAC supported features */
  772. phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
  773. SUPPORTED_Asym_Pause);
  774. phydev->advertising = phydev->supported;
  775. pdata->phy_dev = phydev;
  776. pdata->last_duplex = -1;
  777. pdata->last_carrier = -1;
  778. #ifdef USE_PHY_WORK_AROUND
  779. if (smsc911x_phy_loopbacktest(dev) < 0) {
  780. SMSC_WARN(pdata, hw, "Failed Loop Back Test");
  781. return -ENODEV;
  782. }
  783. SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
  784. #endif /* USE_PHY_WORK_AROUND */
  785. SMSC_TRACE(pdata, hw, "phy initialised successfully");
  786. return 0;
  787. }
  788. static int __devinit smsc911x_mii_init(struct platform_device *pdev,
  789. struct net_device *dev)
  790. {
  791. struct smsc911x_data *pdata = netdev_priv(dev);
  792. int err = -ENXIO, i;
  793. pdata->mii_bus = mdiobus_alloc();
  794. if (!pdata->mii_bus) {
  795. err = -ENOMEM;
  796. goto err_out_1;
  797. }
  798. pdata->mii_bus->name = SMSC_MDIONAME;
  799. snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
  800. pdata->mii_bus->priv = pdata;
  801. pdata->mii_bus->read = smsc911x_mii_read;
  802. pdata->mii_bus->write = smsc911x_mii_write;
  803. pdata->mii_bus->irq = pdata->phy_irq;
  804. for (i = 0; i < PHY_MAX_ADDR; ++i)
  805. pdata->mii_bus->irq[i] = PHY_POLL;
  806. pdata->mii_bus->parent = &pdev->dev;
  807. switch (pdata->idrev & 0xFFFF0000) {
  808. case 0x01170000:
  809. case 0x01150000:
  810. case 0x117A0000:
  811. case 0x115A0000:
  812. /* External PHY supported, try to autodetect */
  813. smsc911x_phy_initialise_external(pdata);
  814. break;
  815. default:
  816. SMSC_TRACE(pdata, hw, "External PHY is not supported, "
  817. "using internal PHY");
  818. pdata->using_extphy = 0;
  819. break;
  820. }
  821. if (!pdata->using_extphy) {
  822. /* Mask all PHYs except ID 1 (internal) */
  823. pdata->mii_bus->phy_mask = ~(1 << 1);
  824. }
  825. if (mdiobus_register(pdata->mii_bus)) {
  826. SMSC_WARN(pdata, probe, "Error registering mii bus");
  827. goto err_out_free_bus_2;
  828. }
  829. if (smsc911x_mii_probe(dev) < 0) {
  830. SMSC_WARN(pdata, probe, "Error registering mii bus");
  831. goto err_out_unregister_bus_3;
  832. }
  833. return 0;
  834. err_out_unregister_bus_3:
  835. mdiobus_unregister(pdata->mii_bus);
  836. err_out_free_bus_2:
  837. mdiobus_free(pdata->mii_bus);
  838. err_out_1:
  839. return err;
  840. }
  841. /* Gets the number of tx statuses in the fifo */
  842. static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
  843. {
  844. return (smsc911x_reg_read(pdata, TX_FIFO_INF)
  845. & TX_FIFO_INF_TSUSED_) >> 16;
  846. }
  847. /* Reads tx statuses and increments counters where necessary */
  848. static void smsc911x_tx_update_txcounters(struct net_device *dev)
  849. {
  850. struct smsc911x_data *pdata = netdev_priv(dev);
  851. unsigned int tx_stat;
  852. while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
  853. if (unlikely(tx_stat & 0x80000000)) {
  854. /* In this driver the packet tag is used as the packet
  855. * length. Since a packet length can never reach the
  856. * size of 0x8000, this bit is reserved. It is worth
  857. * noting that the "reserved bit" in the warning above
  858. * does not reference a hardware defined reserved bit
  859. * but rather a driver defined one.
  860. */
  861. SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
  862. } else {
  863. if (unlikely(tx_stat & TX_STS_ES_)) {
  864. dev->stats.tx_errors++;
  865. } else {
  866. dev->stats.tx_packets++;
  867. dev->stats.tx_bytes += (tx_stat >> 16);
  868. }
  869. if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
  870. dev->stats.collisions += 16;
  871. dev->stats.tx_aborted_errors += 1;
  872. } else {
  873. dev->stats.collisions +=
  874. ((tx_stat >> 3) & 0xF);
  875. }
  876. if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
  877. dev->stats.tx_carrier_errors += 1;
  878. if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
  879. dev->stats.collisions++;
  880. dev->stats.tx_aborted_errors++;
  881. }
  882. }
  883. }
  884. }
  885. /* Increments the Rx error counters */
  886. static void
  887. smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
  888. {
  889. int crc_err = 0;
  890. if (unlikely(rxstat & RX_STS_ES_)) {
  891. dev->stats.rx_errors++;
  892. if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
  893. dev->stats.rx_crc_errors++;
  894. crc_err = 1;
  895. }
  896. }
  897. if (likely(!crc_err)) {
  898. if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
  899. (rxstat & RX_STS_LENGTH_ERR_)))
  900. dev->stats.rx_length_errors++;
  901. if (rxstat & RX_STS_MCAST_)
  902. dev->stats.multicast++;
  903. }
  904. }
  905. /* Quickly dumps bad packets */
  906. static void
  907. smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
  908. {
  909. unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
  910. if (likely(pktwords >= 4)) {
  911. unsigned int timeout = 500;
  912. unsigned int val;
  913. smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
  914. do {
  915. udelay(1);
  916. val = smsc911x_reg_read(pdata, RX_DP_CTRL);
  917. } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
  918. if (unlikely(timeout == 0))
  919. SMSC_WARN(pdata, hw, "Timed out waiting for "
  920. "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
  921. } else {
  922. unsigned int temp;
  923. while (pktwords--)
  924. temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
  925. }
  926. }
  927. /* NAPI poll function */
  928. static int smsc911x_poll(struct napi_struct *napi, int budget)
  929. {
  930. struct smsc911x_data *pdata =
  931. container_of(napi, struct smsc911x_data, napi);
  932. struct net_device *dev = pdata->dev;
  933. int npackets = 0;
  934. while (npackets < budget) {
  935. unsigned int pktlength;
  936. unsigned int pktwords;
  937. struct sk_buff *skb;
  938. unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
  939. if (!rxstat) {
  940. unsigned int temp;
  941. /* We processed all packets available. Tell NAPI it can
  942. * stop polling then re-enable rx interrupts */
  943. smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
  944. napi_complete(napi);
  945. temp = smsc911x_reg_read(pdata, INT_EN);
  946. temp |= INT_EN_RSFL_EN_;
  947. smsc911x_reg_write(pdata, INT_EN, temp);
  948. break;
  949. }
  950. /* Count packet for NAPI scheduling, even if it has an error.
  951. * Error packets still require cycles to discard */
  952. npackets++;
  953. pktlength = ((rxstat & 0x3FFF0000) >> 16);
  954. pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
  955. smsc911x_rx_counterrors(dev, rxstat);
  956. if (unlikely(rxstat & RX_STS_ES_)) {
  957. SMSC_WARN(pdata, rx_err,
  958. "Discarding packet with error bit set");
  959. /* Packet has an error, discard it and continue with
  960. * the next */
  961. smsc911x_rx_fastforward(pdata, pktwords);
  962. dev->stats.rx_dropped++;
  963. continue;
  964. }
  965. skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
  966. if (unlikely(!skb)) {
  967. SMSC_WARN(pdata, rx_err,
  968. "Unable to allocate skb for rx packet");
  969. /* Drop the packet and stop this polling iteration */
  970. smsc911x_rx_fastforward(pdata, pktwords);
  971. dev->stats.rx_dropped++;
  972. break;
  973. }
  974. skb->data = skb->head;
  975. skb_reset_tail_pointer(skb);
  976. /* Align IP on 16B boundary */
  977. skb_reserve(skb, NET_IP_ALIGN);
  978. skb_put(skb, pktlength - 4);
  979. pdata->ops->rx_readfifo(pdata,
  980. (unsigned int *)skb->head, pktwords);
  981. skb->protocol = eth_type_trans(skb, dev);
  982. skb_checksum_none_assert(skb);
  983. netif_receive_skb(skb);
  984. /* Update counters */
  985. dev->stats.rx_packets++;
  986. dev->stats.rx_bytes += (pktlength - 4);
  987. }
  988. /* Return total received packets */
  989. return npackets;
  990. }
  991. /* Returns hash bit number for given MAC address
  992. * Example:
  993. * 01 00 5E 00 00 01 -> returns bit number 31 */
  994. static unsigned int smsc911x_hash(char addr[ETH_ALEN])
  995. {
  996. return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
  997. }
  998. static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
  999. {
  1000. /* Performs the multicast & mac_cr update. This is called when
  1001. * safe on the current hardware, and with the mac_lock held */
  1002. unsigned int mac_cr;
  1003. SMSC_ASSERT_MAC_LOCK(pdata);
  1004. mac_cr = smsc911x_mac_read(pdata, MAC_CR);
  1005. mac_cr |= pdata->set_bits_mask;
  1006. mac_cr &= ~(pdata->clear_bits_mask);
  1007. smsc911x_mac_write(pdata, MAC_CR, mac_cr);
  1008. smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
  1009. smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
  1010. SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
  1011. mac_cr, pdata->hashhi, pdata->hashlo);
  1012. }
  1013. static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
  1014. {
  1015. unsigned int mac_cr;
  1016. /* This function is only called for older LAN911x devices
  1017. * (revA or revB), where MAC_CR, HASHH and HASHL should not
  1018. * be modified during Rx - newer devices immediately update the
  1019. * registers.
  1020. *
  1021. * This is called from interrupt context */
  1022. spin_lock(&pdata->mac_lock);
  1023. /* Check Rx has stopped */
  1024. if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
  1025. SMSC_WARN(pdata, drv, "Rx not stopped");
  1026. /* Perform the update - safe to do now Rx has stopped */
  1027. smsc911x_rx_multicast_update(pdata);
  1028. /* Re-enable Rx */
  1029. mac_cr = smsc911x_mac_read(pdata, MAC_CR);
  1030. mac_cr |= MAC_CR_RXEN_;
  1031. smsc911x_mac_write(pdata, MAC_CR, mac_cr);
  1032. pdata->multicast_update_pending = 0;
  1033. spin_unlock(&pdata->mac_lock);
  1034. }
  1035. static int smsc911x_soft_reset(struct smsc911x_data *pdata)
  1036. {
  1037. unsigned int timeout;
  1038. unsigned int temp;
  1039. /* Reset the LAN911x */
  1040. smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
  1041. timeout = 10;
  1042. do {
  1043. udelay(10);
  1044. temp = smsc911x_reg_read(pdata, HW_CFG);
  1045. } while ((--timeout) && (temp & HW_CFG_SRST_));
  1046. if (unlikely(temp & HW_CFG_SRST_)) {
  1047. SMSC_WARN(pdata, drv, "Failed to complete reset");
  1048. return -EIO;
  1049. }
  1050. return 0;
  1051. }
  1052. /* Sets the device MAC address to dev_addr, called with mac_lock held */
  1053. static void
  1054. smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
  1055. {
  1056. u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
  1057. u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
  1058. (dev_addr[1] << 8) | dev_addr[0];
  1059. SMSC_ASSERT_MAC_LOCK(pdata);
  1060. smsc911x_mac_write(pdata, ADDRH, mac_high16);
  1061. smsc911x_mac_write(pdata, ADDRL, mac_low32);
  1062. }
  1063. static int smsc911x_open(struct net_device *dev)
  1064. {
  1065. struct smsc911x_data *pdata = netdev_priv(dev);
  1066. unsigned int timeout;
  1067. unsigned int temp;
  1068. unsigned int intcfg;
  1069. /* if the phy is not yet registered, retry later*/
  1070. if (!pdata->phy_dev) {
  1071. SMSC_WARN(pdata, hw, "phy_dev is NULL");
  1072. return -EAGAIN;
  1073. }
  1074. if (!is_valid_ether_addr(dev->dev_addr)) {
  1075. SMSC_WARN(pdata, hw, "dev_addr is not a valid MAC address");
  1076. return -EADDRNOTAVAIL;
  1077. }
  1078. /* Reset the LAN911x */
  1079. if (smsc911x_soft_reset(pdata)) {
  1080. SMSC_WARN(pdata, hw, "soft reset failed");
  1081. return -EIO;
  1082. }
  1083. smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
  1084. smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
  1085. /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
  1086. spin_lock_irq(&pdata->mac_lock);
  1087. smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
  1088. spin_unlock_irq(&pdata->mac_lock);
  1089. /* Make sure EEPROM has finished loading before setting GPIO_CFG */
  1090. timeout = 50;
  1091. while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
  1092. --timeout) {
  1093. udelay(10);
  1094. }
  1095. if (unlikely(timeout == 0))
  1096. SMSC_WARN(pdata, ifup,
  1097. "Timed out waiting for EEPROM busy bit to clear");
  1098. smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
  1099. /* The soft reset above cleared the device's MAC address,
  1100. * restore it from local copy (set in probe) */
  1101. spin_lock_irq(&pdata->mac_lock);
  1102. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  1103. spin_unlock_irq(&pdata->mac_lock);
  1104. /* Initialise irqs, but leave all sources disabled */
  1105. smsc911x_reg_write(pdata, INT_EN, 0);
  1106. smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
  1107. /* Set interrupt deassertion to 100uS */
  1108. intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
  1109. if (pdata->config.irq_polarity) {
  1110. SMSC_TRACE(pdata, ifup, "irq polarity: active high");
  1111. intcfg |= INT_CFG_IRQ_POL_;
  1112. } else {
  1113. SMSC_TRACE(pdata, ifup, "irq polarity: active low");
  1114. }
  1115. if (pdata->config.irq_type) {
  1116. SMSC_TRACE(pdata, ifup, "irq type: push-pull");
  1117. intcfg |= INT_CFG_IRQ_TYPE_;
  1118. } else {
  1119. SMSC_TRACE(pdata, ifup, "irq type: open drain");
  1120. }
  1121. smsc911x_reg_write(pdata, INT_CFG, intcfg);
  1122. SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
  1123. pdata->software_irq_signal = 0;
  1124. smp_wmb();
  1125. temp = smsc911x_reg_read(pdata, INT_EN);
  1126. temp |= INT_EN_SW_INT_EN_;
  1127. smsc911x_reg_write(pdata, INT_EN, temp);
  1128. timeout = 1000;
  1129. while (timeout--) {
  1130. if (pdata->software_irq_signal)
  1131. break;
  1132. msleep(1);
  1133. }
  1134. if (!pdata->software_irq_signal) {
  1135. netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
  1136. dev->irq);
  1137. return -ENODEV;
  1138. }
  1139. SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
  1140. dev->irq);
  1141. netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
  1142. (unsigned long)pdata->ioaddr, dev->irq);
  1143. /* Reset the last known duplex and carrier */
  1144. pdata->last_duplex = -1;
  1145. pdata->last_carrier = -1;
  1146. /* Bring the PHY up */
  1147. phy_start(pdata->phy_dev);
  1148. temp = smsc911x_reg_read(pdata, HW_CFG);
  1149. /* Preserve TX FIFO size and external PHY configuration */
  1150. temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
  1151. temp |= HW_CFG_SF_;
  1152. smsc911x_reg_write(pdata, HW_CFG, temp);
  1153. temp = smsc911x_reg_read(pdata, FIFO_INT);
  1154. temp |= FIFO_INT_TX_AVAIL_LEVEL_;
  1155. temp &= ~(FIFO_INT_RX_STS_LEVEL_);
  1156. smsc911x_reg_write(pdata, FIFO_INT, temp);
  1157. /* set RX Data offset to 2 bytes for alignment */
  1158. smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
  1159. /* enable NAPI polling before enabling RX interrupts */
  1160. napi_enable(&pdata->napi);
  1161. temp = smsc911x_reg_read(pdata, INT_EN);
  1162. temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
  1163. smsc911x_reg_write(pdata, INT_EN, temp);
  1164. spin_lock_irq(&pdata->mac_lock);
  1165. temp = smsc911x_mac_read(pdata, MAC_CR);
  1166. temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  1167. smsc911x_mac_write(pdata, MAC_CR, temp);
  1168. spin_unlock_irq(&pdata->mac_lock);
  1169. smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
  1170. netif_start_queue(dev);
  1171. return 0;
  1172. }
  1173. /* Entry point for stopping the interface */
  1174. static int smsc911x_stop(struct net_device *dev)
  1175. {
  1176. struct smsc911x_data *pdata = netdev_priv(dev);
  1177. unsigned int temp;
  1178. /* Disable all device interrupts */
  1179. temp = smsc911x_reg_read(pdata, INT_CFG);
  1180. temp &= ~INT_CFG_IRQ_EN_;
  1181. smsc911x_reg_write(pdata, INT_CFG, temp);
  1182. /* Stop Tx and Rx polling */
  1183. netif_stop_queue(dev);
  1184. napi_disable(&pdata->napi);
  1185. /* At this point all Rx and Tx activity is stopped */
  1186. dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
  1187. smsc911x_tx_update_txcounters(dev);
  1188. /* Bring the PHY down */
  1189. if (pdata->phy_dev)
  1190. phy_stop(pdata->phy_dev);
  1191. SMSC_TRACE(pdata, ifdown, "Interface stopped");
  1192. return 0;
  1193. }
  1194. /* Entry point for transmitting a packet */
  1195. static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  1196. {
  1197. struct smsc911x_data *pdata = netdev_priv(dev);
  1198. unsigned int freespace;
  1199. unsigned int tx_cmd_a;
  1200. unsigned int tx_cmd_b;
  1201. unsigned int temp;
  1202. u32 wrsz;
  1203. ulong bufp;
  1204. freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
  1205. if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
  1206. SMSC_WARN(pdata, tx_err,
  1207. "Tx data fifo low, space available: %d", freespace);
  1208. /* Word alignment adjustment */
  1209. tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
  1210. tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
  1211. tx_cmd_a |= (unsigned int)skb->len;
  1212. tx_cmd_b = ((unsigned int)skb->len) << 16;
  1213. tx_cmd_b |= (unsigned int)skb->len;
  1214. smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
  1215. smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
  1216. bufp = (ulong)skb->data & (~0x3);
  1217. wrsz = (u32)skb->len + 3;
  1218. wrsz += (u32)((ulong)skb->data & 0x3);
  1219. wrsz >>= 2;
  1220. pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
  1221. freespace -= (skb->len + 32);
  1222. skb_tx_timestamp(skb);
  1223. dev_kfree_skb(skb);
  1224. if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
  1225. smsc911x_tx_update_txcounters(dev);
  1226. if (freespace < TX_FIFO_LOW_THRESHOLD) {
  1227. netif_stop_queue(dev);
  1228. temp = smsc911x_reg_read(pdata, FIFO_INT);
  1229. temp &= 0x00FFFFFF;
  1230. temp |= 0x32000000;
  1231. smsc911x_reg_write(pdata, FIFO_INT, temp);
  1232. }
  1233. return NETDEV_TX_OK;
  1234. }
  1235. /* Entry point for getting status counters */
  1236. static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
  1237. {
  1238. struct smsc911x_data *pdata = netdev_priv(dev);
  1239. smsc911x_tx_update_txcounters(dev);
  1240. dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
  1241. return &dev->stats;
  1242. }
  1243. /* Entry point for setting addressing modes */
  1244. static void smsc911x_set_multicast_list(struct net_device *dev)
  1245. {
  1246. struct smsc911x_data *pdata = netdev_priv(dev);
  1247. unsigned long flags;
  1248. if (dev->flags & IFF_PROMISC) {
  1249. /* Enabling promiscuous mode */
  1250. pdata->set_bits_mask = MAC_CR_PRMS_;
  1251. pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  1252. pdata->hashhi = 0;
  1253. pdata->hashlo = 0;
  1254. } else if (dev->flags & IFF_ALLMULTI) {
  1255. /* Enabling all multicast mode */
  1256. pdata->set_bits_mask = MAC_CR_MCPAS_;
  1257. pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
  1258. pdata->hashhi = 0;
  1259. pdata->hashlo = 0;
  1260. } else if (!netdev_mc_empty(dev)) {
  1261. /* Enabling specific multicast addresses */
  1262. unsigned int hash_high = 0;
  1263. unsigned int hash_low = 0;
  1264. struct netdev_hw_addr *ha;
  1265. pdata->set_bits_mask = MAC_CR_HPFILT_;
  1266. pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1267. netdev_for_each_mc_addr(ha, dev) {
  1268. unsigned int bitnum = smsc911x_hash(ha->addr);
  1269. unsigned int mask = 0x01 << (bitnum & 0x1F);
  1270. if (bitnum & 0x20)
  1271. hash_high |= mask;
  1272. else
  1273. hash_low |= mask;
  1274. }
  1275. pdata->hashhi = hash_high;
  1276. pdata->hashlo = hash_low;
  1277. } else {
  1278. /* Enabling local MAC address only */
  1279. pdata->set_bits_mask = 0;
  1280. pdata->clear_bits_mask =
  1281. (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  1282. pdata->hashhi = 0;
  1283. pdata->hashlo = 0;
  1284. }
  1285. spin_lock_irqsave(&pdata->mac_lock, flags);
  1286. if (pdata->generation <= 1) {
  1287. /* Older hardware revision - cannot change these flags while
  1288. * receiving data */
  1289. if (!pdata->multicast_update_pending) {
  1290. unsigned int temp;
  1291. SMSC_TRACE(pdata, hw, "scheduling mcast update");
  1292. pdata->multicast_update_pending = 1;
  1293. /* Request the hardware to stop, then perform the
  1294. * update when we get an RX_STOP interrupt */
  1295. temp = smsc911x_mac_read(pdata, MAC_CR);
  1296. temp &= ~(MAC_CR_RXEN_);
  1297. smsc911x_mac_write(pdata, MAC_CR, temp);
  1298. } else {
  1299. /* There is another update pending, this should now
  1300. * use the newer values */
  1301. }
  1302. } else {
  1303. /* Newer hardware revision - can write immediately */
  1304. smsc911x_rx_multicast_update(pdata);
  1305. }
  1306. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  1307. }
  1308. static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
  1309. {
  1310. struct net_device *dev = dev_id;
  1311. struct smsc911x_data *pdata = netdev_priv(dev);
  1312. u32 intsts = smsc911x_reg_read(pdata, INT_STS);
  1313. u32 inten = smsc911x_reg_read(pdata, INT_EN);
  1314. int serviced = IRQ_NONE;
  1315. u32 temp;
  1316. if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
  1317. temp = smsc911x_reg_read(pdata, INT_EN);
  1318. temp &= (~INT_EN_SW_INT_EN_);
  1319. smsc911x_reg_write(pdata, INT_EN, temp);
  1320. smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
  1321. pdata->software_irq_signal = 1;
  1322. smp_wmb();
  1323. serviced = IRQ_HANDLED;
  1324. }
  1325. if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
  1326. /* Called when there is a multicast update scheduled and
  1327. * it is now safe to complete the update */
  1328. SMSC_TRACE(pdata, intr, "RX Stop interrupt");
  1329. smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
  1330. if (pdata->multicast_update_pending)
  1331. smsc911x_rx_multicast_update_workaround(pdata);
  1332. serviced = IRQ_HANDLED;
  1333. }
  1334. if (intsts & inten & INT_STS_TDFA_) {
  1335. temp = smsc911x_reg_read(pdata, FIFO_INT);
  1336. temp |= FIFO_INT_TX_AVAIL_LEVEL_;
  1337. smsc911x_reg_write(pdata, FIFO_INT, temp);
  1338. smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
  1339. netif_wake_queue(dev);
  1340. serviced = IRQ_HANDLED;
  1341. }
  1342. if (unlikely(intsts & inten & INT_STS_RXE_)) {
  1343. SMSC_TRACE(pdata, intr, "RX Error interrupt");
  1344. smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
  1345. serviced = IRQ_HANDLED;
  1346. }
  1347. if (likely(intsts & inten & INT_STS_RSFL_)) {
  1348. if (likely(napi_schedule_prep(&pdata->napi))) {
  1349. /* Disable Rx interrupts */
  1350. temp = smsc911x_reg_read(pdata, INT_EN);
  1351. temp &= (~INT_EN_RSFL_EN_);
  1352. smsc911x_reg_write(pdata, INT_EN, temp);
  1353. /* Schedule a NAPI poll */
  1354. __napi_schedule(&pdata->napi);
  1355. } else {
  1356. SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
  1357. }
  1358. serviced = IRQ_HANDLED;
  1359. }
  1360. return serviced;
  1361. }
  1362. #ifdef CONFIG_NET_POLL_CONTROLLER
  1363. static void smsc911x_poll_controller(struct net_device *dev)
  1364. {
  1365. disable_irq(dev->irq);
  1366. smsc911x_irqhandler(0, dev);
  1367. enable_irq(dev->irq);
  1368. }
  1369. #endif /* CONFIG_NET_POLL_CONTROLLER */
  1370. static int smsc911x_set_mac_address(struct net_device *dev, void *p)
  1371. {
  1372. struct smsc911x_data *pdata = netdev_priv(dev);
  1373. struct sockaddr *addr = p;
  1374. /* On older hardware revisions we cannot change the mac address
  1375. * registers while receiving data. Newer devices can safely change
  1376. * this at any time. */
  1377. if (pdata->generation <= 1 && netif_running(dev))
  1378. return -EBUSY;
  1379. if (!is_valid_ether_addr(addr->sa_data))
  1380. return -EADDRNOTAVAIL;
  1381. memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
  1382. spin_lock_irq(&pdata->mac_lock);
  1383. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  1384. spin_unlock_irq(&pdata->mac_lock);
  1385. netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
  1386. return 0;
  1387. }
  1388. /* Standard ioctls for mii-tool */
  1389. static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1390. {
  1391. struct smsc911x_data *pdata = netdev_priv(dev);
  1392. if (!netif_running(dev) || !pdata->phy_dev)
  1393. return -EINVAL;
  1394. return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
  1395. }
  1396. static int
  1397. smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1398. {
  1399. struct smsc911x_data *pdata = netdev_priv(dev);
  1400. cmd->maxtxpkt = 1;
  1401. cmd->maxrxpkt = 1;
  1402. return phy_ethtool_gset(pdata->phy_dev, cmd);
  1403. }
  1404. static int
  1405. smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1406. {
  1407. struct smsc911x_data *pdata = netdev_priv(dev);
  1408. return phy_ethtool_sset(pdata->phy_dev, cmd);
  1409. }
  1410. static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
  1411. struct ethtool_drvinfo *info)
  1412. {
  1413. strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
  1414. strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
  1415. strlcpy(info->bus_info, dev_name(dev->dev.parent),
  1416. sizeof(info->bus_info));
  1417. }
  1418. static int smsc911x_ethtool_nwayreset(struct net_device *dev)
  1419. {
  1420. struct smsc911x_data *pdata = netdev_priv(dev);
  1421. return phy_start_aneg(pdata->phy_dev);
  1422. }
  1423. static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
  1424. {
  1425. struct smsc911x_data *pdata = netdev_priv(dev);
  1426. return pdata->msg_enable;
  1427. }
  1428. static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1429. {
  1430. struct smsc911x_data *pdata = netdev_priv(dev);
  1431. pdata->msg_enable = level;
  1432. }
  1433. static int smsc911x_ethtool_getregslen(struct net_device *dev)
  1434. {
  1435. return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
  1436. sizeof(u32);
  1437. }
  1438. static void
  1439. smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
  1440. void *buf)
  1441. {
  1442. struct smsc911x_data *pdata = netdev_priv(dev);
  1443. struct phy_device *phy_dev = pdata->phy_dev;
  1444. unsigned long flags;
  1445. unsigned int i;
  1446. unsigned int j = 0;
  1447. u32 *data = buf;
  1448. regs->version = pdata->idrev;
  1449. for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
  1450. data[j++] = smsc911x_reg_read(pdata, i);
  1451. for (i = MAC_CR; i <= WUCSR; i++) {
  1452. spin_lock_irqsave(&pdata->mac_lock, flags);
  1453. data[j++] = smsc911x_mac_read(pdata, i);
  1454. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  1455. }
  1456. for (i = 0; i <= 31; i++)
  1457. data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
  1458. }
  1459. static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
  1460. {
  1461. unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
  1462. temp &= ~GPIO_CFG_EEPR_EN_;
  1463. smsc911x_reg_write(pdata, GPIO_CFG, temp);
  1464. msleep(1);
  1465. }
  1466. static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
  1467. {
  1468. int timeout = 100;
  1469. u32 e2cmd;
  1470. SMSC_TRACE(pdata, drv, "op 0x%08x", op);
  1471. if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
  1472. SMSC_WARN(pdata, drv, "Busy at start");
  1473. return -EBUSY;
  1474. }
  1475. e2cmd = op | E2P_CMD_EPC_BUSY_;
  1476. smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
  1477. do {
  1478. msleep(1);
  1479. e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
  1480. } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
  1481. if (!timeout) {
  1482. SMSC_TRACE(pdata, drv, "TIMED OUT");
  1483. return -EAGAIN;
  1484. }
  1485. if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
  1486. SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
  1487. return -EINVAL;
  1488. }
  1489. return 0;
  1490. }
  1491. static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
  1492. u8 address, u8 *data)
  1493. {
  1494. u32 op = E2P_CMD_EPC_CMD_READ_ | address;
  1495. int ret;
  1496. SMSC_TRACE(pdata, drv, "address 0x%x", address);
  1497. ret = smsc911x_eeprom_send_cmd(pdata, op);
  1498. if (!ret)
  1499. data[address] = smsc911x_reg_read(pdata, E2P_DATA);
  1500. return ret;
  1501. }
  1502. static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
  1503. u8 address, u8 data)
  1504. {
  1505. u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
  1506. u32 temp;
  1507. int ret;
  1508. SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
  1509. ret = smsc911x_eeprom_send_cmd(pdata, op);
  1510. if (!ret) {
  1511. op = E2P_CMD_EPC_CMD_WRITE_ | address;
  1512. smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
  1513. /* Workaround for hardware read-after-write restriction */
  1514. temp = smsc911x_reg_read(pdata, BYTE_TEST);
  1515. ret = smsc911x_eeprom_send_cmd(pdata, op);
  1516. }
  1517. return ret;
  1518. }
  1519. static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
  1520. {
  1521. return SMSC911X_EEPROM_SIZE;
  1522. }
  1523. static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
  1524. struct ethtool_eeprom *eeprom, u8 *data)
  1525. {
  1526. struct smsc911x_data *pdata = netdev_priv(dev);
  1527. u8 eeprom_data[SMSC911X_EEPROM_SIZE];
  1528. int len;
  1529. int i;
  1530. smsc911x_eeprom_enable_access(pdata);
  1531. len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
  1532. for (i = 0; i < len; i++) {
  1533. int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
  1534. if (ret < 0) {
  1535. eeprom->len = 0;
  1536. return ret;
  1537. }
  1538. }
  1539. memcpy(data, &eeprom_data[eeprom->offset], len);
  1540. eeprom->len = len;
  1541. return 0;
  1542. }
  1543. static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
  1544. struct ethtool_eeprom *eeprom, u8 *data)
  1545. {
  1546. int ret;
  1547. struct smsc911x_data *pdata = netdev_priv(dev);
  1548. smsc911x_eeprom_enable_access(pdata);
  1549. smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
  1550. ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
  1551. smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
  1552. /* Single byte write, according to man page */
  1553. eeprom->len = 1;
  1554. return ret;
  1555. }
  1556. static const struct ethtool_ops smsc911x_ethtool_ops = {
  1557. .get_settings = smsc911x_ethtool_getsettings,
  1558. .set_settings = smsc911x_ethtool_setsettings,
  1559. .get_link = ethtool_op_get_link,
  1560. .get_drvinfo = smsc911x_ethtool_getdrvinfo,
  1561. .nway_reset = smsc911x_ethtool_nwayreset,
  1562. .get_msglevel = smsc911x_ethtool_getmsglevel,
  1563. .set_msglevel = smsc911x_ethtool_setmsglevel,
  1564. .get_regs_len = smsc911x_ethtool_getregslen,
  1565. .get_regs = smsc911x_ethtool_getregs,
  1566. .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
  1567. .get_eeprom = smsc911x_ethtool_get_eeprom,
  1568. .set_eeprom = smsc911x_ethtool_set_eeprom,
  1569. };
  1570. static const struct net_device_ops smsc911x_netdev_ops = {
  1571. .ndo_open = smsc911x_open,
  1572. .ndo_stop = smsc911x_stop,
  1573. .ndo_start_xmit = smsc911x_hard_start_xmit,
  1574. .ndo_get_stats = smsc911x_get_stats,
  1575. .ndo_set_rx_mode = smsc911x_set_multicast_list,
  1576. .ndo_do_ioctl = smsc911x_do_ioctl,
  1577. .ndo_change_mtu = eth_change_mtu,
  1578. .ndo_validate_addr = eth_validate_addr,
  1579. .ndo_set_mac_address = smsc911x_set_mac_address,
  1580. #ifdef CONFIG_NET_POLL_CONTROLLER
  1581. .ndo_poll_controller = smsc911x_poll_controller,
  1582. #endif
  1583. };
  1584. /* copies the current mac address from hardware to dev->dev_addr */
  1585. static void __devinit smsc911x_read_mac_address(struct net_device *dev)
  1586. {
  1587. struct smsc911x_data *pdata = netdev_priv(dev);
  1588. u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
  1589. u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
  1590. dev->dev_addr[0] = (u8)(mac_low32);
  1591. dev->dev_addr[1] = (u8)(mac_low32 >> 8);
  1592. dev->dev_addr[2] = (u8)(mac_low32 >> 16);
  1593. dev->dev_addr[3] = (u8)(mac_low32 >> 24);
  1594. dev->dev_addr[4] = (u8)(mac_high16);
  1595. dev->dev_addr[5] = (u8)(mac_high16 >> 8);
  1596. }
  1597. /* Initializing private device structures, only called from probe */
  1598. static int __devinit smsc911x_init(struct net_device *dev)
  1599. {
  1600. struct smsc911x_data *pdata = netdev_priv(dev);
  1601. unsigned int byte_test;
  1602. SMSC_TRACE(pdata, probe, "Driver Parameters:");
  1603. SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
  1604. (unsigned long)pdata->ioaddr);
  1605. SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
  1606. SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
  1607. spin_lock_init(&pdata->dev_lock);
  1608. spin_lock_init(&pdata->mac_lock);
  1609. if (pdata->ioaddr == 0) {
  1610. SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
  1611. return -ENODEV;
  1612. }
  1613. /* Check byte ordering */
  1614. byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
  1615. SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
  1616. if (byte_test == 0x43218765) {
  1617. SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
  1618. "applying WORD_SWAP");
  1619. smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
  1620. /* 1 dummy read of BYTE_TEST is needed after a write to
  1621. * WORD_SWAP before its contents are valid */
  1622. byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
  1623. byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
  1624. }
  1625. if (byte_test != 0x87654321) {
  1626. SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
  1627. if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
  1628. SMSC_WARN(pdata, probe,
  1629. "top 16 bits equal to bottom 16 bits");
  1630. SMSC_TRACE(pdata, probe,
  1631. "This may mean the chip is set "
  1632. "for 32 bit while the bus is reading 16 bit");
  1633. }
  1634. return -ENODEV;
  1635. }
  1636. /* Default generation to zero (all workarounds apply) */
  1637. pdata->generation = 0;
  1638. pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
  1639. switch (pdata->idrev & 0xFFFF0000) {
  1640. case 0x01180000:
  1641. case 0x01170000:
  1642. case 0x01160000:
  1643. case 0x01150000:
  1644. /* LAN911[5678] family */
  1645. pdata->generation = pdata->idrev & 0x0000FFFF;
  1646. break;
  1647. case 0x118A0000:
  1648. case 0x117A0000:
  1649. case 0x116A0000:
  1650. case 0x115A0000:
  1651. /* LAN921[5678] family */
  1652. pdata->generation = 3;
  1653. break;
  1654. case 0x92100000:
  1655. case 0x92110000:
  1656. case 0x92200000:
  1657. case 0x92210000:
  1658. /* LAN9210/LAN9211/LAN9220/LAN9221 */
  1659. pdata->generation = 4;
  1660. break;
  1661. default:
  1662. SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
  1663. pdata->idrev);
  1664. return -ENODEV;
  1665. }
  1666. SMSC_TRACE(pdata, probe,
  1667. "LAN911x identified, idrev: 0x%08X, generation: %d",
  1668. pdata->idrev, pdata->generation);
  1669. if (pdata->generation == 0)
  1670. SMSC_WARN(pdata, probe,
  1671. "This driver is not intended for this chip revision");
  1672. /* workaround for platforms without an eeprom, where the mac address
  1673. * is stored elsewhere and set by the bootloader. This saves the
  1674. * mac address before resetting the device */
  1675. if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
  1676. spin_lock_irq(&pdata->mac_lock);
  1677. smsc911x_read_mac_address(dev);
  1678. spin_unlock_irq(&pdata->mac_lock);
  1679. }
  1680. /* Reset the LAN911x */
  1681. if (smsc911x_soft_reset(pdata))
  1682. return -ENODEV;
  1683. /* Disable all interrupt sources until we bring the device up */
  1684. smsc911x_reg_write(pdata, INT_EN, 0);
  1685. ether_setup(dev);
  1686. dev->flags |= IFF_MULTICAST;
  1687. netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
  1688. dev->netdev_ops = &smsc911x_netdev_ops;
  1689. dev->ethtool_ops = &smsc911x_ethtool_ops;
  1690. return 0;
  1691. }
  1692. static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
  1693. {
  1694. struct net_device *dev;
  1695. struct smsc911x_data *pdata;
  1696. struct resource *res;
  1697. dev = platform_get_drvdata(pdev);
  1698. BUG_ON(!dev);
  1699. pdata = netdev_priv(dev);
  1700. BUG_ON(!pdata);
  1701. BUG_ON(!pdata->ioaddr);
  1702. BUG_ON(!pdata->phy_dev);
  1703. SMSC_TRACE(pdata, ifdown, "Stopping driver");
  1704. phy_disconnect(pdata->phy_dev);
  1705. pdata->phy_dev = NULL;
  1706. mdiobus_unregister(pdata->mii_bus);
  1707. mdiobus_free(pdata->mii_bus);
  1708. platform_set_drvdata(pdev, NULL);
  1709. unregister_netdev(dev);
  1710. free_irq(dev->irq, dev);
  1711. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  1712. "smsc911x-memory");
  1713. if (!res)
  1714. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1715. release_mem_region(res->start, resource_size(res));
  1716. iounmap(pdata->ioaddr);
  1717. free_netdev(dev);
  1718. return 0;
  1719. }
  1720. /* standard register acces */
  1721. static const struct smsc911x_ops standard_smsc911x_ops = {
  1722. .reg_read = __smsc911x_reg_read,
  1723. .reg_write = __smsc911x_reg_write,
  1724. .rx_readfifo = smsc911x_rx_readfifo,
  1725. .tx_writefifo = smsc911x_tx_writefifo,
  1726. };
  1727. /* shifted register access */
  1728. static const struct smsc911x_ops shifted_smsc911x_ops = {
  1729. .reg_read = __smsc911x_reg_read_shift,
  1730. .reg_write = __smsc911x_reg_write_shift,
  1731. .rx_readfifo = smsc911x_rx_readfifo_shift,
  1732. .tx_writefifo = smsc911x_tx_writefifo_shift,
  1733. };
  1734. #ifdef CONFIG_OF
  1735. static int __devinit smsc911x_probe_config_dt(
  1736. struct smsc911x_platform_config *config,
  1737. struct device_node *np)
  1738. {
  1739. const char *mac;
  1740. u32 width = 0;
  1741. if (!np)
  1742. return -ENODEV;
  1743. config->phy_interface = of_get_phy_mode(np);
  1744. mac = of_get_mac_address(np);
  1745. if (mac)
  1746. memcpy(config->mac, mac, ETH_ALEN);
  1747. of_property_read_u32(np, "reg-shift", &config->shift);
  1748. of_property_read_u32(np, "reg-io-width", &width);
  1749. if (width == 4)
  1750. config->flags |= SMSC911X_USE_32BIT;
  1751. else
  1752. config->flags |= SMSC911X_USE_16BIT;
  1753. if (of_get_property(np, "smsc,irq-active-high", NULL))
  1754. config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
  1755. if (of_get_property(np, "smsc,irq-push-pull", NULL))
  1756. config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
  1757. if (of_get_property(np, "smsc,force-internal-phy", NULL))
  1758. config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
  1759. if (of_get_property(np, "smsc,force-external-phy", NULL))
  1760. config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
  1761. if (of_get_property(np, "smsc,save-mac-address", NULL))
  1762. config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
  1763. return 0;
  1764. }
  1765. #else
  1766. static inline int smsc911x_probe_config_dt(
  1767. struct smsc911x_platform_config *config,
  1768. struct device_node *np)
  1769. {
  1770. return -ENODEV;
  1771. }
  1772. #endif /* CONFIG_OF */
  1773. static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
  1774. {
  1775. struct device_node *np = pdev->dev.of_node;
  1776. struct net_device *dev;
  1777. struct smsc911x_data *pdata;
  1778. struct smsc911x_platform_config *config = pdev->dev.platform_data;
  1779. struct resource *res, *irq_res;
  1780. unsigned int intcfg = 0;
  1781. int res_size, irq_flags;
  1782. int retval;
  1783. pr_info("Driver version %s\n", SMSC_DRV_VERSION);
  1784. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  1785. "smsc911x-memory");
  1786. if (!res)
  1787. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1788. if (!res) {
  1789. pr_warn("Could not allocate resource\n");
  1790. retval = -ENODEV;
  1791. goto out_0;
  1792. }
  1793. res_size = resource_size(res);
  1794. irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1795. if (!irq_res) {
  1796. pr_warn("Could not allocate irq resource\n");
  1797. retval = -ENODEV;
  1798. goto out_0;
  1799. }
  1800. if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
  1801. retval = -EBUSY;
  1802. goto out_0;
  1803. }
  1804. dev = alloc_etherdev(sizeof(struct smsc911x_data));
  1805. if (!dev) {
  1806. pr_warn("Could not allocate device\n");
  1807. retval = -ENOMEM;
  1808. goto out_release_io_1;
  1809. }
  1810. SET_NETDEV_DEV(dev, &pdev->dev);
  1811. pdata = netdev_priv(dev);
  1812. dev->irq = irq_res->start;
  1813. irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
  1814. pdata->ioaddr = ioremap_nocache(res->start, res_size);
  1815. pdata->dev = dev;
  1816. pdata->msg_enable = ((1 << debug) - 1);
  1817. if (pdata->ioaddr == NULL) {
  1818. SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
  1819. retval = -ENOMEM;
  1820. goto out_free_netdev_2;
  1821. }
  1822. retval = smsc911x_probe_config_dt(&pdata->config, np);
  1823. if (retval && config) {
  1824. /* copy config parameters across to pdata */
  1825. memcpy(&pdata->config, config, sizeof(pdata->config));
  1826. retval = 0;
  1827. }
  1828. if (retval) {
  1829. SMSC_WARN(pdata, probe, "Error smsc911x config not found");
  1830. goto out_unmap_io_3;
  1831. }
  1832. /* assume standard, non-shifted, access to HW registers */
  1833. pdata->ops = &standard_smsc911x_ops;
  1834. /* apply the right access if shifting is needed */
  1835. if (pdata->config.shift)
  1836. pdata->ops = &shifted_smsc911x_ops;
  1837. retval = smsc911x_init(dev);
  1838. if (retval < 0)
  1839. goto out_unmap_io_3;
  1840. /* configure irq polarity and type before connecting isr */
  1841. if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
  1842. intcfg |= INT_CFG_IRQ_POL_;
  1843. if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
  1844. intcfg |= INT_CFG_IRQ_TYPE_;
  1845. smsc911x_reg_write(pdata, INT_CFG, intcfg);
  1846. /* Ensure interrupts are globally disabled before connecting ISR */
  1847. smsc911x_reg_write(pdata, INT_EN, 0);
  1848. smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
  1849. retval = request_irq(dev->irq, smsc911x_irqhandler,
  1850. irq_flags | IRQF_SHARED, dev->name, dev);
  1851. if (retval) {
  1852. SMSC_WARN(pdata, probe,
  1853. "Unable to claim requested irq: %d", dev->irq);
  1854. goto out_unmap_io_3;
  1855. }
  1856. platform_set_drvdata(pdev, dev);
  1857. retval = register_netdev(dev);
  1858. if (retval) {
  1859. SMSC_WARN(pdata, probe, "Error %i registering device", retval);
  1860. goto out_unset_drvdata_4;
  1861. } else {
  1862. SMSC_TRACE(pdata, probe,
  1863. "Network interface: \"%s\"", dev->name);
  1864. }
  1865. retval = smsc911x_mii_init(pdev, dev);
  1866. if (retval) {
  1867. SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
  1868. goto out_unregister_netdev_5;
  1869. }
  1870. spin_lock_irq(&pdata->mac_lock);
  1871. /* Check if mac address has been specified when bringing interface up */
  1872. if (is_valid_ether_addr(dev->dev_addr)) {
  1873. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  1874. SMSC_TRACE(pdata, probe,
  1875. "MAC Address is specified by configuration");
  1876. } else if (is_valid_ether_addr(pdata->config.mac)) {
  1877. memcpy(dev->dev_addr, pdata->config.mac, 6);
  1878. SMSC_TRACE(pdata, probe,
  1879. "MAC Address specified by platform data");
  1880. } else {
  1881. /* Try reading mac address from device. if EEPROM is present
  1882. * it will already have been set */
  1883. smsc_get_mac(dev);
  1884. if (is_valid_ether_addr(dev->dev_addr)) {
  1885. /* eeprom values are valid so use them */
  1886. SMSC_TRACE(pdata, probe,
  1887. "Mac Address is read from LAN911x EEPROM");
  1888. } else {
  1889. /* eeprom values are invalid, generate random MAC */
  1890. random_ether_addr(dev->dev_addr);
  1891. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  1892. SMSC_TRACE(pdata, probe,
  1893. "MAC Address is set to random_ether_addr");
  1894. }
  1895. }
  1896. spin_unlock_irq(&pdata->mac_lock);
  1897. netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
  1898. return 0;
  1899. out_unregister_netdev_5:
  1900. unregister_netdev(dev);
  1901. out_unset_drvdata_4:
  1902. platform_set_drvdata(pdev, NULL);
  1903. free_irq(dev->irq, dev);
  1904. out_unmap_io_3:
  1905. iounmap(pdata->ioaddr);
  1906. out_free_netdev_2:
  1907. free_netdev(dev);
  1908. out_release_io_1:
  1909. release_mem_region(res->start, resource_size(res));
  1910. out_0:
  1911. return retval;
  1912. }
  1913. #ifdef CONFIG_PM
  1914. /* This implementation assumes the devices remains powered on its VDDVARIO
  1915. * pins during suspend. */
  1916. /* TODO: implement freeze/thaw callbacks for hibernation.*/
  1917. static int smsc911x_suspend(struct device *dev)
  1918. {
  1919. struct net_device *ndev = dev_get_drvdata(dev);
  1920. struct smsc911x_data *pdata = netdev_priv(ndev);
  1921. /* enable wake on LAN, energy detection and the external PME
  1922. * signal. */
  1923. smsc911x_reg_write(pdata, PMT_CTRL,
  1924. PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
  1925. PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
  1926. return 0;
  1927. }
  1928. static int smsc911x_resume(struct device *dev)
  1929. {
  1930. struct net_device *ndev = dev_get_drvdata(dev);
  1931. struct smsc911x_data *pdata = netdev_priv(ndev);
  1932. unsigned int to = 100;
  1933. /* Note 3.11 from the datasheet:
  1934. * "When the LAN9220 is in a power saving state, a write of any
  1935. * data to the BYTE_TEST register will wake-up the device."
  1936. */
  1937. smsc911x_reg_write(pdata, BYTE_TEST, 0);
  1938. /* poll the READY bit in PMT_CTRL. Any other access to the device is
  1939. * forbidden while this bit isn't set. Try for 100ms and return -EIO
  1940. * if it failed. */
  1941. while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
  1942. udelay(1000);
  1943. return (to == 0) ? -EIO : 0;
  1944. }
  1945. static const struct dev_pm_ops smsc911x_pm_ops = {
  1946. .suspend = smsc911x_suspend,
  1947. .resume = smsc911x_resume,
  1948. };
  1949. #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
  1950. #else
  1951. #define SMSC911X_PM_OPS NULL
  1952. #endif
  1953. static const struct of_device_id smsc911x_dt_ids[] = {
  1954. { .compatible = "smsc,lan9115", },
  1955. { /* sentinel */ }
  1956. };
  1957. MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
  1958. static struct platform_driver smsc911x_driver = {
  1959. .probe = smsc911x_drv_probe,
  1960. .remove = __devexit_p(smsc911x_drv_remove),
  1961. .driver = {
  1962. .name = SMSC_CHIPNAME,
  1963. .owner = THIS_MODULE,
  1964. .pm = SMSC911X_PM_OPS,
  1965. .of_match_table = smsc911x_dt_ids,
  1966. },
  1967. };
  1968. /* Entry point for loading the module */
  1969. static int __init smsc911x_init_module(void)
  1970. {
  1971. SMSC_INITIALIZE();
  1972. return platform_driver_register(&smsc911x_driver);
  1973. }
  1974. /* entry point for unloading the module */
  1975. static void __exit smsc911x_cleanup_module(void)
  1976. {
  1977. platform_driver_unregister(&smsc911x_driver);
  1978. }
  1979. module_init(smsc911x_init_module);
  1980. module_exit(smsc911x_cleanup_module);