at91sam9260_devices.c 23 KB

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  1. /*
  2. * arch/arm/mach-at91/at91sam9260_devices.c
  3. *
  4. * Copyright (C) 2006 Atmel
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. */
  12. #include <asm/mach/arch.h>
  13. #include <asm/mach/map.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/i2c-gpio.h>
  16. #include <asm/arch/board.h>
  17. #include <asm/arch/gpio.h>
  18. #include <asm/arch/at91sam9260.h>
  19. #include <asm/arch/at91sam926x_mc.h>
  20. #include <asm/arch/at91sam9260_matrix.h>
  21. #include "generic.h"
  22. /* --------------------------------------------------------------------
  23. * USB Host
  24. * -------------------------------------------------------------------- */
  25. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  26. static u64 ohci_dmamask = 0xffffffffUL;
  27. static struct at91_usbh_data usbh_data;
  28. static struct resource usbh_resources[] = {
  29. [0] = {
  30. .start = AT91SAM9260_UHP_BASE,
  31. .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
  32. .flags = IORESOURCE_MEM,
  33. },
  34. [1] = {
  35. .start = AT91SAM9260_ID_UHP,
  36. .end = AT91SAM9260_ID_UHP,
  37. .flags = IORESOURCE_IRQ,
  38. },
  39. };
  40. static struct platform_device at91_usbh_device = {
  41. .name = "at91_ohci",
  42. .id = -1,
  43. .dev = {
  44. .dma_mask = &ohci_dmamask,
  45. .coherent_dma_mask = 0xffffffff,
  46. .platform_data = &usbh_data,
  47. },
  48. .resource = usbh_resources,
  49. .num_resources = ARRAY_SIZE(usbh_resources),
  50. };
  51. void __init at91_add_device_usbh(struct at91_usbh_data *data)
  52. {
  53. if (!data)
  54. return;
  55. usbh_data = *data;
  56. platform_device_register(&at91_usbh_device);
  57. }
  58. #else
  59. void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  60. #endif
  61. /* --------------------------------------------------------------------
  62. * USB Device (Gadget)
  63. * -------------------------------------------------------------------- */
  64. #ifdef CONFIG_USB_GADGET_AT91
  65. static struct at91_udc_data udc_data;
  66. static struct resource udc_resources[] = {
  67. [0] = {
  68. .start = AT91SAM9260_BASE_UDP,
  69. .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
  70. .flags = IORESOURCE_MEM,
  71. },
  72. [1] = {
  73. .start = AT91SAM9260_ID_UDP,
  74. .end = AT91SAM9260_ID_UDP,
  75. .flags = IORESOURCE_IRQ,
  76. },
  77. };
  78. static struct platform_device at91_udc_device = {
  79. .name = "at91_udc",
  80. .id = -1,
  81. .dev = {
  82. .platform_data = &udc_data,
  83. },
  84. .resource = udc_resources,
  85. .num_resources = ARRAY_SIZE(udc_resources),
  86. };
  87. void __init at91_add_device_udc(struct at91_udc_data *data)
  88. {
  89. if (!data)
  90. return;
  91. if (data->vbus_pin) {
  92. at91_set_gpio_input(data->vbus_pin, 0);
  93. at91_set_deglitch(data->vbus_pin, 1);
  94. }
  95. /* Pullup pin is handled internally by USB device peripheral */
  96. udc_data = *data;
  97. platform_device_register(&at91_udc_device);
  98. }
  99. #else
  100. void __init at91_add_device_udc(struct at91_udc_data *data) {}
  101. #endif
  102. /* --------------------------------------------------------------------
  103. * Ethernet
  104. * -------------------------------------------------------------------- */
  105. #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
  106. static u64 eth_dmamask = 0xffffffffUL;
  107. static struct at91_eth_data eth_data;
  108. static struct resource eth_resources[] = {
  109. [0] = {
  110. .start = AT91SAM9260_BASE_EMAC,
  111. .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
  112. .flags = IORESOURCE_MEM,
  113. },
  114. [1] = {
  115. .start = AT91SAM9260_ID_EMAC,
  116. .end = AT91SAM9260_ID_EMAC,
  117. .flags = IORESOURCE_IRQ,
  118. },
  119. };
  120. static struct platform_device at91sam9260_eth_device = {
  121. .name = "macb",
  122. .id = -1,
  123. .dev = {
  124. .dma_mask = &eth_dmamask,
  125. .coherent_dma_mask = 0xffffffff,
  126. .platform_data = &eth_data,
  127. },
  128. .resource = eth_resources,
  129. .num_resources = ARRAY_SIZE(eth_resources),
  130. };
  131. void __init at91_add_device_eth(struct at91_eth_data *data)
  132. {
  133. if (!data)
  134. return;
  135. if (data->phy_irq_pin) {
  136. at91_set_gpio_input(data->phy_irq_pin, 0);
  137. at91_set_deglitch(data->phy_irq_pin, 1);
  138. }
  139. /* Pins used for MII and RMII */
  140. at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
  141. at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
  142. at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
  143. at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
  144. at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
  145. at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
  146. at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
  147. at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
  148. at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
  149. at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
  150. if (!data->is_rmii) {
  151. at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
  152. at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
  153. at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
  154. at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
  155. at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
  156. at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
  157. at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
  158. at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
  159. }
  160. eth_data = *data;
  161. platform_device_register(&at91sam9260_eth_device);
  162. }
  163. #else
  164. void __init at91_add_device_eth(struct at91_eth_data *data) {}
  165. #endif
  166. /* --------------------------------------------------------------------
  167. * MMC / SD
  168. * -------------------------------------------------------------------- */
  169. #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
  170. static u64 mmc_dmamask = 0xffffffffUL;
  171. static struct at91_mmc_data mmc_data;
  172. static struct resource mmc_resources[] = {
  173. [0] = {
  174. .start = AT91SAM9260_BASE_MCI,
  175. .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
  176. .flags = IORESOURCE_MEM,
  177. },
  178. [1] = {
  179. .start = AT91SAM9260_ID_MCI,
  180. .end = AT91SAM9260_ID_MCI,
  181. .flags = IORESOURCE_IRQ,
  182. },
  183. };
  184. static struct platform_device at91sam9260_mmc_device = {
  185. .name = "at91_mci",
  186. .id = -1,
  187. .dev = {
  188. .dma_mask = &mmc_dmamask,
  189. .coherent_dma_mask = 0xffffffff,
  190. .platform_data = &mmc_data,
  191. },
  192. .resource = mmc_resources,
  193. .num_resources = ARRAY_SIZE(mmc_resources),
  194. };
  195. void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
  196. {
  197. if (!data)
  198. return;
  199. /* input/irq */
  200. if (data->det_pin) {
  201. at91_set_gpio_input(data->det_pin, 1);
  202. at91_set_deglitch(data->det_pin, 1);
  203. }
  204. if (data->wp_pin)
  205. at91_set_gpio_input(data->wp_pin, 1);
  206. if (data->vcc_pin)
  207. at91_set_gpio_output(data->vcc_pin, 0);
  208. /* CLK */
  209. at91_set_A_periph(AT91_PIN_PA8, 0);
  210. if (data->slot_b) {
  211. /* CMD */
  212. at91_set_B_periph(AT91_PIN_PA1, 1);
  213. /* DAT0, maybe DAT1..DAT3 */
  214. at91_set_B_periph(AT91_PIN_PA0, 1);
  215. if (data->wire4) {
  216. at91_set_B_periph(AT91_PIN_PA5, 1);
  217. at91_set_B_periph(AT91_PIN_PA4, 1);
  218. at91_set_B_periph(AT91_PIN_PA3, 1);
  219. }
  220. } else {
  221. /* CMD */
  222. at91_set_A_periph(AT91_PIN_PA7, 1);
  223. /* DAT0, maybe DAT1..DAT3 */
  224. at91_set_A_periph(AT91_PIN_PA6, 1);
  225. if (data->wire4) {
  226. at91_set_A_periph(AT91_PIN_PA9, 1);
  227. at91_set_A_periph(AT91_PIN_PA10, 1);
  228. at91_set_A_periph(AT91_PIN_PA11, 1);
  229. }
  230. }
  231. mmc_data = *data;
  232. platform_device_register(&at91sam9260_mmc_device);
  233. }
  234. #else
  235. void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
  236. #endif
  237. /* --------------------------------------------------------------------
  238. * NAND / SmartMedia
  239. * -------------------------------------------------------------------- */
  240. #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
  241. static struct at91_nand_data nand_data;
  242. #define NAND_BASE AT91_CHIPSELECT_3
  243. static struct resource nand_resources[] = {
  244. {
  245. .start = NAND_BASE,
  246. .end = NAND_BASE + SZ_8M - 1,
  247. .flags = IORESOURCE_MEM,
  248. }
  249. };
  250. static struct platform_device at91sam9260_nand_device = {
  251. .name = "at91_nand",
  252. .id = -1,
  253. .dev = {
  254. .platform_data = &nand_data,
  255. },
  256. .resource = nand_resources,
  257. .num_resources = ARRAY_SIZE(nand_resources),
  258. };
  259. void __init at91_add_device_nand(struct at91_nand_data *data)
  260. {
  261. unsigned long csa, mode;
  262. if (!data)
  263. return;
  264. csa = at91_sys_read(AT91_MATRIX_EBICSA);
  265. at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
  266. /* set the bus interface characteristics */
  267. at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
  268. | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
  269. at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
  270. | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
  271. at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
  272. if (data->bus_width_16)
  273. mode = AT91_SMC_DBW_16;
  274. else
  275. mode = AT91_SMC_DBW_8;
  276. at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
  277. /* enable pin */
  278. if (data->enable_pin)
  279. at91_set_gpio_output(data->enable_pin, 1);
  280. /* ready/busy pin */
  281. if (data->rdy_pin)
  282. at91_set_gpio_input(data->rdy_pin, 1);
  283. /* card detect pin */
  284. if (data->det_pin)
  285. at91_set_gpio_input(data->det_pin, 1);
  286. nand_data = *data;
  287. platform_device_register(&at91sam9260_nand_device);
  288. }
  289. #else
  290. void __init at91_add_device_nand(struct at91_nand_data *data) {}
  291. #endif
  292. /* --------------------------------------------------------------------
  293. * TWI (i2c)
  294. * -------------------------------------------------------------------- */
  295. /*
  296. * Prefer the GPIO code since the TWI controller isn't robust
  297. * (gets overruns and underruns under load) and can only issue
  298. * repeated STARTs in one scenario (the driver doesn't yet handle them).
  299. */
  300. #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
  301. static struct i2c_gpio_platform_data pdata = {
  302. .sda_pin = AT91_PIN_PA23,
  303. .sda_is_open_drain = 1,
  304. .scl_pin = AT91_PIN_PA24,
  305. .scl_is_open_drain = 1,
  306. .udelay = 2, /* ~100 kHz */
  307. };
  308. static struct platform_device at91sam9260_twi_device = {
  309. .name = "i2c-gpio",
  310. .id = -1,
  311. .dev.platform_data = &pdata,
  312. };
  313. void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
  314. {
  315. at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
  316. at91_set_multi_drive(AT91_PIN_PA23, 1);
  317. at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
  318. at91_set_multi_drive(AT91_PIN_PA24, 1);
  319. i2c_register_board_info(0, devices, nr_devices);
  320. platform_device_register(&at91sam9260_twi_device);
  321. }
  322. #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
  323. static struct resource twi_resources[] = {
  324. [0] = {
  325. .start = AT91SAM9260_BASE_TWI,
  326. .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
  327. .flags = IORESOURCE_MEM,
  328. },
  329. [1] = {
  330. .start = AT91SAM9260_ID_TWI,
  331. .end = AT91SAM9260_ID_TWI,
  332. .flags = IORESOURCE_IRQ,
  333. },
  334. };
  335. static struct platform_device at91sam9260_twi_device = {
  336. .name = "at91_i2c",
  337. .id = -1,
  338. .resource = twi_resources,
  339. .num_resources = ARRAY_SIZE(twi_resources),
  340. };
  341. void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
  342. {
  343. /* pins used for TWI interface */
  344. at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
  345. at91_set_multi_drive(AT91_PIN_PA23, 1);
  346. at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
  347. at91_set_multi_drive(AT91_PIN_PA24, 1);
  348. i2c_register_board_info(0, devices, nr_devices);
  349. platform_device_register(&at91sam9260_twi_device);
  350. }
  351. #else
  352. void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
  353. #endif
  354. /* --------------------------------------------------------------------
  355. * SPI
  356. * -------------------------------------------------------------------- */
  357. #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
  358. static u64 spi_dmamask = 0xffffffffUL;
  359. static struct resource spi0_resources[] = {
  360. [0] = {
  361. .start = AT91SAM9260_BASE_SPI0,
  362. .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
  363. .flags = IORESOURCE_MEM,
  364. },
  365. [1] = {
  366. .start = AT91SAM9260_ID_SPI0,
  367. .end = AT91SAM9260_ID_SPI0,
  368. .flags = IORESOURCE_IRQ,
  369. },
  370. };
  371. static struct platform_device at91sam9260_spi0_device = {
  372. .name = "atmel_spi",
  373. .id = 0,
  374. .dev = {
  375. .dma_mask = &spi_dmamask,
  376. .coherent_dma_mask = 0xffffffff,
  377. },
  378. .resource = spi0_resources,
  379. .num_resources = ARRAY_SIZE(spi0_resources),
  380. };
  381. static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
  382. static struct resource spi1_resources[] = {
  383. [0] = {
  384. .start = AT91SAM9260_BASE_SPI1,
  385. .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
  386. .flags = IORESOURCE_MEM,
  387. },
  388. [1] = {
  389. .start = AT91SAM9260_ID_SPI1,
  390. .end = AT91SAM9260_ID_SPI1,
  391. .flags = IORESOURCE_IRQ,
  392. },
  393. };
  394. static struct platform_device at91sam9260_spi1_device = {
  395. .name = "atmel_spi",
  396. .id = 1,
  397. .dev = {
  398. .dma_mask = &spi_dmamask,
  399. .coherent_dma_mask = 0xffffffff,
  400. },
  401. .resource = spi1_resources,
  402. .num_resources = ARRAY_SIZE(spi1_resources),
  403. };
  404. static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
  405. void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
  406. {
  407. int i;
  408. unsigned long cs_pin;
  409. short enable_spi0 = 0;
  410. short enable_spi1 = 0;
  411. /* Choose SPI chip-selects */
  412. for (i = 0; i < nr_devices; i++) {
  413. if (devices[i].controller_data)
  414. cs_pin = (unsigned long) devices[i].controller_data;
  415. else if (devices[i].bus_num == 0)
  416. cs_pin = spi0_standard_cs[devices[i].chip_select];
  417. else
  418. cs_pin = spi1_standard_cs[devices[i].chip_select];
  419. if (devices[i].bus_num == 0)
  420. enable_spi0 = 1;
  421. else
  422. enable_spi1 = 1;
  423. /* enable chip-select pin */
  424. at91_set_gpio_output(cs_pin, 1);
  425. /* pass chip-select pin to driver */
  426. devices[i].controller_data = (void *) cs_pin;
  427. }
  428. spi_register_board_info(devices, nr_devices);
  429. /* Configure SPI bus(es) */
  430. if (enable_spi0) {
  431. at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
  432. at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
  433. at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
  434. at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
  435. platform_device_register(&at91sam9260_spi0_device);
  436. }
  437. if (enable_spi1) {
  438. at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
  439. at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
  440. at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
  441. at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
  442. platform_device_register(&at91sam9260_spi1_device);
  443. }
  444. }
  445. #else
  446. void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
  447. #endif
  448. /* --------------------------------------------------------------------
  449. * LEDs
  450. * -------------------------------------------------------------------- */
  451. #if defined(CONFIG_LEDS)
  452. u8 at91_leds_cpu;
  453. u8 at91_leds_timer;
  454. void __init at91_init_leds(u8 cpu_led, u8 timer_led)
  455. {
  456. /* Enable GPIO to access the LEDs */
  457. at91_set_gpio_output(cpu_led, 1);
  458. at91_set_gpio_output(timer_led, 1);
  459. at91_leds_cpu = cpu_led;
  460. at91_leds_timer = timer_led;
  461. }
  462. #else
  463. void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
  464. #endif
  465. /* --------------------------------------------------------------------
  466. * UART
  467. * -------------------------------------------------------------------- */
  468. #if defined(CONFIG_SERIAL_ATMEL)
  469. static struct resource dbgu_resources[] = {
  470. [0] = {
  471. .start = AT91_VA_BASE_SYS + AT91_DBGU,
  472. .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
  473. .flags = IORESOURCE_MEM,
  474. },
  475. [1] = {
  476. .start = AT91_ID_SYS,
  477. .end = AT91_ID_SYS,
  478. .flags = IORESOURCE_IRQ,
  479. },
  480. };
  481. static struct atmel_uart_data dbgu_data = {
  482. .use_dma_tx = 0,
  483. .use_dma_rx = 0, /* DBGU not capable of receive DMA */
  484. .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
  485. };
  486. static struct platform_device at91sam9260_dbgu_device = {
  487. .name = "atmel_usart",
  488. .id = 0,
  489. .dev = {
  490. .platform_data = &dbgu_data,
  491. .coherent_dma_mask = 0xffffffff,
  492. },
  493. .resource = dbgu_resources,
  494. .num_resources = ARRAY_SIZE(dbgu_resources),
  495. };
  496. static inline void configure_dbgu_pins(void)
  497. {
  498. at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
  499. at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
  500. }
  501. static struct resource uart0_resources[] = {
  502. [0] = {
  503. .start = AT91SAM9260_BASE_US0,
  504. .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
  505. .flags = IORESOURCE_MEM,
  506. },
  507. [1] = {
  508. .start = AT91SAM9260_ID_US0,
  509. .end = AT91SAM9260_ID_US0,
  510. .flags = IORESOURCE_IRQ,
  511. },
  512. };
  513. static struct atmel_uart_data uart0_data = {
  514. .use_dma_tx = 1,
  515. .use_dma_rx = 1,
  516. };
  517. static struct platform_device at91sam9260_uart0_device = {
  518. .name = "atmel_usart",
  519. .id = 1,
  520. .dev = {
  521. .platform_data = &uart0_data,
  522. .coherent_dma_mask = 0xffffffff,
  523. },
  524. .resource = uart0_resources,
  525. .num_resources = ARRAY_SIZE(uart0_resources),
  526. };
  527. static inline void configure_usart0_pins(void)
  528. {
  529. at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
  530. at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
  531. at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
  532. at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
  533. at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
  534. at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
  535. at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
  536. at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
  537. }
  538. static struct resource uart1_resources[] = {
  539. [0] = {
  540. .start = AT91SAM9260_BASE_US1,
  541. .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
  542. .flags = IORESOURCE_MEM,
  543. },
  544. [1] = {
  545. .start = AT91SAM9260_ID_US1,
  546. .end = AT91SAM9260_ID_US1,
  547. .flags = IORESOURCE_IRQ,
  548. },
  549. };
  550. static struct atmel_uart_data uart1_data = {
  551. .use_dma_tx = 1,
  552. .use_dma_rx = 1,
  553. };
  554. static struct platform_device at91sam9260_uart1_device = {
  555. .name = "atmel_usart",
  556. .id = 2,
  557. .dev = {
  558. .platform_data = &uart1_data,
  559. .coherent_dma_mask = 0xffffffff,
  560. },
  561. .resource = uart1_resources,
  562. .num_resources = ARRAY_SIZE(uart1_resources),
  563. };
  564. static inline void configure_usart1_pins(void)
  565. {
  566. at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
  567. at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
  568. at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
  569. at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
  570. }
  571. static struct resource uart2_resources[] = {
  572. [0] = {
  573. .start = AT91SAM9260_BASE_US2,
  574. .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
  575. .flags = IORESOURCE_MEM,
  576. },
  577. [1] = {
  578. .start = AT91SAM9260_ID_US2,
  579. .end = AT91SAM9260_ID_US2,
  580. .flags = IORESOURCE_IRQ,
  581. },
  582. };
  583. static struct atmel_uart_data uart2_data = {
  584. .use_dma_tx = 1,
  585. .use_dma_rx = 1,
  586. };
  587. static struct platform_device at91sam9260_uart2_device = {
  588. .name = "atmel_usart",
  589. .id = 3,
  590. .dev = {
  591. .platform_data = &uart2_data,
  592. .coherent_dma_mask = 0xffffffff,
  593. },
  594. .resource = uart2_resources,
  595. .num_resources = ARRAY_SIZE(uart2_resources),
  596. };
  597. static inline void configure_usart2_pins(void)
  598. {
  599. at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
  600. at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
  601. }
  602. static struct resource uart3_resources[] = {
  603. [0] = {
  604. .start = AT91SAM9260_BASE_US3,
  605. .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
  606. .flags = IORESOURCE_MEM,
  607. },
  608. [1] = {
  609. .start = AT91SAM9260_ID_US3,
  610. .end = AT91SAM9260_ID_US3,
  611. .flags = IORESOURCE_IRQ,
  612. },
  613. };
  614. static struct atmel_uart_data uart3_data = {
  615. .use_dma_tx = 1,
  616. .use_dma_rx = 1,
  617. };
  618. static struct platform_device at91sam9260_uart3_device = {
  619. .name = "atmel_usart",
  620. .id = 4,
  621. .dev = {
  622. .platform_data = &uart3_data,
  623. .coherent_dma_mask = 0xffffffff,
  624. },
  625. .resource = uart3_resources,
  626. .num_resources = ARRAY_SIZE(uart3_resources),
  627. };
  628. static inline void configure_usart3_pins(void)
  629. {
  630. at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
  631. at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
  632. }
  633. static struct resource uart4_resources[] = {
  634. [0] = {
  635. .start = AT91SAM9260_BASE_US4,
  636. .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
  637. .flags = IORESOURCE_MEM,
  638. },
  639. [1] = {
  640. .start = AT91SAM9260_ID_US4,
  641. .end = AT91SAM9260_ID_US4,
  642. .flags = IORESOURCE_IRQ,
  643. },
  644. };
  645. static struct atmel_uart_data uart4_data = {
  646. .use_dma_tx = 1,
  647. .use_dma_rx = 1,
  648. };
  649. static struct platform_device at91sam9260_uart4_device = {
  650. .name = "atmel_usart",
  651. .id = 5,
  652. .dev = {
  653. .platform_data = &uart4_data,
  654. .coherent_dma_mask = 0xffffffff,
  655. },
  656. .resource = uart4_resources,
  657. .num_resources = ARRAY_SIZE(uart4_resources),
  658. };
  659. static inline void configure_usart4_pins(void)
  660. {
  661. at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
  662. at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
  663. }
  664. static struct resource uart5_resources[] = {
  665. [0] = {
  666. .start = AT91SAM9260_BASE_US5,
  667. .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
  668. .flags = IORESOURCE_MEM,
  669. },
  670. [1] = {
  671. .start = AT91SAM9260_ID_US5,
  672. .end = AT91SAM9260_ID_US5,
  673. .flags = IORESOURCE_IRQ,
  674. },
  675. };
  676. static struct atmel_uart_data uart5_data = {
  677. .use_dma_tx = 1,
  678. .use_dma_rx = 1,
  679. };
  680. static struct platform_device at91sam9260_uart5_device = {
  681. .name = "atmel_usart",
  682. .id = 6,
  683. .dev = {
  684. .platform_data = &uart5_data,
  685. .coherent_dma_mask = 0xffffffff,
  686. },
  687. .resource = uart5_resources,
  688. .num_resources = ARRAY_SIZE(uart5_resources),
  689. };
  690. static inline void configure_usart5_pins(void)
  691. {
  692. at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
  693. at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
  694. }
  695. struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
  696. struct platform_device *atmel_default_console_device; /* the serial console device */
  697. void __init at91_init_serial(struct at91_uart_config *config)
  698. {
  699. int i;
  700. /* Fill in list of supported UARTs */
  701. for (i = 0; i < config->nr_tty; i++) {
  702. switch (config->tty_map[i]) {
  703. case 0:
  704. configure_usart0_pins();
  705. at91_uarts[i] = &at91sam9260_uart0_device;
  706. at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart");
  707. break;
  708. case 1:
  709. configure_usart1_pins();
  710. at91_uarts[i] = &at91sam9260_uart1_device;
  711. at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart");
  712. break;
  713. case 2:
  714. configure_usart2_pins();
  715. at91_uarts[i] = &at91sam9260_uart2_device;
  716. at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart");
  717. break;
  718. case 3:
  719. configure_usart3_pins();
  720. at91_uarts[i] = &at91sam9260_uart3_device;
  721. at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart");
  722. break;
  723. case 4:
  724. configure_usart4_pins();
  725. at91_uarts[i] = &at91sam9260_uart4_device;
  726. at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart");
  727. break;
  728. case 5:
  729. configure_usart5_pins();
  730. at91_uarts[i] = &at91sam9260_uart5_device;
  731. at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart");
  732. break;
  733. case 6:
  734. configure_dbgu_pins();
  735. at91_uarts[i] = &at91sam9260_dbgu_device;
  736. at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart");
  737. break;
  738. default:
  739. continue;
  740. }
  741. at91_uarts[i]->id = i; /* update ID number to mapped ID */
  742. }
  743. /* Set serial console device */
  744. if (config->console_tty < ATMEL_MAX_UART)
  745. atmel_default_console_device = at91_uarts[config->console_tty];
  746. if (!atmel_default_console_device)
  747. printk(KERN_INFO "AT91: No default serial console defined.\n");
  748. }
  749. void __init at91_add_device_serial(void)
  750. {
  751. int i;
  752. for (i = 0; i < ATMEL_MAX_UART; i++) {
  753. if (at91_uarts[i])
  754. platform_device_register(at91_uarts[i]);
  755. }
  756. }
  757. #else
  758. void __init at91_init_serial(struct at91_uart_config *config) {}
  759. void __init at91_add_device_serial(void) {}
  760. #endif
  761. /* -------------------------------------------------------------------- */
  762. /*
  763. * These devices are always present and don't need any board-specific
  764. * setup.
  765. */
  766. static int __init at91_add_standard_devices(void)
  767. {
  768. return 0;
  769. }
  770. arch_initcall(at91_add_standard_devices);