soc-cache.c 34 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471
  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <sound/soc.h>
  16. #include <linux/lzo.h>
  17. #include <linux/bitmap.h>
  18. #include <linux/rbtree.h>
  19. #include <trace/events/asoc.h>
  20. #if defined(CONFIG_SPI_MASTER)
  21. static int do_spi_write(void *control_data, const void *msg,
  22. int len)
  23. {
  24. struct spi_device *spi = control_data;
  25. struct spi_transfer t;
  26. struct spi_message m;
  27. if (len <= 0)
  28. return 0;
  29. spi_message_init(&m);
  30. memset(&t, 0, sizeof t);
  31. t.tx_buf = msg;
  32. t.len = len;
  33. spi_message_add_tail(&t, &m);
  34. spi_sync(spi, &m);
  35. return len;
  36. }
  37. #endif
  38. static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
  39. unsigned int value, const void *data, int len)
  40. {
  41. int ret;
  42. if (!snd_soc_codec_volatile_register(codec, reg) &&
  43. reg < codec->driver->reg_cache_size &&
  44. !codec->cache_bypass) {
  45. ret = snd_soc_cache_write(codec, reg, value);
  46. if (ret < 0)
  47. return -1;
  48. }
  49. if (codec->cache_only) {
  50. codec->cache_sync = 1;
  51. return 0;
  52. }
  53. ret = codec->hw_write(codec->control_data, data, len);
  54. if (ret == len)
  55. return 0;
  56. if (ret < 0)
  57. return ret;
  58. else
  59. return -EIO;
  60. }
  61. static unsigned int do_hw_read(struct snd_soc_codec *codec, unsigned int reg)
  62. {
  63. int ret;
  64. unsigned int val;
  65. if (reg >= codec->driver->reg_cache_size ||
  66. snd_soc_codec_volatile_register(codec, reg) ||
  67. codec->cache_bypass) {
  68. if (codec->cache_only)
  69. return -1;
  70. BUG_ON(!codec->hw_read);
  71. return codec->hw_read(codec, reg);
  72. }
  73. ret = snd_soc_cache_read(codec, reg, &val);
  74. if (ret < 0)
  75. return -1;
  76. return val;
  77. }
  78. static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
  79. unsigned int reg)
  80. {
  81. return do_hw_read(codec, reg);
  82. }
  83. static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
  84. unsigned int value)
  85. {
  86. u8 data[2];
  87. data[0] = (reg << 4) | ((value >> 8) & 0x000f);
  88. data[1] = value & 0x00ff;
  89. return do_hw_write(codec, reg, value, data, 2);
  90. }
  91. #if defined(CONFIG_SPI_MASTER)
  92. static int snd_soc_4_12_spi_write(void *control_data, const char *data,
  93. int len)
  94. {
  95. u8 msg[2];
  96. msg[0] = data[1];
  97. msg[1] = data[0];
  98. return do_spi_write(control_data, msg, len);
  99. }
  100. #else
  101. #define snd_soc_4_12_spi_write NULL
  102. #endif
  103. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  104. unsigned int reg)
  105. {
  106. return do_hw_read(codec, reg);
  107. }
  108. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  109. unsigned int value)
  110. {
  111. u8 data[2];
  112. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  113. data[1] = value & 0x00ff;
  114. return do_hw_write(codec, reg, value, data, 2);
  115. }
  116. #if defined(CONFIG_SPI_MASTER)
  117. static int snd_soc_7_9_spi_write(void *control_data, const char *data,
  118. int len)
  119. {
  120. u8 msg[2];
  121. msg[0] = data[0];
  122. msg[1] = data[1];
  123. return do_spi_write(control_data, msg, len);
  124. }
  125. #else
  126. #define snd_soc_7_9_spi_write NULL
  127. #endif
  128. static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
  129. unsigned int value)
  130. {
  131. u8 data[2];
  132. reg &= 0xff;
  133. data[0] = reg;
  134. data[1] = value & 0xff;
  135. return do_hw_write(codec, reg, value, data, 2);
  136. }
  137. static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
  138. unsigned int reg)
  139. {
  140. return do_hw_read(codec, reg);
  141. }
  142. #if defined(CONFIG_SPI_MASTER)
  143. static int snd_soc_8_8_spi_write(void *control_data, const char *data,
  144. int len)
  145. {
  146. u8 msg[2];
  147. msg[0] = data[0];
  148. msg[1] = data[1];
  149. return do_spi_write(control_data, msg, len);
  150. }
  151. #else
  152. #define snd_soc_8_8_spi_write NULL
  153. #endif
  154. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  155. unsigned int value)
  156. {
  157. u8 data[3];
  158. data[0] = reg;
  159. data[1] = (value >> 8) & 0xff;
  160. data[2] = value & 0xff;
  161. return do_hw_write(codec, reg, value, data, 3);
  162. }
  163. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  164. unsigned int reg)
  165. {
  166. return do_hw_read(codec, reg);
  167. }
  168. #if defined(CONFIG_SPI_MASTER)
  169. static int snd_soc_8_16_spi_write(void *control_data, const char *data,
  170. int len)
  171. {
  172. u8 msg[3];
  173. msg[0] = data[0];
  174. msg[1] = data[1];
  175. msg[2] = data[2];
  176. return do_spi_write(control_data, msg, len);
  177. }
  178. #else
  179. #define snd_soc_8_16_spi_write NULL
  180. #endif
  181. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  182. static unsigned int do_i2c_read(struct snd_soc_codec *codec,
  183. void *reg, int reglen,
  184. void *data, int datalen)
  185. {
  186. struct i2c_msg xfer[2];
  187. int ret;
  188. struct i2c_client *client = codec->control_data;
  189. /* Write register */
  190. xfer[0].addr = client->addr;
  191. xfer[0].flags = 0;
  192. xfer[0].len = reglen;
  193. xfer[0].buf = reg;
  194. /* Read data */
  195. xfer[1].addr = client->addr;
  196. xfer[1].flags = I2C_M_RD;
  197. xfer[1].len = datalen;
  198. xfer[1].buf = data;
  199. ret = i2c_transfer(client->adapter, xfer, 2);
  200. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  201. if (ret == 2)
  202. return 0;
  203. else if (ret < 0)
  204. return ret;
  205. else
  206. return -EIO;
  207. }
  208. #endif
  209. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  210. static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
  211. unsigned int r)
  212. {
  213. u8 reg = r;
  214. u8 data;
  215. int ret;
  216. ret = do_i2c_read(codec, &reg, 1, &data, 1);
  217. if (ret < 0)
  218. return 0;
  219. return data;
  220. }
  221. #else
  222. #define snd_soc_8_8_read_i2c NULL
  223. #endif
  224. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  225. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  226. unsigned int r)
  227. {
  228. u8 reg = r;
  229. u16 data;
  230. int ret;
  231. ret = do_i2c_read(codec, &reg, 1, &data, 2);
  232. if (ret < 0)
  233. return 0;
  234. return (data >> 8) | ((data & 0xff) << 8);
  235. }
  236. #else
  237. #define snd_soc_8_16_read_i2c NULL
  238. #endif
  239. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  240. static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
  241. unsigned int r)
  242. {
  243. u16 reg = r;
  244. u8 data;
  245. int ret;
  246. ret = do_i2c_read(codec, &reg, 2, &data, 1);
  247. if (ret < 0)
  248. return 0;
  249. return data;
  250. }
  251. #else
  252. #define snd_soc_16_8_read_i2c NULL
  253. #endif
  254. static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
  255. unsigned int reg)
  256. {
  257. return do_hw_read(codec, reg);
  258. }
  259. static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
  260. unsigned int value)
  261. {
  262. u8 data[3];
  263. data[0] = (reg >> 8) & 0xff;
  264. data[1] = reg & 0xff;
  265. data[2] = value;
  266. reg &= 0xff;
  267. return do_hw_write(codec, reg, value, data, 3);
  268. }
  269. #if defined(CONFIG_SPI_MASTER)
  270. static int snd_soc_16_8_spi_write(void *control_data, const char *data,
  271. int len)
  272. {
  273. u8 msg[3];
  274. msg[0] = data[0];
  275. msg[1] = data[1];
  276. msg[2] = data[2];
  277. return do_spi_write(control_data, msg, len);
  278. }
  279. #else
  280. #define snd_soc_16_8_spi_write NULL
  281. #endif
  282. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  283. static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
  284. unsigned int r)
  285. {
  286. u16 reg = cpu_to_be16(r);
  287. u16 data;
  288. int ret;
  289. ret = do_i2c_read(codec, &reg, 2, &data, 2);
  290. if (ret < 0)
  291. return 0;
  292. return be16_to_cpu(data);
  293. }
  294. #else
  295. #define snd_soc_16_16_read_i2c NULL
  296. #endif
  297. static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
  298. unsigned int reg)
  299. {
  300. return do_hw_read(codec, reg);
  301. }
  302. static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
  303. unsigned int value)
  304. {
  305. u8 data[4];
  306. data[0] = (reg >> 8) & 0xff;
  307. data[1] = reg & 0xff;
  308. data[2] = (value >> 8) & 0xff;
  309. data[3] = value & 0xff;
  310. return do_hw_write(codec, reg, value, data, 4);
  311. }
  312. #if defined(CONFIG_SPI_MASTER)
  313. static int snd_soc_16_16_spi_write(void *control_data, const char *data,
  314. int len)
  315. {
  316. u8 msg[4];
  317. msg[0] = data[0];
  318. msg[1] = data[1];
  319. msg[2] = data[2];
  320. msg[3] = data[3];
  321. return do_spi_write(control_data, msg, len);
  322. }
  323. #else
  324. #define snd_soc_16_16_spi_write NULL
  325. #endif
  326. /* Primitive bulk write support for soc-cache. The data pointed to by `data' needs
  327. * to already be in the form the hardware expects including any leading register specific
  328. * data. Any data written through this function will not go through the cache as it
  329. * only handles writing to volatile or out of bounds registers.
  330. */
  331. static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
  332. const void *data, size_t len)
  333. {
  334. int ret;
  335. /* Ensure that the base register is volatile. Subsequently
  336. * any other register that is touched by this routine should be
  337. * volatile as well to ensure that we don't get out of sync with
  338. * the cache.
  339. */
  340. if (!snd_soc_codec_volatile_register(codec, reg)
  341. && reg < codec->driver->reg_cache_size)
  342. return -EINVAL;
  343. switch (codec->control_type) {
  344. case SND_SOC_I2C:
  345. ret = i2c_master_send(codec->control_data, data, len);
  346. break;
  347. case SND_SOC_SPI:
  348. ret = do_spi_write(codec->control_data, data, len);
  349. break;
  350. default:
  351. BUG();
  352. }
  353. if (ret == len)
  354. return 0;
  355. if (ret < 0)
  356. return ret;
  357. else
  358. return -EIO;
  359. }
  360. static struct {
  361. int addr_bits;
  362. int data_bits;
  363. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  364. int (*spi_write)(void *, const char *, int);
  365. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  366. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  367. } io_types[] = {
  368. {
  369. .addr_bits = 4, .data_bits = 12,
  370. .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
  371. .spi_write = snd_soc_4_12_spi_write,
  372. },
  373. {
  374. .addr_bits = 7, .data_bits = 9,
  375. .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
  376. .spi_write = snd_soc_7_9_spi_write,
  377. },
  378. {
  379. .addr_bits = 8, .data_bits = 8,
  380. .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
  381. .i2c_read = snd_soc_8_8_read_i2c,
  382. .spi_write = snd_soc_8_8_spi_write,
  383. },
  384. {
  385. .addr_bits = 8, .data_bits = 16,
  386. .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
  387. .i2c_read = snd_soc_8_16_read_i2c,
  388. .spi_write = snd_soc_8_16_spi_write,
  389. },
  390. {
  391. .addr_bits = 16, .data_bits = 8,
  392. .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
  393. .i2c_read = snd_soc_16_8_read_i2c,
  394. .spi_write = snd_soc_16_8_spi_write,
  395. },
  396. {
  397. .addr_bits = 16, .data_bits = 16,
  398. .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
  399. .i2c_read = snd_soc_16_16_read_i2c,
  400. .spi_write = snd_soc_16_16_spi_write,
  401. },
  402. };
  403. /**
  404. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  405. *
  406. * @codec: CODEC to configure.
  407. * @type: Type of cache.
  408. * @addr_bits: Number of bits of register address data.
  409. * @data_bits: Number of bits of data per register.
  410. * @control: Control bus used.
  411. *
  412. * Register formats are frequently shared between many I2C and SPI
  413. * devices. In order to promote code reuse the ASoC core provides
  414. * some standard implementations of CODEC read and write operations
  415. * which can be set up using this function.
  416. *
  417. * The caller is responsible for allocating and initialising the
  418. * actual cache.
  419. *
  420. * Note that at present this code cannot be used by CODECs with
  421. * volatile registers.
  422. */
  423. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  424. int addr_bits, int data_bits,
  425. enum snd_soc_control_type control)
  426. {
  427. int i;
  428. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  429. if (io_types[i].addr_bits == addr_bits &&
  430. io_types[i].data_bits == data_bits)
  431. break;
  432. if (i == ARRAY_SIZE(io_types)) {
  433. printk(KERN_ERR
  434. "No I/O functions for %d bit address %d bit data\n",
  435. addr_bits, data_bits);
  436. return -EINVAL;
  437. }
  438. codec->write = io_types[i].write;
  439. codec->read = io_types[i].read;
  440. codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
  441. switch (control) {
  442. case SND_SOC_CUSTOM:
  443. break;
  444. case SND_SOC_I2C:
  445. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  446. codec->hw_write = (hw_write_t)i2c_master_send;
  447. #endif
  448. if (io_types[i].i2c_read)
  449. codec->hw_read = io_types[i].i2c_read;
  450. codec->control_data = container_of(codec->dev,
  451. struct i2c_client,
  452. dev);
  453. break;
  454. case SND_SOC_SPI:
  455. if (io_types[i].spi_write)
  456. codec->hw_write = io_types[i].spi_write;
  457. codec->control_data = container_of(codec->dev,
  458. struct spi_device,
  459. dev);
  460. break;
  461. }
  462. return 0;
  463. }
  464. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
  465. static bool snd_soc_set_cache_val(void *base, unsigned int idx,
  466. unsigned int val, unsigned int word_size)
  467. {
  468. switch (word_size) {
  469. case 1: {
  470. u8 *cache = base;
  471. if (cache[idx] == val)
  472. return true;
  473. cache[idx] = val;
  474. break;
  475. }
  476. case 2: {
  477. u16 *cache = base;
  478. if (cache[idx] == val)
  479. return true;
  480. cache[idx] = val;
  481. break;
  482. }
  483. default:
  484. BUG();
  485. }
  486. return false;
  487. }
  488. static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
  489. unsigned int word_size)
  490. {
  491. switch (word_size) {
  492. case 1: {
  493. const u8 *cache = base;
  494. return cache[idx];
  495. }
  496. case 2: {
  497. const u16 *cache = base;
  498. return cache[idx];
  499. }
  500. default:
  501. BUG();
  502. }
  503. /* unreachable */
  504. return -1;
  505. }
  506. struct snd_soc_rbtree_node {
  507. struct rb_node node;
  508. unsigned int reg;
  509. unsigned int value;
  510. unsigned int defval;
  511. } __attribute__ ((packed));
  512. struct snd_soc_rbtree_ctx {
  513. struct rb_root root;
  514. };
  515. static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
  516. struct rb_root *root, unsigned int reg)
  517. {
  518. struct rb_node *node;
  519. struct snd_soc_rbtree_node *rbnode;
  520. node = root->rb_node;
  521. while (node) {
  522. rbnode = container_of(node, struct snd_soc_rbtree_node, node);
  523. if (rbnode->reg < reg)
  524. node = node->rb_left;
  525. else if (rbnode->reg > reg)
  526. node = node->rb_right;
  527. else
  528. return rbnode;
  529. }
  530. return NULL;
  531. }
  532. static int snd_soc_rbtree_insert(struct rb_root *root,
  533. struct snd_soc_rbtree_node *rbnode)
  534. {
  535. struct rb_node **new, *parent;
  536. struct snd_soc_rbtree_node *rbnode_tmp;
  537. parent = NULL;
  538. new = &root->rb_node;
  539. while (*new) {
  540. rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
  541. node);
  542. parent = *new;
  543. if (rbnode_tmp->reg < rbnode->reg)
  544. new = &((*new)->rb_left);
  545. else if (rbnode_tmp->reg > rbnode->reg)
  546. new = &((*new)->rb_right);
  547. else
  548. return 0;
  549. }
  550. /* insert the node into the rbtree */
  551. rb_link_node(&rbnode->node, parent, new);
  552. rb_insert_color(&rbnode->node, root);
  553. return 1;
  554. }
  555. static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
  556. {
  557. struct snd_soc_rbtree_ctx *rbtree_ctx;
  558. struct rb_node *node;
  559. struct snd_soc_rbtree_node *rbnode;
  560. unsigned int val;
  561. int ret;
  562. rbtree_ctx = codec->reg_cache;
  563. for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
  564. rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
  565. if (rbnode->value == rbnode->defval)
  566. continue;
  567. WARN_ON(codec->writable_register &&
  568. codec->writable_register(codec, rbnode->reg));
  569. ret = snd_soc_cache_read(codec, rbnode->reg, &val);
  570. if (ret)
  571. return ret;
  572. codec->cache_bypass = 1;
  573. ret = snd_soc_write(codec, rbnode->reg, val);
  574. codec->cache_bypass = 0;
  575. if (ret)
  576. return ret;
  577. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  578. rbnode->reg, val);
  579. }
  580. return 0;
  581. }
  582. static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
  583. unsigned int reg, unsigned int value)
  584. {
  585. struct snd_soc_rbtree_ctx *rbtree_ctx;
  586. struct snd_soc_rbtree_node *rbnode;
  587. rbtree_ctx = codec->reg_cache;
  588. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  589. if (rbnode) {
  590. if (rbnode->value == value)
  591. return 0;
  592. rbnode->value = value;
  593. } else {
  594. /* bail out early, no need to create the rbnode yet */
  595. if (!value)
  596. return 0;
  597. /*
  598. * for uninitialized registers whose value is changed
  599. * from the default zero, create an rbnode and insert
  600. * it into the tree.
  601. */
  602. rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
  603. if (!rbnode)
  604. return -ENOMEM;
  605. rbnode->reg = reg;
  606. rbnode->value = value;
  607. snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
  608. }
  609. return 0;
  610. }
  611. static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
  612. unsigned int reg, unsigned int *value)
  613. {
  614. struct snd_soc_rbtree_ctx *rbtree_ctx;
  615. struct snd_soc_rbtree_node *rbnode;
  616. rbtree_ctx = codec->reg_cache;
  617. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  618. if (rbnode) {
  619. *value = rbnode->value;
  620. } else {
  621. /* uninitialized registers default to 0 */
  622. *value = 0;
  623. }
  624. return 0;
  625. }
  626. static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
  627. {
  628. struct rb_node *next;
  629. struct snd_soc_rbtree_ctx *rbtree_ctx;
  630. struct snd_soc_rbtree_node *rbtree_node;
  631. /* if we've already been called then just return */
  632. rbtree_ctx = codec->reg_cache;
  633. if (!rbtree_ctx)
  634. return 0;
  635. /* free up the rbtree */
  636. next = rb_first(&rbtree_ctx->root);
  637. while (next) {
  638. rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
  639. next = rb_next(&rbtree_node->node);
  640. rb_erase(&rbtree_node->node, &rbtree_ctx->root);
  641. kfree(rbtree_node);
  642. }
  643. /* release the resources */
  644. kfree(codec->reg_cache);
  645. codec->reg_cache = NULL;
  646. return 0;
  647. }
  648. static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
  649. {
  650. struct snd_soc_rbtree_node *rbtree_node;
  651. struct snd_soc_rbtree_ctx *rbtree_ctx;
  652. unsigned int val;
  653. unsigned int word_size;
  654. int i;
  655. int ret;
  656. codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
  657. if (!codec->reg_cache)
  658. return -ENOMEM;
  659. rbtree_ctx = codec->reg_cache;
  660. rbtree_ctx->root = RB_ROOT;
  661. if (!codec->reg_def_copy)
  662. return 0;
  663. /*
  664. * populate the rbtree with the initialized registers. All other
  665. * registers will be inserted when they are first modified.
  666. */
  667. word_size = codec->driver->reg_word_size;
  668. for (i = 0; i < codec->driver->reg_cache_size; ++i) {
  669. val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
  670. if (!val)
  671. continue;
  672. rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
  673. if (!rbtree_node) {
  674. ret = -ENOMEM;
  675. snd_soc_cache_exit(codec);
  676. break;
  677. }
  678. rbtree_node->reg = i;
  679. rbtree_node->value = val;
  680. rbtree_node->defval = val;
  681. snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
  682. }
  683. return 0;
  684. }
  685. #ifdef CONFIG_SND_SOC_CACHE_LZO
  686. struct snd_soc_lzo_ctx {
  687. void *wmem;
  688. void *dst;
  689. const void *src;
  690. size_t src_len;
  691. size_t dst_len;
  692. size_t decompressed_size;
  693. unsigned long *sync_bmp;
  694. int sync_bmp_nbits;
  695. };
  696. #define LZO_BLOCK_NUM 8
  697. static int snd_soc_lzo_block_count(void)
  698. {
  699. return LZO_BLOCK_NUM;
  700. }
  701. static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
  702. {
  703. lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
  704. if (!lzo_ctx->wmem)
  705. return -ENOMEM;
  706. return 0;
  707. }
  708. static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
  709. {
  710. size_t compress_size;
  711. int ret;
  712. ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
  713. lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
  714. if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
  715. return -EINVAL;
  716. lzo_ctx->dst_len = compress_size;
  717. return 0;
  718. }
  719. static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
  720. {
  721. size_t dst_len;
  722. int ret;
  723. dst_len = lzo_ctx->dst_len;
  724. ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
  725. lzo_ctx->dst, &dst_len);
  726. if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
  727. return -EINVAL;
  728. return 0;
  729. }
  730. static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
  731. struct snd_soc_lzo_ctx *lzo_ctx)
  732. {
  733. int ret;
  734. lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
  735. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  736. if (!lzo_ctx->dst) {
  737. lzo_ctx->dst_len = 0;
  738. return -ENOMEM;
  739. }
  740. ret = snd_soc_lzo_compress(lzo_ctx);
  741. if (ret < 0)
  742. return ret;
  743. return 0;
  744. }
  745. static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
  746. struct snd_soc_lzo_ctx *lzo_ctx)
  747. {
  748. int ret;
  749. lzo_ctx->dst_len = lzo_ctx->decompressed_size;
  750. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  751. if (!lzo_ctx->dst) {
  752. lzo_ctx->dst_len = 0;
  753. return -ENOMEM;
  754. }
  755. ret = snd_soc_lzo_decompress(lzo_ctx);
  756. if (ret < 0)
  757. return ret;
  758. return 0;
  759. }
  760. static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
  761. unsigned int reg)
  762. {
  763. const struct snd_soc_codec_driver *codec_drv;
  764. codec_drv = codec->driver;
  765. return (reg * codec_drv->reg_word_size) /
  766. DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  767. }
  768. static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
  769. unsigned int reg)
  770. {
  771. const struct snd_soc_codec_driver *codec_drv;
  772. codec_drv = codec->driver;
  773. return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
  774. codec_drv->reg_word_size);
  775. }
  776. static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
  777. {
  778. const struct snd_soc_codec_driver *codec_drv;
  779. codec_drv = codec->driver;
  780. return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  781. }
  782. static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
  783. {
  784. struct snd_soc_lzo_ctx **lzo_blocks;
  785. unsigned int val;
  786. int i;
  787. int ret;
  788. lzo_blocks = codec->reg_cache;
  789. for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
  790. WARN_ON(codec->writable_register &&
  791. codec->writable_register(codec, i));
  792. ret = snd_soc_cache_read(codec, i, &val);
  793. if (ret)
  794. return ret;
  795. codec->cache_bypass = 1;
  796. ret = snd_soc_write(codec, i, val);
  797. codec->cache_bypass = 0;
  798. if (ret)
  799. return ret;
  800. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  801. i, val);
  802. }
  803. return 0;
  804. }
  805. static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
  806. unsigned int reg, unsigned int value)
  807. {
  808. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  809. int ret, blkindex, blkpos;
  810. size_t blksize, tmp_dst_len;
  811. void *tmp_dst;
  812. /* index of the compressed lzo block */
  813. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  814. /* register index within the decompressed block */
  815. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  816. /* size of the compressed block */
  817. blksize = snd_soc_lzo_get_blksize(codec);
  818. lzo_blocks = codec->reg_cache;
  819. lzo_block = lzo_blocks[blkindex];
  820. /* save the pointer and length of the compressed block */
  821. tmp_dst = lzo_block->dst;
  822. tmp_dst_len = lzo_block->dst_len;
  823. /* prepare the source to be the compressed block */
  824. lzo_block->src = lzo_block->dst;
  825. lzo_block->src_len = lzo_block->dst_len;
  826. /* decompress the block */
  827. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  828. if (ret < 0) {
  829. kfree(lzo_block->dst);
  830. goto out;
  831. }
  832. /* write the new value to the cache */
  833. if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
  834. codec->driver->reg_word_size)) {
  835. kfree(lzo_block->dst);
  836. goto out;
  837. }
  838. /* prepare the source to be the decompressed block */
  839. lzo_block->src = lzo_block->dst;
  840. lzo_block->src_len = lzo_block->dst_len;
  841. /* compress the block */
  842. ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
  843. if (ret < 0) {
  844. kfree(lzo_block->dst);
  845. kfree(lzo_block->src);
  846. goto out;
  847. }
  848. /* set the bit so we know we have to sync this register */
  849. set_bit(reg, lzo_block->sync_bmp);
  850. kfree(tmp_dst);
  851. kfree(lzo_block->src);
  852. return 0;
  853. out:
  854. lzo_block->dst = tmp_dst;
  855. lzo_block->dst_len = tmp_dst_len;
  856. return ret;
  857. }
  858. static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
  859. unsigned int reg, unsigned int *value)
  860. {
  861. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  862. int ret, blkindex, blkpos;
  863. size_t blksize, tmp_dst_len;
  864. void *tmp_dst;
  865. *value = 0;
  866. /* index of the compressed lzo block */
  867. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  868. /* register index within the decompressed block */
  869. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  870. /* size of the compressed block */
  871. blksize = snd_soc_lzo_get_blksize(codec);
  872. lzo_blocks = codec->reg_cache;
  873. lzo_block = lzo_blocks[blkindex];
  874. /* save the pointer and length of the compressed block */
  875. tmp_dst = lzo_block->dst;
  876. tmp_dst_len = lzo_block->dst_len;
  877. /* prepare the source to be the compressed block */
  878. lzo_block->src = lzo_block->dst;
  879. lzo_block->src_len = lzo_block->dst_len;
  880. /* decompress the block */
  881. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  882. if (ret >= 0)
  883. /* fetch the value from the cache */
  884. *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
  885. codec->driver->reg_word_size);
  886. kfree(lzo_block->dst);
  887. /* restore the pointer and length of the compressed block */
  888. lzo_block->dst = tmp_dst;
  889. lzo_block->dst_len = tmp_dst_len;
  890. return 0;
  891. }
  892. static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
  893. {
  894. struct snd_soc_lzo_ctx **lzo_blocks;
  895. int i, blkcount;
  896. lzo_blocks = codec->reg_cache;
  897. if (!lzo_blocks)
  898. return 0;
  899. blkcount = snd_soc_lzo_block_count();
  900. /*
  901. * the pointer to the bitmap used for syncing the cache
  902. * is shared amongst all lzo_blocks. Ensure it is freed
  903. * only once.
  904. */
  905. if (lzo_blocks[0])
  906. kfree(lzo_blocks[0]->sync_bmp);
  907. for (i = 0; i < blkcount; ++i) {
  908. if (lzo_blocks[i]) {
  909. kfree(lzo_blocks[i]->wmem);
  910. kfree(lzo_blocks[i]->dst);
  911. }
  912. /* each lzo_block is a pointer returned by kmalloc or NULL */
  913. kfree(lzo_blocks[i]);
  914. }
  915. kfree(lzo_blocks);
  916. codec->reg_cache = NULL;
  917. return 0;
  918. }
  919. static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
  920. {
  921. struct snd_soc_lzo_ctx **lzo_blocks;
  922. size_t bmp_size;
  923. const struct snd_soc_codec_driver *codec_drv;
  924. int ret, tofree, i, blksize, blkcount;
  925. const char *p, *end;
  926. unsigned long *sync_bmp;
  927. ret = 0;
  928. codec_drv = codec->driver;
  929. /*
  930. * If we have not been given a default register cache
  931. * then allocate a dummy zero-ed out region, compress it
  932. * and remember to free it afterwards.
  933. */
  934. tofree = 0;
  935. if (!codec->reg_def_copy)
  936. tofree = 1;
  937. if (!codec->reg_def_copy) {
  938. codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
  939. if (!codec->reg_def_copy)
  940. return -ENOMEM;
  941. }
  942. blkcount = snd_soc_lzo_block_count();
  943. codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
  944. GFP_KERNEL);
  945. if (!codec->reg_cache) {
  946. ret = -ENOMEM;
  947. goto err_tofree;
  948. }
  949. lzo_blocks = codec->reg_cache;
  950. /*
  951. * allocate a bitmap to be used when syncing the cache with
  952. * the hardware. Each time a register is modified, the corresponding
  953. * bit is set in the bitmap, so we know that we have to sync
  954. * that register.
  955. */
  956. bmp_size = codec_drv->reg_cache_size;
  957. sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
  958. GFP_KERNEL);
  959. if (!sync_bmp) {
  960. ret = -ENOMEM;
  961. goto err;
  962. }
  963. bitmap_zero(sync_bmp, bmp_size);
  964. /* allocate the lzo blocks and initialize them */
  965. for (i = 0; i < blkcount; ++i) {
  966. lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
  967. GFP_KERNEL);
  968. if (!lzo_blocks[i]) {
  969. kfree(sync_bmp);
  970. ret = -ENOMEM;
  971. goto err;
  972. }
  973. lzo_blocks[i]->sync_bmp = sync_bmp;
  974. lzo_blocks[i]->sync_bmp_nbits = bmp_size;
  975. /* alloc the working space for the compressed block */
  976. ret = snd_soc_lzo_prepare(lzo_blocks[i]);
  977. if (ret < 0)
  978. goto err;
  979. }
  980. blksize = snd_soc_lzo_get_blksize(codec);
  981. p = codec->reg_def_copy;
  982. end = codec->reg_def_copy + codec->reg_size;
  983. /* compress the register map and fill the lzo blocks */
  984. for (i = 0; i < blkcount; ++i, p += blksize) {
  985. lzo_blocks[i]->src = p;
  986. if (p + blksize > end)
  987. lzo_blocks[i]->src_len = end - p;
  988. else
  989. lzo_blocks[i]->src_len = blksize;
  990. ret = snd_soc_lzo_compress_cache_block(codec,
  991. lzo_blocks[i]);
  992. if (ret < 0)
  993. goto err;
  994. lzo_blocks[i]->decompressed_size =
  995. lzo_blocks[i]->src_len;
  996. }
  997. if (tofree) {
  998. kfree(codec->reg_def_copy);
  999. codec->reg_def_copy = NULL;
  1000. }
  1001. return 0;
  1002. err:
  1003. snd_soc_cache_exit(codec);
  1004. err_tofree:
  1005. if (tofree) {
  1006. kfree(codec->reg_def_copy);
  1007. codec->reg_def_copy = NULL;
  1008. }
  1009. return ret;
  1010. }
  1011. #endif
  1012. static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
  1013. {
  1014. int i;
  1015. int ret;
  1016. const struct snd_soc_codec_driver *codec_drv;
  1017. unsigned int val;
  1018. codec_drv = codec->driver;
  1019. for (i = 0; i < codec_drv->reg_cache_size; ++i) {
  1020. WARN_ON(codec->writable_register &&
  1021. codec->writable_register(codec, i));
  1022. ret = snd_soc_cache_read(codec, i, &val);
  1023. if (ret)
  1024. return ret;
  1025. if (codec->reg_def_copy)
  1026. if (snd_soc_get_cache_val(codec->reg_def_copy,
  1027. i, codec_drv->reg_word_size) == val)
  1028. continue;
  1029. ret = snd_soc_write(codec, i, val);
  1030. if (ret)
  1031. return ret;
  1032. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  1033. i, val);
  1034. }
  1035. return 0;
  1036. }
  1037. static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
  1038. unsigned int reg, unsigned int value)
  1039. {
  1040. snd_soc_set_cache_val(codec->reg_cache, reg, value,
  1041. codec->driver->reg_word_size);
  1042. return 0;
  1043. }
  1044. static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
  1045. unsigned int reg, unsigned int *value)
  1046. {
  1047. *value = snd_soc_get_cache_val(codec->reg_cache, reg,
  1048. codec->driver->reg_word_size);
  1049. return 0;
  1050. }
  1051. static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
  1052. {
  1053. if (!codec->reg_cache)
  1054. return 0;
  1055. kfree(codec->reg_cache);
  1056. codec->reg_cache = NULL;
  1057. return 0;
  1058. }
  1059. static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
  1060. {
  1061. const struct snd_soc_codec_driver *codec_drv;
  1062. codec_drv = codec->driver;
  1063. if (codec->reg_def_copy)
  1064. codec->reg_cache = kmemdup(codec->reg_def_copy,
  1065. codec->reg_size, GFP_KERNEL);
  1066. else
  1067. codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
  1068. if (!codec->reg_cache)
  1069. return -ENOMEM;
  1070. return 0;
  1071. }
  1072. /* an array of all supported compression types */
  1073. static const struct snd_soc_cache_ops cache_types[] = {
  1074. /* Flat *must* be the first entry for fallback */
  1075. {
  1076. .id = SND_SOC_FLAT_COMPRESSION,
  1077. .name = "flat",
  1078. .init = snd_soc_flat_cache_init,
  1079. .exit = snd_soc_flat_cache_exit,
  1080. .read = snd_soc_flat_cache_read,
  1081. .write = snd_soc_flat_cache_write,
  1082. .sync = snd_soc_flat_cache_sync
  1083. },
  1084. #ifdef CONFIG_SND_SOC_CACHE_LZO
  1085. {
  1086. .id = SND_SOC_LZO_COMPRESSION,
  1087. .name = "LZO",
  1088. .init = snd_soc_lzo_cache_init,
  1089. .exit = snd_soc_lzo_cache_exit,
  1090. .read = snd_soc_lzo_cache_read,
  1091. .write = snd_soc_lzo_cache_write,
  1092. .sync = snd_soc_lzo_cache_sync
  1093. },
  1094. #endif
  1095. {
  1096. .id = SND_SOC_RBTREE_COMPRESSION,
  1097. .name = "rbtree",
  1098. .init = snd_soc_rbtree_cache_init,
  1099. .exit = snd_soc_rbtree_cache_exit,
  1100. .read = snd_soc_rbtree_cache_read,
  1101. .write = snd_soc_rbtree_cache_write,
  1102. .sync = snd_soc_rbtree_cache_sync
  1103. }
  1104. };
  1105. int snd_soc_cache_init(struct snd_soc_codec *codec)
  1106. {
  1107. int i;
  1108. for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
  1109. if (cache_types[i].id == codec->compress_type)
  1110. break;
  1111. /* Fall back to flat compression */
  1112. if (i == ARRAY_SIZE(cache_types)) {
  1113. dev_warn(codec->dev, "Could not match compress type: %d\n",
  1114. codec->compress_type);
  1115. i = 0;
  1116. }
  1117. mutex_init(&codec->cache_rw_mutex);
  1118. codec->cache_ops = &cache_types[i];
  1119. if (codec->cache_ops->init) {
  1120. if (codec->cache_ops->name)
  1121. dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
  1122. codec->cache_ops->name, codec->name);
  1123. return codec->cache_ops->init(codec);
  1124. }
  1125. return -ENOSYS;
  1126. }
  1127. /*
  1128. * NOTE: keep in mind that this function might be called
  1129. * multiple times.
  1130. */
  1131. int snd_soc_cache_exit(struct snd_soc_codec *codec)
  1132. {
  1133. if (codec->cache_ops && codec->cache_ops->exit) {
  1134. if (codec->cache_ops->name)
  1135. dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
  1136. codec->cache_ops->name, codec->name);
  1137. return codec->cache_ops->exit(codec);
  1138. }
  1139. return -ENOSYS;
  1140. }
  1141. /**
  1142. * snd_soc_cache_read: Fetch the value of a given register from the cache.
  1143. *
  1144. * @codec: CODEC to configure.
  1145. * @reg: The register index.
  1146. * @value: The value to be returned.
  1147. */
  1148. int snd_soc_cache_read(struct snd_soc_codec *codec,
  1149. unsigned int reg, unsigned int *value)
  1150. {
  1151. int ret;
  1152. mutex_lock(&codec->cache_rw_mutex);
  1153. if (value && codec->cache_ops && codec->cache_ops->read) {
  1154. ret = codec->cache_ops->read(codec, reg, value);
  1155. mutex_unlock(&codec->cache_rw_mutex);
  1156. return ret;
  1157. }
  1158. mutex_unlock(&codec->cache_rw_mutex);
  1159. return -ENOSYS;
  1160. }
  1161. EXPORT_SYMBOL_GPL(snd_soc_cache_read);
  1162. /**
  1163. * snd_soc_cache_write: Set the value of a given register in the cache.
  1164. *
  1165. * @codec: CODEC to configure.
  1166. * @reg: The register index.
  1167. * @value: The new register value.
  1168. */
  1169. int snd_soc_cache_write(struct snd_soc_codec *codec,
  1170. unsigned int reg, unsigned int value)
  1171. {
  1172. int ret;
  1173. mutex_lock(&codec->cache_rw_mutex);
  1174. if (codec->cache_ops && codec->cache_ops->write) {
  1175. ret = codec->cache_ops->write(codec, reg, value);
  1176. mutex_unlock(&codec->cache_rw_mutex);
  1177. return ret;
  1178. }
  1179. mutex_unlock(&codec->cache_rw_mutex);
  1180. return -ENOSYS;
  1181. }
  1182. EXPORT_SYMBOL_GPL(snd_soc_cache_write);
  1183. /**
  1184. * snd_soc_cache_sync: Sync the register cache with the hardware.
  1185. *
  1186. * @codec: CODEC to configure.
  1187. *
  1188. * Any registers that should not be synced should be marked as
  1189. * volatile. In general drivers can choose not to use the provided
  1190. * syncing functionality if they so require.
  1191. */
  1192. int snd_soc_cache_sync(struct snd_soc_codec *codec)
  1193. {
  1194. int ret;
  1195. const char *name;
  1196. if (!codec->cache_sync) {
  1197. return 0;
  1198. }
  1199. if (!codec->cache_ops || !codec->cache_ops->sync)
  1200. return -ENOSYS;
  1201. if (codec->cache_ops->name)
  1202. name = codec->cache_ops->name;
  1203. else
  1204. name = "unknown";
  1205. if (codec->cache_ops->name)
  1206. dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
  1207. codec->cache_ops->name, codec->name);
  1208. trace_snd_soc_cache_sync(codec, name, "start");
  1209. ret = codec->cache_ops->sync(codec);
  1210. if (!ret)
  1211. codec->cache_sync = 0;
  1212. trace_snd_soc_cache_sync(codec, name, "end");
  1213. return ret;
  1214. }
  1215. EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
  1216. static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
  1217. unsigned int reg)
  1218. {
  1219. const struct snd_soc_codec_driver *codec_drv;
  1220. unsigned int min, max, index;
  1221. codec_drv = codec->driver;
  1222. min = 0;
  1223. max = codec_drv->reg_access_size - 1;
  1224. do {
  1225. index = (min + max) / 2;
  1226. if (codec_drv->reg_access_default[index].reg == reg)
  1227. return index;
  1228. if (codec_drv->reg_access_default[index].reg < reg)
  1229. min = index + 1;
  1230. else
  1231. max = index;
  1232. } while (min <= max);
  1233. return -1;
  1234. }
  1235. int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
  1236. unsigned int reg)
  1237. {
  1238. int index;
  1239. if (reg >= codec->driver->reg_cache_size)
  1240. return 1;
  1241. index = snd_soc_get_reg_access_index(codec, reg);
  1242. if (index < 0)
  1243. return 0;
  1244. return codec->driver->reg_access_default[index].vol;
  1245. }
  1246. EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
  1247. int snd_soc_default_readable_register(struct snd_soc_codec *codec,
  1248. unsigned int reg)
  1249. {
  1250. int index;
  1251. if (reg >= codec->driver->reg_cache_size)
  1252. return 1;
  1253. index = snd_soc_get_reg_access_index(codec, reg);
  1254. if (index < 0)
  1255. return 0;
  1256. return codec->driver->reg_access_default[index].read;
  1257. }
  1258. EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);
  1259. int snd_soc_default_writable_register(struct snd_soc_codec *codec,
  1260. unsigned int reg)
  1261. {
  1262. int index;
  1263. if (reg >= codec->driver->reg_cache_size)
  1264. return 1;
  1265. index = snd_soc_get_reg_access_index(codec, reg);
  1266. if (index < 0)
  1267. return 0;
  1268. return codec->driver->reg_access_default[index].write;
  1269. }
  1270. EXPORT_SYMBOL_GPL(snd_soc_default_writable_register);