rt2x00queue.c 34 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299
  1. /*
  2. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  3. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  4. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  5. <http://rt2x00.serialmonkey.com>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the
  16. Free Software Foundation, Inc.,
  17. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18. */
  19. /*
  20. Module: rt2x00lib
  21. Abstract: rt2x00 queue specific routines.
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/kernel.h>
  25. #include <linux/module.h>
  26. #include <linux/dma-mapping.h>
  27. #include "rt2x00.h"
  28. #include "rt2x00lib.h"
  29. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)
  30. {
  31. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  32. struct sk_buff *skb;
  33. struct skb_frame_desc *skbdesc;
  34. unsigned int frame_size;
  35. unsigned int head_size = 0;
  36. unsigned int tail_size = 0;
  37. /*
  38. * The frame size includes descriptor size, because the
  39. * hardware directly receive the frame into the skbuffer.
  40. */
  41. frame_size = entry->queue->data_size + entry->queue->desc_size;
  42. /*
  43. * The payload should be aligned to a 4-byte boundary,
  44. * this means we need at least 3 bytes for moving the frame
  45. * into the correct offset.
  46. */
  47. head_size = 4;
  48. /*
  49. * For IV/EIV/ICV assembly we must make sure there is
  50. * at least 8 bytes bytes available in headroom for IV/EIV
  51. * and 8 bytes for ICV data as tailroon.
  52. */
  53. if (test_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags)) {
  54. head_size += 8;
  55. tail_size += 8;
  56. }
  57. /*
  58. * Allocate skbuffer.
  59. */
  60. skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);
  61. if (!skb)
  62. return NULL;
  63. /*
  64. * Make sure we not have a frame with the requested bytes
  65. * available in the head and tail.
  66. */
  67. skb_reserve(skb, head_size);
  68. skb_put(skb, frame_size);
  69. /*
  70. * Populate skbdesc.
  71. */
  72. skbdesc = get_skb_frame_desc(skb);
  73. memset(skbdesc, 0, sizeof(*skbdesc));
  74. skbdesc->entry = entry;
  75. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags)) {
  76. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  77. skb->data,
  78. skb->len,
  79. DMA_FROM_DEVICE);
  80. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  81. }
  82. return skb;
  83. }
  84. void rt2x00queue_map_txskb(struct queue_entry *entry)
  85. {
  86. struct device *dev = entry->queue->rt2x00dev->dev;
  87. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  88. skbdesc->skb_dma =
  89. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  90. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  91. }
  92. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  93. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  94. {
  95. struct device *dev = entry->queue->rt2x00dev->dev;
  96. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  97. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  98. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  99. DMA_FROM_DEVICE);
  100. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  101. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  102. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  103. DMA_TO_DEVICE);
  104. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  105. }
  106. }
  107. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  108. void rt2x00queue_free_skb(struct queue_entry *entry)
  109. {
  110. if (!entry->skb)
  111. return;
  112. rt2x00queue_unmap_skb(entry);
  113. dev_kfree_skb_any(entry->skb);
  114. entry->skb = NULL;
  115. }
  116. void rt2x00queue_align_frame(struct sk_buff *skb)
  117. {
  118. unsigned int frame_length = skb->len;
  119. unsigned int align = ALIGN_SIZE(skb, 0);
  120. if (!align)
  121. return;
  122. skb_push(skb, align);
  123. memmove(skb->data, skb->data + align, frame_length);
  124. skb_trim(skb, frame_length);
  125. }
  126. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  127. {
  128. unsigned int payload_length = skb->len - header_length;
  129. unsigned int header_align = ALIGN_SIZE(skb, 0);
  130. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  131. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  132. /*
  133. * Adjust the header alignment if the payload needs to be moved more
  134. * than the header.
  135. */
  136. if (payload_align > header_align)
  137. header_align += 4;
  138. /* There is nothing to do if no alignment is needed */
  139. if (!header_align)
  140. return;
  141. /* Reserve the amount of space needed in front of the frame */
  142. skb_push(skb, header_align);
  143. /*
  144. * Move the header.
  145. */
  146. memmove(skb->data, skb->data + header_align, header_length);
  147. /* Move the payload, if present and if required */
  148. if (payload_length && payload_align)
  149. memmove(skb->data + header_length + l2pad,
  150. skb->data + header_length + l2pad + payload_align,
  151. payload_length);
  152. /* Trim the skb to the correct size */
  153. skb_trim(skb, header_length + l2pad + payload_length);
  154. }
  155. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  156. {
  157. /*
  158. * L2 padding is only present if the skb contains more than just the
  159. * IEEE 802.11 header.
  160. */
  161. unsigned int l2pad = (skb->len > header_length) ?
  162. L2PAD_SIZE(header_length) : 0;
  163. if (!l2pad)
  164. return;
  165. memmove(skb->data + l2pad, skb->data, header_length);
  166. skb_pull(skb, l2pad);
  167. }
  168. static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
  169. struct sk_buff *skb,
  170. struct txentry_desc *txdesc)
  171. {
  172. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  173. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  174. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  175. u16 seqno;
  176. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  177. return;
  178. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  179. if (!test_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags)) {
  180. /*
  181. * rt2800 has a H/W (or F/W) bug, device incorrectly increase
  182. * seqno on retransmited data (non-QOS) frames. To workaround
  183. * the problem let's generate seqno in software if QOS is
  184. * disabled.
  185. */
  186. if (test_bit(CONFIG_QOS_DISABLED, &rt2x00dev->flags))
  187. __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  188. else
  189. /* H/W will generate sequence number */
  190. return;
  191. }
  192. /*
  193. * The hardware is not able to insert a sequence number. Assign a
  194. * software generated one here.
  195. *
  196. * This is wrong because beacons are not getting sequence
  197. * numbers assigned properly.
  198. *
  199. * A secondary problem exists for drivers that cannot toggle
  200. * sequence counting per-frame, since those will override the
  201. * sequence counter given by mac80211.
  202. */
  203. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  204. seqno = atomic_add_return(0x10, &intf->seqno);
  205. else
  206. seqno = atomic_read(&intf->seqno);
  207. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  208. hdr->seq_ctrl |= cpu_to_le16(seqno);
  209. }
  210. static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
  211. struct sk_buff *skb,
  212. struct txentry_desc *txdesc,
  213. const struct rt2x00_rate *hwrate)
  214. {
  215. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  216. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  217. unsigned int data_length;
  218. unsigned int duration;
  219. unsigned int residual;
  220. /*
  221. * Determine with what IFS priority this frame should be send.
  222. * Set ifs to IFS_SIFS when the this is not the first fragment,
  223. * or this fragment came after RTS/CTS.
  224. */
  225. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  226. txdesc->u.plcp.ifs = IFS_BACKOFF;
  227. else
  228. txdesc->u.plcp.ifs = IFS_SIFS;
  229. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  230. data_length = skb->len + 4;
  231. data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
  232. /*
  233. * PLCP setup
  234. * Length calculation depends on OFDM/CCK rate.
  235. */
  236. txdesc->u.plcp.signal = hwrate->plcp;
  237. txdesc->u.plcp.service = 0x04;
  238. if (hwrate->flags & DEV_RATE_OFDM) {
  239. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  240. txdesc->u.plcp.length_low = data_length & 0x3f;
  241. } else {
  242. /*
  243. * Convert length to microseconds.
  244. */
  245. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  246. duration = GET_DURATION(data_length, hwrate->bitrate);
  247. if (residual != 0) {
  248. duration++;
  249. /*
  250. * Check if we need to set the Length Extension
  251. */
  252. if (hwrate->bitrate == 110 && residual <= 30)
  253. txdesc->u.plcp.service |= 0x80;
  254. }
  255. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  256. txdesc->u.plcp.length_low = duration & 0xff;
  257. /*
  258. * When preamble is enabled we should set the
  259. * preamble bit for the signal.
  260. */
  261. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  262. txdesc->u.plcp.signal |= 0x08;
  263. }
  264. }
  265. static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
  266. struct sk_buff *skb,
  267. struct txentry_desc *txdesc,
  268. struct ieee80211_sta *sta,
  269. const struct rt2x00_rate *hwrate)
  270. {
  271. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  272. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  273. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  274. struct rt2x00_sta *sta_priv = NULL;
  275. if (sta) {
  276. txdesc->u.ht.mpdu_density =
  277. sta->ht_cap.ampdu_density;
  278. sta_priv = sta_to_rt2x00_sta(sta);
  279. txdesc->u.ht.wcid = sta_priv->wcid;
  280. }
  281. /*
  282. * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
  283. * mcs rate to be used
  284. */
  285. if (txrate->flags & IEEE80211_TX_RC_MCS) {
  286. txdesc->u.ht.mcs = txrate->idx;
  287. /*
  288. * MIMO PS should be set to 1 for STA's using dynamic SM PS
  289. * when using more then one tx stream (>MCS7).
  290. */
  291. if (sta && txdesc->u.ht.mcs > 7 &&
  292. ((sta->ht_cap.cap &
  293. IEEE80211_HT_CAP_SM_PS) >>
  294. IEEE80211_HT_CAP_SM_PS_SHIFT) ==
  295. WLAN_HT_CAP_SM_PS_DYNAMIC)
  296. __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
  297. } else {
  298. txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
  299. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  300. txdesc->u.ht.mcs |= 0x08;
  301. }
  302. if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) {
  303. if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  304. txdesc->u.ht.txop = TXOP_SIFS;
  305. else
  306. txdesc->u.ht.txop = TXOP_BACKOFF;
  307. /* Left zero on all other settings. */
  308. return;
  309. }
  310. txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
  311. /*
  312. * Only one STBC stream is supported for now.
  313. */
  314. if (tx_info->flags & IEEE80211_TX_CTL_STBC)
  315. txdesc->u.ht.stbc = 1;
  316. /*
  317. * This frame is eligible for an AMPDU, however, don't aggregate
  318. * frames that are intended to probe a specific tx rate.
  319. */
  320. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
  321. !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
  322. __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
  323. /*
  324. * Set 40Mhz mode if necessary (for legacy rates this will
  325. * duplicate the frame to both channels).
  326. */
  327. if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
  328. txrate->flags & IEEE80211_TX_RC_DUP_DATA)
  329. __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
  330. if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
  331. __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
  332. /*
  333. * Determine IFS values
  334. * - Use TXOP_BACKOFF for management frames except beacons
  335. * - Use TXOP_SIFS for fragment bursts
  336. * - Use TXOP_HTTXOP for everything else
  337. *
  338. * Note: rt2800 devices won't use CTS protection (if used)
  339. * for frames not transmitted with TXOP_HTTXOP
  340. */
  341. if (ieee80211_is_mgmt(hdr->frame_control) &&
  342. !ieee80211_is_beacon(hdr->frame_control))
  343. txdesc->u.ht.txop = TXOP_BACKOFF;
  344. else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  345. txdesc->u.ht.txop = TXOP_SIFS;
  346. else
  347. txdesc->u.ht.txop = TXOP_HTTXOP;
  348. }
  349. static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
  350. struct sk_buff *skb,
  351. struct txentry_desc *txdesc,
  352. struct ieee80211_sta *sta)
  353. {
  354. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  355. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  356. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  357. struct ieee80211_rate *rate;
  358. const struct rt2x00_rate *hwrate = NULL;
  359. memset(txdesc, 0, sizeof(*txdesc));
  360. /*
  361. * Header and frame information.
  362. */
  363. txdesc->length = skb->len;
  364. txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
  365. /*
  366. * Check whether this frame is to be acked.
  367. */
  368. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  369. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  370. /*
  371. * Check if this is a RTS/CTS frame
  372. */
  373. if (ieee80211_is_rts(hdr->frame_control) ||
  374. ieee80211_is_cts(hdr->frame_control)) {
  375. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  376. if (ieee80211_is_rts(hdr->frame_control))
  377. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  378. else
  379. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  380. if (tx_info->control.rts_cts_rate_idx >= 0)
  381. rate =
  382. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  383. }
  384. /*
  385. * Determine retry information.
  386. */
  387. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  388. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  389. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  390. /*
  391. * Check if more fragments are pending
  392. */
  393. if (ieee80211_has_morefrags(hdr->frame_control)) {
  394. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  395. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  396. }
  397. /*
  398. * Check if more frames (!= fragments) are pending
  399. */
  400. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  401. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  402. /*
  403. * Beacons and probe responses require the tsf timestamp
  404. * to be inserted into the frame.
  405. */
  406. if (ieee80211_is_beacon(hdr->frame_control) ||
  407. ieee80211_is_probe_resp(hdr->frame_control))
  408. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  409. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  410. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  411. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  412. /*
  413. * Determine rate modulation.
  414. */
  415. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  416. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  417. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  418. txdesc->rate_mode = RATE_MODE_HT_MIX;
  419. else {
  420. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  421. hwrate = rt2x00_get_rate(rate->hw_value);
  422. if (hwrate->flags & DEV_RATE_OFDM)
  423. txdesc->rate_mode = RATE_MODE_OFDM;
  424. else
  425. txdesc->rate_mode = RATE_MODE_CCK;
  426. }
  427. /*
  428. * Apply TX descriptor handling by components
  429. */
  430. rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
  431. rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
  432. if (test_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags))
  433. rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
  434. sta, hwrate);
  435. else
  436. rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
  437. hwrate);
  438. }
  439. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  440. struct txentry_desc *txdesc)
  441. {
  442. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  443. /*
  444. * This should not happen, we already checked the entry
  445. * was ours. When the hardware disagrees there has been
  446. * a queue corruption!
  447. */
  448. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  449. rt2x00dev->ops->lib->get_entry_state(entry))) {
  450. ERROR(rt2x00dev,
  451. "Corrupt queue %d, accessing entry which is not ours.\n"
  452. "Please file bug report to %s.\n",
  453. entry->queue->qid, DRV_PROJECT);
  454. return -EINVAL;
  455. }
  456. /*
  457. * Add the requested extra tx headroom in front of the skb.
  458. */
  459. skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
  460. memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
  461. /*
  462. * Call the driver's write_tx_data function, if it exists.
  463. */
  464. if (rt2x00dev->ops->lib->write_tx_data)
  465. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  466. /*
  467. * Map the skb to DMA.
  468. */
  469. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags))
  470. rt2x00queue_map_txskb(entry);
  471. return 0;
  472. }
  473. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  474. struct txentry_desc *txdesc)
  475. {
  476. struct data_queue *queue = entry->queue;
  477. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  478. /*
  479. * All processing on the frame has been completed, this means
  480. * it is now ready to be dumped to userspace through debugfs.
  481. */
  482. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
  483. }
  484. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  485. struct txentry_desc *txdesc)
  486. {
  487. /*
  488. * Check if we need to kick the queue, there are however a few rules
  489. * 1) Don't kick unless this is the last in frame in a burst.
  490. * When the burst flag is set, this frame is always followed
  491. * by another frame which in some way are related to eachother.
  492. * This is true for fragments, RTS or CTS-to-self frames.
  493. * 2) Rule 1 can be broken when the available entries
  494. * in the queue are less then a certain threshold.
  495. */
  496. if (rt2x00queue_threshold(queue) ||
  497. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  498. queue->rt2x00dev->ops->lib->kick_queue(queue);
  499. }
  500. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  501. bool local)
  502. {
  503. struct ieee80211_tx_info *tx_info;
  504. struct queue_entry *entry;
  505. struct txentry_desc txdesc;
  506. struct skb_frame_desc *skbdesc;
  507. u8 rate_idx, rate_flags;
  508. int ret = 0;
  509. /*
  510. * Copy all TX descriptor information into txdesc,
  511. * after that we are free to use the skb->cb array
  512. * for our information.
  513. */
  514. rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, NULL);
  515. /*
  516. * All information is retrieved from the skb->cb array,
  517. * now we should claim ownership of the driver part of that
  518. * array, preserving the bitrate index and flags.
  519. */
  520. tx_info = IEEE80211_SKB_CB(skb);
  521. rate_idx = tx_info->control.rates[0].idx;
  522. rate_flags = tx_info->control.rates[0].flags;
  523. skbdesc = get_skb_frame_desc(skb);
  524. memset(skbdesc, 0, sizeof(*skbdesc));
  525. skbdesc->tx_rate_idx = rate_idx;
  526. skbdesc->tx_rate_flags = rate_flags;
  527. if (local)
  528. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  529. /*
  530. * When hardware encryption is supported, and this frame
  531. * is to be encrypted, we should strip the IV/EIV data from
  532. * the frame so we can provide it to the driver separately.
  533. */
  534. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  535. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  536. if (test_bit(REQUIRE_COPY_IV, &queue->rt2x00dev->cap_flags))
  537. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  538. else
  539. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  540. }
  541. /*
  542. * When DMA allocation is required we should guarantee to the
  543. * driver that the DMA is aligned to a 4-byte boundary.
  544. * However some drivers require L2 padding to pad the payload
  545. * rather then the header. This could be a requirement for
  546. * PCI and USB devices, while header alignment only is valid
  547. * for PCI devices.
  548. */
  549. if (test_bit(REQUIRE_L2PAD, &queue->rt2x00dev->cap_flags))
  550. rt2x00queue_insert_l2pad(skb, txdesc.header_length);
  551. else if (test_bit(REQUIRE_DMA, &queue->rt2x00dev->cap_flags))
  552. rt2x00queue_align_frame(skb);
  553. /*
  554. * That function must be called with bh disabled.
  555. */
  556. spin_lock(&queue->tx_lock);
  557. if (unlikely(rt2x00queue_full(queue))) {
  558. ERROR(queue->rt2x00dev,
  559. "Dropping frame due to full tx queue %d.\n", queue->qid);
  560. ret = -ENOBUFS;
  561. goto out;
  562. }
  563. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  564. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  565. &entry->flags))) {
  566. ERROR(queue->rt2x00dev,
  567. "Arrived at non-free entry in the non-full queue %d.\n"
  568. "Please file bug report to %s.\n",
  569. queue->qid, DRV_PROJECT);
  570. ret = -EINVAL;
  571. goto out;
  572. }
  573. skbdesc->entry = entry;
  574. entry->skb = skb;
  575. /*
  576. * It could be possible that the queue was corrupted and this
  577. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  578. * this frame will simply be dropped.
  579. */
  580. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  581. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  582. entry->skb = NULL;
  583. ret = -EIO;
  584. goto out;
  585. }
  586. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  587. rt2x00queue_index_inc(entry, Q_INDEX);
  588. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  589. rt2x00queue_kick_tx_queue(queue, &txdesc);
  590. out:
  591. spin_unlock(&queue->tx_lock);
  592. return ret;
  593. }
  594. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  595. struct ieee80211_vif *vif)
  596. {
  597. struct rt2x00_intf *intf = vif_to_intf(vif);
  598. if (unlikely(!intf->beacon))
  599. return -ENOBUFS;
  600. mutex_lock(&intf->beacon_skb_mutex);
  601. /*
  602. * Clean up the beacon skb.
  603. */
  604. rt2x00queue_free_skb(intf->beacon);
  605. /*
  606. * Clear beacon (single bssid devices don't need to clear the beacon
  607. * since the beacon queue will get stopped anyway).
  608. */
  609. if (rt2x00dev->ops->lib->clear_beacon)
  610. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  611. mutex_unlock(&intf->beacon_skb_mutex);
  612. return 0;
  613. }
  614. int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
  615. struct ieee80211_vif *vif)
  616. {
  617. struct rt2x00_intf *intf = vif_to_intf(vif);
  618. struct skb_frame_desc *skbdesc;
  619. struct txentry_desc txdesc;
  620. if (unlikely(!intf->beacon))
  621. return -ENOBUFS;
  622. /*
  623. * Clean up the beacon skb.
  624. */
  625. rt2x00queue_free_skb(intf->beacon);
  626. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  627. if (!intf->beacon->skb)
  628. return -ENOMEM;
  629. /*
  630. * Copy all TX descriptor information into txdesc,
  631. * after that we are free to use the skb->cb array
  632. * for our information.
  633. */
  634. rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL);
  635. /*
  636. * Fill in skb descriptor
  637. */
  638. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  639. memset(skbdesc, 0, sizeof(*skbdesc));
  640. skbdesc->entry = intf->beacon;
  641. /*
  642. * Send beacon to hardware.
  643. */
  644. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  645. return 0;
  646. }
  647. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  648. struct ieee80211_vif *vif)
  649. {
  650. struct rt2x00_intf *intf = vif_to_intf(vif);
  651. int ret;
  652. mutex_lock(&intf->beacon_skb_mutex);
  653. ret = rt2x00queue_update_beacon_locked(rt2x00dev, vif);
  654. mutex_unlock(&intf->beacon_skb_mutex);
  655. return ret;
  656. }
  657. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  658. enum queue_index start,
  659. enum queue_index end,
  660. bool (*fn)(struct queue_entry *entry))
  661. {
  662. unsigned long irqflags;
  663. unsigned int index_start;
  664. unsigned int index_end;
  665. unsigned int i;
  666. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  667. ERROR(queue->rt2x00dev,
  668. "Entry requested from invalid index range (%d - %d)\n",
  669. start, end);
  670. return true;
  671. }
  672. /*
  673. * Only protect the range we are going to loop over,
  674. * if during our loop a extra entry is set to pending
  675. * it should not be kicked during this run, since it
  676. * is part of another TX operation.
  677. */
  678. spin_lock_irqsave(&queue->index_lock, irqflags);
  679. index_start = queue->index[start];
  680. index_end = queue->index[end];
  681. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  682. /*
  683. * Start from the TX done pointer, this guarantees that we will
  684. * send out all frames in the correct order.
  685. */
  686. if (index_start < index_end) {
  687. for (i = index_start; i < index_end; i++) {
  688. if (fn(&queue->entries[i]))
  689. return true;
  690. }
  691. } else {
  692. for (i = index_start; i < queue->limit; i++) {
  693. if (fn(&queue->entries[i]))
  694. return true;
  695. }
  696. for (i = 0; i < index_end; i++) {
  697. if (fn(&queue->entries[i]))
  698. return true;
  699. }
  700. }
  701. return false;
  702. }
  703. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  704. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  705. enum queue_index index)
  706. {
  707. struct queue_entry *entry;
  708. unsigned long irqflags;
  709. if (unlikely(index >= Q_INDEX_MAX)) {
  710. ERROR(queue->rt2x00dev,
  711. "Entry requested from invalid index type (%d)\n", index);
  712. return NULL;
  713. }
  714. spin_lock_irqsave(&queue->index_lock, irqflags);
  715. entry = &queue->entries[queue->index[index]];
  716. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  717. return entry;
  718. }
  719. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  720. void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
  721. {
  722. struct data_queue *queue = entry->queue;
  723. unsigned long irqflags;
  724. if (unlikely(index >= Q_INDEX_MAX)) {
  725. ERROR(queue->rt2x00dev,
  726. "Index change on invalid index type (%d)\n", index);
  727. return;
  728. }
  729. spin_lock_irqsave(&queue->index_lock, irqflags);
  730. queue->index[index]++;
  731. if (queue->index[index] >= queue->limit)
  732. queue->index[index] = 0;
  733. entry->last_action = jiffies;
  734. if (index == Q_INDEX) {
  735. queue->length++;
  736. } else if (index == Q_INDEX_DONE) {
  737. queue->length--;
  738. queue->count++;
  739. }
  740. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  741. }
  742. void rt2x00queue_pause_queue(struct data_queue *queue)
  743. {
  744. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  745. !test_bit(QUEUE_STARTED, &queue->flags) ||
  746. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  747. return;
  748. switch (queue->qid) {
  749. case QID_AC_VO:
  750. case QID_AC_VI:
  751. case QID_AC_BE:
  752. case QID_AC_BK:
  753. /*
  754. * For TX queues, we have to disable the queue
  755. * inside mac80211.
  756. */
  757. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  758. break;
  759. default:
  760. break;
  761. }
  762. }
  763. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  764. void rt2x00queue_unpause_queue(struct data_queue *queue)
  765. {
  766. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  767. !test_bit(QUEUE_STARTED, &queue->flags) ||
  768. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  769. return;
  770. switch (queue->qid) {
  771. case QID_AC_VO:
  772. case QID_AC_VI:
  773. case QID_AC_BE:
  774. case QID_AC_BK:
  775. /*
  776. * For TX queues, we have to enable the queue
  777. * inside mac80211.
  778. */
  779. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  780. break;
  781. case QID_RX:
  782. /*
  783. * For RX we need to kick the queue now in order to
  784. * receive frames.
  785. */
  786. queue->rt2x00dev->ops->lib->kick_queue(queue);
  787. default:
  788. break;
  789. }
  790. }
  791. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  792. void rt2x00queue_start_queue(struct data_queue *queue)
  793. {
  794. mutex_lock(&queue->status_lock);
  795. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  796. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  797. mutex_unlock(&queue->status_lock);
  798. return;
  799. }
  800. set_bit(QUEUE_PAUSED, &queue->flags);
  801. queue->rt2x00dev->ops->lib->start_queue(queue);
  802. rt2x00queue_unpause_queue(queue);
  803. mutex_unlock(&queue->status_lock);
  804. }
  805. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  806. void rt2x00queue_stop_queue(struct data_queue *queue)
  807. {
  808. mutex_lock(&queue->status_lock);
  809. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  810. mutex_unlock(&queue->status_lock);
  811. return;
  812. }
  813. rt2x00queue_pause_queue(queue);
  814. queue->rt2x00dev->ops->lib->stop_queue(queue);
  815. mutex_unlock(&queue->status_lock);
  816. }
  817. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  818. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  819. {
  820. bool started;
  821. bool tx_queue =
  822. (queue->qid == QID_AC_VO) ||
  823. (queue->qid == QID_AC_VI) ||
  824. (queue->qid == QID_AC_BE) ||
  825. (queue->qid == QID_AC_BK);
  826. mutex_lock(&queue->status_lock);
  827. /*
  828. * If the queue has been started, we must stop it temporarily
  829. * to prevent any new frames to be queued on the device. If
  830. * we are not dropping the pending frames, the queue must
  831. * only be stopped in the software and not the hardware,
  832. * otherwise the queue will never become empty on its own.
  833. */
  834. started = test_bit(QUEUE_STARTED, &queue->flags);
  835. if (started) {
  836. /*
  837. * Pause the queue
  838. */
  839. rt2x00queue_pause_queue(queue);
  840. /*
  841. * If we are not supposed to drop any pending
  842. * frames, this means we must force a start (=kick)
  843. * to the queue to make sure the hardware will
  844. * start transmitting.
  845. */
  846. if (!drop && tx_queue)
  847. queue->rt2x00dev->ops->lib->kick_queue(queue);
  848. }
  849. /*
  850. * Check if driver supports flushing, if that is the case we can
  851. * defer the flushing to the driver. Otherwise we must use the
  852. * alternative which just waits for the queue to become empty.
  853. */
  854. if (likely(queue->rt2x00dev->ops->lib->flush_queue))
  855. queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
  856. /*
  857. * The queue flush has failed...
  858. */
  859. if (unlikely(!rt2x00queue_empty(queue)))
  860. WARNING(queue->rt2x00dev, "Queue %d failed to flush\n", queue->qid);
  861. /*
  862. * Restore the queue to the previous status
  863. */
  864. if (started)
  865. rt2x00queue_unpause_queue(queue);
  866. mutex_unlock(&queue->status_lock);
  867. }
  868. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  869. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  870. {
  871. struct data_queue *queue;
  872. /*
  873. * rt2x00queue_start_queue will call ieee80211_wake_queue
  874. * for each queue after is has been properly initialized.
  875. */
  876. tx_queue_for_each(rt2x00dev, queue)
  877. rt2x00queue_start_queue(queue);
  878. rt2x00queue_start_queue(rt2x00dev->rx);
  879. }
  880. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  881. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  882. {
  883. struct data_queue *queue;
  884. /*
  885. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  886. * as well, but we are completely shutting doing everything
  887. * now, so it is much safer to stop all TX queues at once,
  888. * and use rt2x00queue_stop_queue for cleaning up.
  889. */
  890. ieee80211_stop_queues(rt2x00dev->hw);
  891. tx_queue_for_each(rt2x00dev, queue)
  892. rt2x00queue_stop_queue(queue);
  893. rt2x00queue_stop_queue(rt2x00dev->rx);
  894. }
  895. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  896. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  897. {
  898. struct data_queue *queue;
  899. tx_queue_for_each(rt2x00dev, queue)
  900. rt2x00queue_flush_queue(queue, drop);
  901. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  902. }
  903. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  904. static void rt2x00queue_reset(struct data_queue *queue)
  905. {
  906. unsigned long irqflags;
  907. unsigned int i;
  908. spin_lock_irqsave(&queue->index_lock, irqflags);
  909. queue->count = 0;
  910. queue->length = 0;
  911. for (i = 0; i < Q_INDEX_MAX; i++)
  912. queue->index[i] = 0;
  913. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  914. }
  915. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  916. {
  917. struct data_queue *queue;
  918. unsigned int i;
  919. queue_for_each(rt2x00dev, queue) {
  920. rt2x00queue_reset(queue);
  921. for (i = 0; i < queue->limit; i++)
  922. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  923. }
  924. }
  925. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  926. const struct data_queue_desc *qdesc)
  927. {
  928. struct queue_entry *entries;
  929. unsigned int entry_size;
  930. unsigned int i;
  931. rt2x00queue_reset(queue);
  932. queue->limit = qdesc->entry_num;
  933. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  934. queue->data_size = qdesc->data_size;
  935. queue->desc_size = qdesc->desc_size;
  936. /*
  937. * Allocate all queue entries.
  938. */
  939. entry_size = sizeof(*entries) + qdesc->priv_size;
  940. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  941. if (!entries)
  942. return -ENOMEM;
  943. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  944. (((char *)(__base)) + ((__limit) * (__esize)) + \
  945. ((__index) * (__psize)))
  946. for (i = 0; i < queue->limit; i++) {
  947. entries[i].flags = 0;
  948. entries[i].queue = queue;
  949. entries[i].skb = NULL;
  950. entries[i].entry_idx = i;
  951. entries[i].priv_data =
  952. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  953. sizeof(*entries), qdesc->priv_size);
  954. }
  955. #undef QUEUE_ENTRY_PRIV_OFFSET
  956. queue->entries = entries;
  957. return 0;
  958. }
  959. static void rt2x00queue_free_skbs(struct data_queue *queue)
  960. {
  961. unsigned int i;
  962. if (!queue->entries)
  963. return;
  964. for (i = 0; i < queue->limit; i++) {
  965. rt2x00queue_free_skb(&queue->entries[i]);
  966. }
  967. }
  968. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  969. {
  970. unsigned int i;
  971. struct sk_buff *skb;
  972. for (i = 0; i < queue->limit; i++) {
  973. skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL);
  974. if (!skb)
  975. return -ENOMEM;
  976. queue->entries[i].skb = skb;
  977. }
  978. return 0;
  979. }
  980. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  981. {
  982. struct data_queue *queue;
  983. int status;
  984. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  985. if (status)
  986. goto exit;
  987. tx_queue_for_each(rt2x00dev, queue) {
  988. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  989. if (status)
  990. goto exit;
  991. }
  992. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  993. if (status)
  994. goto exit;
  995. if (test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags)) {
  996. status = rt2x00queue_alloc_entries(rt2x00dev->atim,
  997. rt2x00dev->ops->atim);
  998. if (status)
  999. goto exit;
  1000. }
  1001. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  1002. if (status)
  1003. goto exit;
  1004. return 0;
  1005. exit:
  1006. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  1007. rt2x00queue_uninitialize(rt2x00dev);
  1008. return status;
  1009. }
  1010. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  1011. {
  1012. struct data_queue *queue;
  1013. rt2x00queue_free_skbs(rt2x00dev->rx);
  1014. queue_for_each(rt2x00dev, queue) {
  1015. kfree(queue->entries);
  1016. queue->entries = NULL;
  1017. }
  1018. }
  1019. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  1020. struct data_queue *queue, enum data_queue_qid qid)
  1021. {
  1022. mutex_init(&queue->status_lock);
  1023. spin_lock_init(&queue->tx_lock);
  1024. spin_lock_init(&queue->index_lock);
  1025. queue->rt2x00dev = rt2x00dev;
  1026. queue->qid = qid;
  1027. queue->txop = 0;
  1028. queue->aifs = 2;
  1029. queue->cw_min = 5;
  1030. queue->cw_max = 10;
  1031. }
  1032. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  1033. {
  1034. struct data_queue *queue;
  1035. enum data_queue_qid qid;
  1036. unsigned int req_atim =
  1037. !!test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
  1038. /*
  1039. * We need the following queues:
  1040. * RX: 1
  1041. * TX: ops->tx_queues
  1042. * Beacon: 1
  1043. * Atim: 1 (if required)
  1044. */
  1045. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  1046. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  1047. if (!queue) {
  1048. ERROR(rt2x00dev, "Queue allocation failed.\n");
  1049. return -ENOMEM;
  1050. }
  1051. /*
  1052. * Initialize pointers
  1053. */
  1054. rt2x00dev->rx = queue;
  1055. rt2x00dev->tx = &queue[1];
  1056. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  1057. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  1058. /*
  1059. * Initialize queue parameters.
  1060. * RX: qid = QID_RX
  1061. * TX: qid = QID_AC_VO + index
  1062. * TX: cw_min: 2^5 = 32.
  1063. * TX: cw_max: 2^10 = 1024.
  1064. * BCN: qid = QID_BEACON
  1065. * ATIM: qid = QID_ATIM
  1066. */
  1067. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  1068. qid = QID_AC_VO;
  1069. tx_queue_for_each(rt2x00dev, queue)
  1070. rt2x00queue_init(rt2x00dev, queue, qid++);
  1071. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  1072. if (req_atim)
  1073. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  1074. return 0;
  1075. }
  1076. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  1077. {
  1078. kfree(rt2x00dev->rx);
  1079. rt2x00dev->rx = NULL;
  1080. rt2x00dev->tx = NULL;
  1081. rt2x00dev->bcn = NULL;
  1082. }