enic_main.c 61 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/types.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/pci.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/if_ether.h>
  31. #include <linux/if_vlan.h>
  32. #include <linux/ethtool.h>
  33. #include <linux/in.h>
  34. #include <linux/ip.h>
  35. #include <linux/ipv6.h>
  36. #include <linux/tcp.h>
  37. #include <linux/rtnetlink.h>
  38. #include <linux/prefetch.h>
  39. #include <net/ip6_checksum.h>
  40. #include "cq_enet_desc.h"
  41. #include "vnic_dev.h"
  42. #include "vnic_intr.h"
  43. #include "vnic_stats.h"
  44. #include "vnic_vic.h"
  45. #include "enic_res.h"
  46. #include "enic.h"
  47. #include "enic_dev.h"
  48. #include "enic_pp.h"
  49. #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
  50. #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
  51. #define MAX_TSO (1 << 16)
  52. #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
  53. #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
  54. #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
  55. /* Supported devices */
  56. static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
  57. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
  58. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
  59. { 0, } /* end of table */
  60. };
  61. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  62. MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
  63. MODULE_LICENSE("GPL");
  64. MODULE_VERSION(DRV_VERSION);
  65. MODULE_DEVICE_TABLE(pci, enic_id_table);
  66. struct enic_stat {
  67. char name[ETH_GSTRING_LEN];
  68. unsigned int offset;
  69. };
  70. #define ENIC_TX_STAT(stat) \
  71. { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
  72. #define ENIC_RX_STAT(stat) \
  73. { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
  74. static const struct enic_stat enic_tx_stats[] = {
  75. ENIC_TX_STAT(tx_frames_ok),
  76. ENIC_TX_STAT(tx_unicast_frames_ok),
  77. ENIC_TX_STAT(tx_multicast_frames_ok),
  78. ENIC_TX_STAT(tx_broadcast_frames_ok),
  79. ENIC_TX_STAT(tx_bytes_ok),
  80. ENIC_TX_STAT(tx_unicast_bytes_ok),
  81. ENIC_TX_STAT(tx_multicast_bytes_ok),
  82. ENIC_TX_STAT(tx_broadcast_bytes_ok),
  83. ENIC_TX_STAT(tx_drops),
  84. ENIC_TX_STAT(tx_errors),
  85. ENIC_TX_STAT(tx_tso),
  86. };
  87. static const struct enic_stat enic_rx_stats[] = {
  88. ENIC_RX_STAT(rx_frames_ok),
  89. ENIC_RX_STAT(rx_frames_total),
  90. ENIC_RX_STAT(rx_unicast_frames_ok),
  91. ENIC_RX_STAT(rx_multicast_frames_ok),
  92. ENIC_RX_STAT(rx_broadcast_frames_ok),
  93. ENIC_RX_STAT(rx_bytes_ok),
  94. ENIC_RX_STAT(rx_unicast_bytes_ok),
  95. ENIC_RX_STAT(rx_multicast_bytes_ok),
  96. ENIC_RX_STAT(rx_broadcast_bytes_ok),
  97. ENIC_RX_STAT(rx_drop),
  98. ENIC_RX_STAT(rx_no_bufs),
  99. ENIC_RX_STAT(rx_errors),
  100. ENIC_RX_STAT(rx_rss),
  101. ENIC_RX_STAT(rx_crc_errors),
  102. ENIC_RX_STAT(rx_frames_64),
  103. ENIC_RX_STAT(rx_frames_127),
  104. ENIC_RX_STAT(rx_frames_255),
  105. ENIC_RX_STAT(rx_frames_511),
  106. ENIC_RX_STAT(rx_frames_1023),
  107. ENIC_RX_STAT(rx_frames_1518),
  108. ENIC_RX_STAT(rx_frames_to_max),
  109. };
  110. static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
  111. static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
  112. static int enic_is_dynamic(struct enic *enic)
  113. {
  114. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
  115. }
  116. static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
  117. {
  118. return rq;
  119. }
  120. static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
  121. {
  122. return enic->rq_count + wq;
  123. }
  124. static inline unsigned int enic_legacy_io_intr(void)
  125. {
  126. return 0;
  127. }
  128. static inline unsigned int enic_legacy_err_intr(void)
  129. {
  130. return 1;
  131. }
  132. static inline unsigned int enic_legacy_notify_intr(void)
  133. {
  134. return 2;
  135. }
  136. static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
  137. {
  138. return rq;
  139. }
  140. static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
  141. {
  142. return enic->rq_count + wq;
  143. }
  144. static inline unsigned int enic_msix_err_intr(struct enic *enic)
  145. {
  146. return enic->rq_count + enic->wq_count;
  147. }
  148. static inline unsigned int enic_msix_notify_intr(struct enic *enic)
  149. {
  150. return enic->rq_count + enic->wq_count + 1;
  151. }
  152. static int enic_get_settings(struct net_device *netdev,
  153. struct ethtool_cmd *ecmd)
  154. {
  155. struct enic *enic = netdev_priv(netdev);
  156. ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
  157. ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
  158. ecmd->port = PORT_FIBRE;
  159. ecmd->transceiver = XCVR_EXTERNAL;
  160. if (netif_carrier_ok(netdev)) {
  161. ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
  162. ecmd->duplex = DUPLEX_FULL;
  163. } else {
  164. ethtool_cmd_speed_set(ecmd, -1);
  165. ecmd->duplex = -1;
  166. }
  167. ecmd->autoneg = AUTONEG_DISABLE;
  168. return 0;
  169. }
  170. static void enic_get_drvinfo(struct net_device *netdev,
  171. struct ethtool_drvinfo *drvinfo)
  172. {
  173. struct enic *enic = netdev_priv(netdev);
  174. struct vnic_devcmd_fw_info *fw_info;
  175. enic_dev_fw_info(enic, &fw_info);
  176. strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
  177. strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
  178. strncpy(drvinfo->fw_version, fw_info->fw_version,
  179. sizeof(drvinfo->fw_version));
  180. strncpy(drvinfo->bus_info, pci_name(enic->pdev),
  181. sizeof(drvinfo->bus_info));
  182. }
  183. static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
  184. {
  185. unsigned int i;
  186. switch (stringset) {
  187. case ETH_SS_STATS:
  188. for (i = 0; i < enic_n_tx_stats; i++) {
  189. memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
  190. data += ETH_GSTRING_LEN;
  191. }
  192. for (i = 0; i < enic_n_rx_stats; i++) {
  193. memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
  194. data += ETH_GSTRING_LEN;
  195. }
  196. break;
  197. }
  198. }
  199. static int enic_get_sset_count(struct net_device *netdev, int sset)
  200. {
  201. switch (sset) {
  202. case ETH_SS_STATS:
  203. return enic_n_tx_stats + enic_n_rx_stats;
  204. default:
  205. return -EOPNOTSUPP;
  206. }
  207. }
  208. static void enic_get_ethtool_stats(struct net_device *netdev,
  209. struct ethtool_stats *stats, u64 *data)
  210. {
  211. struct enic *enic = netdev_priv(netdev);
  212. struct vnic_stats *vstats;
  213. unsigned int i;
  214. enic_dev_stats_dump(enic, &vstats);
  215. for (i = 0; i < enic_n_tx_stats; i++)
  216. *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
  217. for (i = 0; i < enic_n_rx_stats; i++)
  218. *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
  219. }
  220. static u32 enic_get_msglevel(struct net_device *netdev)
  221. {
  222. struct enic *enic = netdev_priv(netdev);
  223. return enic->msg_enable;
  224. }
  225. static void enic_set_msglevel(struct net_device *netdev, u32 value)
  226. {
  227. struct enic *enic = netdev_priv(netdev);
  228. enic->msg_enable = value;
  229. }
  230. static int enic_get_coalesce(struct net_device *netdev,
  231. struct ethtool_coalesce *ecmd)
  232. {
  233. struct enic *enic = netdev_priv(netdev);
  234. ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
  235. ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
  236. return 0;
  237. }
  238. static int enic_set_coalesce(struct net_device *netdev,
  239. struct ethtool_coalesce *ecmd)
  240. {
  241. struct enic *enic = netdev_priv(netdev);
  242. u32 tx_coalesce_usecs;
  243. u32 rx_coalesce_usecs;
  244. unsigned int i, intr;
  245. tx_coalesce_usecs = min_t(u32,
  246. INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
  247. ecmd->tx_coalesce_usecs);
  248. rx_coalesce_usecs = min_t(u32,
  249. INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
  250. ecmd->rx_coalesce_usecs);
  251. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  252. case VNIC_DEV_INTR_MODE_INTX:
  253. if (tx_coalesce_usecs != rx_coalesce_usecs)
  254. return -EINVAL;
  255. intr = enic_legacy_io_intr();
  256. vnic_intr_coalescing_timer_set(&enic->intr[intr],
  257. INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
  258. break;
  259. case VNIC_DEV_INTR_MODE_MSI:
  260. if (tx_coalesce_usecs != rx_coalesce_usecs)
  261. return -EINVAL;
  262. vnic_intr_coalescing_timer_set(&enic->intr[0],
  263. INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
  264. break;
  265. case VNIC_DEV_INTR_MODE_MSIX:
  266. for (i = 0; i < enic->wq_count; i++) {
  267. intr = enic_msix_wq_intr(enic, i);
  268. vnic_intr_coalescing_timer_set(&enic->intr[intr],
  269. INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
  270. }
  271. for (i = 0; i < enic->rq_count; i++) {
  272. intr = enic_msix_rq_intr(enic, i);
  273. vnic_intr_coalescing_timer_set(&enic->intr[intr],
  274. INTR_COALESCE_USEC_TO_HW(rx_coalesce_usecs));
  275. }
  276. break;
  277. default:
  278. break;
  279. }
  280. enic->tx_coalesce_usecs = tx_coalesce_usecs;
  281. enic->rx_coalesce_usecs = rx_coalesce_usecs;
  282. return 0;
  283. }
  284. static const struct ethtool_ops enic_ethtool_ops = {
  285. .get_settings = enic_get_settings,
  286. .get_drvinfo = enic_get_drvinfo,
  287. .get_msglevel = enic_get_msglevel,
  288. .set_msglevel = enic_set_msglevel,
  289. .get_link = ethtool_op_get_link,
  290. .get_strings = enic_get_strings,
  291. .get_sset_count = enic_get_sset_count,
  292. .get_ethtool_stats = enic_get_ethtool_stats,
  293. .get_coalesce = enic_get_coalesce,
  294. .set_coalesce = enic_set_coalesce,
  295. };
  296. static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
  297. {
  298. struct enic *enic = vnic_dev_priv(wq->vdev);
  299. if (buf->sop)
  300. pci_unmap_single(enic->pdev, buf->dma_addr,
  301. buf->len, PCI_DMA_TODEVICE);
  302. else
  303. pci_unmap_page(enic->pdev, buf->dma_addr,
  304. buf->len, PCI_DMA_TODEVICE);
  305. if (buf->os_buf)
  306. dev_kfree_skb_any(buf->os_buf);
  307. }
  308. static void enic_wq_free_buf(struct vnic_wq *wq,
  309. struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
  310. {
  311. enic_free_wq_buf(wq, buf);
  312. }
  313. static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  314. u8 type, u16 q_number, u16 completed_index, void *opaque)
  315. {
  316. struct enic *enic = vnic_dev_priv(vdev);
  317. spin_lock(&enic->wq_lock[q_number]);
  318. vnic_wq_service(&enic->wq[q_number], cq_desc,
  319. completed_index, enic_wq_free_buf,
  320. opaque);
  321. if (netif_queue_stopped(enic->netdev) &&
  322. vnic_wq_desc_avail(&enic->wq[q_number]) >=
  323. (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
  324. netif_wake_queue(enic->netdev);
  325. spin_unlock(&enic->wq_lock[q_number]);
  326. return 0;
  327. }
  328. static void enic_log_q_error(struct enic *enic)
  329. {
  330. unsigned int i;
  331. u32 error_status;
  332. for (i = 0; i < enic->wq_count; i++) {
  333. error_status = vnic_wq_error_status(&enic->wq[i]);
  334. if (error_status)
  335. netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
  336. i, error_status);
  337. }
  338. for (i = 0; i < enic->rq_count; i++) {
  339. error_status = vnic_rq_error_status(&enic->rq[i]);
  340. if (error_status)
  341. netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
  342. i, error_status);
  343. }
  344. }
  345. static void enic_msglvl_check(struct enic *enic)
  346. {
  347. u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
  348. if (msg_enable != enic->msg_enable) {
  349. netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
  350. enic->msg_enable, msg_enable);
  351. enic->msg_enable = msg_enable;
  352. }
  353. }
  354. static void enic_mtu_check(struct enic *enic)
  355. {
  356. u32 mtu = vnic_dev_mtu(enic->vdev);
  357. struct net_device *netdev = enic->netdev;
  358. if (mtu && mtu != enic->port_mtu) {
  359. enic->port_mtu = mtu;
  360. if (enic_is_dynamic(enic)) {
  361. mtu = max_t(int, ENIC_MIN_MTU,
  362. min_t(int, ENIC_MAX_MTU, mtu));
  363. if (mtu != netdev->mtu)
  364. schedule_work(&enic->change_mtu_work);
  365. } else {
  366. if (mtu < netdev->mtu)
  367. netdev_warn(netdev,
  368. "interface MTU (%d) set higher "
  369. "than switch port MTU (%d)\n",
  370. netdev->mtu, mtu);
  371. }
  372. }
  373. }
  374. static void enic_link_check(struct enic *enic)
  375. {
  376. int link_status = vnic_dev_link_status(enic->vdev);
  377. int carrier_ok = netif_carrier_ok(enic->netdev);
  378. if (link_status && !carrier_ok) {
  379. netdev_info(enic->netdev, "Link UP\n");
  380. netif_carrier_on(enic->netdev);
  381. } else if (!link_status && carrier_ok) {
  382. netdev_info(enic->netdev, "Link DOWN\n");
  383. netif_carrier_off(enic->netdev);
  384. }
  385. }
  386. static void enic_notify_check(struct enic *enic)
  387. {
  388. enic_msglvl_check(enic);
  389. enic_mtu_check(enic);
  390. enic_link_check(enic);
  391. }
  392. #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
  393. static irqreturn_t enic_isr_legacy(int irq, void *data)
  394. {
  395. struct net_device *netdev = data;
  396. struct enic *enic = netdev_priv(netdev);
  397. unsigned int io_intr = enic_legacy_io_intr();
  398. unsigned int err_intr = enic_legacy_err_intr();
  399. unsigned int notify_intr = enic_legacy_notify_intr();
  400. u32 pba;
  401. vnic_intr_mask(&enic->intr[io_intr]);
  402. pba = vnic_intr_legacy_pba(enic->legacy_pba);
  403. if (!pba) {
  404. vnic_intr_unmask(&enic->intr[io_intr]);
  405. return IRQ_NONE; /* not our interrupt */
  406. }
  407. if (ENIC_TEST_INTR(pba, notify_intr)) {
  408. vnic_intr_return_all_credits(&enic->intr[notify_intr]);
  409. enic_notify_check(enic);
  410. }
  411. if (ENIC_TEST_INTR(pba, err_intr)) {
  412. vnic_intr_return_all_credits(&enic->intr[err_intr]);
  413. enic_log_q_error(enic);
  414. /* schedule recovery from WQ/RQ error */
  415. schedule_work(&enic->reset);
  416. return IRQ_HANDLED;
  417. }
  418. if (ENIC_TEST_INTR(pba, io_intr)) {
  419. if (napi_schedule_prep(&enic->napi[0]))
  420. __napi_schedule(&enic->napi[0]);
  421. } else {
  422. vnic_intr_unmask(&enic->intr[io_intr]);
  423. }
  424. return IRQ_HANDLED;
  425. }
  426. static irqreturn_t enic_isr_msi(int irq, void *data)
  427. {
  428. struct enic *enic = data;
  429. /* With MSI, there is no sharing of interrupts, so this is
  430. * our interrupt and there is no need to ack it. The device
  431. * is not providing per-vector masking, so the OS will not
  432. * write to PCI config space to mask/unmask the interrupt.
  433. * We're using mask_on_assertion for MSI, so the device
  434. * automatically masks the interrupt when the interrupt is
  435. * generated. Later, when exiting polling, the interrupt
  436. * will be unmasked (see enic_poll).
  437. *
  438. * Also, the device uses the same PCIe Traffic Class (TC)
  439. * for Memory Write data and MSI, so there are no ordering
  440. * issues; the MSI will always arrive at the Root Complex
  441. * _after_ corresponding Memory Writes (i.e. descriptor
  442. * writes).
  443. */
  444. napi_schedule(&enic->napi[0]);
  445. return IRQ_HANDLED;
  446. }
  447. static irqreturn_t enic_isr_msix_rq(int irq, void *data)
  448. {
  449. struct napi_struct *napi = data;
  450. /* schedule NAPI polling for RQ cleanup */
  451. napi_schedule(napi);
  452. return IRQ_HANDLED;
  453. }
  454. static irqreturn_t enic_isr_msix_wq(int irq, void *data)
  455. {
  456. struct enic *enic = data;
  457. unsigned int cq = enic_cq_wq(enic, 0);
  458. unsigned int intr = enic_msix_wq_intr(enic, 0);
  459. unsigned int wq_work_to_do = -1; /* no limit */
  460. unsigned int wq_work_done;
  461. wq_work_done = vnic_cq_service(&enic->cq[cq],
  462. wq_work_to_do, enic_wq_service, NULL);
  463. vnic_intr_return_credits(&enic->intr[intr],
  464. wq_work_done,
  465. 1 /* unmask intr */,
  466. 1 /* reset intr timer */);
  467. return IRQ_HANDLED;
  468. }
  469. static irqreturn_t enic_isr_msix_err(int irq, void *data)
  470. {
  471. struct enic *enic = data;
  472. unsigned int intr = enic_msix_err_intr(enic);
  473. vnic_intr_return_all_credits(&enic->intr[intr]);
  474. enic_log_q_error(enic);
  475. /* schedule recovery from WQ/RQ error */
  476. schedule_work(&enic->reset);
  477. return IRQ_HANDLED;
  478. }
  479. static irqreturn_t enic_isr_msix_notify(int irq, void *data)
  480. {
  481. struct enic *enic = data;
  482. unsigned int intr = enic_msix_notify_intr(enic);
  483. vnic_intr_return_all_credits(&enic->intr[intr]);
  484. enic_notify_check(enic);
  485. return IRQ_HANDLED;
  486. }
  487. static inline void enic_queue_wq_skb_cont(struct enic *enic,
  488. struct vnic_wq *wq, struct sk_buff *skb,
  489. unsigned int len_left, int loopback)
  490. {
  491. skb_frag_t *frag;
  492. /* Queue additional data fragments */
  493. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  494. len_left -= frag->size;
  495. enic_queue_wq_desc_cont(wq, skb,
  496. pci_map_page(enic->pdev, frag->page,
  497. frag->page_offset, frag->size,
  498. PCI_DMA_TODEVICE),
  499. frag->size,
  500. (len_left == 0), /* EOP? */
  501. loopback);
  502. }
  503. }
  504. static inline void enic_queue_wq_skb_vlan(struct enic *enic,
  505. struct vnic_wq *wq, struct sk_buff *skb,
  506. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  507. {
  508. unsigned int head_len = skb_headlen(skb);
  509. unsigned int len_left = skb->len - head_len;
  510. int eop = (len_left == 0);
  511. /* Queue the main skb fragment. The fragments are no larger
  512. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  513. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  514. * per fragment is queued.
  515. */
  516. enic_queue_wq_desc(wq, skb,
  517. pci_map_single(enic->pdev, skb->data,
  518. head_len, PCI_DMA_TODEVICE),
  519. head_len,
  520. vlan_tag_insert, vlan_tag,
  521. eop, loopback);
  522. if (!eop)
  523. enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  524. }
  525. static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
  526. struct vnic_wq *wq, struct sk_buff *skb,
  527. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  528. {
  529. unsigned int head_len = skb_headlen(skb);
  530. unsigned int len_left = skb->len - head_len;
  531. unsigned int hdr_len = skb_checksum_start_offset(skb);
  532. unsigned int csum_offset = hdr_len + skb->csum_offset;
  533. int eop = (len_left == 0);
  534. /* Queue the main skb fragment. The fragments are no larger
  535. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  536. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  537. * per fragment is queued.
  538. */
  539. enic_queue_wq_desc_csum_l4(wq, skb,
  540. pci_map_single(enic->pdev, skb->data,
  541. head_len, PCI_DMA_TODEVICE),
  542. head_len,
  543. csum_offset,
  544. hdr_len,
  545. vlan_tag_insert, vlan_tag,
  546. eop, loopback);
  547. if (!eop)
  548. enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  549. }
  550. static inline void enic_queue_wq_skb_tso(struct enic *enic,
  551. struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
  552. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  553. {
  554. unsigned int frag_len_left = skb_headlen(skb);
  555. unsigned int len_left = skb->len - frag_len_left;
  556. unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  557. int eop = (len_left == 0);
  558. unsigned int len;
  559. dma_addr_t dma_addr;
  560. unsigned int offset = 0;
  561. skb_frag_t *frag;
  562. /* Preload TCP csum field with IP pseudo hdr calculated
  563. * with IP length set to zero. HW will later add in length
  564. * to each TCP segment resulting from the TSO.
  565. */
  566. if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
  567. ip_hdr(skb)->check = 0;
  568. tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  569. ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  570. } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
  571. tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  572. &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  573. }
  574. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  575. * for the main skb fragment
  576. */
  577. while (frag_len_left) {
  578. len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
  579. dma_addr = pci_map_single(enic->pdev, skb->data + offset,
  580. len, PCI_DMA_TODEVICE);
  581. enic_queue_wq_desc_tso(wq, skb,
  582. dma_addr,
  583. len,
  584. mss, hdr_len,
  585. vlan_tag_insert, vlan_tag,
  586. eop && (len == frag_len_left), loopback);
  587. frag_len_left -= len;
  588. offset += len;
  589. }
  590. if (eop)
  591. return;
  592. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  593. * for additional data fragments
  594. */
  595. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  596. len_left -= frag->size;
  597. frag_len_left = frag->size;
  598. offset = frag->page_offset;
  599. while (frag_len_left) {
  600. len = min(frag_len_left,
  601. (unsigned int)WQ_ENET_MAX_DESC_LEN);
  602. dma_addr = pci_map_page(enic->pdev, frag->page,
  603. offset, len,
  604. PCI_DMA_TODEVICE);
  605. enic_queue_wq_desc_cont(wq, skb,
  606. dma_addr,
  607. len,
  608. (len_left == 0) &&
  609. (len == frag_len_left), /* EOP? */
  610. loopback);
  611. frag_len_left -= len;
  612. offset += len;
  613. }
  614. }
  615. }
  616. static inline void enic_queue_wq_skb(struct enic *enic,
  617. struct vnic_wq *wq, struct sk_buff *skb)
  618. {
  619. unsigned int mss = skb_shinfo(skb)->gso_size;
  620. unsigned int vlan_tag = 0;
  621. int vlan_tag_insert = 0;
  622. int loopback = 0;
  623. if (vlan_tx_tag_present(skb)) {
  624. /* VLAN tag from trunking driver */
  625. vlan_tag_insert = 1;
  626. vlan_tag = vlan_tx_tag_get(skb);
  627. } else if (enic->loop_enable) {
  628. vlan_tag = enic->loop_tag;
  629. loopback = 1;
  630. }
  631. if (mss)
  632. enic_queue_wq_skb_tso(enic, wq, skb, mss,
  633. vlan_tag_insert, vlan_tag, loopback);
  634. else if (skb->ip_summed == CHECKSUM_PARTIAL)
  635. enic_queue_wq_skb_csum_l4(enic, wq, skb,
  636. vlan_tag_insert, vlan_tag, loopback);
  637. else
  638. enic_queue_wq_skb_vlan(enic, wq, skb,
  639. vlan_tag_insert, vlan_tag, loopback);
  640. }
  641. /* netif_tx_lock held, process context with BHs disabled, or BH */
  642. static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
  643. struct net_device *netdev)
  644. {
  645. struct enic *enic = netdev_priv(netdev);
  646. struct vnic_wq *wq = &enic->wq[0];
  647. unsigned long flags;
  648. if (skb->len <= 0) {
  649. dev_kfree_skb(skb);
  650. return NETDEV_TX_OK;
  651. }
  652. /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
  653. * which is very likely. In the off chance it's going to take
  654. * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
  655. */
  656. if (skb_shinfo(skb)->gso_size == 0 &&
  657. skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
  658. skb_linearize(skb)) {
  659. dev_kfree_skb(skb);
  660. return NETDEV_TX_OK;
  661. }
  662. spin_lock_irqsave(&enic->wq_lock[0], flags);
  663. if (vnic_wq_desc_avail(wq) <
  664. skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
  665. netif_stop_queue(netdev);
  666. /* This is a hard error, log it */
  667. netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
  668. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  669. return NETDEV_TX_BUSY;
  670. }
  671. enic_queue_wq_skb(enic, wq, skb);
  672. if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
  673. netif_stop_queue(netdev);
  674. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  675. return NETDEV_TX_OK;
  676. }
  677. /* dev_base_lock rwlock held, nominally process context */
  678. static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
  679. struct rtnl_link_stats64 *net_stats)
  680. {
  681. struct enic *enic = netdev_priv(netdev);
  682. struct vnic_stats *stats;
  683. enic_dev_stats_dump(enic, &stats);
  684. net_stats->tx_packets = stats->tx.tx_frames_ok;
  685. net_stats->tx_bytes = stats->tx.tx_bytes_ok;
  686. net_stats->tx_errors = stats->tx.tx_errors;
  687. net_stats->tx_dropped = stats->tx.tx_drops;
  688. net_stats->rx_packets = stats->rx.rx_frames_ok;
  689. net_stats->rx_bytes = stats->rx.rx_bytes_ok;
  690. net_stats->rx_errors = stats->rx.rx_errors;
  691. net_stats->multicast = stats->rx.rx_multicast_frames_ok;
  692. net_stats->rx_over_errors = enic->rq_truncated_pkts;
  693. net_stats->rx_crc_errors = enic->rq_bad_fcs;
  694. net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
  695. return net_stats;
  696. }
  697. void enic_reset_addr_lists(struct enic *enic)
  698. {
  699. enic->mc_count = 0;
  700. enic->uc_count = 0;
  701. enic->flags = 0;
  702. }
  703. static int enic_set_mac_addr(struct net_device *netdev, char *addr)
  704. {
  705. struct enic *enic = netdev_priv(netdev);
  706. if (enic_is_dynamic(enic)) {
  707. if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
  708. return -EADDRNOTAVAIL;
  709. } else {
  710. if (!is_valid_ether_addr(addr))
  711. return -EADDRNOTAVAIL;
  712. }
  713. memcpy(netdev->dev_addr, addr, netdev->addr_len);
  714. return 0;
  715. }
  716. static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
  717. {
  718. struct enic *enic = netdev_priv(netdev);
  719. struct sockaddr *saddr = p;
  720. char *addr = saddr->sa_data;
  721. int err;
  722. if (netif_running(enic->netdev)) {
  723. err = enic_dev_del_station_addr(enic);
  724. if (err)
  725. return err;
  726. }
  727. err = enic_set_mac_addr(netdev, addr);
  728. if (err)
  729. return err;
  730. if (netif_running(enic->netdev)) {
  731. err = enic_dev_add_station_addr(enic);
  732. if (err)
  733. return err;
  734. }
  735. return err;
  736. }
  737. static int enic_set_mac_address(struct net_device *netdev, void *p)
  738. {
  739. struct sockaddr *saddr = p;
  740. char *addr = saddr->sa_data;
  741. struct enic *enic = netdev_priv(netdev);
  742. int err;
  743. err = enic_dev_del_station_addr(enic);
  744. if (err)
  745. return err;
  746. err = enic_set_mac_addr(netdev, addr);
  747. if (err)
  748. return err;
  749. return enic_dev_add_station_addr(enic);
  750. }
  751. static void enic_update_multicast_addr_list(struct enic *enic)
  752. {
  753. struct net_device *netdev = enic->netdev;
  754. struct netdev_hw_addr *ha;
  755. unsigned int mc_count = netdev_mc_count(netdev);
  756. u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
  757. unsigned int i, j;
  758. if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
  759. netdev_warn(netdev, "Registering only %d out of %d "
  760. "multicast addresses\n",
  761. ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
  762. mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
  763. }
  764. /* Is there an easier way? Trying to minimize to
  765. * calls to add/del multicast addrs. We keep the
  766. * addrs from the last call in enic->mc_addr and
  767. * look for changes to add/del.
  768. */
  769. i = 0;
  770. netdev_for_each_mc_addr(ha, netdev) {
  771. if (i == mc_count)
  772. break;
  773. memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
  774. }
  775. for (i = 0; i < enic->mc_count; i++) {
  776. for (j = 0; j < mc_count; j++)
  777. if (compare_ether_addr(enic->mc_addr[i],
  778. mc_addr[j]) == 0)
  779. break;
  780. if (j == mc_count)
  781. enic_dev_del_addr(enic, enic->mc_addr[i]);
  782. }
  783. for (i = 0; i < mc_count; i++) {
  784. for (j = 0; j < enic->mc_count; j++)
  785. if (compare_ether_addr(mc_addr[i],
  786. enic->mc_addr[j]) == 0)
  787. break;
  788. if (j == enic->mc_count)
  789. enic_dev_add_addr(enic, mc_addr[i]);
  790. }
  791. /* Save the list to compare against next time
  792. */
  793. for (i = 0; i < mc_count; i++)
  794. memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
  795. enic->mc_count = mc_count;
  796. }
  797. static void enic_update_unicast_addr_list(struct enic *enic)
  798. {
  799. struct net_device *netdev = enic->netdev;
  800. struct netdev_hw_addr *ha;
  801. unsigned int uc_count = netdev_uc_count(netdev);
  802. u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
  803. unsigned int i, j;
  804. if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
  805. netdev_warn(netdev, "Registering only %d out of %d "
  806. "unicast addresses\n",
  807. ENIC_UNICAST_PERFECT_FILTERS, uc_count);
  808. uc_count = ENIC_UNICAST_PERFECT_FILTERS;
  809. }
  810. /* Is there an easier way? Trying to minimize to
  811. * calls to add/del unicast addrs. We keep the
  812. * addrs from the last call in enic->uc_addr and
  813. * look for changes to add/del.
  814. */
  815. i = 0;
  816. netdev_for_each_uc_addr(ha, netdev) {
  817. if (i == uc_count)
  818. break;
  819. memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
  820. }
  821. for (i = 0; i < enic->uc_count; i++) {
  822. for (j = 0; j < uc_count; j++)
  823. if (compare_ether_addr(enic->uc_addr[i],
  824. uc_addr[j]) == 0)
  825. break;
  826. if (j == uc_count)
  827. enic_dev_del_addr(enic, enic->uc_addr[i]);
  828. }
  829. for (i = 0; i < uc_count; i++) {
  830. for (j = 0; j < enic->uc_count; j++)
  831. if (compare_ether_addr(uc_addr[i],
  832. enic->uc_addr[j]) == 0)
  833. break;
  834. if (j == enic->uc_count)
  835. enic_dev_add_addr(enic, uc_addr[i]);
  836. }
  837. /* Save the list to compare against next time
  838. */
  839. for (i = 0; i < uc_count; i++)
  840. memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
  841. enic->uc_count = uc_count;
  842. }
  843. /* netif_tx_lock held, BHs disabled */
  844. static void enic_set_rx_mode(struct net_device *netdev)
  845. {
  846. struct enic *enic = netdev_priv(netdev);
  847. int directed = 1;
  848. int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
  849. int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
  850. int promisc = (netdev->flags & IFF_PROMISC) ||
  851. netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
  852. int allmulti = (netdev->flags & IFF_ALLMULTI) ||
  853. netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
  854. unsigned int flags = netdev->flags |
  855. (allmulti ? IFF_ALLMULTI : 0) |
  856. (promisc ? IFF_PROMISC : 0);
  857. if (enic->flags != flags) {
  858. enic->flags = flags;
  859. enic_dev_packet_filter(enic, directed,
  860. multicast, broadcast, promisc, allmulti);
  861. }
  862. if (!promisc) {
  863. enic_update_unicast_addr_list(enic);
  864. if (!allmulti)
  865. enic_update_multicast_addr_list(enic);
  866. }
  867. }
  868. /* rtnl lock is held */
  869. static void enic_vlan_rx_register(struct net_device *netdev,
  870. struct vlan_group *vlan_group)
  871. {
  872. struct enic *enic = netdev_priv(netdev);
  873. enic->vlan_group = vlan_group;
  874. }
  875. /* netif_tx_lock held, BHs disabled */
  876. static void enic_tx_timeout(struct net_device *netdev)
  877. {
  878. struct enic *enic = netdev_priv(netdev);
  879. schedule_work(&enic->reset);
  880. }
  881. static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
  882. {
  883. struct enic *enic = netdev_priv(netdev);
  884. if (vf != PORT_SELF_VF)
  885. return -EOPNOTSUPP;
  886. /* Ignore the vf argument for now. We can assume the request
  887. * is coming on a vf.
  888. */
  889. if (is_valid_ether_addr(mac)) {
  890. memcpy(enic->pp.vf_mac, mac, ETH_ALEN);
  891. return 0;
  892. } else
  893. return -EINVAL;
  894. }
  895. static int enic_set_vf_port(struct net_device *netdev, int vf,
  896. struct nlattr *port[])
  897. {
  898. struct enic *enic = netdev_priv(netdev);
  899. struct enic_port_profile prev_pp;
  900. int err = 0, restore_pp = 1;
  901. /* don't support VFs, yet */
  902. if (vf != PORT_SELF_VF)
  903. return -EOPNOTSUPP;
  904. if (!port[IFLA_PORT_REQUEST])
  905. return -EOPNOTSUPP;
  906. memcpy(&prev_pp, &enic->pp, sizeof(enic->pp));
  907. memset(&enic->pp, 0, sizeof(enic->pp));
  908. enic->pp.set |= ENIC_SET_REQUEST;
  909. enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
  910. if (port[IFLA_PORT_PROFILE]) {
  911. enic->pp.set |= ENIC_SET_NAME;
  912. memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
  913. PORT_PROFILE_MAX);
  914. }
  915. if (port[IFLA_PORT_INSTANCE_UUID]) {
  916. enic->pp.set |= ENIC_SET_INSTANCE;
  917. memcpy(enic->pp.instance_uuid,
  918. nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
  919. }
  920. if (port[IFLA_PORT_HOST_UUID]) {
  921. enic->pp.set |= ENIC_SET_HOST;
  922. memcpy(enic->pp.host_uuid,
  923. nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
  924. }
  925. /* Special case handling: mac came from IFLA_VF_MAC */
  926. if (!is_zero_ether_addr(prev_pp.vf_mac))
  927. memcpy(enic->pp.mac_addr, prev_pp.vf_mac, ETH_ALEN);
  928. if (is_zero_ether_addr(netdev->dev_addr))
  929. random_ether_addr(netdev->dev_addr);
  930. err = enic_process_set_pp_request(enic, &prev_pp, &restore_pp);
  931. if (err) {
  932. if (restore_pp) {
  933. /* Things are still the way they were: Implicit
  934. * DISASSOCIATE failed
  935. */
  936. memcpy(&enic->pp, &prev_pp, sizeof(enic->pp));
  937. } else {
  938. memset(&enic->pp, 0, sizeof(enic->pp));
  939. memset(netdev->dev_addr, 0, ETH_ALEN);
  940. }
  941. } else {
  942. /* Set flag to indicate that the port assoc/disassoc
  943. * request has been sent out to fw
  944. */
  945. enic->pp.set |= ENIC_PORT_REQUEST_APPLIED;
  946. /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
  947. if (enic->pp.request == PORT_REQUEST_DISASSOCIATE) {
  948. memset(enic->pp.mac_addr, 0, ETH_ALEN);
  949. memset(netdev->dev_addr, 0, ETH_ALEN);
  950. }
  951. }
  952. memset(enic->pp.vf_mac, 0, ETH_ALEN);
  953. return err;
  954. }
  955. static int enic_get_vf_port(struct net_device *netdev, int vf,
  956. struct sk_buff *skb)
  957. {
  958. struct enic *enic = netdev_priv(netdev);
  959. u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
  960. int err;
  961. if (!(enic->pp.set & ENIC_PORT_REQUEST_APPLIED))
  962. return -ENODATA;
  963. err = enic_process_get_pp_request(enic, enic->pp.request, &response);
  964. if (err)
  965. return err;
  966. NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
  967. NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
  968. if (enic->pp.set & ENIC_SET_NAME)
  969. NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
  970. enic->pp.name);
  971. if (enic->pp.set & ENIC_SET_INSTANCE)
  972. NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
  973. enic->pp.instance_uuid);
  974. if (enic->pp.set & ENIC_SET_HOST)
  975. NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
  976. enic->pp.host_uuid);
  977. return 0;
  978. nla_put_failure:
  979. return -EMSGSIZE;
  980. }
  981. static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
  982. {
  983. struct enic *enic = vnic_dev_priv(rq->vdev);
  984. if (!buf->os_buf)
  985. return;
  986. pci_unmap_single(enic->pdev, buf->dma_addr,
  987. buf->len, PCI_DMA_FROMDEVICE);
  988. dev_kfree_skb_any(buf->os_buf);
  989. }
  990. static int enic_rq_alloc_buf(struct vnic_rq *rq)
  991. {
  992. struct enic *enic = vnic_dev_priv(rq->vdev);
  993. struct net_device *netdev = enic->netdev;
  994. struct sk_buff *skb;
  995. unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
  996. unsigned int os_buf_index = 0;
  997. dma_addr_t dma_addr;
  998. skb = netdev_alloc_skb_ip_align(netdev, len);
  999. if (!skb)
  1000. return -ENOMEM;
  1001. dma_addr = pci_map_single(enic->pdev, skb->data,
  1002. len, PCI_DMA_FROMDEVICE);
  1003. enic_queue_rq_desc(rq, skb, os_buf_index,
  1004. dma_addr, len);
  1005. return 0;
  1006. }
  1007. static void enic_rq_indicate_buf(struct vnic_rq *rq,
  1008. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  1009. int skipped, void *opaque)
  1010. {
  1011. struct enic *enic = vnic_dev_priv(rq->vdev);
  1012. struct net_device *netdev = enic->netdev;
  1013. struct sk_buff *skb;
  1014. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  1015. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  1016. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  1017. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  1018. u8 packet_error;
  1019. u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
  1020. u32 rss_hash;
  1021. if (skipped)
  1022. return;
  1023. skb = buf->os_buf;
  1024. prefetch(skb->data - NET_IP_ALIGN);
  1025. pci_unmap_single(enic->pdev, buf->dma_addr,
  1026. buf->len, PCI_DMA_FROMDEVICE);
  1027. cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
  1028. &type, &color, &q_number, &completed_index,
  1029. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  1030. &csum_not_calc, &rss_hash, &bytes_written,
  1031. &packet_error, &vlan_stripped, &vlan_tci, &checksum,
  1032. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  1033. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  1034. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  1035. &fcs_ok);
  1036. if (packet_error) {
  1037. if (!fcs_ok) {
  1038. if (bytes_written > 0)
  1039. enic->rq_bad_fcs++;
  1040. else if (bytes_written == 0)
  1041. enic->rq_truncated_pkts++;
  1042. }
  1043. dev_kfree_skb_any(skb);
  1044. return;
  1045. }
  1046. if (eop && bytes_written > 0) {
  1047. /* Good receive
  1048. */
  1049. skb_put(skb, bytes_written);
  1050. skb->protocol = eth_type_trans(skb, netdev);
  1051. if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
  1052. skb->csum = htons(checksum);
  1053. skb->ip_summed = CHECKSUM_COMPLETE;
  1054. }
  1055. skb->dev = netdev;
  1056. if (enic->vlan_group && vlan_stripped &&
  1057. (vlan_tci & CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK)) {
  1058. if (netdev->features & NETIF_F_GRO)
  1059. vlan_gro_receive(&enic->napi[q_number],
  1060. enic->vlan_group, vlan_tci, skb);
  1061. else
  1062. vlan_hwaccel_receive_skb(skb,
  1063. enic->vlan_group, vlan_tci);
  1064. } else {
  1065. if (netdev->features & NETIF_F_GRO)
  1066. napi_gro_receive(&enic->napi[q_number], skb);
  1067. else
  1068. netif_receive_skb(skb);
  1069. }
  1070. } else {
  1071. /* Buffer overflow
  1072. */
  1073. dev_kfree_skb_any(skb);
  1074. }
  1075. }
  1076. static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  1077. u8 type, u16 q_number, u16 completed_index, void *opaque)
  1078. {
  1079. struct enic *enic = vnic_dev_priv(vdev);
  1080. vnic_rq_service(&enic->rq[q_number], cq_desc,
  1081. completed_index, VNIC_RQ_RETURN_DESC,
  1082. enic_rq_indicate_buf, opaque);
  1083. return 0;
  1084. }
  1085. static int enic_poll(struct napi_struct *napi, int budget)
  1086. {
  1087. struct net_device *netdev = napi->dev;
  1088. struct enic *enic = netdev_priv(netdev);
  1089. unsigned int cq_rq = enic_cq_rq(enic, 0);
  1090. unsigned int cq_wq = enic_cq_wq(enic, 0);
  1091. unsigned int intr = enic_legacy_io_intr();
  1092. unsigned int rq_work_to_do = budget;
  1093. unsigned int wq_work_to_do = -1; /* no limit */
  1094. unsigned int work_done, rq_work_done, wq_work_done;
  1095. int err;
  1096. /* Service RQ (first) and WQ
  1097. */
  1098. rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
  1099. rq_work_to_do, enic_rq_service, NULL);
  1100. wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
  1101. wq_work_to_do, enic_wq_service, NULL);
  1102. /* Accumulate intr event credits for this polling
  1103. * cycle. An intr event is the completion of a
  1104. * a WQ or RQ packet.
  1105. */
  1106. work_done = rq_work_done + wq_work_done;
  1107. if (work_done > 0)
  1108. vnic_intr_return_credits(&enic->intr[intr],
  1109. work_done,
  1110. 0 /* don't unmask intr */,
  1111. 0 /* don't reset intr timer */);
  1112. err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  1113. /* Buffer allocation failed. Stay in polling
  1114. * mode so we can try to fill the ring again.
  1115. */
  1116. if (err)
  1117. rq_work_done = rq_work_to_do;
  1118. if (rq_work_done < rq_work_to_do) {
  1119. /* Some work done, but not enough to stay in polling,
  1120. * exit polling
  1121. */
  1122. napi_complete(napi);
  1123. vnic_intr_unmask(&enic->intr[intr]);
  1124. }
  1125. return rq_work_done;
  1126. }
  1127. static int enic_poll_msix(struct napi_struct *napi, int budget)
  1128. {
  1129. struct net_device *netdev = napi->dev;
  1130. struct enic *enic = netdev_priv(netdev);
  1131. unsigned int rq = (napi - &enic->napi[0]);
  1132. unsigned int cq = enic_cq_rq(enic, rq);
  1133. unsigned int intr = enic_msix_rq_intr(enic, rq);
  1134. unsigned int work_to_do = budget;
  1135. unsigned int work_done;
  1136. int err;
  1137. /* Service RQ
  1138. */
  1139. work_done = vnic_cq_service(&enic->cq[cq],
  1140. work_to_do, enic_rq_service, NULL);
  1141. /* Return intr event credits for this polling
  1142. * cycle. An intr event is the completion of a
  1143. * RQ packet.
  1144. */
  1145. if (work_done > 0)
  1146. vnic_intr_return_credits(&enic->intr[intr],
  1147. work_done,
  1148. 0 /* don't unmask intr */,
  1149. 0 /* don't reset intr timer */);
  1150. err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
  1151. /* Buffer allocation failed. Stay in polling mode
  1152. * so we can try to fill the ring again.
  1153. */
  1154. if (err)
  1155. work_done = work_to_do;
  1156. if (work_done < work_to_do) {
  1157. /* Some work done, but not enough to stay in polling,
  1158. * exit polling
  1159. */
  1160. napi_complete(napi);
  1161. vnic_intr_unmask(&enic->intr[intr]);
  1162. }
  1163. return work_done;
  1164. }
  1165. static void enic_notify_timer(unsigned long data)
  1166. {
  1167. struct enic *enic = (struct enic *)data;
  1168. enic_notify_check(enic);
  1169. mod_timer(&enic->notify_timer,
  1170. round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
  1171. }
  1172. static void enic_free_intr(struct enic *enic)
  1173. {
  1174. struct net_device *netdev = enic->netdev;
  1175. unsigned int i;
  1176. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1177. case VNIC_DEV_INTR_MODE_INTX:
  1178. free_irq(enic->pdev->irq, netdev);
  1179. break;
  1180. case VNIC_DEV_INTR_MODE_MSI:
  1181. free_irq(enic->pdev->irq, enic);
  1182. break;
  1183. case VNIC_DEV_INTR_MODE_MSIX:
  1184. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1185. if (enic->msix[i].requested)
  1186. free_irq(enic->msix_entry[i].vector,
  1187. enic->msix[i].devid);
  1188. break;
  1189. default:
  1190. break;
  1191. }
  1192. }
  1193. static int enic_request_intr(struct enic *enic)
  1194. {
  1195. struct net_device *netdev = enic->netdev;
  1196. unsigned int i, intr;
  1197. int err = 0;
  1198. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1199. case VNIC_DEV_INTR_MODE_INTX:
  1200. err = request_irq(enic->pdev->irq, enic_isr_legacy,
  1201. IRQF_SHARED, netdev->name, netdev);
  1202. break;
  1203. case VNIC_DEV_INTR_MODE_MSI:
  1204. err = request_irq(enic->pdev->irq, enic_isr_msi,
  1205. 0, netdev->name, enic);
  1206. break;
  1207. case VNIC_DEV_INTR_MODE_MSIX:
  1208. for (i = 0; i < enic->rq_count; i++) {
  1209. intr = enic_msix_rq_intr(enic, i);
  1210. sprintf(enic->msix[intr].devname,
  1211. "%.11s-rx-%d", netdev->name, i);
  1212. enic->msix[intr].isr = enic_isr_msix_rq;
  1213. enic->msix[intr].devid = &enic->napi[i];
  1214. }
  1215. for (i = 0; i < enic->wq_count; i++) {
  1216. intr = enic_msix_wq_intr(enic, i);
  1217. sprintf(enic->msix[intr].devname,
  1218. "%.11s-tx-%d", netdev->name, i);
  1219. enic->msix[intr].isr = enic_isr_msix_wq;
  1220. enic->msix[intr].devid = enic;
  1221. }
  1222. intr = enic_msix_err_intr(enic);
  1223. sprintf(enic->msix[intr].devname,
  1224. "%.11s-err", netdev->name);
  1225. enic->msix[intr].isr = enic_isr_msix_err;
  1226. enic->msix[intr].devid = enic;
  1227. intr = enic_msix_notify_intr(enic);
  1228. sprintf(enic->msix[intr].devname,
  1229. "%.11s-notify", netdev->name);
  1230. enic->msix[intr].isr = enic_isr_msix_notify;
  1231. enic->msix[intr].devid = enic;
  1232. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1233. enic->msix[i].requested = 0;
  1234. for (i = 0; i < enic->intr_count; i++) {
  1235. err = request_irq(enic->msix_entry[i].vector,
  1236. enic->msix[i].isr, 0,
  1237. enic->msix[i].devname,
  1238. enic->msix[i].devid);
  1239. if (err) {
  1240. enic_free_intr(enic);
  1241. break;
  1242. }
  1243. enic->msix[i].requested = 1;
  1244. }
  1245. break;
  1246. default:
  1247. break;
  1248. }
  1249. return err;
  1250. }
  1251. static void enic_synchronize_irqs(struct enic *enic)
  1252. {
  1253. unsigned int i;
  1254. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1255. case VNIC_DEV_INTR_MODE_INTX:
  1256. case VNIC_DEV_INTR_MODE_MSI:
  1257. synchronize_irq(enic->pdev->irq);
  1258. break;
  1259. case VNIC_DEV_INTR_MODE_MSIX:
  1260. for (i = 0; i < enic->intr_count; i++)
  1261. synchronize_irq(enic->msix_entry[i].vector);
  1262. break;
  1263. default:
  1264. break;
  1265. }
  1266. }
  1267. static int enic_dev_notify_set(struct enic *enic)
  1268. {
  1269. int err;
  1270. spin_lock(&enic->devcmd_lock);
  1271. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1272. case VNIC_DEV_INTR_MODE_INTX:
  1273. err = vnic_dev_notify_set(enic->vdev,
  1274. enic_legacy_notify_intr());
  1275. break;
  1276. case VNIC_DEV_INTR_MODE_MSIX:
  1277. err = vnic_dev_notify_set(enic->vdev,
  1278. enic_msix_notify_intr(enic));
  1279. break;
  1280. default:
  1281. err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
  1282. break;
  1283. }
  1284. spin_unlock(&enic->devcmd_lock);
  1285. return err;
  1286. }
  1287. static void enic_notify_timer_start(struct enic *enic)
  1288. {
  1289. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1290. case VNIC_DEV_INTR_MODE_MSI:
  1291. mod_timer(&enic->notify_timer, jiffies);
  1292. break;
  1293. default:
  1294. /* Using intr for notification for INTx/MSI-X */
  1295. break;
  1296. }
  1297. }
  1298. /* rtnl lock is held, process context */
  1299. static int enic_open(struct net_device *netdev)
  1300. {
  1301. struct enic *enic = netdev_priv(netdev);
  1302. unsigned int i;
  1303. int err;
  1304. err = enic_request_intr(enic);
  1305. if (err) {
  1306. netdev_err(netdev, "Unable to request irq.\n");
  1307. return err;
  1308. }
  1309. err = enic_dev_notify_set(enic);
  1310. if (err) {
  1311. netdev_err(netdev,
  1312. "Failed to alloc notify buffer, aborting.\n");
  1313. goto err_out_free_intr;
  1314. }
  1315. for (i = 0; i < enic->rq_count; i++) {
  1316. vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
  1317. /* Need at least one buffer on ring to get going */
  1318. if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
  1319. netdev_err(netdev, "Unable to alloc receive buffers\n");
  1320. err = -ENOMEM;
  1321. goto err_out_notify_unset;
  1322. }
  1323. }
  1324. for (i = 0; i < enic->wq_count; i++)
  1325. vnic_wq_enable(&enic->wq[i]);
  1326. for (i = 0; i < enic->rq_count; i++)
  1327. vnic_rq_enable(&enic->rq[i]);
  1328. if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
  1329. enic_dev_add_addr(enic, enic->pp.mac_addr);
  1330. else
  1331. enic_dev_add_station_addr(enic);
  1332. enic_set_rx_mode(netdev);
  1333. netif_wake_queue(netdev);
  1334. for (i = 0; i < enic->rq_count; i++)
  1335. napi_enable(&enic->napi[i]);
  1336. enic_dev_enable(enic);
  1337. for (i = 0; i < enic->intr_count; i++)
  1338. vnic_intr_unmask(&enic->intr[i]);
  1339. enic_notify_timer_start(enic);
  1340. return 0;
  1341. err_out_notify_unset:
  1342. enic_dev_notify_unset(enic);
  1343. err_out_free_intr:
  1344. enic_free_intr(enic);
  1345. return err;
  1346. }
  1347. /* rtnl lock is held, process context */
  1348. static int enic_stop(struct net_device *netdev)
  1349. {
  1350. struct enic *enic = netdev_priv(netdev);
  1351. unsigned int i;
  1352. int err;
  1353. for (i = 0; i < enic->intr_count; i++) {
  1354. vnic_intr_mask(&enic->intr[i]);
  1355. (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
  1356. }
  1357. enic_synchronize_irqs(enic);
  1358. del_timer_sync(&enic->notify_timer);
  1359. enic_dev_disable(enic);
  1360. for (i = 0; i < enic->rq_count; i++)
  1361. napi_disable(&enic->napi[i]);
  1362. netif_carrier_off(netdev);
  1363. netif_tx_disable(netdev);
  1364. if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
  1365. enic_dev_del_addr(enic, enic->pp.mac_addr);
  1366. else
  1367. enic_dev_del_station_addr(enic);
  1368. for (i = 0; i < enic->wq_count; i++) {
  1369. err = vnic_wq_disable(&enic->wq[i]);
  1370. if (err)
  1371. return err;
  1372. }
  1373. for (i = 0; i < enic->rq_count; i++) {
  1374. err = vnic_rq_disable(&enic->rq[i]);
  1375. if (err)
  1376. return err;
  1377. }
  1378. enic_dev_notify_unset(enic);
  1379. enic_free_intr(enic);
  1380. for (i = 0; i < enic->wq_count; i++)
  1381. vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
  1382. for (i = 0; i < enic->rq_count; i++)
  1383. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1384. for (i = 0; i < enic->cq_count; i++)
  1385. vnic_cq_clean(&enic->cq[i]);
  1386. for (i = 0; i < enic->intr_count; i++)
  1387. vnic_intr_clean(&enic->intr[i]);
  1388. return 0;
  1389. }
  1390. static int enic_change_mtu(struct net_device *netdev, int new_mtu)
  1391. {
  1392. struct enic *enic = netdev_priv(netdev);
  1393. int running = netif_running(netdev);
  1394. if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
  1395. return -EINVAL;
  1396. if (enic_is_dynamic(enic))
  1397. return -EOPNOTSUPP;
  1398. if (running)
  1399. enic_stop(netdev);
  1400. netdev->mtu = new_mtu;
  1401. if (netdev->mtu > enic->port_mtu)
  1402. netdev_warn(netdev,
  1403. "interface MTU (%d) set higher than port MTU (%d)\n",
  1404. netdev->mtu, enic->port_mtu);
  1405. if (running)
  1406. enic_open(netdev);
  1407. return 0;
  1408. }
  1409. static void enic_change_mtu_work(struct work_struct *work)
  1410. {
  1411. struct enic *enic = container_of(work, struct enic, change_mtu_work);
  1412. struct net_device *netdev = enic->netdev;
  1413. int new_mtu = vnic_dev_mtu(enic->vdev);
  1414. int err;
  1415. unsigned int i;
  1416. new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
  1417. rtnl_lock();
  1418. /* Stop RQ */
  1419. del_timer_sync(&enic->notify_timer);
  1420. for (i = 0; i < enic->rq_count; i++)
  1421. napi_disable(&enic->napi[i]);
  1422. vnic_intr_mask(&enic->intr[0]);
  1423. enic_synchronize_irqs(enic);
  1424. err = vnic_rq_disable(&enic->rq[0]);
  1425. if (err) {
  1426. netdev_err(netdev, "Unable to disable RQ.\n");
  1427. return;
  1428. }
  1429. vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
  1430. vnic_cq_clean(&enic->cq[0]);
  1431. vnic_intr_clean(&enic->intr[0]);
  1432. /* Fill RQ with new_mtu-sized buffers */
  1433. netdev->mtu = new_mtu;
  1434. vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  1435. /* Need at least one buffer on ring to get going */
  1436. if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
  1437. netdev_err(netdev, "Unable to alloc receive buffers.\n");
  1438. return;
  1439. }
  1440. /* Start RQ */
  1441. vnic_rq_enable(&enic->rq[0]);
  1442. napi_enable(&enic->napi[0]);
  1443. vnic_intr_unmask(&enic->intr[0]);
  1444. enic_notify_timer_start(enic);
  1445. rtnl_unlock();
  1446. netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
  1447. }
  1448. #ifdef CONFIG_NET_POLL_CONTROLLER
  1449. static void enic_poll_controller(struct net_device *netdev)
  1450. {
  1451. struct enic *enic = netdev_priv(netdev);
  1452. struct vnic_dev *vdev = enic->vdev;
  1453. unsigned int i, intr;
  1454. switch (vnic_dev_get_intr_mode(vdev)) {
  1455. case VNIC_DEV_INTR_MODE_MSIX:
  1456. for (i = 0; i < enic->rq_count; i++) {
  1457. intr = enic_msix_rq_intr(enic, i);
  1458. enic_isr_msix_rq(enic->msix_entry[intr].vector,
  1459. &enic->napi[i]);
  1460. }
  1461. intr = enic_msix_wq_intr(enic, i);
  1462. enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
  1463. break;
  1464. case VNIC_DEV_INTR_MODE_MSI:
  1465. enic_isr_msi(enic->pdev->irq, enic);
  1466. break;
  1467. case VNIC_DEV_INTR_MODE_INTX:
  1468. enic_isr_legacy(enic->pdev->irq, netdev);
  1469. break;
  1470. default:
  1471. break;
  1472. }
  1473. }
  1474. #endif
  1475. static int enic_dev_wait(struct vnic_dev *vdev,
  1476. int (*start)(struct vnic_dev *, int),
  1477. int (*finished)(struct vnic_dev *, int *),
  1478. int arg)
  1479. {
  1480. unsigned long time;
  1481. int done;
  1482. int err;
  1483. BUG_ON(in_interrupt());
  1484. err = start(vdev, arg);
  1485. if (err)
  1486. return err;
  1487. /* Wait for func to complete...2 seconds max
  1488. */
  1489. time = jiffies + (HZ * 2);
  1490. do {
  1491. err = finished(vdev, &done);
  1492. if (err)
  1493. return err;
  1494. if (done)
  1495. return 0;
  1496. schedule_timeout_uninterruptible(HZ / 10);
  1497. } while (time_after(time, jiffies));
  1498. return -ETIMEDOUT;
  1499. }
  1500. static int enic_dev_open(struct enic *enic)
  1501. {
  1502. int err;
  1503. err = enic_dev_wait(enic->vdev, vnic_dev_open,
  1504. vnic_dev_open_done, 0);
  1505. if (err)
  1506. dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
  1507. err);
  1508. return err;
  1509. }
  1510. static int enic_dev_hang_reset(struct enic *enic)
  1511. {
  1512. int err;
  1513. err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
  1514. vnic_dev_hang_reset_done, 0);
  1515. if (err)
  1516. netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
  1517. err);
  1518. return err;
  1519. }
  1520. static int enic_set_rsskey(struct enic *enic)
  1521. {
  1522. dma_addr_t rss_key_buf_pa;
  1523. union vnic_rss_key *rss_key_buf_va = NULL;
  1524. union vnic_rss_key rss_key = {
  1525. .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
  1526. .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
  1527. .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
  1528. .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
  1529. };
  1530. int err;
  1531. rss_key_buf_va = pci_alloc_consistent(enic->pdev,
  1532. sizeof(union vnic_rss_key), &rss_key_buf_pa);
  1533. if (!rss_key_buf_va)
  1534. return -ENOMEM;
  1535. memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
  1536. spin_lock(&enic->devcmd_lock);
  1537. err = enic_set_rss_key(enic,
  1538. rss_key_buf_pa,
  1539. sizeof(union vnic_rss_key));
  1540. spin_unlock(&enic->devcmd_lock);
  1541. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
  1542. rss_key_buf_va, rss_key_buf_pa);
  1543. return err;
  1544. }
  1545. static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
  1546. {
  1547. dma_addr_t rss_cpu_buf_pa;
  1548. union vnic_rss_cpu *rss_cpu_buf_va = NULL;
  1549. unsigned int i;
  1550. int err;
  1551. rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
  1552. sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
  1553. if (!rss_cpu_buf_va)
  1554. return -ENOMEM;
  1555. for (i = 0; i < (1 << rss_hash_bits); i++)
  1556. (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
  1557. spin_lock(&enic->devcmd_lock);
  1558. err = enic_set_rss_cpu(enic,
  1559. rss_cpu_buf_pa,
  1560. sizeof(union vnic_rss_cpu));
  1561. spin_unlock(&enic->devcmd_lock);
  1562. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
  1563. rss_cpu_buf_va, rss_cpu_buf_pa);
  1564. return err;
  1565. }
  1566. static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
  1567. u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
  1568. {
  1569. const u8 tso_ipid_split_en = 0;
  1570. const u8 ig_vlan_strip_en = 1;
  1571. int err;
  1572. /* Enable VLAN tag stripping.
  1573. */
  1574. spin_lock(&enic->devcmd_lock);
  1575. err = enic_set_nic_cfg(enic,
  1576. rss_default_cpu, rss_hash_type,
  1577. rss_hash_bits, rss_base_cpu,
  1578. rss_enable, tso_ipid_split_en,
  1579. ig_vlan_strip_en);
  1580. spin_unlock(&enic->devcmd_lock);
  1581. return err;
  1582. }
  1583. static int enic_set_rss_nic_cfg(struct enic *enic)
  1584. {
  1585. struct device *dev = enic_get_dev(enic);
  1586. const u8 rss_default_cpu = 0;
  1587. const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
  1588. NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
  1589. NIC_CFG_RSS_HASH_TYPE_IPV6 |
  1590. NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
  1591. const u8 rss_hash_bits = 7;
  1592. const u8 rss_base_cpu = 0;
  1593. u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
  1594. if (rss_enable) {
  1595. if (!enic_set_rsskey(enic)) {
  1596. if (enic_set_rsscpu(enic, rss_hash_bits)) {
  1597. rss_enable = 0;
  1598. dev_warn(dev, "RSS disabled, "
  1599. "Failed to set RSS cpu indirection table.");
  1600. }
  1601. } else {
  1602. rss_enable = 0;
  1603. dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
  1604. }
  1605. }
  1606. return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
  1607. rss_hash_bits, rss_base_cpu, rss_enable);
  1608. }
  1609. static void enic_reset(struct work_struct *work)
  1610. {
  1611. struct enic *enic = container_of(work, struct enic, reset);
  1612. if (!netif_running(enic->netdev))
  1613. return;
  1614. rtnl_lock();
  1615. enic_dev_hang_notify(enic);
  1616. enic_stop(enic->netdev);
  1617. enic_dev_hang_reset(enic);
  1618. enic_reset_addr_lists(enic);
  1619. enic_init_vnic_resources(enic);
  1620. enic_set_rss_nic_cfg(enic);
  1621. enic_dev_set_ig_vlan_rewrite_mode(enic);
  1622. enic_open(enic->netdev);
  1623. rtnl_unlock();
  1624. }
  1625. static int enic_set_intr_mode(struct enic *enic)
  1626. {
  1627. unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
  1628. unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
  1629. unsigned int i;
  1630. /* Set interrupt mode (INTx, MSI, MSI-X) depending
  1631. * on system capabilities.
  1632. *
  1633. * Try MSI-X first
  1634. *
  1635. * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
  1636. * (the second to last INTR is used for WQ/RQ errors)
  1637. * (the last INTR is used for notifications)
  1638. */
  1639. BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
  1640. for (i = 0; i < n + m + 2; i++)
  1641. enic->msix_entry[i].entry = i;
  1642. /* Use multiple RQs if RSS is enabled
  1643. */
  1644. if (ENIC_SETTING(enic, RSS) &&
  1645. enic->config.intr_mode < 1 &&
  1646. enic->rq_count >= n &&
  1647. enic->wq_count >= m &&
  1648. enic->cq_count >= n + m &&
  1649. enic->intr_count >= n + m + 2) {
  1650. if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
  1651. enic->rq_count = n;
  1652. enic->wq_count = m;
  1653. enic->cq_count = n + m;
  1654. enic->intr_count = n + m + 2;
  1655. vnic_dev_set_intr_mode(enic->vdev,
  1656. VNIC_DEV_INTR_MODE_MSIX);
  1657. return 0;
  1658. }
  1659. }
  1660. if (enic->config.intr_mode < 1 &&
  1661. enic->rq_count >= 1 &&
  1662. enic->wq_count >= m &&
  1663. enic->cq_count >= 1 + m &&
  1664. enic->intr_count >= 1 + m + 2) {
  1665. if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
  1666. enic->rq_count = 1;
  1667. enic->wq_count = m;
  1668. enic->cq_count = 1 + m;
  1669. enic->intr_count = 1 + m + 2;
  1670. vnic_dev_set_intr_mode(enic->vdev,
  1671. VNIC_DEV_INTR_MODE_MSIX);
  1672. return 0;
  1673. }
  1674. }
  1675. /* Next try MSI
  1676. *
  1677. * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
  1678. */
  1679. if (enic->config.intr_mode < 2 &&
  1680. enic->rq_count >= 1 &&
  1681. enic->wq_count >= 1 &&
  1682. enic->cq_count >= 2 &&
  1683. enic->intr_count >= 1 &&
  1684. !pci_enable_msi(enic->pdev)) {
  1685. enic->rq_count = 1;
  1686. enic->wq_count = 1;
  1687. enic->cq_count = 2;
  1688. enic->intr_count = 1;
  1689. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
  1690. return 0;
  1691. }
  1692. /* Next try INTx
  1693. *
  1694. * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
  1695. * (the first INTR is used for WQ/RQ)
  1696. * (the second INTR is used for WQ/RQ errors)
  1697. * (the last INTR is used for notifications)
  1698. */
  1699. if (enic->config.intr_mode < 3 &&
  1700. enic->rq_count >= 1 &&
  1701. enic->wq_count >= 1 &&
  1702. enic->cq_count >= 2 &&
  1703. enic->intr_count >= 3) {
  1704. enic->rq_count = 1;
  1705. enic->wq_count = 1;
  1706. enic->cq_count = 2;
  1707. enic->intr_count = 3;
  1708. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
  1709. return 0;
  1710. }
  1711. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1712. return -EINVAL;
  1713. }
  1714. static void enic_clear_intr_mode(struct enic *enic)
  1715. {
  1716. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1717. case VNIC_DEV_INTR_MODE_MSIX:
  1718. pci_disable_msix(enic->pdev);
  1719. break;
  1720. case VNIC_DEV_INTR_MODE_MSI:
  1721. pci_disable_msi(enic->pdev);
  1722. break;
  1723. default:
  1724. break;
  1725. }
  1726. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1727. }
  1728. static const struct net_device_ops enic_netdev_dynamic_ops = {
  1729. .ndo_open = enic_open,
  1730. .ndo_stop = enic_stop,
  1731. .ndo_start_xmit = enic_hard_start_xmit,
  1732. .ndo_get_stats64 = enic_get_stats,
  1733. .ndo_validate_addr = eth_validate_addr,
  1734. .ndo_set_rx_mode = enic_set_rx_mode,
  1735. .ndo_set_multicast_list = enic_set_rx_mode,
  1736. .ndo_set_mac_address = enic_set_mac_address_dynamic,
  1737. .ndo_change_mtu = enic_change_mtu,
  1738. .ndo_vlan_rx_register = enic_vlan_rx_register,
  1739. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1740. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1741. .ndo_tx_timeout = enic_tx_timeout,
  1742. .ndo_set_vf_port = enic_set_vf_port,
  1743. .ndo_get_vf_port = enic_get_vf_port,
  1744. .ndo_set_vf_mac = enic_set_vf_mac,
  1745. #ifdef CONFIG_NET_POLL_CONTROLLER
  1746. .ndo_poll_controller = enic_poll_controller,
  1747. #endif
  1748. };
  1749. static const struct net_device_ops enic_netdev_ops = {
  1750. .ndo_open = enic_open,
  1751. .ndo_stop = enic_stop,
  1752. .ndo_start_xmit = enic_hard_start_xmit,
  1753. .ndo_get_stats64 = enic_get_stats,
  1754. .ndo_validate_addr = eth_validate_addr,
  1755. .ndo_set_mac_address = enic_set_mac_address,
  1756. .ndo_set_rx_mode = enic_set_rx_mode,
  1757. .ndo_set_multicast_list = enic_set_rx_mode,
  1758. .ndo_change_mtu = enic_change_mtu,
  1759. .ndo_vlan_rx_register = enic_vlan_rx_register,
  1760. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1761. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1762. .ndo_tx_timeout = enic_tx_timeout,
  1763. #ifdef CONFIG_NET_POLL_CONTROLLER
  1764. .ndo_poll_controller = enic_poll_controller,
  1765. #endif
  1766. };
  1767. static void enic_dev_deinit(struct enic *enic)
  1768. {
  1769. unsigned int i;
  1770. for (i = 0; i < enic->rq_count; i++)
  1771. netif_napi_del(&enic->napi[i]);
  1772. enic_free_vnic_resources(enic);
  1773. enic_clear_intr_mode(enic);
  1774. }
  1775. static int enic_dev_init(struct enic *enic)
  1776. {
  1777. struct device *dev = enic_get_dev(enic);
  1778. struct net_device *netdev = enic->netdev;
  1779. unsigned int i;
  1780. int err;
  1781. /* Get vNIC configuration
  1782. */
  1783. err = enic_get_vnic_config(enic);
  1784. if (err) {
  1785. dev_err(dev, "Get vNIC configuration failed, aborting\n");
  1786. return err;
  1787. }
  1788. /* Get available resource counts
  1789. */
  1790. enic_get_res_counts(enic);
  1791. /* Set interrupt mode based on resource counts and system
  1792. * capabilities
  1793. */
  1794. err = enic_set_intr_mode(enic);
  1795. if (err) {
  1796. dev_err(dev, "Failed to set intr mode based on resource "
  1797. "counts and system capabilities, aborting\n");
  1798. return err;
  1799. }
  1800. /* Allocate and configure vNIC resources
  1801. */
  1802. err = enic_alloc_vnic_resources(enic);
  1803. if (err) {
  1804. dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
  1805. goto err_out_free_vnic_resources;
  1806. }
  1807. enic_init_vnic_resources(enic);
  1808. err = enic_set_rss_nic_cfg(enic);
  1809. if (err) {
  1810. dev_err(dev, "Failed to config nic, aborting\n");
  1811. goto err_out_free_vnic_resources;
  1812. }
  1813. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1814. default:
  1815. netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
  1816. break;
  1817. case VNIC_DEV_INTR_MODE_MSIX:
  1818. for (i = 0; i < enic->rq_count; i++)
  1819. netif_napi_add(netdev, &enic->napi[i],
  1820. enic_poll_msix, 64);
  1821. break;
  1822. }
  1823. return 0;
  1824. err_out_free_vnic_resources:
  1825. enic_clear_intr_mode(enic);
  1826. enic_free_vnic_resources(enic);
  1827. return err;
  1828. }
  1829. static void enic_iounmap(struct enic *enic)
  1830. {
  1831. unsigned int i;
  1832. for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
  1833. if (enic->bar[i].vaddr)
  1834. iounmap(enic->bar[i].vaddr);
  1835. }
  1836. static int __devinit enic_probe(struct pci_dev *pdev,
  1837. const struct pci_device_id *ent)
  1838. {
  1839. struct device *dev = &pdev->dev;
  1840. struct net_device *netdev;
  1841. struct enic *enic;
  1842. int using_dac = 0;
  1843. unsigned int i;
  1844. int err;
  1845. /* Allocate net device structure and initialize. Private
  1846. * instance data is initialized to zero.
  1847. */
  1848. netdev = alloc_etherdev(sizeof(struct enic));
  1849. if (!netdev) {
  1850. pr_err("Etherdev alloc failed, aborting\n");
  1851. return -ENOMEM;
  1852. }
  1853. pci_set_drvdata(pdev, netdev);
  1854. SET_NETDEV_DEV(netdev, &pdev->dev);
  1855. enic = netdev_priv(netdev);
  1856. enic->netdev = netdev;
  1857. enic->pdev = pdev;
  1858. /* Setup PCI resources
  1859. */
  1860. err = pci_enable_device_mem(pdev);
  1861. if (err) {
  1862. dev_err(dev, "Cannot enable PCI device, aborting\n");
  1863. goto err_out_free_netdev;
  1864. }
  1865. err = pci_request_regions(pdev, DRV_NAME);
  1866. if (err) {
  1867. dev_err(dev, "Cannot request PCI regions, aborting\n");
  1868. goto err_out_disable_device;
  1869. }
  1870. pci_set_master(pdev);
  1871. /* Query PCI controller on system for DMA addressing
  1872. * limitation for the device. Try 40-bit first, and
  1873. * fail to 32-bit.
  1874. */
  1875. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
  1876. if (err) {
  1877. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1878. if (err) {
  1879. dev_err(dev, "No usable DMA configuration, aborting\n");
  1880. goto err_out_release_regions;
  1881. }
  1882. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  1883. if (err) {
  1884. dev_err(dev, "Unable to obtain %u-bit DMA "
  1885. "for consistent allocations, aborting\n", 32);
  1886. goto err_out_release_regions;
  1887. }
  1888. } else {
  1889. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
  1890. if (err) {
  1891. dev_err(dev, "Unable to obtain %u-bit DMA "
  1892. "for consistent allocations, aborting\n", 40);
  1893. goto err_out_release_regions;
  1894. }
  1895. using_dac = 1;
  1896. }
  1897. /* Map vNIC resources from BAR0-5
  1898. */
  1899. for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
  1900. if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
  1901. continue;
  1902. enic->bar[i].len = pci_resource_len(pdev, i);
  1903. enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
  1904. if (!enic->bar[i].vaddr) {
  1905. dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
  1906. err = -ENODEV;
  1907. goto err_out_iounmap;
  1908. }
  1909. enic->bar[i].bus_addr = pci_resource_start(pdev, i);
  1910. }
  1911. /* Register vNIC device
  1912. */
  1913. enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
  1914. ARRAY_SIZE(enic->bar));
  1915. if (!enic->vdev) {
  1916. dev_err(dev, "vNIC registration failed, aborting\n");
  1917. err = -ENODEV;
  1918. goto err_out_iounmap;
  1919. }
  1920. /* Issue device open to get device in known state
  1921. */
  1922. err = enic_dev_open(enic);
  1923. if (err) {
  1924. dev_err(dev, "vNIC dev open failed, aborting\n");
  1925. goto err_out_vnic_unregister;
  1926. }
  1927. /* Setup devcmd lock
  1928. */
  1929. spin_lock_init(&enic->devcmd_lock);
  1930. /*
  1931. * Set ingress vlan rewrite mode before vnic initialization
  1932. */
  1933. err = enic_dev_set_ig_vlan_rewrite_mode(enic);
  1934. if (err) {
  1935. dev_err(dev,
  1936. "Failed to set ingress vlan rewrite mode, aborting.\n");
  1937. goto err_out_dev_close;
  1938. }
  1939. /* Issue device init to initialize the vnic-to-switch link.
  1940. * We'll start with carrier off and wait for link UP
  1941. * notification later to turn on carrier. We don't need
  1942. * to wait here for the vnic-to-switch link initialization
  1943. * to complete; link UP notification is the indication that
  1944. * the process is complete.
  1945. */
  1946. netif_carrier_off(netdev);
  1947. /* Do not call dev_init for a dynamic vnic.
  1948. * For a dynamic vnic, init_prov_info will be
  1949. * called later by an upper layer.
  1950. */
  1951. if (!enic_is_dynamic(enic)) {
  1952. err = vnic_dev_init(enic->vdev, 0);
  1953. if (err) {
  1954. dev_err(dev, "vNIC dev init failed, aborting\n");
  1955. goto err_out_dev_close;
  1956. }
  1957. }
  1958. err = enic_dev_init(enic);
  1959. if (err) {
  1960. dev_err(dev, "Device initialization failed, aborting\n");
  1961. goto err_out_dev_close;
  1962. }
  1963. /* Setup notification timer, HW reset task, and wq locks
  1964. */
  1965. init_timer(&enic->notify_timer);
  1966. enic->notify_timer.function = enic_notify_timer;
  1967. enic->notify_timer.data = (unsigned long)enic;
  1968. INIT_WORK(&enic->reset, enic_reset);
  1969. INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
  1970. for (i = 0; i < enic->wq_count; i++)
  1971. spin_lock_init(&enic->wq_lock[i]);
  1972. /* Register net device
  1973. */
  1974. enic->port_mtu = enic->config.mtu;
  1975. (void)enic_change_mtu(netdev, enic->port_mtu);
  1976. err = enic_set_mac_addr(netdev, enic->mac_addr);
  1977. if (err) {
  1978. dev_err(dev, "Invalid MAC address, aborting\n");
  1979. goto err_out_dev_deinit;
  1980. }
  1981. enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
  1982. enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
  1983. if (enic_is_dynamic(enic))
  1984. netdev->netdev_ops = &enic_netdev_dynamic_ops;
  1985. else
  1986. netdev->netdev_ops = &enic_netdev_ops;
  1987. netdev->watchdog_timeo = 2 * HZ;
  1988. netdev->ethtool_ops = &enic_ethtool_ops;
  1989. netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
  1990. if (ENIC_SETTING(enic, LOOP)) {
  1991. netdev->features &= ~NETIF_F_HW_VLAN_TX;
  1992. enic->loop_enable = 1;
  1993. enic->loop_tag = enic->config.loop_tag;
  1994. dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
  1995. }
  1996. if (ENIC_SETTING(enic, TXCSUM))
  1997. netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
  1998. if (ENIC_SETTING(enic, TSO))
  1999. netdev->hw_features |= NETIF_F_TSO |
  2000. NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  2001. if (ENIC_SETTING(enic, RXCSUM))
  2002. netdev->hw_features |= NETIF_F_RXCSUM;
  2003. netdev->features |= netdev->hw_features;
  2004. if (using_dac)
  2005. netdev->features |= NETIF_F_HIGHDMA;
  2006. err = register_netdev(netdev);
  2007. if (err) {
  2008. dev_err(dev, "Cannot register net device, aborting\n");
  2009. goto err_out_dev_deinit;
  2010. }
  2011. return 0;
  2012. err_out_dev_deinit:
  2013. enic_dev_deinit(enic);
  2014. err_out_dev_close:
  2015. vnic_dev_close(enic->vdev);
  2016. err_out_vnic_unregister:
  2017. vnic_dev_unregister(enic->vdev);
  2018. err_out_iounmap:
  2019. enic_iounmap(enic);
  2020. err_out_release_regions:
  2021. pci_release_regions(pdev);
  2022. err_out_disable_device:
  2023. pci_disable_device(pdev);
  2024. err_out_free_netdev:
  2025. pci_set_drvdata(pdev, NULL);
  2026. free_netdev(netdev);
  2027. return err;
  2028. }
  2029. static void __devexit enic_remove(struct pci_dev *pdev)
  2030. {
  2031. struct net_device *netdev = pci_get_drvdata(pdev);
  2032. if (netdev) {
  2033. struct enic *enic = netdev_priv(netdev);
  2034. cancel_work_sync(&enic->reset);
  2035. cancel_work_sync(&enic->change_mtu_work);
  2036. unregister_netdev(netdev);
  2037. enic_dev_deinit(enic);
  2038. vnic_dev_close(enic->vdev);
  2039. vnic_dev_unregister(enic->vdev);
  2040. enic_iounmap(enic);
  2041. pci_release_regions(pdev);
  2042. pci_disable_device(pdev);
  2043. pci_set_drvdata(pdev, NULL);
  2044. free_netdev(netdev);
  2045. }
  2046. }
  2047. static struct pci_driver enic_driver = {
  2048. .name = DRV_NAME,
  2049. .id_table = enic_id_table,
  2050. .probe = enic_probe,
  2051. .remove = __devexit_p(enic_remove),
  2052. };
  2053. static int __init enic_init_module(void)
  2054. {
  2055. pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
  2056. return pci_register_driver(&enic_driver);
  2057. }
  2058. static void __exit enic_cleanup_module(void)
  2059. {
  2060. pci_unregister_driver(&enic_driver);
  2061. }
  2062. module_init(enic_init_module);
  2063. module_exit(enic_cleanup_module);