bf5xx-ac97.c 11 KB

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  1. /*
  2. * bf5xx-ac97.c -- AC97 support for the ADI blackfin chip.
  3. *
  4. * Author: Roy Huang
  5. * Created: 11th. June 2007
  6. * Copyright: Analog Device Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/wait.h>
  17. #include <linux/delay.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/ac97_codec.h>
  21. #include <sound/initval.h>
  22. #include <sound/soc.h>
  23. #include <asm/irq.h>
  24. #include <asm/portmux.h>
  25. #include <linux/mutex.h>
  26. #include <linux/gpio.h>
  27. #include "bf5xx-sport.h"
  28. #include "bf5xx-ac97.h"
  29. #if defined(CONFIG_BF54x)
  30. #define PIN_REQ_SPORT_0 {P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, \
  31. P_SPORT0_RFS, P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0}
  32. #define PIN_REQ_SPORT_1 {P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, \
  33. P_SPORT1_RFS, P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0}
  34. #define PIN_REQ_SPORT_2 {P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, \
  35. P_SPORT2_RFS, P_SPORT2_DRPRI, P_SPORT2_RSCLK, 0}
  36. #define PIN_REQ_SPORT_3 {P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, \
  37. P_SPORT3_RFS, P_SPORT3_DRPRI, P_SPORT3_RSCLK, 0}
  38. #else
  39. #define PIN_REQ_SPORT_0 {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \
  40. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0}
  41. #define PIN_REQ_SPORT_1 {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \
  42. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0}
  43. #endif
  44. static int *cmd_count;
  45. static int sport_num = CONFIG_SND_BF5XX_SPORT_NUM;
  46. #if defined(CONFIG_BF54x)
  47. static struct sport_param sport_params[4] = {
  48. {
  49. .dma_rx_chan = CH_SPORT0_RX,
  50. .dma_tx_chan = CH_SPORT0_TX,
  51. .err_irq = IRQ_SPORT0_ERR,
  52. .regs = (struct sport_register *)SPORT0_TCR1,
  53. },
  54. {
  55. .dma_rx_chan = CH_SPORT1_RX,
  56. .dma_tx_chan = CH_SPORT1_TX,
  57. .err_irq = IRQ_SPORT1_ERR,
  58. .regs = (struct sport_register *)SPORT1_TCR1,
  59. },
  60. {
  61. .dma_rx_chan = CH_SPORT2_RX,
  62. .dma_tx_chan = CH_SPORT2_TX,
  63. .err_irq = IRQ_SPORT2_ERR,
  64. .regs = (struct sport_register *)SPORT2_TCR1,
  65. },
  66. {
  67. .dma_rx_chan = CH_SPORT3_RX,
  68. .dma_tx_chan = CH_SPORT3_TX,
  69. .err_irq = IRQ_SPORT3_ERR,
  70. .regs = (struct sport_register *)SPORT3_TCR1,
  71. }
  72. };
  73. #else
  74. static struct sport_param sport_params[2] = {
  75. {
  76. .dma_rx_chan = CH_SPORT0_RX,
  77. .dma_tx_chan = CH_SPORT0_TX,
  78. .err_irq = IRQ_SPORT0_ERROR,
  79. .regs = (struct sport_register *)SPORT0_TCR1,
  80. },
  81. {
  82. .dma_rx_chan = CH_SPORT1_RX,
  83. .dma_tx_chan = CH_SPORT1_TX,
  84. .err_irq = IRQ_SPORT1_ERROR,
  85. .regs = (struct sport_register *)SPORT1_TCR1,
  86. }
  87. };
  88. #endif
  89. void bf5xx_pcm_to_ac97(struct ac97_frame *dst, const __u32 *src, \
  90. size_t count)
  91. {
  92. while (count--) {
  93. dst->ac97_tag = TAG_VALID | TAG_PCM;
  94. (dst++)->ac97_pcm = *src++;
  95. }
  96. }
  97. EXPORT_SYMBOL(bf5xx_pcm_to_ac97);
  98. void bf5xx_ac97_to_pcm(const struct ac97_frame *src, __u32 *dst, \
  99. size_t count)
  100. {
  101. while (count--)
  102. *(dst++) = (src++)->ac97_pcm;
  103. }
  104. EXPORT_SYMBOL(bf5xx_ac97_to_pcm);
  105. static unsigned int sport_tx_curr_frag(struct sport_device *sport)
  106. {
  107. return sport->tx_curr_frag = sport_curr_offset_tx(sport) / \
  108. sport->tx_fragsize;
  109. }
  110. static void enqueue_cmd(struct snd_ac97 *ac97, __u16 addr, __u16 data)
  111. {
  112. struct sport_device *sport = sport_handle;
  113. int nextfrag = sport_tx_curr_frag(sport);
  114. struct ac97_frame *nextwrite;
  115. sport_incfrag(sport, &nextfrag, 1);
  116. sport_incfrag(sport, &nextfrag, 1);
  117. nextwrite = (struct ac97_frame *)(sport->tx_buf + \
  118. nextfrag * sport->tx_fragsize);
  119. pr_debug("sport->tx_buf:%p, nextfrag:0x%x nextwrite:%p, cmd_count:%d\n",
  120. sport->tx_buf, nextfrag, nextwrite, cmd_count[nextfrag]);
  121. nextwrite[cmd_count[nextfrag]].ac97_tag |= TAG_CMD;
  122. nextwrite[cmd_count[nextfrag]].ac97_addr = addr;
  123. nextwrite[cmd_count[nextfrag]].ac97_data = data;
  124. ++cmd_count[nextfrag];
  125. pr_debug("ac97_sport: Inserting %02x/%04x into fragment %d\n",
  126. addr >> 8, data, nextfrag);
  127. }
  128. static unsigned short bf5xx_ac97_read(struct snd_ac97 *ac97,
  129. unsigned short reg)
  130. {
  131. struct ac97_frame out_frame[2], in_frame[2];
  132. pr_debug("%s enter 0x%x\n", __func__, reg);
  133. /* When dma descriptor is enabled, the register should not be read */
  134. if (sport_handle->tx_run || sport_handle->rx_run) {
  135. pr_err("Could you send a mail to cliff.cai@analog.com "
  136. "to report this?\n");
  137. return -EFAULT;
  138. }
  139. memset(&out_frame, 0, 2 * sizeof(struct ac97_frame));
  140. memset(&in_frame, 0, 2 * sizeof(struct ac97_frame));
  141. out_frame[0].ac97_tag = TAG_VALID | TAG_CMD;
  142. out_frame[0].ac97_addr = ((reg << 8) | 0x8000);
  143. sport_send_and_recv(sport_handle, (unsigned char *)&out_frame,
  144. (unsigned char *)&in_frame,
  145. 2 * sizeof(struct ac97_frame));
  146. return in_frame[1].ac97_data;
  147. }
  148. void bf5xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  149. unsigned short val)
  150. {
  151. pr_debug("%s enter 0x%x:0x%04x\n", __func__, reg, val);
  152. if (sport_handle->tx_run) {
  153. enqueue_cmd(ac97, (reg << 8), val); /* write */
  154. enqueue_cmd(ac97, (reg << 8) | 0x8000, 0); /* read back */
  155. } else {
  156. struct ac97_frame frame;
  157. memset(&frame, 0, sizeof(struct ac97_frame));
  158. frame.ac97_tag = TAG_VALID | TAG_CMD;
  159. frame.ac97_addr = (reg << 8);
  160. frame.ac97_data = val;
  161. sport_send_and_recv(sport_handle, (unsigned char *)&frame, \
  162. NULL, sizeof(struct ac97_frame));
  163. }
  164. }
  165. static void bf5xx_ac97_warm_reset(struct snd_ac97 *ac97)
  166. {
  167. #if defined(CONFIG_BF54x) || defined(CONFIG_BF561) || \
  168. (defined(BF537_FAMILY) && (CONFIG_SND_BF5XX_SPORT_NUM == 1))
  169. #define CONCAT(a, b, c) a ## b ## c
  170. #define BFIN_SPORT_RFS(x) CONCAT(P_SPORT, x, _RFS)
  171. u16 per = BFIN_SPORT_RFS(CONFIG_SND_BF5XX_SPORT_NUM);
  172. u16 gpio = P_IDENT(BFIN_SPORT_RFS(CONFIG_SND_BF5XX_SPORT_NUM));
  173. pr_debug("%s enter\n", __func__);
  174. peripheral_free(per);
  175. gpio_request(gpio, "bf5xx-ac97");
  176. gpio_direction_output(gpio, 1);
  177. udelay(2);
  178. gpio_set_value(gpio, 0);
  179. udelay(1);
  180. gpio_free(gpio);
  181. peripheral_request(per, "soc-audio");
  182. #else
  183. pr_info("%s: Not implemented\n", __func__);
  184. #endif
  185. }
  186. static void bf5xx_ac97_cold_reset(struct snd_ac97 *ac97)
  187. {
  188. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  189. pr_debug("%s enter\n", __func__);
  190. /* It is specified for bf548-ezkit */
  191. gpio_set_value(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 0);
  192. /* Keep reset pin low for 1 ms */
  193. mdelay(1);
  194. gpio_set_value(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 1);
  195. /* Wait for bit clock recover */
  196. mdelay(1);
  197. #else
  198. pr_info("%s: Not implemented\n", __func__);
  199. #endif
  200. }
  201. struct snd_ac97_bus_ops soc_ac97_ops = {
  202. .read = bf5xx_ac97_read,
  203. .write = bf5xx_ac97_write,
  204. .warm_reset = bf5xx_ac97_warm_reset,
  205. .reset = bf5xx_ac97_cold_reset,
  206. };
  207. EXPORT_SYMBOL_GPL(soc_ac97_ops);
  208. #ifdef CONFIG_PM
  209. static int bf5xx_ac97_suspend(struct platform_device *pdev,
  210. struct snd_soc_dai *dai)
  211. {
  212. struct sport_device *sport =
  213. (struct sport_device *)dai->private_data;
  214. pr_debug("%s : sport %d\n", __func__, dai->id);
  215. if (!dai->active)
  216. return 0;
  217. if (dai->capture.active)
  218. sport_rx_stop(sport);
  219. if (dai->playback.active)
  220. sport_tx_stop(sport);
  221. return 0;
  222. }
  223. static int bf5xx_ac97_resume(struct platform_device *pdev,
  224. struct snd_soc_dai *dai)
  225. {
  226. int ret;
  227. struct sport_device *sport =
  228. (struct sport_device *)dai->private_data;
  229. pr_debug("%s : sport %d\n", __func__, dai->id);
  230. if (!dai->active)
  231. return 0;
  232. ret = sport_set_multichannel(sport_handle, 16, 0x1F, 1);
  233. if (ret) {
  234. pr_err("SPORT is busy!\n");
  235. return -EBUSY;
  236. }
  237. ret = sport_config_rx(sport_handle, IRFS, 0xF, 0, (16*16-1));
  238. if (ret) {
  239. pr_err("SPORT is busy!\n");
  240. return -EBUSY;
  241. }
  242. ret = sport_config_tx(sport_handle, ITFS, 0xF, 0, (16*16-1));
  243. if (ret) {
  244. pr_err("SPORT is busy!\n");
  245. return -EBUSY;
  246. }
  247. if (dai->capture.active)
  248. sport_rx_start(sport);
  249. if (dai->playback.active)
  250. sport_tx_start(sport);
  251. return 0;
  252. }
  253. #else
  254. #define bf5xx_ac97_suspend NULL
  255. #define bf5xx_ac97_resume NULL
  256. #endif
  257. static int bf5xx_ac97_probe(struct platform_device *pdev,
  258. struct snd_soc_dai *dai)
  259. {
  260. int ret;
  261. #if defined(CONFIG_BF54x)
  262. u16 sport_req[][7] = {PIN_REQ_SPORT_0, PIN_REQ_SPORT_1,
  263. PIN_REQ_SPORT_2, PIN_REQ_SPORT_3};
  264. #else
  265. u16 sport_req[][7] = {PIN_REQ_SPORT_0, PIN_REQ_SPORT_1};
  266. #endif
  267. cmd_count = (int *)get_zeroed_page(GFP_KERNEL);
  268. if (cmd_count == NULL)
  269. return -ENOMEM;
  270. if (peripheral_request_list(&sport_req[sport_num][0], "soc-audio")) {
  271. pr_err("Requesting Peripherals failed\n");
  272. return -EFAULT;
  273. }
  274. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  275. /* Request PB3 as reset pin */
  276. if (gpio_request(CONFIG_SND_BF5XX_RESET_GPIO_NUM, "SND_AD198x RESET")) {
  277. pr_err("Failed to request GPIO_%d for reset\n",
  278. CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  279. peripheral_free_list(&sport_req[sport_num][0]);
  280. return -1;
  281. }
  282. gpio_direction_output(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 1);
  283. #endif
  284. sport_handle = sport_init(&sport_params[sport_num], 2, \
  285. sizeof(struct ac97_frame), NULL);
  286. if (!sport_handle) {
  287. peripheral_free_list(&sport_req[sport_num][0]);
  288. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  289. gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  290. #endif
  291. return -ENODEV;
  292. }
  293. /*SPORT works in TDM mode to simulate AC97 transfers*/
  294. ret = sport_set_multichannel(sport_handle, 16, 0x1F, 1);
  295. if (ret) {
  296. pr_err("SPORT is busy!\n");
  297. kfree(sport_handle);
  298. peripheral_free_list(&sport_req[sport_num][0]);
  299. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  300. gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  301. #endif
  302. return -EBUSY;
  303. }
  304. ret = sport_config_rx(sport_handle, IRFS, 0xF, 0, (16*16-1));
  305. if (ret) {
  306. pr_err("SPORT is busy!\n");
  307. kfree(sport_handle);
  308. peripheral_free_list(&sport_req[sport_num][0]);
  309. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  310. gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  311. #endif
  312. return -EBUSY;
  313. }
  314. ret = sport_config_tx(sport_handle, ITFS, 0xF, 0, (16*16-1));
  315. if (ret) {
  316. pr_err("SPORT is busy!\n");
  317. kfree(sport_handle);
  318. peripheral_free_list(&sport_req[sport_num][0]);
  319. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  320. gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  321. #endif
  322. return -EBUSY;
  323. }
  324. return 0;
  325. }
  326. static void bf5xx_ac97_remove(struct platform_device *pdev,
  327. struct snd_soc_dai *dai)
  328. {
  329. free_page((unsigned long)cmd_count);
  330. cmd_count = NULL;
  331. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  332. gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  333. #endif
  334. }
  335. struct snd_soc_dai bfin_ac97_dai = {
  336. .name = "bf5xx-ac97",
  337. .id = 0,
  338. .type = SND_SOC_DAI_AC97,
  339. .probe = bf5xx_ac97_probe,
  340. .remove = bf5xx_ac97_remove,
  341. .suspend = bf5xx_ac97_suspend,
  342. .resume = bf5xx_ac97_resume,
  343. .playback = {
  344. .stream_name = "AC97 Playback",
  345. .channels_min = 2,
  346. .channels_max = 2,
  347. .rates = SNDRV_PCM_RATE_48000,
  348. .formats = SNDRV_PCM_FMTBIT_S16_LE, },
  349. .capture = {
  350. .stream_name = "AC97 Capture",
  351. .channels_min = 2,
  352. .channels_max = 2,
  353. .rates = SNDRV_PCM_RATE_48000,
  354. .formats = SNDRV_PCM_FMTBIT_S16_LE, },
  355. };
  356. EXPORT_SYMBOL_GPL(bfin_ac97_dai);
  357. MODULE_AUTHOR("Roy Huang");
  358. MODULE_DESCRIPTION("AC97 driver for ADI Blackfin");
  359. MODULE_LICENSE("GPL");