tda10021.c 13 KB

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  1. /*
  2. TDA10021 - Single Chip Cable Channel Receiver driver module
  3. used on the the Siemens DVB-C cards
  4. Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
  5. Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
  6. Support for TDA10021
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. #include <linux/config.h>
  20. #include <linux/delay.h>
  21. #include <linux/errno.h>
  22. #include <linux/init.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/string.h>
  26. #include <linux/slab.h>
  27. #include "dvb_frontend.h"
  28. #include "tda10021.h"
  29. struct tda10021_state {
  30. struct i2c_adapter* i2c;
  31. struct dvb_frontend_ops ops;
  32. /* configuration settings */
  33. const struct tda10021_config* config;
  34. struct dvb_frontend frontend;
  35. u8 pwm;
  36. u8 reg0;
  37. };
  38. #if 0
  39. #define dprintk(x...) printk(x)
  40. #else
  41. #define dprintk(x...)
  42. #endif
  43. static int verbose;
  44. #define XIN 57840000UL
  45. #define DISABLE_INVERSION(reg0) do { reg0 |= 0x20; } while (0)
  46. #define ENABLE_INVERSION(reg0) do { reg0 &= ~0x20; } while (0)
  47. #define HAS_INVERSION(reg0) (!(reg0 & 0x20))
  48. #define FIN (XIN >> 4)
  49. static int tda10021_inittab_size = 0x40;
  50. static u8 tda10021_inittab[0x40]=
  51. {
  52. 0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
  53. 0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
  54. 0xb8, 0x3f, 0xa0, 0x00, 0xcd, 0x01, 0x00, 0xff,
  55. 0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
  56. 0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
  57. 0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
  58. 0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
  59. 0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
  60. };
  61. static int tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
  62. {
  63. u8 buf[] = { reg, data };
  64. struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
  65. int ret;
  66. ret = i2c_transfer (state->i2c, &msg, 1);
  67. if (ret != 1)
  68. printk("DVB: TDA10021(%d): %s, writereg error "
  69. "(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
  70. state->frontend.dvb->num, __FUNCTION__, reg, data, ret);
  71. msleep(10);
  72. return (ret != 1) ? -EREMOTEIO : 0;
  73. }
  74. static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
  75. {
  76. u8 b0 [] = { reg };
  77. u8 b1 [] = { 0 };
  78. struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
  79. { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
  80. int ret;
  81. ret = i2c_transfer (state->i2c, msg, 2);
  82. if (ret != 2)
  83. printk("DVB: TDA10021: %s: readreg error (ret == %i)\n",
  84. __FUNCTION__, ret);
  85. return b1[0];
  86. }
  87. //get access to tuner
  88. static int lock_tuner(struct tda10021_state* state)
  89. {
  90. u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 };
  91. struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
  92. if(i2c_transfer(state->i2c, &msg, 1) != 1)
  93. {
  94. printk("tda10021: lock tuner fails\n");
  95. return -EREMOTEIO;
  96. }
  97. return 0;
  98. }
  99. //release access from tuner
  100. static int unlock_tuner(struct tda10021_state* state)
  101. {
  102. u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
  103. struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
  104. if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
  105. {
  106. printk("tda10021: unlock tuner fails\n");
  107. return -EREMOTEIO;
  108. }
  109. return 0;
  110. }
  111. static int tda10021_setup_reg0 (struct tda10021_state* state, u8 reg0,
  112. fe_spectral_inversion_t inversion)
  113. {
  114. reg0 |= state->reg0 & 0x63;
  115. if (INVERSION_ON == inversion)
  116. ENABLE_INVERSION(reg0);
  117. else if (INVERSION_OFF == inversion)
  118. DISABLE_INVERSION(reg0);
  119. tda10021_writereg (state, 0x00, reg0 & 0xfe);
  120. tda10021_writereg (state, 0x00, reg0 | 0x01);
  121. state->reg0 = reg0;
  122. return 0;
  123. }
  124. static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
  125. {
  126. s32 BDR;
  127. s32 BDRI;
  128. s16 SFIL=0;
  129. u16 NDEC = 0;
  130. u32 tmp, ratio;
  131. if (symbolrate > XIN/2)
  132. symbolrate = XIN/2;
  133. if (symbolrate < 500000)
  134. symbolrate = 500000;
  135. if (symbolrate < XIN/16) NDEC = 1;
  136. if (symbolrate < XIN/32) NDEC = 2;
  137. if (symbolrate < XIN/64) NDEC = 3;
  138. if (symbolrate < (u32)(XIN/12.3)) SFIL = 1;
  139. if (symbolrate < (u32)(XIN/16)) SFIL = 0;
  140. if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;
  141. if (symbolrate < (u32)(XIN/32)) SFIL = 0;
  142. if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;
  143. if (symbolrate < (u32)(XIN/64)) SFIL = 0;
  144. if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;
  145. symbolrate <<= NDEC;
  146. ratio = (symbolrate << 4) / FIN;
  147. tmp = ((symbolrate << 4) % FIN) << 8;
  148. ratio = (ratio << 8) + tmp / FIN;
  149. tmp = (tmp % FIN) << 8;
  150. ratio = (ratio << 8) + (tmp + FIN/2) / FIN;
  151. BDR = ratio;
  152. BDRI = (((XIN << 5) / symbolrate) + 1) / 2;
  153. if (BDRI > 0xFF)
  154. BDRI = 0xFF;
  155. SFIL = (SFIL << 4) | tda10021_inittab[0x0E];
  156. NDEC = (NDEC << 6) | tda10021_inittab[0x03];
  157. tda10021_writereg (state, 0x03, NDEC);
  158. tda10021_writereg (state, 0x0a, BDR&0xff);
  159. tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
  160. tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);
  161. tda10021_writereg (state, 0x0d, BDRI);
  162. tda10021_writereg (state, 0x0e, SFIL);
  163. return 0;
  164. }
  165. static int tda10021_init (struct dvb_frontend *fe)
  166. {
  167. struct tda10021_state* state = fe->demodulator_priv;
  168. int i;
  169. dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);
  170. //tda10021_writereg (fe, 0, 0);
  171. for (i=0; i<tda10021_inittab_size; i++)
  172. tda10021_writereg (state, i, tda10021_inittab[i]);
  173. tda10021_writereg (state, 0x34, state->pwm);
  174. //Comment by markus
  175. //0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
  176. //0x2A[4] == BYPPLL -> Power down mode (default 1)
  177. //0x2A[5] == LCK -> PLL Lock Flag
  178. //0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)
  179. //Activate PLL
  180. tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
  181. return 0;
  182. }
  183. static int tda10021_set_parameters (struct dvb_frontend *fe,
  184. struct dvb_frontend_parameters *p)
  185. {
  186. struct tda10021_state* state = fe->demodulator_priv;
  187. //table for QAM4-QAM256 ready QAM4 QAM16 QAM32 QAM64 QAM128 QAM256
  188. //CONF
  189. static const u8 reg0x00 [] = { 0x14, 0x00, 0x04, 0x08, 0x0c, 0x10 };
  190. //AGCREF value
  191. static const u8 reg0x01 [] = { 0x78, 0x8c, 0x8c, 0x6a, 0x78, 0x5c };
  192. //LTHR value
  193. static const u8 reg0x05 [] = { 0x78, 0x87, 0x64, 0x46, 0x36, 0x26 };
  194. //MSETH
  195. static const u8 reg0x08 [] = { 0x8c, 0xa2, 0x74, 0x43, 0x34, 0x23 };
  196. //AREF
  197. static const u8 reg0x09 [] = { 0x96, 0x91, 0x96, 0x6a, 0x7e, 0x6b };
  198. int qam = p->u.qam.modulation;
  199. if (qam < 0 || qam > 5)
  200. return -EINVAL;
  201. //printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->u.qam.symbol_rate);
  202. if (fe->ops->tuner_ops.set_params) {
  203. fe->ops->tuner_ops.set_params(fe, p);
  204. if (fe->ops->i2c_gate_ctrl) fe->ops->i2c_gate_ctrl(fe, 0);
  205. }
  206. tda10021_set_symbolrate (state, p->u.qam.symbol_rate);
  207. tda10021_writereg (state, 0x34, state->pwm);
  208. tda10021_writereg (state, 0x01, reg0x01[qam]);
  209. tda10021_writereg (state, 0x05, reg0x05[qam]);
  210. tda10021_writereg (state, 0x08, reg0x08[qam]);
  211. tda10021_writereg (state, 0x09, reg0x09[qam]);
  212. tda10021_setup_reg0 (state, reg0x00[qam], p->inversion);
  213. return 0;
  214. }
  215. static int tda10021_read_status(struct dvb_frontend* fe, fe_status_t* status)
  216. {
  217. struct tda10021_state* state = fe->demodulator_priv;
  218. int sync;
  219. *status = 0;
  220. //0x11[0] == EQALGO -> Equalizer algorithms state
  221. //0x11[1] == CARLOCK -> Carrier locked
  222. //0x11[2] == FSYNC -> Frame synchronisation
  223. //0x11[3] == FEL -> Front End locked
  224. //0x11[6] == NODVB -> DVB Mode Information
  225. sync = tda10021_readreg (state, 0x11);
  226. if (sync & 2)
  227. *status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
  228. if (sync & 4)
  229. *status |= FE_HAS_SYNC|FE_HAS_VITERBI;
  230. if (sync & 8)
  231. *status |= FE_HAS_LOCK;
  232. return 0;
  233. }
  234. static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
  235. {
  236. struct tda10021_state* state = fe->demodulator_priv;
  237. u32 _ber = tda10021_readreg(state, 0x14) |
  238. (tda10021_readreg(state, 0x15) << 8) |
  239. ((tda10021_readreg(state, 0x16) & 0x0f) << 16);
  240. *ber = 10 * _ber;
  241. return 0;
  242. }
  243. static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
  244. {
  245. struct tda10021_state* state = fe->demodulator_priv;
  246. u8 gain = tda10021_readreg(state, 0x17);
  247. *strength = (gain << 8) | gain;
  248. return 0;
  249. }
  250. static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
  251. {
  252. struct tda10021_state* state = fe->demodulator_priv;
  253. u8 quality = ~tda10021_readreg(state, 0x18);
  254. *snr = (quality << 8) | quality;
  255. return 0;
  256. }
  257. static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  258. {
  259. struct tda10021_state* state = fe->demodulator_priv;
  260. *ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
  261. if (*ucblocks == 0x7f)
  262. *ucblocks = 0xffffffff;
  263. /* reset uncorrected block counter */
  264. tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
  265. tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);
  266. return 0;
  267. }
  268. static int tda10021_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
  269. {
  270. struct tda10021_state* state = fe->demodulator_priv;
  271. int sync;
  272. s8 afc = 0;
  273. sync = tda10021_readreg(state, 0x11);
  274. afc = tda10021_readreg(state, 0x19);
  275. if (verbose) {
  276. /* AFC only valid when carrier has been recovered */
  277. printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
  278. "DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
  279. state->frontend.dvb->num, afc,
  280. -((s32)p->u.qam.symbol_rate * afc) >> 10);
  281. }
  282. p->inversion = HAS_INVERSION(state->reg0) ? INVERSION_ON : INVERSION_OFF;
  283. p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16;
  284. p->u.qam.fec_inner = FEC_NONE;
  285. p->frequency = ((p->frequency + 31250) / 62500) * 62500;
  286. if (sync & 2)
  287. p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10;
  288. return 0;
  289. }
  290. static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
  291. {
  292. struct tda10021_state* state = fe->demodulator_priv;
  293. if (enable) {
  294. lock_tuner(state);
  295. } else {
  296. unlock_tuner(state);
  297. }
  298. return 0;
  299. }
  300. static int tda10021_sleep(struct dvb_frontend* fe)
  301. {
  302. struct tda10021_state* state = fe->demodulator_priv;
  303. tda10021_writereg (state, 0x1b, 0x02); /* pdown ADC */
  304. tda10021_writereg (state, 0x00, 0x80); /* standby */
  305. return 0;
  306. }
  307. static void tda10021_release(struct dvb_frontend* fe)
  308. {
  309. struct tda10021_state* state = fe->demodulator_priv;
  310. kfree(state);
  311. }
  312. static struct dvb_frontend_ops tda10021_ops;
  313. struct dvb_frontend* tda10021_attach(const struct tda10021_config* config,
  314. struct i2c_adapter* i2c,
  315. u8 pwm)
  316. {
  317. struct tda10021_state* state = NULL;
  318. /* allocate memory for the internal state */
  319. state = kmalloc(sizeof(struct tda10021_state), GFP_KERNEL);
  320. if (state == NULL) goto error;
  321. /* setup the state */
  322. state->config = config;
  323. state->i2c = i2c;
  324. memcpy(&state->ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
  325. state->pwm = pwm;
  326. state->reg0 = tda10021_inittab[0];
  327. /* check if the demod is there */
  328. if ((tda10021_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
  329. /* create dvb_frontend */
  330. state->frontend.ops = &state->ops;
  331. state->frontend.demodulator_priv = state;
  332. return &state->frontend;
  333. error:
  334. kfree(state);
  335. return NULL;
  336. }
  337. static struct dvb_frontend_ops tda10021_ops = {
  338. .info = {
  339. .name = "Philips TDA10021 DVB-C",
  340. .type = FE_QAM,
  341. .frequency_stepsize = 62500,
  342. .frequency_min = 51000000,
  343. .frequency_max = 858000000,
  344. .symbol_rate_min = (XIN/2)/64, /* SACLK/64 == (XIN/2)/64 */
  345. .symbol_rate_max = (XIN/2)/4, /* SACLK/4 */
  346. #if 0
  347. .frequency_tolerance = ???,
  348. .symbol_rate_tolerance = ???, /* ppm */ /* == 8% (spec p. 5) */
  349. #endif
  350. .caps = 0x400 | //FE_CAN_QAM_4
  351. FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
  352. FE_CAN_QAM_128 | FE_CAN_QAM_256 |
  353. FE_CAN_FEC_AUTO
  354. },
  355. .release = tda10021_release,
  356. .init = tda10021_init,
  357. .sleep = tda10021_sleep,
  358. .i2c_gate_ctrl = tda10021_i2c_gate_ctrl,
  359. .set_frontend = tda10021_set_parameters,
  360. .get_frontend = tda10021_get_frontend,
  361. .read_status = tda10021_read_status,
  362. .read_ber = tda10021_read_ber,
  363. .read_signal_strength = tda10021_read_signal_strength,
  364. .read_snr = tda10021_read_snr,
  365. .read_ucblocks = tda10021_read_ucblocks,
  366. };
  367. module_param(verbose, int, 0644);
  368. MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");
  369. MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
  370. MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
  371. MODULE_LICENSE("GPL");
  372. EXPORT_SYMBOL(tda10021_attach);