bnx2x_stats.c 50 KB

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  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2011 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18. #include "bnx2x_stats.h"
  19. #include "bnx2x_cmn.h"
  20. /* Statistics */
  21. /*
  22. * General service functions
  23. */
  24. static inline long bnx2x_hilo(u32 *hiref)
  25. {
  26. u32 lo = *(hiref + 1);
  27. #if (BITS_PER_LONG == 64)
  28. u32 hi = *hiref;
  29. return HILO_U64(hi, lo);
  30. #else
  31. return lo;
  32. #endif
  33. }
  34. /*
  35. * Init service functions
  36. */
  37. /* Post the next statistics ramrod. Protect it with the spin in
  38. * order to ensure the strict order between statistics ramrods
  39. * (each ramrod has a sequence number passed in a
  40. * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
  41. * sent in order).
  42. */
  43. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  44. {
  45. if (!bp->stats_pending) {
  46. int rc;
  47. spin_lock_bh(&bp->stats_lock);
  48. if (bp->stats_pending) {
  49. spin_unlock_bh(&bp->stats_lock);
  50. return;
  51. }
  52. bp->fw_stats_req->hdr.drv_stats_counter =
  53. cpu_to_le16(bp->stats_counter++);
  54. DP(NETIF_MSG_TIMER, "Sending statistics ramrod %d\n",
  55. bp->fw_stats_req->hdr.drv_stats_counter);
  56. /* send FW stats ramrod */
  57. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
  58. U64_HI(bp->fw_stats_req_mapping),
  59. U64_LO(bp->fw_stats_req_mapping),
  60. NONE_CONNECTION_TYPE);
  61. if (rc == 0)
  62. bp->stats_pending = 1;
  63. spin_unlock_bh(&bp->stats_lock);
  64. }
  65. }
  66. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  67. {
  68. struct dmae_command *dmae = &bp->stats_dmae;
  69. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  70. *stats_comp = DMAE_COMP_VAL;
  71. if (CHIP_REV_IS_SLOW(bp))
  72. return;
  73. /* loader */
  74. if (bp->executer_idx) {
  75. int loader_idx = PMF_DMAE_C(bp);
  76. u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  77. true, DMAE_COMP_GRC);
  78. opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
  79. memset(dmae, 0, sizeof(struct dmae_command));
  80. dmae->opcode = opcode;
  81. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  82. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  83. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  84. sizeof(struct dmae_command) *
  85. (loader_idx + 1)) >> 2;
  86. dmae->dst_addr_hi = 0;
  87. dmae->len = sizeof(struct dmae_command) >> 2;
  88. if (CHIP_IS_E1(bp))
  89. dmae->len--;
  90. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  91. dmae->comp_addr_hi = 0;
  92. dmae->comp_val = 1;
  93. *stats_comp = 0;
  94. bnx2x_post_dmae(bp, dmae, loader_idx);
  95. } else if (bp->func_stx) {
  96. *stats_comp = 0;
  97. bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
  98. }
  99. }
  100. static int bnx2x_stats_comp(struct bnx2x *bp)
  101. {
  102. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  103. int cnt = 10;
  104. might_sleep();
  105. while (*stats_comp != DMAE_COMP_VAL) {
  106. if (!cnt) {
  107. BNX2X_ERR("timeout waiting for stats finished\n");
  108. break;
  109. }
  110. cnt--;
  111. usleep_range(1000, 1000);
  112. }
  113. return 1;
  114. }
  115. /*
  116. * Statistics service functions
  117. */
  118. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  119. {
  120. struct dmae_command *dmae;
  121. u32 opcode;
  122. int loader_idx = PMF_DMAE_C(bp);
  123. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  124. /* sanity */
  125. if (!IS_MF(bp) || !bp->port.pmf || !bp->port.port_stx) {
  126. BNX2X_ERR("BUG!\n");
  127. return;
  128. }
  129. bp->executer_idx = 0;
  130. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
  131. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  132. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
  133. dmae->src_addr_lo = bp->port.port_stx >> 2;
  134. dmae->src_addr_hi = 0;
  135. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  136. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  137. dmae->len = DMAE_LEN32_RD_MAX;
  138. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  139. dmae->comp_addr_hi = 0;
  140. dmae->comp_val = 1;
  141. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  142. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  143. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  144. dmae->src_addr_hi = 0;
  145. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  146. DMAE_LEN32_RD_MAX * 4);
  147. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  148. DMAE_LEN32_RD_MAX * 4);
  149. dmae->len = (sizeof(struct host_port_stats) >> 2) - DMAE_LEN32_RD_MAX;
  150. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  151. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  152. dmae->comp_val = DMAE_COMP_VAL;
  153. *stats_comp = 0;
  154. bnx2x_hw_stats_post(bp);
  155. bnx2x_stats_comp(bp);
  156. }
  157. static void bnx2x_port_stats_init(struct bnx2x *bp)
  158. {
  159. struct dmae_command *dmae;
  160. int port = BP_PORT(bp);
  161. u32 opcode;
  162. int loader_idx = PMF_DMAE_C(bp);
  163. u32 mac_addr;
  164. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  165. /* sanity */
  166. if (!bp->link_vars.link_up || !bp->port.pmf) {
  167. BNX2X_ERR("BUG!\n");
  168. return;
  169. }
  170. bp->executer_idx = 0;
  171. /* MCP */
  172. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  173. true, DMAE_COMP_GRC);
  174. if (bp->port.port_stx) {
  175. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  176. dmae->opcode = opcode;
  177. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  178. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  179. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  180. dmae->dst_addr_hi = 0;
  181. dmae->len = sizeof(struct host_port_stats) >> 2;
  182. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  183. dmae->comp_addr_hi = 0;
  184. dmae->comp_val = 1;
  185. }
  186. if (bp->func_stx) {
  187. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  188. dmae->opcode = opcode;
  189. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  190. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  191. dmae->dst_addr_lo = bp->func_stx >> 2;
  192. dmae->dst_addr_hi = 0;
  193. dmae->len = sizeof(struct host_func_stats) >> 2;
  194. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  195. dmae->comp_addr_hi = 0;
  196. dmae->comp_val = 1;
  197. }
  198. /* MAC */
  199. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  200. true, DMAE_COMP_GRC);
  201. /* EMAC is special */
  202. if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  203. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  204. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  205. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  206. dmae->opcode = opcode;
  207. dmae->src_addr_lo = (mac_addr +
  208. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  209. dmae->src_addr_hi = 0;
  210. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  211. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  212. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  213. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  214. dmae->comp_addr_hi = 0;
  215. dmae->comp_val = 1;
  216. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  217. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  218. dmae->opcode = opcode;
  219. dmae->src_addr_lo = (mac_addr +
  220. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  221. dmae->src_addr_hi = 0;
  222. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  223. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  224. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  225. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  226. dmae->len = 1;
  227. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  228. dmae->comp_addr_hi = 0;
  229. dmae->comp_val = 1;
  230. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  231. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  232. dmae->opcode = opcode;
  233. dmae->src_addr_lo = (mac_addr +
  234. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  235. dmae->src_addr_hi = 0;
  236. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  237. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  238. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  239. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  240. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  241. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  242. dmae->comp_addr_hi = 0;
  243. dmae->comp_val = 1;
  244. } else {
  245. u32 tx_src_addr_lo, rx_src_addr_lo;
  246. u16 rx_len, tx_len;
  247. /* configure the params according to MAC type */
  248. switch (bp->link_vars.mac_type) {
  249. case MAC_TYPE_BMAC:
  250. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  251. NIG_REG_INGRESS_BMAC0_MEM);
  252. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  253. BIGMAC_REGISTER_TX_STAT_GTBYT */
  254. if (CHIP_IS_E1x(bp)) {
  255. tx_src_addr_lo = (mac_addr +
  256. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  257. tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  258. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  259. rx_src_addr_lo = (mac_addr +
  260. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  261. rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  262. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  263. } else {
  264. tx_src_addr_lo = (mac_addr +
  265. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  266. tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
  267. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  268. rx_src_addr_lo = (mac_addr +
  269. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  270. rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
  271. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  272. }
  273. break;
  274. case MAC_TYPE_UMAC: /* handled by MSTAT */
  275. case MAC_TYPE_XMAC: /* handled by MSTAT */
  276. default:
  277. mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
  278. tx_src_addr_lo = (mac_addr +
  279. MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
  280. rx_src_addr_lo = (mac_addr +
  281. MSTAT_REG_RX_STAT_GR64_LO) >> 2;
  282. tx_len = sizeof(bp->slowpath->
  283. mac_stats.mstat_stats.stats_tx) >> 2;
  284. rx_len = sizeof(bp->slowpath->
  285. mac_stats.mstat_stats.stats_rx) >> 2;
  286. break;
  287. }
  288. /* TX stats */
  289. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  290. dmae->opcode = opcode;
  291. dmae->src_addr_lo = tx_src_addr_lo;
  292. dmae->src_addr_hi = 0;
  293. dmae->len = tx_len;
  294. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  295. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  296. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  297. dmae->comp_addr_hi = 0;
  298. dmae->comp_val = 1;
  299. /* RX stats */
  300. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  301. dmae->opcode = opcode;
  302. dmae->src_addr_hi = 0;
  303. dmae->src_addr_lo = rx_src_addr_lo;
  304. dmae->dst_addr_lo =
  305. U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  306. dmae->dst_addr_hi =
  307. U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  308. dmae->len = rx_len;
  309. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  310. dmae->comp_addr_hi = 0;
  311. dmae->comp_val = 1;
  312. }
  313. /* NIG */
  314. if (!CHIP_IS_E3(bp)) {
  315. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  316. dmae->opcode = opcode;
  317. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  318. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  319. dmae->src_addr_hi = 0;
  320. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  321. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  322. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  323. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  324. dmae->len = (2*sizeof(u32)) >> 2;
  325. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  326. dmae->comp_addr_hi = 0;
  327. dmae->comp_val = 1;
  328. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  329. dmae->opcode = opcode;
  330. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  331. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  332. dmae->src_addr_hi = 0;
  333. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  334. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  335. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  336. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  337. dmae->len = (2*sizeof(u32)) >> 2;
  338. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  339. dmae->comp_addr_hi = 0;
  340. dmae->comp_val = 1;
  341. }
  342. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  343. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  344. true, DMAE_COMP_PCI);
  345. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  346. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  347. dmae->src_addr_hi = 0;
  348. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  349. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  350. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  351. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  352. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  353. dmae->comp_val = DMAE_COMP_VAL;
  354. *stats_comp = 0;
  355. }
  356. static void bnx2x_func_stats_init(struct bnx2x *bp)
  357. {
  358. struct dmae_command *dmae = &bp->stats_dmae;
  359. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  360. /* sanity */
  361. if (!bp->func_stx) {
  362. BNX2X_ERR("BUG!\n");
  363. return;
  364. }
  365. bp->executer_idx = 0;
  366. memset(dmae, 0, sizeof(struct dmae_command));
  367. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  368. true, DMAE_COMP_PCI);
  369. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  370. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  371. dmae->dst_addr_lo = bp->func_stx >> 2;
  372. dmae->dst_addr_hi = 0;
  373. dmae->len = sizeof(struct host_func_stats) >> 2;
  374. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  375. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  376. dmae->comp_val = DMAE_COMP_VAL;
  377. *stats_comp = 0;
  378. }
  379. static void bnx2x_stats_start(struct bnx2x *bp)
  380. {
  381. if (bp->port.pmf)
  382. bnx2x_port_stats_init(bp);
  383. else if (bp->func_stx)
  384. bnx2x_func_stats_init(bp);
  385. bnx2x_hw_stats_post(bp);
  386. bnx2x_storm_stats_post(bp);
  387. }
  388. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  389. {
  390. bnx2x_stats_comp(bp);
  391. bnx2x_stats_pmf_update(bp);
  392. bnx2x_stats_start(bp);
  393. }
  394. static void bnx2x_stats_restart(struct bnx2x *bp)
  395. {
  396. bnx2x_stats_comp(bp);
  397. bnx2x_stats_start(bp);
  398. }
  399. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  400. {
  401. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  402. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  403. struct {
  404. u32 lo;
  405. u32 hi;
  406. } diff;
  407. if (CHIP_IS_E1x(bp)) {
  408. struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
  409. /* the macros below will use "bmac1_stats" type */
  410. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  411. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  412. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  413. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  414. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  415. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  416. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  417. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  418. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  419. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  420. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  421. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  422. UPDATE_STAT64(tx_stat_gt127,
  423. tx_stat_etherstatspkts65octetsto127octets);
  424. UPDATE_STAT64(tx_stat_gt255,
  425. tx_stat_etherstatspkts128octetsto255octets);
  426. UPDATE_STAT64(tx_stat_gt511,
  427. tx_stat_etherstatspkts256octetsto511octets);
  428. UPDATE_STAT64(tx_stat_gt1023,
  429. tx_stat_etherstatspkts512octetsto1023octets);
  430. UPDATE_STAT64(tx_stat_gt1518,
  431. tx_stat_etherstatspkts1024octetsto1522octets);
  432. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  433. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  434. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  435. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  436. UPDATE_STAT64(tx_stat_gterr,
  437. tx_stat_dot3statsinternalmactransmiterrors);
  438. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  439. } else {
  440. struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
  441. /* the macros below will use "bmac2_stats" type */
  442. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  443. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  444. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  445. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  446. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  447. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  448. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  449. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  450. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  451. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  452. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  453. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  454. UPDATE_STAT64(tx_stat_gt127,
  455. tx_stat_etherstatspkts65octetsto127octets);
  456. UPDATE_STAT64(tx_stat_gt255,
  457. tx_stat_etherstatspkts128octetsto255octets);
  458. UPDATE_STAT64(tx_stat_gt511,
  459. tx_stat_etherstatspkts256octetsto511octets);
  460. UPDATE_STAT64(tx_stat_gt1023,
  461. tx_stat_etherstatspkts512octetsto1023octets);
  462. UPDATE_STAT64(tx_stat_gt1518,
  463. tx_stat_etherstatspkts1024octetsto1522octets);
  464. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  465. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  466. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  467. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  468. UPDATE_STAT64(tx_stat_gterr,
  469. tx_stat_dot3statsinternalmactransmiterrors);
  470. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  471. }
  472. estats->pause_frames_received_hi =
  473. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  474. estats->pause_frames_received_lo =
  475. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  476. estats->pause_frames_sent_hi =
  477. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  478. estats->pause_frames_sent_lo =
  479. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  480. }
  481. static void bnx2x_mstat_stats_update(struct bnx2x *bp)
  482. {
  483. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  484. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  485. struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
  486. ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
  487. ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
  488. ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
  489. ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
  490. ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
  491. ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
  492. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
  493. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
  494. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
  495. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
  496. ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
  497. ADD_STAT64(stats_tx.tx_gt127,
  498. tx_stat_etherstatspkts65octetsto127octets);
  499. ADD_STAT64(stats_tx.tx_gt255,
  500. tx_stat_etherstatspkts128octetsto255octets);
  501. ADD_STAT64(stats_tx.tx_gt511,
  502. tx_stat_etherstatspkts256octetsto511octets);
  503. ADD_STAT64(stats_tx.tx_gt1023,
  504. tx_stat_etherstatspkts512octetsto1023octets);
  505. ADD_STAT64(stats_tx.tx_gt1518,
  506. tx_stat_etherstatspkts1024octetsto1522octets);
  507. ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
  508. ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
  509. ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
  510. ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
  511. ADD_STAT64(stats_tx.tx_gterr,
  512. tx_stat_dot3statsinternalmactransmiterrors);
  513. ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
  514. ADD_64(estats->etherstatspkts1024octetsto1522octets_hi,
  515. new->stats_tx.tx_gt1518_hi,
  516. estats->etherstatspkts1024octetsto1522octets_lo,
  517. new->stats_tx.tx_gt1518_lo);
  518. ADD_64(estats->etherstatspktsover1522octets_hi,
  519. new->stats_tx.tx_gt2047_hi,
  520. estats->etherstatspktsover1522octets_lo,
  521. new->stats_tx.tx_gt2047_lo);
  522. ADD_64(estats->etherstatspktsover1522octets_hi,
  523. new->stats_tx.tx_gt4095_hi,
  524. estats->etherstatspktsover1522octets_lo,
  525. new->stats_tx.tx_gt4095_lo);
  526. ADD_64(estats->etherstatspktsover1522octets_hi,
  527. new->stats_tx.tx_gt9216_hi,
  528. estats->etherstatspktsover1522octets_lo,
  529. new->stats_tx.tx_gt9216_lo);
  530. ADD_64(estats->etherstatspktsover1522octets_hi,
  531. new->stats_tx.tx_gt16383_hi,
  532. estats->etherstatspktsover1522octets_lo,
  533. new->stats_tx.tx_gt16383_lo);
  534. estats->pause_frames_received_hi =
  535. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  536. estats->pause_frames_received_lo =
  537. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  538. estats->pause_frames_sent_hi =
  539. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  540. estats->pause_frames_sent_lo =
  541. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  542. }
  543. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  544. {
  545. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  546. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  547. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  548. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  549. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  550. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  551. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  552. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  553. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  554. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  555. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  556. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  557. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  558. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  559. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  560. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  561. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  562. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  563. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  564. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  565. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  566. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  567. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  568. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  569. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  570. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  571. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  572. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  573. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  574. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  575. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  576. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  577. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  578. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  579. estats->pause_frames_received_hi =
  580. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  581. estats->pause_frames_received_lo =
  582. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  583. ADD_64(estats->pause_frames_received_hi,
  584. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  585. estats->pause_frames_received_lo,
  586. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  587. estats->pause_frames_sent_hi =
  588. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  589. estats->pause_frames_sent_lo =
  590. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  591. ADD_64(estats->pause_frames_sent_hi,
  592. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  593. estats->pause_frames_sent_lo,
  594. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  595. }
  596. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  597. {
  598. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  599. struct nig_stats *old = &(bp->port.old_nig_stats);
  600. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  601. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  602. struct {
  603. u32 lo;
  604. u32 hi;
  605. } diff;
  606. switch (bp->link_vars.mac_type) {
  607. case MAC_TYPE_BMAC:
  608. bnx2x_bmac_stats_update(bp);
  609. break;
  610. case MAC_TYPE_EMAC:
  611. bnx2x_emac_stats_update(bp);
  612. break;
  613. case MAC_TYPE_UMAC:
  614. case MAC_TYPE_XMAC:
  615. bnx2x_mstat_stats_update(bp);
  616. break;
  617. case MAC_TYPE_NONE: /* unreached */
  618. BNX2X_ERR("stats updated by DMAE but no MAC active\n");
  619. return -1;
  620. default: /* unreached */
  621. BNX2X_ERR("Unknown MAC type\n");
  622. }
  623. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  624. new->brb_discard - old->brb_discard);
  625. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  626. new->brb_truncate - old->brb_truncate);
  627. if (!CHIP_IS_E3(bp)) {
  628. UPDATE_STAT64_NIG(egress_mac_pkt0,
  629. etherstatspkts1024octetsto1522octets);
  630. UPDATE_STAT64_NIG(egress_mac_pkt1,
  631. etherstatspktsover1522octets);
  632. }
  633. memcpy(old, new, sizeof(struct nig_stats));
  634. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  635. sizeof(struct mac_stx));
  636. estats->brb_drop_hi = pstats->brb_drop_hi;
  637. estats->brb_drop_lo = pstats->brb_drop_lo;
  638. pstats->host_port_stats_start = ++pstats->host_port_stats_end;
  639. if (!BP_NOMCP(bp)) {
  640. u32 nig_timer_max =
  641. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  642. if (nig_timer_max != estats->nig_timer_max) {
  643. estats->nig_timer_max = nig_timer_max;
  644. BNX2X_ERR("NIG timer max (%u)\n",
  645. estats->nig_timer_max);
  646. }
  647. }
  648. return 0;
  649. }
  650. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  651. {
  652. struct tstorm_per_port_stats *tport =
  653. &bp->fw_stats_data->port.tstorm_port_statistics;
  654. struct tstorm_per_pf_stats *tfunc =
  655. &bp->fw_stats_data->pf.tstorm_pf_statistics;
  656. struct host_func_stats *fstats = bnx2x_sp(bp, func_stats);
  657. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  658. struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
  659. int i;
  660. u16 cur_stats_counter;
  661. /* Make sure we use the value of the counter
  662. * used for sending the last stats ramrod.
  663. */
  664. spin_lock_bh(&bp->stats_lock);
  665. cur_stats_counter = bp->stats_counter - 1;
  666. spin_unlock_bh(&bp->stats_lock);
  667. /* are storm stats valid? */
  668. if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
  669. DP(BNX2X_MSG_STATS, "stats not updated by xstorm"
  670. " xstorm counter (0x%x) != stats_counter (0x%x)\n",
  671. le16_to_cpu(counters->xstats_counter), bp->stats_counter);
  672. return -EAGAIN;
  673. }
  674. if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
  675. DP(BNX2X_MSG_STATS, "stats not updated by ustorm"
  676. " ustorm counter (0x%x) != stats_counter (0x%x)\n",
  677. le16_to_cpu(counters->ustats_counter), bp->stats_counter);
  678. return -EAGAIN;
  679. }
  680. if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
  681. DP(BNX2X_MSG_STATS, "stats not updated by cstorm"
  682. " cstorm counter (0x%x) != stats_counter (0x%x)\n",
  683. le16_to_cpu(counters->cstats_counter), bp->stats_counter);
  684. return -EAGAIN;
  685. }
  686. if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
  687. DP(BNX2X_MSG_STATS, "stats not updated by tstorm"
  688. " tstorm counter (0x%x) != stats_counter (0x%x)\n",
  689. le16_to_cpu(counters->tstats_counter), bp->stats_counter);
  690. return -EAGAIN;
  691. }
  692. memcpy(&(fstats->total_bytes_received_hi),
  693. &(bnx2x_sp(bp, func_stats_base)->total_bytes_received_hi),
  694. sizeof(struct host_func_stats) - 2*sizeof(u32));
  695. estats->error_bytes_received_hi = 0;
  696. estats->error_bytes_received_lo = 0;
  697. estats->etherstatsoverrsizepkts_hi = 0;
  698. estats->etherstatsoverrsizepkts_lo = 0;
  699. estats->no_buff_discard_hi = 0;
  700. estats->no_buff_discard_lo = 0;
  701. estats->total_tpa_aggregations_hi = 0;
  702. estats->total_tpa_aggregations_lo = 0;
  703. estats->total_tpa_aggregated_frames_hi = 0;
  704. estats->total_tpa_aggregated_frames_lo = 0;
  705. estats->total_tpa_bytes_hi = 0;
  706. estats->total_tpa_bytes_lo = 0;
  707. for_each_eth_queue(bp, i) {
  708. struct bnx2x_fastpath *fp = &bp->fp[i];
  709. struct tstorm_per_queue_stats *tclient =
  710. &bp->fw_stats_data->queue_stats[i].
  711. tstorm_queue_statistics;
  712. struct tstorm_per_queue_stats *old_tclient = &fp->old_tclient;
  713. struct ustorm_per_queue_stats *uclient =
  714. &bp->fw_stats_data->queue_stats[i].
  715. ustorm_queue_statistics;
  716. struct ustorm_per_queue_stats *old_uclient = &fp->old_uclient;
  717. struct xstorm_per_queue_stats *xclient =
  718. &bp->fw_stats_data->queue_stats[i].
  719. xstorm_queue_statistics;
  720. struct xstorm_per_queue_stats *old_xclient = &fp->old_xclient;
  721. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  722. u32 diff;
  723. DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, "
  724. "bcast_sent 0x%x mcast_sent 0x%x\n",
  725. i, xclient->ucast_pkts_sent,
  726. xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
  727. DP(BNX2X_MSG_STATS, "---------------\n");
  728. qstats->total_broadcast_bytes_received_hi =
  729. le32_to_cpu(tclient->rcv_bcast_bytes.hi);
  730. qstats->total_broadcast_bytes_received_lo =
  731. le32_to_cpu(tclient->rcv_bcast_bytes.lo);
  732. qstats->total_multicast_bytes_received_hi =
  733. le32_to_cpu(tclient->rcv_mcast_bytes.hi);
  734. qstats->total_multicast_bytes_received_lo =
  735. le32_to_cpu(tclient->rcv_mcast_bytes.lo);
  736. qstats->total_unicast_bytes_received_hi =
  737. le32_to_cpu(tclient->rcv_ucast_bytes.hi);
  738. qstats->total_unicast_bytes_received_lo =
  739. le32_to_cpu(tclient->rcv_ucast_bytes.lo);
  740. /*
  741. * sum to total_bytes_received all
  742. * unicast/multicast/broadcast
  743. */
  744. qstats->total_bytes_received_hi =
  745. qstats->total_broadcast_bytes_received_hi;
  746. qstats->total_bytes_received_lo =
  747. qstats->total_broadcast_bytes_received_lo;
  748. ADD_64(qstats->total_bytes_received_hi,
  749. qstats->total_multicast_bytes_received_hi,
  750. qstats->total_bytes_received_lo,
  751. qstats->total_multicast_bytes_received_lo);
  752. ADD_64(qstats->total_bytes_received_hi,
  753. qstats->total_unicast_bytes_received_hi,
  754. qstats->total_bytes_received_lo,
  755. qstats->total_unicast_bytes_received_lo);
  756. qstats->valid_bytes_received_hi =
  757. qstats->total_bytes_received_hi;
  758. qstats->valid_bytes_received_lo =
  759. qstats->total_bytes_received_lo;
  760. UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
  761. total_unicast_packets_received);
  762. UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
  763. total_multicast_packets_received);
  764. UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
  765. total_broadcast_packets_received);
  766. UPDATE_EXTEND_TSTAT(pkts_too_big_discard,
  767. etherstatsoverrsizepkts);
  768. UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard);
  769. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  770. total_unicast_packets_received);
  771. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  772. total_multicast_packets_received);
  773. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  774. total_broadcast_packets_received);
  775. UPDATE_EXTEND_USTAT(ucast_no_buff_pkts, no_buff_discard);
  776. UPDATE_EXTEND_USTAT(mcast_no_buff_pkts, no_buff_discard);
  777. UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard);
  778. qstats->total_broadcast_bytes_transmitted_hi =
  779. le32_to_cpu(xclient->bcast_bytes_sent.hi);
  780. qstats->total_broadcast_bytes_transmitted_lo =
  781. le32_to_cpu(xclient->bcast_bytes_sent.lo);
  782. qstats->total_multicast_bytes_transmitted_hi =
  783. le32_to_cpu(xclient->mcast_bytes_sent.hi);
  784. qstats->total_multicast_bytes_transmitted_lo =
  785. le32_to_cpu(xclient->mcast_bytes_sent.lo);
  786. qstats->total_unicast_bytes_transmitted_hi =
  787. le32_to_cpu(xclient->ucast_bytes_sent.hi);
  788. qstats->total_unicast_bytes_transmitted_lo =
  789. le32_to_cpu(xclient->ucast_bytes_sent.lo);
  790. /*
  791. * sum to total_bytes_transmitted all
  792. * unicast/multicast/broadcast
  793. */
  794. qstats->total_bytes_transmitted_hi =
  795. qstats->total_unicast_bytes_transmitted_hi;
  796. qstats->total_bytes_transmitted_lo =
  797. qstats->total_unicast_bytes_transmitted_lo;
  798. ADD_64(qstats->total_bytes_transmitted_hi,
  799. qstats->total_broadcast_bytes_transmitted_hi,
  800. qstats->total_bytes_transmitted_lo,
  801. qstats->total_broadcast_bytes_transmitted_lo);
  802. ADD_64(qstats->total_bytes_transmitted_hi,
  803. qstats->total_multicast_bytes_transmitted_hi,
  804. qstats->total_bytes_transmitted_lo,
  805. qstats->total_multicast_bytes_transmitted_lo);
  806. UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
  807. total_unicast_packets_transmitted);
  808. UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
  809. total_multicast_packets_transmitted);
  810. UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
  811. total_broadcast_packets_transmitted);
  812. UPDATE_EXTEND_TSTAT(checksum_discard,
  813. total_packets_received_checksum_discarded);
  814. UPDATE_EXTEND_TSTAT(ttl0_discard,
  815. total_packets_received_ttl0_discarded);
  816. UPDATE_EXTEND_XSTAT(error_drop_pkts,
  817. total_transmitted_dropped_packets_error);
  818. /* TPA aggregations completed */
  819. UPDATE_EXTEND_USTAT(coalesced_events, total_tpa_aggregations);
  820. /* Number of network frames aggregated by TPA */
  821. UPDATE_EXTEND_USTAT(coalesced_pkts,
  822. total_tpa_aggregated_frames);
  823. /* Total number of bytes in completed TPA aggregations */
  824. qstats->total_tpa_bytes_lo =
  825. le32_to_cpu(uclient->coalesced_bytes.lo);
  826. qstats->total_tpa_bytes_hi =
  827. le32_to_cpu(uclient->coalesced_bytes.hi);
  828. /* TPA stats per-function */
  829. ADD_64(estats->total_tpa_aggregations_hi,
  830. qstats->total_tpa_aggregations_hi,
  831. estats->total_tpa_aggregations_lo,
  832. qstats->total_tpa_aggregations_lo);
  833. ADD_64(estats->total_tpa_aggregated_frames_hi,
  834. qstats->total_tpa_aggregated_frames_hi,
  835. estats->total_tpa_aggregated_frames_lo,
  836. qstats->total_tpa_aggregated_frames_lo);
  837. ADD_64(estats->total_tpa_bytes_hi,
  838. qstats->total_tpa_bytes_hi,
  839. estats->total_tpa_bytes_lo,
  840. qstats->total_tpa_bytes_lo);
  841. ADD_64(fstats->total_bytes_received_hi,
  842. qstats->total_bytes_received_hi,
  843. fstats->total_bytes_received_lo,
  844. qstats->total_bytes_received_lo);
  845. ADD_64(fstats->total_bytes_transmitted_hi,
  846. qstats->total_bytes_transmitted_hi,
  847. fstats->total_bytes_transmitted_lo,
  848. qstats->total_bytes_transmitted_lo);
  849. ADD_64(fstats->total_unicast_packets_received_hi,
  850. qstats->total_unicast_packets_received_hi,
  851. fstats->total_unicast_packets_received_lo,
  852. qstats->total_unicast_packets_received_lo);
  853. ADD_64(fstats->total_multicast_packets_received_hi,
  854. qstats->total_multicast_packets_received_hi,
  855. fstats->total_multicast_packets_received_lo,
  856. qstats->total_multicast_packets_received_lo);
  857. ADD_64(fstats->total_broadcast_packets_received_hi,
  858. qstats->total_broadcast_packets_received_hi,
  859. fstats->total_broadcast_packets_received_lo,
  860. qstats->total_broadcast_packets_received_lo);
  861. ADD_64(fstats->total_unicast_packets_transmitted_hi,
  862. qstats->total_unicast_packets_transmitted_hi,
  863. fstats->total_unicast_packets_transmitted_lo,
  864. qstats->total_unicast_packets_transmitted_lo);
  865. ADD_64(fstats->total_multicast_packets_transmitted_hi,
  866. qstats->total_multicast_packets_transmitted_hi,
  867. fstats->total_multicast_packets_transmitted_lo,
  868. qstats->total_multicast_packets_transmitted_lo);
  869. ADD_64(fstats->total_broadcast_packets_transmitted_hi,
  870. qstats->total_broadcast_packets_transmitted_hi,
  871. fstats->total_broadcast_packets_transmitted_lo,
  872. qstats->total_broadcast_packets_transmitted_lo);
  873. ADD_64(fstats->valid_bytes_received_hi,
  874. qstats->valid_bytes_received_hi,
  875. fstats->valid_bytes_received_lo,
  876. qstats->valid_bytes_received_lo);
  877. ADD_64(estats->etherstatsoverrsizepkts_hi,
  878. qstats->etherstatsoverrsizepkts_hi,
  879. estats->etherstatsoverrsizepkts_lo,
  880. qstats->etherstatsoverrsizepkts_lo);
  881. ADD_64(estats->no_buff_discard_hi, qstats->no_buff_discard_hi,
  882. estats->no_buff_discard_lo, qstats->no_buff_discard_lo);
  883. }
  884. ADD_64(fstats->total_bytes_received_hi,
  885. estats->rx_stat_ifhcinbadoctets_hi,
  886. fstats->total_bytes_received_lo,
  887. estats->rx_stat_ifhcinbadoctets_lo);
  888. ADD_64(fstats->total_bytes_received_hi,
  889. tfunc->rcv_error_bytes.hi,
  890. fstats->total_bytes_received_lo,
  891. tfunc->rcv_error_bytes.lo);
  892. memcpy(estats, &(fstats->total_bytes_received_hi),
  893. sizeof(struct host_func_stats) - 2*sizeof(u32));
  894. ADD_64(estats->error_bytes_received_hi,
  895. tfunc->rcv_error_bytes.hi,
  896. estats->error_bytes_received_lo,
  897. tfunc->rcv_error_bytes.lo);
  898. ADD_64(estats->etherstatsoverrsizepkts_hi,
  899. estats->rx_stat_dot3statsframestoolong_hi,
  900. estats->etherstatsoverrsizepkts_lo,
  901. estats->rx_stat_dot3statsframestoolong_lo);
  902. ADD_64(estats->error_bytes_received_hi,
  903. estats->rx_stat_ifhcinbadoctets_hi,
  904. estats->error_bytes_received_lo,
  905. estats->rx_stat_ifhcinbadoctets_lo);
  906. if (bp->port.pmf) {
  907. estats->mac_filter_discard =
  908. le32_to_cpu(tport->mac_filter_discard);
  909. estats->mf_tag_discard =
  910. le32_to_cpu(tport->mf_tag_discard);
  911. estats->brb_truncate_discard =
  912. le32_to_cpu(tport->brb_truncate_discard);
  913. estats->mac_discard = le32_to_cpu(tport->mac_discard);
  914. }
  915. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  916. bp->stats_pending = 0;
  917. return 0;
  918. }
  919. static void bnx2x_net_stats_update(struct bnx2x *bp)
  920. {
  921. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  922. struct net_device_stats *nstats = &bp->dev->stats;
  923. unsigned long tmp;
  924. int i;
  925. nstats->rx_packets =
  926. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  927. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  928. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  929. nstats->tx_packets =
  930. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  931. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  932. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  933. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  934. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  935. tmp = estats->mac_discard;
  936. for_each_rx_queue(bp, i)
  937. tmp += le32_to_cpu(bp->fp[i].old_tclient.checksum_discard);
  938. nstats->rx_dropped = tmp;
  939. nstats->tx_dropped = 0;
  940. nstats->multicast =
  941. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  942. nstats->collisions =
  943. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  944. nstats->rx_length_errors =
  945. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  946. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  947. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  948. bnx2x_hilo(&estats->brb_truncate_hi);
  949. nstats->rx_crc_errors =
  950. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  951. nstats->rx_frame_errors =
  952. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  953. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  954. nstats->rx_missed_errors = 0;
  955. nstats->rx_errors = nstats->rx_length_errors +
  956. nstats->rx_over_errors +
  957. nstats->rx_crc_errors +
  958. nstats->rx_frame_errors +
  959. nstats->rx_fifo_errors +
  960. nstats->rx_missed_errors;
  961. nstats->tx_aborted_errors =
  962. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  963. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  964. nstats->tx_carrier_errors =
  965. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  966. nstats->tx_fifo_errors = 0;
  967. nstats->tx_heartbeat_errors = 0;
  968. nstats->tx_window_errors = 0;
  969. nstats->tx_errors = nstats->tx_aborted_errors +
  970. nstats->tx_carrier_errors +
  971. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  972. }
  973. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  974. {
  975. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  976. int i;
  977. estats->driver_xoff = 0;
  978. estats->rx_err_discard_pkt = 0;
  979. estats->rx_skb_alloc_failed = 0;
  980. estats->hw_csum_err = 0;
  981. for_each_queue(bp, i) {
  982. struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats;
  983. estats->driver_xoff += qstats->driver_xoff;
  984. estats->rx_err_discard_pkt += qstats->rx_err_discard_pkt;
  985. estats->rx_skb_alloc_failed += qstats->rx_skb_alloc_failed;
  986. estats->hw_csum_err += qstats->hw_csum_err;
  987. }
  988. }
  989. static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
  990. {
  991. u32 val;
  992. if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
  993. val = SHMEM2_RD(bp, edebug_driver_if[1]);
  994. if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
  995. return true;
  996. }
  997. return false;
  998. }
  999. static void bnx2x_stats_update(struct bnx2x *bp)
  1000. {
  1001. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1002. if (bnx2x_edebug_stats_stopped(bp))
  1003. return;
  1004. if (*stats_comp != DMAE_COMP_VAL)
  1005. return;
  1006. if (bp->port.pmf)
  1007. bnx2x_hw_stats_update(bp);
  1008. if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) {
  1009. BNX2X_ERR("storm stats were not updated for 3 times\n");
  1010. bnx2x_panic();
  1011. return;
  1012. }
  1013. bnx2x_net_stats_update(bp);
  1014. bnx2x_drv_stats_update(bp);
  1015. if (netif_msg_timer(bp)) {
  1016. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1017. int i, cos;
  1018. netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n",
  1019. estats->brb_drop_lo, estats->brb_truncate_lo);
  1020. for_each_eth_queue(bp, i) {
  1021. struct bnx2x_fastpath *fp = &bp->fp[i];
  1022. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  1023. pr_debug("%s: rx usage(%4u) *rx_cons_sb(%u) rx pkt(%lu) rx calls(%lu %lu)\n",
  1024. fp->name, (le16_to_cpu(*fp->rx_cons_sb) -
  1025. fp->rx_comp_cons),
  1026. le16_to_cpu(*fp->rx_cons_sb),
  1027. bnx2x_hilo(&qstats->
  1028. total_unicast_packets_received_hi),
  1029. fp->rx_calls, fp->rx_pkt);
  1030. }
  1031. for_each_eth_queue(bp, i) {
  1032. struct bnx2x_fastpath *fp = &bp->fp[i];
  1033. struct bnx2x_fp_txdata *txdata;
  1034. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  1035. struct netdev_queue *txq;
  1036. pr_debug("%s: tx pkt(%lu) (Xoff events %u)",
  1037. fp->name,
  1038. bnx2x_hilo(
  1039. &qstats->total_unicast_packets_transmitted_hi),
  1040. qstats->driver_xoff);
  1041. for_each_cos_in_tx_queue(fp, cos) {
  1042. txdata = &fp->txdata[cos];
  1043. txq = netdev_get_tx_queue(bp->dev,
  1044. FP_COS_TO_TXQ(fp, cos));
  1045. pr_debug("%d: tx avail(%4u) *tx_cons_sb(%u) tx calls (%lu) %s\n",
  1046. cos,
  1047. bnx2x_tx_avail(bp, txdata),
  1048. le16_to_cpu(*txdata->tx_cons_sb),
  1049. txdata->tx_pkt,
  1050. (netif_tx_queue_stopped(txq) ?
  1051. "Xoff" : "Xon")
  1052. );
  1053. }
  1054. }
  1055. }
  1056. bnx2x_hw_stats_post(bp);
  1057. bnx2x_storm_stats_post(bp);
  1058. }
  1059. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  1060. {
  1061. struct dmae_command *dmae;
  1062. u32 opcode;
  1063. int loader_idx = PMF_DMAE_C(bp);
  1064. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1065. bp->executer_idx = 0;
  1066. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
  1067. if (bp->port.port_stx) {
  1068. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1069. if (bp->func_stx)
  1070. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1071. opcode, DMAE_COMP_GRC);
  1072. else
  1073. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1074. opcode, DMAE_COMP_PCI);
  1075. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1076. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1077. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1078. dmae->dst_addr_hi = 0;
  1079. dmae->len = sizeof(struct host_port_stats) >> 2;
  1080. if (bp->func_stx) {
  1081. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  1082. dmae->comp_addr_hi = 0;
  1083. dmae->comp_val = 1;
  1084. } else {
  1085. dmae->comp_addr_lo =
  1086. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1087. dmae->comp_addr_hi =
  1088. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1089. dmae->comp_val = DMAE_COMP_VAL;
  1090. *stats_comp = 0;
  1091. }
  1092. }
  1093. if (bp->func_stx) {
  1094. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1095. dmae->opcode =
  1096. bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  1097. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1098. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1099. dmae->dst_addr_lo = bp->func_stx >> 2;
  1100. dmae->dst_addr_hi = 0;
  1101. dmae->len = sizeof(struct host_func_stats) >> 2;
  1102. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1103. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1104. dmae->comp_val = DMAE_COMP_VAL;
  1105. *stats_comp = 0;
  1106. }
  1107. }
  1108. static void bnx2x_stats_stop(struct bnx2x *bp)
  1109. {
  1110. int update = 0;
  1111. bnx2x_stats_comp(bp);
  1112. if (bp->port.pmf)
  1113. update = (bnx2x_hw_stats_update(bp) == 0);
  1114. update |= (bnx2x_storm_stats_update(bp) == 0);
  1115. if (update) {
  1116. bnx2x_net_stats_update(bp);
  1117. if (bp->port.pmf)
  1118. bnx2x_port_stats_stop(bp);
  1119. bnx2x_hw_stats_post(bp);
  1120. bnx2x_stats_comp(bp);
  1121. }
  1122. }
  1123. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1124. {
  1125. }
  1126. static const struct {
  1127. void (*action)(struct bnx2x *bp);
  1128. enum bnx2x_stats_state next_state;
  1129. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1130. /* state event */
  1131. {
  1132. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1133. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1134. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1135. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1136. },
  1137. {
  1138. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1139. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1140. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1141. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1142. }
  1143. };
  1144. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1145. {
  1146. enum bnx2x_stats_state state;
  1147. if (unlikely(bp->panic))
  1148. return;
  1149. bnx2x_stats_stm[bp->stats_state][event].action(bp);
  1150. spin_lock_bh(&bp->stats_lock);
  1151. state = bp->stats_state;
  1152. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1153. spin_unlock_bh(&bp->stats_lock);
  1154. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1155. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1156. state, event, bp->stats_state);
  1157. }
  1158. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1159. {
  1160. struct dmae_command *dmae;
  1161. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1162. /* sanity */
  1163. if (!bp->port.pmf || !bp->port.port_stx) {
  1164. BNX2X_ERR("BUG!\n");
  1165. return;
  1166. }
  1167. bp->executer_idx = 0;
  1168. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1169. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  1170. true, DMAE_COMP_PCI);
  1171. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1172. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1173. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1174. dmae->dst_addr_hi = 0;
  1175. dmae->len = sizeof(struct host_port_stats) >> 2;
  1176. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1177. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1178. dmae->comp_val = DMAE_COMP_VAL;
  1179. *stats_comp = 0;
  1180. bnx2x_hw_stats_post(bp);
  1181. bnx2x_stats_comp(bp);
  1182. }
  1183. static void bnx2x_func_stats_base_init(struct bnx2x *bp)
  1184. {
  1185. int vn, vn_max = IS_MF(bp) ? E1HVN_MAX : E1VN_MAX;
  1186. u32 func_stx;
  1187. /* sanity */
  1188. if (!bp->port.pmf || !bp->func_stx) {
  1189. BNX2X_ERR("BUG!\n");
  1190. return;
  1191. }
  1192. /* save our func_stx */
  1193. func_stx = bp->func_stx;
  1194. for (vn = VN_0; vn < vn_max; vn++) {
  1195. int mb_idx = CHIP_IS_E1x(bp) ? 2*vn + BP_PORT(bp) : vn;
  1196. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1197. bnx2x_func_stats_init(bp);
  1198. bnx2x_hw_stats_post(bp);
  1199. bnx2x_stats_comp(bp);
  1200. }
  1201. /* restore our func_stx */
  1202. bp->func_stx = func_stx;
  1203. }
  1204. static void bnx2x_func_stats_base_update(struct bnx2x *bp)
  1205. {
  1206. struct dmae_command *dmae = &bp->stats_dmae;
  1207. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1208. /* sanity */
  1209. if (!bp->func_stx) {
  1210. BNX2X_ERR("BUG!\n");
  1211. return;
  1212. }
  1213. bp->executer_idx = 0;
  1214. memset(dmae, 0, sizeof(struct dmae_command));
  1215. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  1216. true, DMAE_COMP_PCI);
  1217. dmae->src_addr_lo = bp->func_stx >> 2;
  1218. dmae->src_addr_hi = 0;
  1219. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base));
  1220. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats_base));
  1221. dmae->len = sizeof(struct host_func_stats) >> 2;
  1222. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1223. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1224. dmae->comp_val = DMAE_COMP_VAL;
  1225. *stats_comp = 0;
  1226. bnx2x_hw_stats_post(bp);
  1227. bnx2x_stats_comp(bp);
  1228. }
  1229. /**
  1230. * This function will prepare the statistics ramrod data the way
  1231. * we will only have to increment the statistics counter and
  1232. * send the ramrod each time we have to.
  1233. *
  1234. * @param bp
  1235. */
  1236. static inline void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
  1237. {
  1238. int i;
  1239. struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
  1240. dma_addr_t cur_data_offset;
  1241. struct stats_query_entry *cur_query_entry;
  1242. stats_hdr->cmd_num = bp->fw_stats_num;
  1243. stats_hdr->drv_stats_counter = 0;
  1244. /* storm_counters struct contains the counters of completed
  1245. * statistics requests per storm which are incremented by FW
  1246. * each time it completes hadning a statistics ramrod. We will
  1247. * check these counters in the timer handler and discard a
  1248. * (statistics) ramrod completion.
  1249. */
  1250. cur_data_offset = bp->fw_stats_data_mapping +
  1251. offsetof(struct bnx2x_fw_stats_data, storm_counters);
  1252. stats_hdr->stats_counters_addrs.hi =
  1253. cpu_to_le32(U64_HI(cur_data_offset));
  1254. stats_hdr->stats_counters_addrs.lo =
  1255. cpu_to_le32(U64_LO(cur_data_offset));
  1256. /* prepare to the first stats ramrod (will be completed with
  1257. * the counters equal to zero) - init counters to somethig different.
  1258. */
  1259. memset(&bp->fw_stats_data->storm_counters, 0xff,
  1260. sizeof(struct stats_counter));
  1261. /**** Port FW statistics data ****/
  1262. cur_data_offset = bp->fw_stats_data_mapping +
  1263. offsetof(struct bnx2x_fw_stats_data, port);
  1264. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
  1265. cur_query_entry->kind = STATS_TYPE_PORT;
  1266. /* For port query index is a DONT CARE */
  1267. cur_query_entry->index = BP_PORT(bp);
  1268. /* For port query funcID is a DONT CARE */
  1269. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1270. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1271. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1272. /**** PF FW statistics data ****/
  1273. cur_data_offset = bp->fw_stats_data_mapping +
  1274. offsetof(struct bnx2x_fw_stats_data, pf);
  1275. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
  1276. cur_query_entry->kind = STATS_TYPE_PF;
  1277. /* For PF query index is a DONT CARE */
  1278. cur_query_entry->index = BP_PORT(bp);
  1279. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1280. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1281. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1282. /**** Clients' queries ****/
  1283. cur_data_offset = bp->fw_stats_data_mapping +
  1284. offsetof(struct bnx2x_fw_stats_data, queue_stats);
  1285. for_each_eth_queue(bp, i) {
  1286. cur_query_entry =
  1287. &bp->fw_stats_req->
  1288. query[BNX2X_FIRST_QUEUE_QUERY_IDX + i];
  1289. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1290. cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
  1291. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1292. cur_query_entry->address.hi =
  1293. cpu_to_le32(U64_HI(cur_data_offset));
  1294. cur_query_entry->address.lo =
  1295. cpu_to_le32(U64_LO(cur_data_offset));
  1296. cur_data_offset += sizeof(struct per_queue_stats);
  1297. }
  1298. }
  1299. void bnx2x_stats_init(struct bnx2x *bp)
  1300. {
  1301. int /*abs*/port = BP_PORT(bp);
  1302. int mb_idx = BP_FW_MB_IDX(bp);
  1303. int i;
  1304. bp->stats_pending = 0;
  1305. bp->executer_idx = 0;
  1306. bp->stats_counter = 0;
  1307. /* port and func stats for management */
  1308. if (!BP_NOMCP(bp)) {
  1309. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1310. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1311. } else {
  1312. bp->port.port_stx = 0;
  1313. bp->func_stx = 0;
  1314. }
  1315. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1316. bp->port.port_stx, bp->func_stx);
  1317. port = BP_PORT(bp);
  1318. /* port stats */
  1319. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1320. bp->port.old_nig_stats.brb_discard =
  1321. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1322. bp->port.old_nig_stats.brb_truncate =
  1323. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1324. if (!CHIP_IS_E3(bp)) {
  1325. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1326. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1327. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1328. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1329. }
  1330. /* function stats */
  1331. for_each_queue(bp, i) {
  1332. struct bnx2x_fastpath *fp = &bp->fp[i];
  1333. memset(&fp->old_tclient, 0, sizeof(fp->old_tclient));
  1334. memset(&fp->old_uclient, 0, sizeof(fp->old_uclient));
  1335. memset(&fp->old_xclient, 0, sizeof(fp->old_xclient));
  1336. memset(&fp->eth_q_stats, 0, sizeof(fp->eth_q_stats));
  1337. }
  1338. /* Prepare statistics ramrod data */
  1339. bnx2x_prep_fw_stats_req(bp);
  1340. memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
  1341. memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
  1342. bp->stats_state = STATS_STATE_DISABLED;
  1343. if (bp->port.pmf) {
  1344. if (bp->port.port_stx)
  1345. bnx2x_port_stats_base_init(bp);
  1346. if (bp->func_stx)
  1347. bnx2x_func_stats_base_init(bp);
  1348. } else if (bp->func_stx)
  1349. bnx2x_func_stats_base_update(bp);
  1350. }