ezkit.c 16 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf538/boards/ezkit.c
  3. * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/physmap.h>
  34. #include <linux/mtd/partitions.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #include <linux/irq.h>
  38. #include <linux/interrupt.h>
  39. #include <asm/bfin5xx_spi.h>
  40. #include <asm/dma.h>
  41. #include <asm/gpio.h>
  42. #include <asm/nand.h>
  43. #include <asm/portmux.h>
  44. #include <asm/dpmc.h>
  45. #include <linux/input.h>
  46. /*
  47. * Name the Board for the /proc/cpuinfo
  48. */
  49. const char bfin_board_name[] = "ADI BF538-EZKIT";
  50. /*
  51. * Driver needs to know address, irq and flag pin.
  52. */
  53. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  54. static struct platform_device rtc_device = {
  55. .name = "rtc-bfin",
  56. .id = -1,
  57. };
  58. #endif
  59. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  60. static struct resource bfin_uart_resources[] = {
  61. #ifdef CONFIG_SERIAL_BFIN_UART0
  62. {
  63. .start = 0xFFC00400,
  64. .end = 0xFFC004FF,
  65. .flags = IORESOURCE_MEM,
  66. },
  67. #endif
  68. #ifdef CONFIG_SERIAL_BFIN_UART1
  69. {
  70. .start = 0xFFC02000,
  71. .end = 0xFFC020FF,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. #endif
  75. #ifdef CONFIG_SERIAL_BFIN_UART2
  76. {
  77. .start = 0xFFC02100,
  78. .end = 0xFFC021FF,
  79. .flags = IORESOURCE_MEM,
  80. },
  81. #endif
  82. };
  83. static struct platform_device bfin_uart_device = {
  84. .name = "bfin-uart",
  85. .id = 1,
  86. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  87. .resource = bfin_uart_resources,
  88. };
  89. #endif
  90. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  91. #ifdef CONFIG_BFIN_SIR0
  92. static struct resource bfin_sir0_resources[] = {
  93. {
  94. .start = 0xFFC00400,
  95. .end = 0xFFC004FF,
  96. .flags = IORESOURCE_MEM,
  97. },
  98. {
  99. .start = IRQ_UART0_RX,
  100. .end = IRQ_UART0_RX+1,
  101. .flags = IORESOURCE_IRQ,
  102. },
  103. {
  104. .start = CH_UART0_RX,
  105. .end = CH_UART0_RX+1,
  106. .flags = IORESOURCE_DMA,
  107. },
  108. };
  109. static struct platform_device bfin_sir0_device = {
  110. .name = "bfin_sir",
  111. .id = 0,
  112. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  113. .resource = bfin_sir0_resources,
  114. };
  115. #endif
  116. #ifdef CONFIG_BFIN_SIR1
  117. static struct resource bfin_sir1_resources[] = {
  118. {
  119. .start = 0xFFC02000,
  120. .end = 0xFFC020FF,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. {
  124. .start = IRQ_UART1_RX,
  125. .end = IRQ_UART1_RX+1,
  126. .flags = IORESOURCE_IRQ,
  127. },
  128. {
  129. .start = CH_UART1_RX,
  130. .end = CH_UART1_RX+1,
  131. .flags = IORESOURCE_DMA,
  132. },
  133. };
  134. static struct platform_device bfin_sir1_device = {
  135. .name = "bfin_sir",
  136. .id = 1,
  137. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  138. .resource = bfin_sir1_resources,
  139. };
  140. #endif
  141. #ifdef CONFIG_BFIN_SIR2
  142. static struct resource bfin_sir2_resources[] = {
  143. {
  144. .start = 0xFFC02100,
  145. .end = 0xFFC021FF,
  146. .flags = IORESOURCE_MEM,
  147. },
  148. {
  149. .start = IRQ_UART2_RX,
  150. .end = IRQ_UART2_RX+1,
  151. .flags = IORESOURCE_IRQ,
  152. },
  153. {
  154. .start = CH_UART2_RX,
  155. .end = CH_UART2_RX+1,
  156. .flags = IORESOURCE_DMA,
  157. },
  158. };
  159. static struct platform_device bfin_sir2_device = {
  160. .name = "bfin_sir",
  161. .id = 2,
  162. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  163. .resource = bfin_sir2_resources,
  164. };
  165. #endif
  166. #endif
  167. /*
  168. * USB-LAN EzExtender board
  169. * Driver needs to know address, irq and flag pin.
  170. */
  171. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  172. #include <linux/smc91x.h>
  173. static struct smc91x_platdata smc91x_info = {
  174. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  175. .leda = RPC_LED_100_10,
  176. .ledb = RPC_LED_TX_RX,
  177. };
  178. static struct resource smc91x_resources[] = {
  179. {
  180. .name = "smc91x-regs",
  181. .start = 0x20310300,
  182. .end = 0x20310300 + 16,
  183. .flags = IORESOURCE_MEM,
  184. }, {
  185. .start = IRQ_PF0,
  186. .end = IRQ_PF0,
  187. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  188. },
  189. };
  190. static struct platform_device smc91x_device = {
  191. .name = "smc91x",
  192. .id = 0,
  193. .num_resources = ARRAY_SIZE(smc91x_resources),
  194. .resource = smc91x_resources,
  195. .dev = {
  196. .platform_data = &smc91x_info,
  197. },
  198. };
  199. #endif
  200. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  201. /* all SPI peripherals info goes here */
  202. #if defined(CONFIG_MTD_M25P80) \
  203. || defined(CONFIG_MTD_M25P80_MODULE)
  204. /* SPI flash chip (m25p16) */
  205. static struct mtd_partition bfin_spi_flash_partitions[] = {
  206. {
  207. .name = "bootloader(spi)",
  208. .size = 0x00040000,
  209. .offset = 0,
  210. .mask_flags = MTD_CAP_ROM
  211. }, {
  212. .name = "linux kernel(spi)",
  213. .size = 0x1c0000,
  214. .offset = 0x40000
  215. }
  216. };
  217. static struct flash_platform_data bfin_spi_flash_data = {
  218. .name = "m25p80",
  219. .parts = bfin_spi_flash_partitions,
  220. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  221. .type = "m25p16",
  222. };
  223. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  224. .enable_dma = 0, /* use dma transfer with this chip*/
  225. .bits_per_word = 8,
  226. .cs_change_per_word = 0,
  227. };
  228. #endif
  229. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  230. #include <linux/spi/ad7879.h>
  231. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  232. .model = 7879, /* Model = AD7879 */
  233. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  234. .pressure_max = 10000,
  235. .pressure_min = 0,
  236. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  237. .acquisition_time = 1, /* 4us acquisition time per sample */
  238. .median = 2, /* do 8 measurements */
  239. .averaging = 1, /* take the average of 4 middle samples */
  240. .pen_down_acc_interval = 255, /* 9.4 ms */
  241. .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
  242. .gpio_default = 1, /* During initialization set GPIO = HIGH */
  243. };
  244. #endif
  245. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  246. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  247. .enable_dma = 0,
  248. .bits_per_word = 16,
  249. };
  250. #endif
  251. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  252. #include <asm/bfin-lq035q1.h>
  253. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  254. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  255. .use_bl = 0, /* let something else control the LCD Blacklight */
  256. .gpio_bl = GPIO_PF7,
  257. };
  258. static struct resource bfin_lq035q1_resources[] = {
  259. {
  260. .start = IRQ_PPI_ERROR,
  261. .end = IRQ_PPI_ERROR,
  262. .flags = IORESOURCE_IRQ,
  263. },
  264. };
  265. static struct platform_device bfin_lq035q1_device = {
  266. .name = "bfin-lq035q1",
  267. .id = -1,
  268. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  269. .resource = bfin_lq035q1_resources,
  270. .dev = {
  271. .platform_data = &bfin_lq035q1_data,
  272. },
  273. };
  274. #endif
  275. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  276. static struct bfin5xx_spi_chip spidev_chip_info = {
  277. .enable_dma = 0,
  278. .bits_per_word = 8,
  279. };
  280. #endif
  281. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  282. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  283. .enable_dma = 0,
  284. .bits_per_word = 8,
  285. };
  286. #endif
  287. static struct spi_board_info bf538_spi_board_info[] __initdata = {
  288. #if defined(CONFIG_MTD_M25P80) \
  289. || defined(CONFIG_MTD_M25P80_MODULE)
  290. {
  291. /* the modalias must be the same as spi device driver name */
  292. .modalias = "m25p80", /* Name of spi_driver for this device */
  293. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  294. .bus_num = 0, /* Framework bus number */
  295. .chip_select = 1, /* SPI_SSEL1*/
  296. .platform_data = &bfin_spi_flash_data,
  297. .controller_data = &spi_flash_chip_info,
  298. .mode = SPI_MODE_3,
  299. },
  300. #endif
  301. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  302. {
  303. .modalias = "ad7879",
  304. .platform_data = &bfin_ad7879_ts_info,
  305. .irq = IRQ_PF3,
  306. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  307. .bus_num = 0,
  308. .chip_select = 1,
  309. .controller_data = &spi_ad7879_chip_info,
  310. .mode = SPI_CPHA | SPI_CPOL,
  311. },
  312. #endif
  313. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  314. {
  315. .modalias = "bfin-lq035q1-spi",
  316. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  317. .bus_num = 0,
  318. .chip_select = 2,
  319. .controller_data = &lq035q1_spi_chip_info,
  320. .mode = SPI_CPHA | SPI_CPOL,
  321. },
  322. #endif
  323. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  324. {
  325. .modalias = "spidev",
  326. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  327. .bus_num = 0,
  328. .chip_select = 1,
  329. .controller_data = &spidev_chip_info,
  330. },
  331. #endif
  332. };
  333. /* SPI (0) */
  334. static struct resource bfin_spi0_resource[] = {
  335. [0] = {
  336. .start = SPI0_REGBASE,
  337. .end = SPI0_REGBASE + 0xFF,
  338. .flags = IORESOURCE_MEM,
  339. },
  340. [1] = {
  341. .start = CH_SPI0,
  342. .end = CH_SPI0,
  343. .flags = IORESOURCE_DMA,
  344. },
  345. [2] = {
  346. .start = IRQ_SPI0,
  347. .end = IRQ_SPI0,
  348. .flags = IORESOURCE_IRQ,
  349. }
  350. };
  351. /* SPI (1) */
  352. static struct resource bfin_spi1_resource[] = {
  353. [0] = {
  354. .start = SPI1_REGBASE,
  355. .end = SPI1_REGBASE + 0xFF,
  356. .flags = IORESOURCE_MEM,
  357. },
  358. [1] = {
  359. .start = CH_SPI1,
  360. .end = CH_SPI1,
  361. .flags = IORESOURCE_DMA,
  362. },
  363. [2] = {
  364. .start = IRQ_SPI1,
  365. .end = IRQ_SPI1,
  366. .flags = IORESOURCE_IRQ,
  367. }
  368. };
  369. /* SPI (2) */
  370. static struct resource bfin_spi2_resource[] = {
  371. [0] = {
  372. .start = SPI2_REGBASE,
  373. .end = SPI2_REGBASE + 0xFF,
  374. .flags = IORESOURCE_MEM,
  375. },
  376. [1] = {
  377. .start = CH_SPI2,
  378. .end = CH_SPI2,
  379. .flags = IORESOURCE_IRQ,
  380. }
  381. };
  382. /* SPI controller data */
  383. static struct bfin5xx_spi_master bf538_spi_master_info0 = {
  384. .num_chipselect = 8,
  385. .enable_dma = 1, /* master has the ability to do dma transfer */
  386. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  387. };
  388. static struct platform_device bf538_spi_master0 = {
  389. .name = "bfin-spi",
  390. .id = 0, /* Bus number */
  391. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  392. .resource = bfin_spi0_resource,
  393. .dev = {
  394. .platform_data = &bf538_spi_master_info0, /* Passed to driver */
  395. },
  396. };
  397. static struct bfin5xx_spi_master bf538_spi_master_info1 = {
  398. .num_chipselect = 8,
  399. .enable_dma = 1, /* master has the ability to do dma transfer */
  400. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  401. };
  402. static struct platform_device bf538_spi_master1 = {
  403. .name = "bfin-spi",
  404. .id = 1, /* Bus number */
  405. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  406. .resource = bfin_spi1_resource,
  407. .dev = {
  408. .platform_data = &bf538_spi_master_info1, /* Passed to driver */
  409. },
  410. };
  411. static struct bfin5xx_spi_master bf538_spi_master_info2 = {
  412. .num_chipselect = 8,
  413. .enable_dma = 1, /* master has the ability to do dma transfer */
  414. .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
  415. };
  416. static struct platform_device bf538_spi_master2 = {
  417. .name = "bfin-spi",
  418. .id = 2, /* Bus number */
  419. .num_resources = ARRAY_SIZE(bfin_spi2_resource),
  420. .resource = bfin_spi2_resource,
  421. .dev = {
  422. .platform_data = &bf538_spi_master_info2, /* Passed to driver */
  423. },
  424. };
  425. #endif /* spi master and devices */
  426. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  427. static struct resource bfin_twi0_resource[] = {
  428. [0] = {
  429. .start = TWI0_REGBASE,
  430. .end = TWI0_REGBASE + 0xFF,
  431. .flags = IORESOURCE_MEM,
  432. },
  433. [1] = {
  434. .start = IRQ_TWI0,
  435. .end = IRQ_TWI0,
  436. .flags = IORESOURCE_IRQ,
  437. },
  438. };
  439. static struct platform_device i2c_bfin_twi0_device = {
  440. .name = "i2c-bfin-twi",
  441. .id = 0,
  442. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  443. .resource = bfin_twi0_resource,
  444. };
  445. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  446. static struct resource bfin_twi1_resource[] = {
  447. [0] = {
  448. .start = TWI1_REGBASE,
  449. .end = TWI1_REGBASE + 0xFF,
  450. .flags = IORESOURCE_MEM,
  451. },
  452. [1] = {
  453. .start = IRQ_TWI1,
  454. .end = IRQ_TWI1,
  455. .flags = IORESOURCE_IRQ,
  456. },
  457. };
  458. static struct platform_device i2c_bfin_twi1_device = {
  459. .name = "i2c-bfin-twi",
  460. .id = 1,
  461. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  462. .resource = bfin_twi1_resource,
  463. };
  464. #endif
  465. #endif
  466. static struct resource bfin_gpios_resources = {
  467. .start = 0,
  468. .end = MAX_BLACKFIN_GPIOS - 1,
  469. .flags = IORESOURCE_IRQ,
  470. };
  471. static struct platform_device bfin_gpios_device = {
  472. .name = "simple-gpio",
  473. .id = -1,
  474. .num_resources = 1,
  475. .resource = &bfin_gpios_resources,
  476. };
  477. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  478. #include <linux/gpio_keys.h>
  479. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  480. {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
  481. };
  482. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  483. .buttons = bfin_gpio_keys_table,
  484. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  485. };
  486. static struct platform_device bfin_device_gpiokeys = {
  487. .name = "gpio-keys",
  488. .dev = {
  489. .platform_data = &bfin_gpio_keys_data,
  490. },
  491. };
  492. #endif
  493. static const unsigned int cclk_vlev_datasheet[] =
  494. {
  495. /*
  496. * Internal VLEV BF538SBBC1533
  497. ****temporarily using these values until data sheet is updated
  498. */
  499. VRPAIR(VLEV_100, 150000000),
  500. VRPAIR(VLEV_100, 250000000),
  501. VRPAIR(VLEV_110, 276000000),
  502. VRPAIR(VLEV_115, 301000000),
  503. VRPAIR(VLEV_120, 525000000),
  504. VRPAIR(VLEV_125, 550000000),
  505. VRPAIR(VLEV_130, 600000000),
  506. };
  507. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  508. .tuple_tab = cclk_vlev_datasheet,
  509. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  510. .vr_settling_time = 25 /* us */,
  511. };
  512. static struct platform_device bfin_dpmc = {
  513. .name = "bfin dpmc",
  514. .dev = {
  515. .platform_data = &bfin_dmpc_vreg_data,
  516. },
  517. };
  518. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  519. static struct mtd_partition ezkit_partitions[] = {
  520. {
  521. .name = "bootloader(nor)",
  522. .size = 0x40000,
  523. .offset = 0,
  524. }, {
  525. .name = "linux kernel(nor)",
  526. .size = 0x180000,
  527. .offset = MTDPART_OFS_APPEND,
  528. }, {
  529. .name = "file system(nor)",
  530. .size = MTDPART_SIZ_FULL,
  531. .offset = MTDPART_OFS_APPEND,
  532. }
  533. };
  534. static struct physmap_flash_data ezkit_flash_data = {
  535. .width = 2,
  536. .parts = ezkit_partitions,
  537. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  538. };
  539. static struct resource ezkit_flash_resource = {
  540. .start = 0x20000000,
  541. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  542. .end = 0x202fffff,
  543. #else
  544. .end = 0x203fffff,
  545. #endif
  546. .flags = IORESOURCE_MEM,
  547. };
  548. static struct platform_device ezkit_flash_device = {
  549. .name = "physmap-flash",
  550. .id = 0,
  551. .dev = {
  552. .platform_data = &ezkit_flash_data,
  553. },
  554. .num_resources = 1,
  555. .resource = &ezkit_flash_resource,
  556. };
  557. #endif
  558. static struct platform_device *cm_bf538_devices[] __initdata = {
  559. &bfin_dpmc,
  560. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  561. &rtc_device,
  562. #endif
  563. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  564. &bfin_uart_device,
  565. #endif
  566. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  567. &bf538_spi_master0,
  568. &bf538_spi_master1,
  569. &bf538_spi_master2,
  570. #endif
  571. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  572. &i2c_bfin_twi0_device,
  573. &i2c_bfin_twi1_device,
  574. #endif
  575. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  576. #ifdef CONFIG_BFIN_SIR0
  577. &bfin_sir0_device,
  578. #endif
  579. #ifdef CONFIG_BFIN_SIR1
  580. &bfin_sir1_device,
  581. #endif
  582. #ifdef CONFIG_BFIN_SIR2
  583. &bfin_sir2_device,
  584. #endif
  585. #endif
  586. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  587. &smc91x_device,
  588. #endif
  589. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  590. &bfin_lq035q1_device,
  591. #endif
  592. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  593. &bfin_device_gpiokeys,
  594. #endif
  595. &bfin_gpios_device,
  596. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  597. &ezkit_flash_device,
  598. #endif
  599. };
  600. static int __init ezkit_init(void)
  601. {
  602. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  603. platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
  604. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  605. spi_register_board_info(bf538_spi_board_info,
  606. ARRAY_SIZE(bf538_spi_board_info));
  607. #endif
  608. return 0;
  609. }
  610. arch_initcall(ezkit_init);