events.c 42 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #ifdef CONFIG_X86
  33. #include <asm/desc.h>
  34. #include <asm/ptrace.h>
  35. #include <asm/irq.h>
  36. #include <asm/idle.h>
  37. #include <asm/io_apic.h>
  38. #include <asm/xen/page.h>
  39. #include <asm/xen/pci.h>
  40. #endif
  41. #include <asm/sync_bitops.h>
  42. #include <asm/xen/hypercall.h>
  43. #include <asm/xen/hypervisor.h>
  44. #include <xen/xen.h>
  45. #include <xen/hvm.h>
  46. #include <xen/xen-ops.h>
  47. #include <xen/events.h>
  48. #include <xen/interface/xen.h>
  49. #include <xen/interface/event_channel.h>
  50. #include <xen/interface/hvm/hvm_op.h>
  51. #include <xen/interface/hvm/params.h>
  52. #include <xen/interface/physdev.h>
  53. #include <xen/interface/sched.h>
  54. #include <asm/hw_irq.h>
  55. /*
  56. * This lock protects updates to the following mapping and reference-count
  57. * arrays. The lock does not need to be acquired to read the mapping tables.
  58. */
  59. static DEFINE_MUTEX(irq_mapping_update_lock);
  60. static LIST_HEAD(xen_irq_list_head);
  61. /* IRQ <-> VIRQ mapping. */
  62. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  63. /* IRQ <-> IPI mapping */
  64. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  65. /* Interrupt types. */
  66. enum xen_irq_type {
  67. IRQT_UNBOUND = 0,
  68. IRQT_PIRQ,
  69. IRQT_VIRQ,
  70. IRQT_IPI,
  71. IRQT_EVTCHN
  72. };
  73. /*
  74. * Packed IRQ information:
  75. * type - enum xen_irq_type
  76. * event channel - irq->event channel mapping
  77. * cpu - cpu this event channel is bound to
  78. * index - type-specific information:
  79. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  80. * guest, or GSI (real passthrough IRQ) of the device.
  81. * VIRQ - virq number
  82. * IPI - IPI vector
  83. * EVTCHN -
  84. */
  85. struct irq_info {
  86. struct list_head list;
  87. int refcnt;
  88. enum xen_irq_type type; /* type */
  89. unsigned irq;
  90. unsigned short evtchn; /* event channel */
  91. unsigned short cpu; /* cpu bound */
  92. union {
  93. unsigned short virq;
  94. enum ipi_vector ipi;
  95. struct {
  96. unsigned short pirq;
  97. unsigned short gsi;
  98. unsigned char vector;
  99. unsigned char flags;
  100. uint16_t domid;
  101. } pirq;
  102. } u;
  103. };
  104. #define PIRQ_NEEDS_EOI (1 << 0)
  105. #define PIRQ_SHAREABLE (1 << 1)
  106. static int *evtchn_to_irq;
  107. static unsigned long *pirq_eoi_map;
  108. static bool (*pirq_needs_eoi)(unsigned irq);
  109. static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
  110. cpu_evtchn_mask);
  111. /* Xen will never allocate port zero for any purpose. */
  112. #define VALID_EVTCHN(chn) ((chn) != 0)
  113. static struct irq_chip xen_dynamic_chip;
  114. static struct irq_chip xen_percpu_chip;
  115. static struct irq_chip xen_pirq_chip;
  116. static void enable_dynirq(struct irq_data *data);
  117. static void disable_dynirq(struct irq_data *data);
  118. /* Get info for IRQ */
  119. static struct irq_info *info_for_irq(unsigned irq)
  120. {
  121. return irq_get_handler_data(irq);
  122. }
  123. /* Constructors for packed IRQ information. */
  124. static void xen_irq_info_common_init(struct irq_info *info,
  125. unsigned irq,
  126. enum xen_irq_type type,
  127. unsigned short evtchn,
  128. unsigned short cpu)
  129. {
  130. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  131. info->type = type;
  132. info->irq = irq;
  133. info->evtchn = evtchn;
  134. info->cpu = cpu;
  135. evtchn_to_irq[evtchn] = irq;
  136. }
  137. static void xen_irq_info_evtchn_init(unsigned irq,
  138. unsigned short evtchn)
  139. {
  140. struct irq_info *info = info_for_irq(irq);
  141. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  142. }
  143. static void xen_irq_info_ipi_init(unsigned cpu,
  144. unsigned irq,
  145. unsigned short evtchn,
  146. enum ipi_vector ipi)
  147. {
  148. struct irq_info *info = info_for_irq(irq);
  149. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  150. info->u.ipi = ipi;
  151. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  152. }
  153. static void xen_irq_info_virq_init(unsigned cpu,
  154. unsigned irq,
  155. unsigned short evtchn,
  156. unsigned short virq)
  157. {
  158. struct irq_info *info = info_for_irq(irq);
  159. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  160. info->u.virq = virq;
  161. per_cpu(virq_to_irq, cpu)[virq] = irq;
  162. }
  163. static void xen_irq_info_pirq_init(unsigned irq,
  164. unsigned short evtchn,
  165. unsigned short pirq,
  166. unsigned short gsi,
  167. unsigned short vector,
  168. uint16_t domid,
  169. unsigned char flags)
  170. {
  171. struct irq_info *info = info_for_irq(irq);
  172. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  173. info->u.pirq.pirq = pirq;
  174. info->u.pirq.gsi = gsi;
  175. info->u.pirq.vector = vector;
  176. info->u.pirq.domid = domid;
  177. info->u.pirq.flags = flags;
  178. }
  179. /*
  180. * Accessors for packed IRQ information.
  181. */
  182. static unsigned int evtchn_from_irq(unsigned irq)
  183. {
  184. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  185. return 0;
  186. return info_for_irq(irq)->evtchn;
  187. }
  188. unsigned irq_from_evtchn(unsigned int evtchn)
  189. {
  190. return evtchn_to_irq[evtchn];
  191. }
  192. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  193. static enum ipi_vector ipi_from_irq(unsigned irq)
  194. {
  195. struct irq_info *info = info_for_irq(irq);
  196. BUG_ON(info == NULL);
  197. BUG_ON(info->type != IRQT_IPI);
  198. return info->u.ipi;
  199. }
  200. static unsigned virq_from_irq(unsigned irq)
  201. {
  202. struct irq_info *info = info_for_irq(irq);
  203. BUG_ON(info == NULL);
  204. BUG_ON(info->type != IRQT_VIRQ);
  205. return info->u.virq;
  206. }
  207. static unsigned pirq_from_irq(unsigned irq)
  208. {
  209. struct irq_info *info = info_for_irq(irq);
  210. BUG_ON(info == NULL);
  211. BUG_ON(info->type != IRQT_PIRQ);
  212. return info->u.pirq.pirq;
  213. }
  214. static enum xen_irq_type type_from_irq(unsigned irq)
  215. {
  216. return info_for_irq(irq)->type;
  217. }
  218. static unsigned cpu_from_irq(unsigned irq)
  219. {
  220. return info_for_irq(irq)->cpu;
  221. }
  222. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  223. {
  224. int irq = evtchn_to_irq[evtchn];
  225. unsigned ret = 0;
  226. if (irq != -1)
  227. ret = cpu_from_irq(irq);
  228. return ret;
  229. }
  230. static bool pirq_check_eoi_map(unsigned irq)
  231. {
  232. return test_bit(pirq_from_irq(irq), pirq_eoi_map);
  233. }
  234. static bool pirq_needs_eoi_flag(unsigned irq)
  235. {
  236. struct irq_info *info = info_for_irq(irq);
  237. BUG_ON(info->type != IRQT_PIRQ);
  238. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  239. }
  240. static inline unsigned long active_evtchns(unsigned int cpu,
  241. struct shared_info *sh,
  242. unsigned int idx)
  243. {
  244. return sh->evtchn_pending[idx] &
  245. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  246. ~sh->evtchn_mask[idx];
  247. }
  248. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  249. {
  250. int irq = evtchn_to_irq[chn];
  251. BUG_ON(irq == -1);
  252. #ifdef CONFIG_SMP
  253. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  254. #endif
  255. clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
  256. set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
  257. info_for_irq(irq)->cpu = cpu;
  258. }
  259. static void init_evtchn_cpu_bindings(void)
  260. {
  261. int i;
  262. #ifdef CONFIG_SMP
  263. struct irq_info *info;
  264. /* By default all event channels notify CPU#0. */
  265. list_for_each_entry(info, &xen_irq_list_head, list) {
  266. struct irq_desc *desc = irq_to_desc(info->irq);
  267. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  268. }
  269. #endif
  270. for_each_possible_cpu(i)
  271. memset(per_cpu(cpu_evtchn_mask, i),
  272. (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
  273. }
  274. static inline void clear_evtchn(int port)
  275. {
  276. struct shared_info *s = HYPERVISOR_shared_info;
  277. sync_clear_bit(port, &s->evtchn_pending[0]);
  278. }
  279. static inline void set_evtchn(int port)
  280. {
  281. struct shared_info *s = HYPERVISOR_shared_info;
  282. sync_set_bit(port, &s->evtchn_pending[0]);
  283. }
  284. static inline int test_evtchn(int port)
  285. {
  286. struct shared_info *s = HYPERVISOR_shared_info;
  287. return sync_test_bit(port, &s->evtchn_pending[0]);
  288. }
  289. /**
  290. * notify_remote_via_irq - send event to remote end of event channel via irq
  291. * @irq: irq of event channel to send event to
  292. *
  293. * Unlike notify_remote_via_evtchn(), this is safe to use across
  294. * save/restore. Notifications on a broken connection are silently
  295. * dropped.
  296. */
  297. void notify_remote_via_irq(int irq)
  298. {
  299. int evtchn = evtchn_from_irq(irq);
  300. if (VALID_EVTCHN(evtchn))
  301. notify_remote_via_evtchn(evtchn);
  302. }
  303. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  304. static void mask_evtchn(int port)
  305. {
  306. struct shared_info *s = HYPERVISOR_shared_info;
  307. sync_set_bit(port, &s->evtchn_mask[0]);
  308. }
  309. static void unmask_evtchn(int port)
  310. {
  311. struct shared_info *s = HYPERVISOR_shared_info;
  312. unsigned int cpu = get_cpu();
  313. int do_hypercall = 0, evtchn_pending = 0;
  314. BUG_ON(!irqs_disabled());
  315. if (unlikely((cpu != cpu_from_evtchn(port))))
  316. do_hypercall = 1;
  317. else
  318. evtchn_pending = sync_test_bit(port, &s->evtchn_pending[0]);
  319. if (unlikely(evtchn_pending && xen_hvm_domain()))
  320. do_hypercall = 1;
  321. /* Slow path (hypercall) if this is a non-local port or if this is
  322. * an hvm domain and an event is pending (hvm domains don't have
  323. * their own implementation of irq_enable). */
  324. if (do_hypercall) {
  325. struct evtchn_unmask unmask = { .port = port };
  326. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  327. } else {
  328. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  329. sync_clear_bit(port, &s->evtchn_mask[0]);
  330. /*
  331. * The following is basically the equivalent of
  332. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  333. * the interrupt edge' if the channel is masked.
  334. */
  335. if (evtchn_pending &&
  336. !sync_test_and_set_bit(port / BITS_PER_LONG,
  337. &vcpu_info->evtchn_pending_sel))
  338. vcpu_info->evtchn_upcall_pending = 1;
  339. }
  340. put_cpu();
  341. }
  342. static void xen_irq_init(unsigned irq)
  343. {
  344. struct irq_info *info;
  345. #ifdef CONFIG_SMP
  346. struct irq_desc *desc = irq_to_desc(irq);
  347. /* By default all event channels notify CPU#0. */
  348. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  349. #endif
  350. info = kzalloc(sizeof(*info), GFP_KERNEL);
  351. if (info == NULL)
  352. panic("Unable to allocate metadata for IRQ%d\n", irq);
  353. info->type = IRQT_UNBOUND;
  354. info->refcnt = -1;
  355. irq_set_handler_data(irq, info);
  356. list_add_tail(&info->list, &xen_irq_list_head);
  357. }
  358. static int __must_check xen_allocate_irq_dynamic(void)
  359. {
  360. int first = 0;
  361. int irq;
  362. #ifdef CONFIG_X86_IO_APIC
  363. /*
  364. * For an HVM guest or domain 0 which see "real" (emulated or
  365. * actual respectively) GSIs we allocate dynamic IRQs
  366. * e.g. those corresponding to event channels or MSIs
  367. * etc. from the range above those "real" GSIs to avoid
  368. * collisions.
  369. */
  370. if (xen_initial_domain() || xen_hvm_domain())
  371. first = get_nr_irqs_gsi();
  372. #endif
  373. irq = irq_alloc_desc_from(first, -1);
  374. if (irq >= 0)
  375. xen_irq_init(irq);
  376. return irq;
  377. }
  378. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  379. {
  380. int irq;
  381. /*
  382. * A PV guest has no concept of a GSI (since it has no ACPI
  383. * nor access to/knowledge of the physical APICs). Therefore
  384. * all IRQs are dynamically allocated from the entire IRQ
  385. * space.
  386. */
  387. if (xen_pv_domain() && !xen_initial_domain())
  388. return xen_allocate_irq_dynamic();
  389. /* Legacy IRQ descriptors are already allocated by the arch. */
  390. if (gsi < NR_IRQS_LEGACY)
  391. irq = gsi;
  392. else
  393. irq = irq_alloc_desc_at(gsi, -1);
  394. xen_irq_init(irq);
  395. return irq;
  396. }
  397. static void xen_free_irq(unsigned irq)
  398. {
  399. struct irq_info *info = irq_get_handler_data(irq);
  400. list_del(&info->list);
  401. irq_set_handler_data(irq, NULL);
  402. WARN_ON(info->refcnt > 0);
  403. kfree(info);
  404. /* Legacy IRQ descriptors are managed by the arch. */
  405. if (irq < NR_IRQS_LEGACY)
  406. return;
  407. irq_free_desc(irq);
  408. }
  409. static void pirq_query_unmask(int irq)
  410. {
  411. struct physdev_irq_status_query irq_status;
  412. struct irq_info *info = info_for_irq(irq);
  413. BUG_ON(info->type != IRQT_PIRQ);
  414. irq_status.irq = pirq_from_irq(irq);
  415. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  416. irq_status.flags = 0;
  417. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  418. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  419. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  420. }
  421. static bool probing_irq(int irq)
  422. {
  423. struct irq_desc *desc = irq_to_desc(irq);
  424. return desc && desc->action == NULL;
  425. }
  426. static void eoi_pirq(struct irq_data *data)
  427. {
  428. int evtchn = evtchn_from_irq(data->irq);
  429. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  430. int rc = 0;
  431. irq_move_irq(data);
  432. if (VALID_EVTCHN(evtchn))
  433. clear_evtchn(evtchn);
  434. if (pirq_needs_eoi(data->irq)) {
  435. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  436. WARN_ON(rc);
  437. }
  438. }
  439. static void mask_ack_pirq(struct irq_data *data)
  440. {
  441. disable_dynirq(data);
  442. eoi_pirq(data);
  443. }
  444. static unsigned int __startup_pirq(unsigned int irq)
  445. {
  446. struct evtchn_bind_pirq bind_pirq;
  447. struct irq_info *info = info_for_irq(irq);
  448. int evtchn = evtchn_from_irq(irq);
  449. int rc;
  450. BUG_ON(info->type != IRQT_PIRQ);
  451. if (VALID_EVTCHN(evtchn))
  452. goto out;
  453. bind_pirq.pirq = pirq_from_irq(irq);
  454. /* NB. We are happy to share unless we are probing. */
  455. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  456. BIND_PIRQ__WILL_SHARE : 0;
  457. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  458. if (rc != 0) {
  459. if (!probing_irq(irq))
  460. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  461. irq);
  462. return 0;
  463. }
  464. evtchn = bind_pirq.port;
  465. pirq_query_unmask(irq);
  466. evtchn_to_irq[evtchn] = irq;
  467. bind_evtchn_to_cpu(evtchn, 0);
  468. info->evtchn = evtchn;
  469. out:
  470. unmask_evtchn(evtchn);
  471. eoi_pirq(irq_get_irq_data(irq));
  472. return 0;
  473. }
  474. static unsigned int startup_pirq(struct irq_data *data)
  475. {
  476. return __startup_pirq(data->irq);
  477. }
  478. static void shutdown_pirq(struct irq_data *data)
  479. {
  480. struct evtchn_close close;
  481. unsigned int irq = data->irq;
  482. struct irq_info *info = info_for_irq(irq);
  483. int evtchn = evtchn_from_irq(irq);
  484. BUG_ON(info->type != IRQT_PIRQ);
  485. if (!VALID_EVTCHN(evtchn))
  486. return;
  487. mask_evtchn(evtchn);
  488. close.port = evtchn;
  489. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  490. BUG();
  491. bind_evtchn_to_cpu(evtchn, 0);
  492. evtchn_to_irq[evtchn] = -1;
  493. info->evtchn = 0;
  494. }
  495. static void enable_pirq(struct irq_data *data)
  496. {
  497. startup_pirq(data);
  498. }
  499. static void disable_pirq(struct irq_data *data)
  500. {
  501. disable_dynirq(data);
  502. }
  503. int xen_irq_from_gsi(unsigned gsi)
  504. {
  505. struct irq_info *info;
  506. list_for_each_entry(info, &xen_irq_list_head, list) {
  507. if (info->type != IRQT_PIRQ)
  508. continue;
  509. if (info->u.pirq.gsi == gsi)
  510. return info->irq;
  511. }
  512. return -1;
  513. }
  514. EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
  515. /*
  516. * Do not make any assumptions regarding the relationship between the
  517. * IRQ number returned here and the Xen pirq argument.
  518. *
  519. * Note: We don't assign an event channel until the irq actually started
  520. * up. Return an existing irq if we've already got one for the gsi.
  521. *
  522. * Shareable implies level triggered, not shareable implies edge
  523. * triggered here.
  524. */
  525. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  526. unsigned pirq, int shareable, char *name)
  527. {
  528. int irq = -1;
  529. struct physdev_irq irq_op;
  530. mutex_lock(&irq_mapping_update_lock);
  531. irq = xen_irq_from_gsi(gsi);
  532. if (irq != -1) {
  533. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  534. irq, gsi);
  535. goto out;
  536. }
  537. irq = xen_allocate_irq_gsi(gsi);
  538. if (irq < 0)
  539. goto out;
  540. irq_op.irq = irq;
  541. irq_op.vector = 0;
  542. /* Only the privileged domain can do this. For non-priv, the pcifront
  543. * driver provides a PCI bus that does the call to do exactly
  544. * this in the priv domain. */
  545. if (xen_initial_domain() &&
  546. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  547. xen_free_irq(irq);
  548. irq = -ENOSPC;
  549. goto out;
  550. }
  551. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
  552. shareable ? PIRQ_SHAREABLE : 0);
  553. pirq_query_unmask(irq);
  554. /* We try to use the handler with the appropriate semantic for the
  555. * type of interrupt: if the interrupt is an edge triggered
  556. * interrupt we use handle_edge_irq.
  557. *
  558. * On the other hand if the interrupt is level triggered we use
  559. * handle_fasteoi_irq like the native code does for this kind of
  560. * interrupts.
  561. *
  562. * Depending on the Xen version, pirq_needs_eoi might return true
  563. * not only for level triggered interrupts but for edge triggered
  564. * interrupts too. In any case Xen always honors the eoi mechanism,
  565. * not injecting any more pirqs of the same kind if the first one
  566. * hasn't received an eoi yet. Therefore using the fasteoi handler
  567. * is the right choice either way.
  568. */
  569. if (shareable)
  570. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  571. handle_fasteoi_irq, name);
  572. else
  573. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  574. handle_edge_irq, name);
  575. out:
  576. mutex_unlock(&irq_mapping_update_lock);
  577. return irq;
  578. }
  579. #ifdef CONFIG_PCI_MSI
  580. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  581. {
  582. int rc;
  583. struct physdev_get_free_pirq op_get_free_pirq;
  584. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  585. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  586. WARN_ONCE(rc == -ENOSYS,
  587. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  588. return rc ? -1 : op_get_free_pirq.pirq;
  589. }
  590. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  591. int pirq, int vector, const char *name,
  592. domid_t domid)
  593. {
  594. int irq, ret;
  595. mutex_lock(&irq_mapping_update_lock);
  596. irq = xen_allocate_irq_dynamic();
  597. if (irq < 0)
  598. goto out;
  599. irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
  600. name);
  601. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
  602. ret = irq_set_msi_desc(irq, msidesc);
  603. if (ret < 0)
  604. goto error_irq;
  605. out:
  606. mutex_unlock(&irq_mapping_update_lock);
  607. return irq;
  608. error_irq:
  609. mutex_unlock(&irq_mapping_update_lock);
  610. xen_free_irq(irq);
  611. return ret;
  612. }
  613. #endif
  614. int xen_destroy_irq(int irq)
  615. {
  616. struct irq_desc *desc;
  617. struct physdev_unmap_pirq unmap_irq;
  618. struct irq_info *info = info_for_irq(irq);
  619. int rc = -ENOENT;
  620. mutex_lock(&irq_mapping_update_lock);
  621. desc = irq_to_desc(irq);
  622. if (!desc)
  623. goto out;
  624. if (xen_initial_domain()) {
  625. unmap_irq.pirq = info->u.pirq.pirq;
  626. unmap_irq.domid = info->u.pirq.domid;
  627. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  628. /* If another domain quits without making the pci_disable_msix
  629. * call, the Xen hypervisor takes care of freeing the PIRQs
  630. * (free_domain_pirqs).
  631. */
  632. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  633. printk(KERN_INFO "domain %d does not have %d anymore\n",
  634. info->u.pirq.domid, info->u.pirq.pirq);
  635. else if (rc) {
  636. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  637. goto out;
  638. }
  639. }
  640. xen_free_irq(irq);
  641. out:
  642. mutex_unlock(&irq_mapping_update_lock);
  643. return rc;
  644. }
  645. int xen_irq_from_pirq(unsigned pirq)
  646. {
  647. int irq;
  648. struct irq_info *info;
  649. mutex_lock(&irq_mapping_update_lock);
  650. list_for_each_entry(info, &xen_irq_list_head, list) {
  651. if (info->type != IRQT_PIRQ)
  652. continue;
  653. irq = info->irq;
  654. if (info->u.pirq.pirq == pirq)
  655. goto out;
  656. }
  657. irq = -1;
  658. out:
  659. mutex_unlock(&irq_mapping_update_lock);
  660. return irq;
  661. }
  662. int xen_pirq_from_irq(unsigned irq)
  663. {
  664. return pirq_from_irq(irq);
  665. }
  666. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  667. int bind_evtchn_to_irq(unsigned int evtchn)
  668. {
  669. int irq;
  670. mutex_lock(&irq_mapping_update_lock);
  671. irq = evtchn_to_irq[evtchn];
  672. if (irq == -1) {
  673. irq = xen_allocate_irq_dynamic();
  674. if (irq == -1)
  675. goto out;
  676. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  677. handle_edge_irq, "event");
  678. xen_irq_info_evtchn_init(irq, evtchn);
  679. } else {
  680. struct irq_info *info = info_for_irq(irq);
  681. WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
  682. }
  683. irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
  684. out:
  685. mutex_unlock(&irq_mapping_update_lock);
  686. return irq;
  687. }
  688. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  689. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  690. {
  691. struct evtchn_bind_ipi bind_ipi;
  692. int evtchn, irq;
  693. mutex_lock(&irq_mapping_update_lock);
  694. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  695. if (irq == -1) {
  696. irq = xen_allocate_irq_dynamic();
  697. if (irq < 0)
  698. goto out;
  699. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  700. handle_percpu_irq, "ipi");
  701. bind_ipi.vcpu = cpu;
  702. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  703. &bind_ipi) != 0)
  704. BUG();
  705. evtchn = bind_ipi.port;
  706. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  707. bind_evtchn_to_cpu(evtchn, cpu);
  708. } else {
  709. struct irq_info *info = info_for_irq(irq);
  710. WARN_ON(info == NULL || info->type != IRQT_IPI);
  711. }
  712. out:
  713. mutex_unlock(&irq_mapping_update_lock);
  714. return irq;
  715. }
  716. static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  717. unsigned int remote_port)
  718. {
  719. struct evtchn_bind_interdomain bind_interdomain;
  720. int err;
  721. bind_interdomain.remote_dom = remote_domain;
  722. bind_interdomain.remote_port = remote_port;
  723. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  724. &bind_interdomain);
  725. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  726. }
  727. static int find_virq(unsigned int virq, unsigned int cpu)
  728. {
  729. struct evtchn_status status;
  730. int port, rc = -ENOENT;
  731. memset(&status, 0, sizeof(status));
  732. for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
  733. status.dom = DOMID_SELF;
  734. status.port = port;
  735. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  736. if (rc < 0)
  737. continue;
  738. if (status.status != EVTCHNSTAT_virq)
  739. continue;
  740. if (status.u.virq == virq && status.vcpu == cpu) {
  741. rc = port;
  742. break;
  743. }
  744. }
  745. return rc;
  746. }
  747. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  748. {
  749. struct evtchn_bind_virq bind_virq;
  750. int evtchn, irq, ret;
  751. mutex_lock(&irq_mapping_update_lock);
  752. irq = per_cpu(virq_to_irq, cpu)[virq];
  753. if (irq == -1) {
  754. irq = xen_allocate_irq_dynamic();
  755. if (irq == -1)
  756. goto out;
  757. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  758. handle_percpu_irq, "virq");
  759. bind_virq.virq = virq;
  760. bind_virq.vcpu = cpu;
  761. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  762. &bind_virq);
  763. if (ret == 0)
  764. evtchn = bind_virq.port;
  765. else {
  766. if (ret == -EEXIST)
  767. ret = find_virq(virq, cpu);
  768. BUG_ON(ret < 0);
  769. evtchn = ret;
  770. }
  771. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  772. bind_evtchn_to_cpu(evtchn, cpu);
  773. } else {
  774. struct irq_info *info = info_for_irq(irq);
  775. WARN_ON(info == NULL || info->type != IRQT_VIRQ);
  776. }
  777. out:
  778. mutex_unlock(&irq_mapping_update_lock);
  779. return irq;
  780. }
  781. static void unbind_from_irq(unsigned int irq)
  782. {
  783. struct evtchn_close close;
  784. int evtchn = evtchn_from_irq(irq);
  785. struct irq_info *info = irq_get_handler_data(irq);
  786. mutex_lock(&irq_mapping_update_lock);
  787. if (info->refcnt > 0) {
  788. info->refcnt--;
  789. if (info->refcnt != 0)
  790. goto done;
  791. }
  792. if (VALID_EVTCHN(evtchn)) {
  793. close.port = evtchn;
  794. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  795. BUG();
  796. switch (type_from_irq(irq)) {
  797. case IRQT_VIRQ:
  798. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  799. [virq_from_irq(irq)] = -1;
  800. break;
  801. case IRQT_IPI:
  802. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  803. [ipi_from_irq(irq)] = -1;
  804. break;
  805. default:
  806. break;
  807. }
  808. /* Closed ports are implicitly re-bound to VCPU0. */
  809. bind_evtchn_to_cpu(evtchn, 0);
  810. evtchn_to_irq[evtchn] = -1;
  811. }
  812. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  813. xen_free_irq(irq);
  814. done:
  815. mutex_unlock(&irq_mapping_update_lock);
  816. }
  817. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  818. irq_handler_t handler,
  819. unsigned long irqflags,
  820. const char *devname, void *dev_id)
  821. {
  822. int irq, retval;
  823. irq = bind_evtchn_to_irq(evtchn);
  824. if (irq < 0)
  825. return irq;
  826. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  827. if (retval != 0) {
  828. unbind_from_irq(irq);
  829. return retval;
  830. }
  831. return irq;
  832. }
  833. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  834. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  835. unsigned int remote_port,
  836. irq_handler_t handler,
  837. unsigned long irqflags,
  838. const char *devname,
  839. void *dev_id)
  840. {
  841. int irq, retval;
  842. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  843. if (irq < 0)
  844. return irq;
  845. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  846. if (retval != 0) {
  847. unbind_from_irq(irq);
  848. return retval;
  849. }
  850. return irq;
  851. }
  852. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  853. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  854. irq_handler_t handler,
  855. unsigned long irqflags, const char *devname, void *dev_id)
  856. {
  857. int irq, retval;
  858. irq = bind_virq_to_irq(virq, cpu);
  859. if (irq < 0)
  860. return irq;
  861. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  862. if (retval != 0) {
  863. unbind_from_irq(irq);
  864. return retval;
  865. }
  866. return irq;
  867. }
  868. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  869. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  870. unsigned int cpu,
  871. irq_handler_t handler,
  872. unsigned long irqflags,
  873. const char *devname,
  874. void *dev_id)
  875. {
  876. int irq, retval;
  877. irq = bind_ipi_to_irq(ipi, cpu);
  878. if (irq < 0)
  879. return irq;
  880. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  881. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  882. if (retval != 0) {
  883. unbind_from_irq(irq);
  884. return retval;
  885. }
  886. return irq;
  887. }
  888. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  889. {
  890. free_irq(irq, dev_id);
  891. unbind_from_irq(irq);
  892. }
  893. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  894. int evtchn_make_refcounted(unsigned int evtchn)
  895. {
  896. int irq = evtchn_to_irq[evtchn];
  897. struct irq_info *info;
  898. if (irq == -1)
  899. return -ENOENT;
  900. info = irq_get_handler_data(irq);
  901. if (!info)
  902. return -ENOENT;
  903. WARN_ON(info->refcnt != -1);
  904. info->refcnt = 1;
  905. return 0;
  906. }
  907. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  908. int evtchn_get(unsigned int evtchn)
  909. {
  910. int irq;
  911. struct irq_info *info;
  912. int err = -ENOENT;
  913. if (evtchn >= NR_EVENT_CHANNELS)
  914. return -EINVAL;
  915. mutex_lock(&irq_mapping_update_lock);
  916. irq = evtchn_to_irq[evtchn];
  917. if (irq == -1)
  918. goto done;
  919. info = irq_get_handler_data(irq);
  920. if (!info)
  921. goto done;
  922. err = -EINVAL;
  923. if (info->refcnt <= 0)
  924. goto done;
  925. info->refcnt++;
  926. err = 0;
  927. done:
  928. mutex_unlock(&irq_mapping_update_lock);
  929. return err;
  930. }
  931. EXPORT_SYMBOL_GPL(evtchn_get);
  932. void evtchn_put(unsigned int evtchn)
  933. {
  934. int irq = evtchn_to_irq[evtchn];
  935. if (WARN_ON(irq == -1))
  936. return;
  937. unbind_from_irq(irq);
  938. }
  939. EXPORT_SYMBOL_GPL(evtchn_put);
  940. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  941. {
  942. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  943. BUG_ON(irq < 0);
  944. notify_remote_via_irq(irq);
  945. }
  946. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  947. {
  948. struct shared_info *sh = HYPERVISOR_shared_info;
  949. int cpu = smp_processor_id();
  950. unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  951. int i;
  952. unsigned long flags;
  953. static DEFINE_SPINLOCK(debug_lock);
  954. struct vcpu_info *v;
  955. spin_lock_irqsave(&debug_lock, flags);
  956. printk("\nvcpu %d\n ", cpu);
  957. for_each_online_cpu(i) {
  958. int pending;
  959. v = per_cpu(xen_vcpu, i);
  960. pending = (get_irq_regs() && i == cpu)
  961. ? xen_irqs_disabled(get_irq_regs())
  962. : v->evtchn_upcall_mask;
  963. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  964. pending, v->evtchn_upcall_pending,
  965. (int)(sizeof(v->evtchn_pending_sel)*2),
  966. v->evtchn_pending_sel);
  967. }
  968. v = per_cpu(xen_vcpu, cpu);
  969. printk("\npending:\n ");
  970. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  971. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  972. sh->evtchn_pending[i],
  973. i % 8 == 0 ? "\n " : " ");
  974. printk("\nglobal mask:\n ");
  975. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  976. printk("%0*lx%s",
  977. (int)(sizeof(sh->evtchn_mask[0])*2),
  978. sh->evtchn_mask[i],
  979. i % 8 == 0 ? "\n " : " ");
  980. printk("\nglobally unmasked:\n ");
  981. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  982. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  983. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  984. i % 8 == 0 ? "\n " : " ");
  985. printk("\nlocal cpu%d mask:\n ", cpu);
  986. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  987. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  988. cpu_evtchn[i],
  989. i % 8 == 0 ? "\n " : " ");
  990. printk("\nlocally unmasked:\n ");
  991. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  992. unsigned long pending = sh->evtchn_pending[i]
  993. & ~sh->evtchn_mask[i]
  994. & cpu_evtchn[i];
  995. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  996. pending, i % 8 == 0 ? "\n " : " ");
  997. }
  998. printk("\npending list:\n");
  999. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  1000. if (sync_test_bit(i, sh->evtchn_pending)) {
  1001. int word_idx = i / BITS_PER_LONG;
  1002. printk(" %d: event %d -> irq %d%s%s%s\n",
  1003. cpu_from_evtchn(i), i,
  1004. evtchn_to_irq[i],
  1005. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  1006. ? "" : " l2-clear",
  1007. !sync_test_bit(i, sh->evtchn_mask)
  1008. ? "" : " globally-masked",
  1009. sync_test_bit(i, cpu_evtchn)
  1010. ? "" : " locally-masked");
  1011. }
  1012. }
  1013. spin_unlock_irqrestore(&debug_lock, flags);
  1014. return IRQ_HANDLED;
  1015. }
  1016. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  1017. static DEFINE_PER_CPU(unsigned int, current_word_idx);
  1018. static DEFINE_PER_CPU(unsigned int, current_bit_idx);
  1019. /*
  1020. * Mask out the i least significant bits of w
  1021. */
  1022. #define MASK_LSBS(w, i) (w & ((~0UL) << i))
  1023. /*
  1024. * Search the CPUs pending events bitmasks. For each one found, map
  1025. * the event number to an irq, and feed it into do_IRQ() for
  1026. * handling.
  1027. *
  1028. * Xen uses a two-level bitmap to speed searching. The first level is
  1029. * a bitset of words which contain pending event bits. The second
  1030. * level is a bitset of pending events themselves.
  1031. */
  1032. static void __xen_evtchn_do_upcall(void)
  1033. {
  1034. int start_word_idx, start_bit_idx;
  1035. int word_idx, bit_idx;
  1036. int i;
  1037. int cpu = get_cpu();
  1038. struct shared_info *s = HYPERVISOR_shared_info;
  1039. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  1040. unsigned count;
  1041. do {
  1042. unsigned long pending_words;
  1043. vcpu_info->evtchn_upcall_pending = 0;
  1044. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  1045. goto out;
  1046. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  1047. /* Clear master flag /before/ clearing selector flag. */
  1048. wmb();
  1049. #endif
  1050. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  1051. start_word_idx = __this_cpu_read(current_word_idx);
  1052. start_bit_idx = __this_cpu_read(current_bit_idx);
  1053. word_idx = start_word_idx;
  1054. for (i = 0; pending_words != 0; i++) {
  1055. unsigned long pending_bits;
  1056. unsigned long words;
  1057. words = MASK_LSBS(pending_words, word_idx);
  1058. /*
  1059. * If we masked out all events, wrap to beginning.
  1060. */
  1061. if (words == 0) {
  1062. word_idx = 0;
  1063. bit_idx = 0;
  1064. continue;
  1065. }
  1066. word_idx = __ffs(words);
  1067. pending_bits = active_evtchns(cpu, s, word_idx);
  1068. bit_idx = 0; /* usually scan entire word from start */
  1069. if (word_idx == start_word_idx) {
  1070. /* We scan the starting word in two parts */
  1071. if (i == 0)
  1072. /* 1st time: start in the middle */
  1073. bit_idx = start_bit_idx;
  1074. else
  1075. /* 2nd time: mask bits done already */
  1076. bit_idx &= (1UL << start_bit_idx) - 1;
  1077. }
  1078. do {
  1079. unsigned long bits;
  1080. int port, irq;
  1081. struct irq_desc *desc;
  1082. bits = MASK_LSBS(pending_bits, bit_idx);
  1083. /* If we masked out all events, move on. */
  1084. if (bits == 0)
  1085. break;
  1086. bit_idx = __ffs(bits);
  1087. /* Process port. */
  1088. port = (word_idx * BITS_PER_LONG) + bit_idx;
  1089. irq = evtchn_to_irq[port];
  1090. if (irq != -1) {
  1091. desc = irq_to_desc(irq);
  1092. if (desc)
  1093. generic_handle_irq_desc(irq, desc);
  1094. }
  1095. bit_idx = (bit_idx + 1) % BITS_PER_LONG;
  1096. /* Next caller starts at last processed + 1 */
  1097. __this_cpu_write(current_word_idx,
  1098. bit_idx ? word_idx :
  1099. (word_idx+1) % BITS_PER_LONG);
  1100. __this_cpu_write(current_bit_idx, bit_idx);
  1101. } while (bit_idx != 0);
  1102. /* Scan start_l1i twice; all others once. */
  1103. if ((word_idx != start_word_idx) || (i != 0))
  1104. pending_words &= ~(1UL << word_idx);
  1105. word_idx = (word_idx + 1) % BITS_PER_LONG;
  1106. }
  1107. BUG_ON(!irqs_disabled());
  1108. count = __this_cpu_read(xed_nesting_count);
  1109. __this_cpu_write(xed_nesting_count, 0);
  1110. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  1111. out:
  1112. put_cpu();
  1113. }
  1114. void xen_evtchn_do_upcall(struct pt_regs *regs)
  1115. {
  1116. struct pt_regs *old_regs = set_irq_regs(regs);
  1117. #ifdef CONFIG_X86
  1118. exit_idle();
  1119. #endif
  1120. irq_enter();
  1121. __xen_evtchn_do_upcall();
  1122. irq_exit();
  1123. set_irq_regs(old_regs);
  1124. }
  1125. void xen_hvm_evtchn_do_upcall(void)
  1126. {
  1127. __xen_evtchn_do_upcall();
  1128. }
  1129. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1130. /* Rebind a new event channel to an existing irq. */
  1131. void rebind_evtchn_irq(int evtchn, int irq)
  1132. {
  1133. struct irq_info *info = info_for_irq(irq);
  1134. /* Make sure the irq is masked, since the new event channel
  1135. will also be masked. */
  1136. disable_irq(irq);
  1137. mutex_lock(&irq_mapping_update_lock);
  1138. /* After resume the irq<->evtchn mappings are all cleared out */
  1139. BUG_ON(evtchn_to_irq[evtchn] != -1);
  1140. /* Expect irq to have been bound before,
  1141. so there should be a proper type */
  1142. BUG_ON(info->type == IRQT_UNBOUND);
  1143. xen_irq_info_evtchn_init(irq, evtchn);
  1144. mutex_unlock(&irq_mapping_update_lock);
  1145. /* new event channels are always bound to cpu 0 */
  1146. irq_set_affinity(irq, cpumask_of(0));
  1147. /* Unmask the event channel. */
  1148. enable_irq(irq);
  1149. }
  1150. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1151. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1152. {
  1153. struct evtchn_bind_vcpu bind_vcpu;
  1154. int evtchn = evtchn_from_irq(irq);
  1155. if (!VALID_EVTCHN(evtchn))
  1156. return -1;
  1157. /*
  1158. * Events delivered via platform PCI interrupts are always
  1159. * routed to vcpu 0 and hence cannot be rebound.
  1160. */
  1161. if (xen_hvm_domain() && !xen_have_vector_callback)
  1162. return -1;
  1163. /* Send future instances of this interrupt to other vcpu. */
  1164. bind_vcpu.port = evtchn;
  1165. bind_vcpu.vcpu = tcpu;
  1166. /*
  1167. * If this fails, it usually just indicates that we're dealing with a
  1168. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1169. * it, but don't do the xenlinux-level rebind in that case.
  1170. */
  1171. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1172. bind_evtchn_to_cpu(evtchn, tcpu);
  1173. return 0;
  1174. }
  1175. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1176. bool force)
  1177. {
  1178. unsigned tcpu = cpumask_first(dest);
  1179. return rebind_irq_to_cpu(data->irq, tcpu);
  1180. }
  1181. int resend_irq_on_evtchn(unsigned int irq)
  1182. {
  1183. int masked, evtchn = evtchn_from_irq(irq);
  1184. struct shared_info *s = HYPERVISOR_shared_info;
  1185. if (!VALID_EVTCHN(evtchn))
  1186. return 1;
  1187. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  1188. sync_set_bit(evtchn, s->evtchn_pending);
  1189. if (!masked)
  1190. unmask_evtchn(evtchn);
  1191. return 1;
  1192. }
  1193. static void enable_dynirq(struct irq_data *data)
  1194. {
  1195. int evtchn = evtchn_from_irq(data->irq);
  1196. if (VALID_EVTCHN(evtchn))
  1197. unmask_evtchn(evtchn);
  1198. }
  1199. static void disable_dynirq(struct irq_data *data)
  1200. {
  1201. int evtchn = evtchn_from_irq(data->irq);
  1202. if (VALID_EVTCHN(evtchn))
  1203. mask_evtchn(evtchn);
  1204. }
  1205. static void ack_dynirq(struct irq_data *data)
  1206. {
  1207. int evtchn = evtchn_from_irq(data->irq);
  1208. irq_move_irq(data);
  1209. if (VALID_EVTCHN(evtchn))
  1210. clear_evtchn(evtchn);
  1211. }
  1212. static void mask_ack_dynirq(struct irq_data *data)
  1213. {
  1214. disable_dynirq(data);
  1215. ack_dynirq(data);
  1216. }
  1217. static int retrigger_dynirq(struct irq_data *data)
  1218. {
  1219. int evtchn = evtchn_from_irq(data->irq);
  1220. struct shared_info *sh = HYPERVISOR_shared_info;
  1221. int ret = 0;
  1222. if (VALID_EVTCHN(evtchn)) {
  1223. int masked;
  1224. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  1225. sync_set_bit(evtchn, sh->evtchn_pending);
  1226. if (!masked)
  1227. unmask_evtchn(evtchn);
  1228. ret = 1;
  1229. }
  1230. return ret;
  1231. }
  1232. static void restore_pirqs(void)
  1233. {
  1234. int pirq, rc, irq, gsi;
  1235. struct physdev_map_pirq map_irq;
  1236. struct irq_info *info;
  1237. list_for_each_entry(info, &xen_irq_list_head, list) {
  1238. if (info->type != IRQT_PIRQ)
  1239. continue;
  1240. pirq = info->u.pirq.pirq;
  1241. gsi = info->u.pirq.gsi;
  1242. irq = info->irq;
  1243. /* save/restore of PT devices doesn't work, so at this point the
  1244. * only devices present are GSI based emulated devices */
  1245. if (!gsi)
  1246. continue;
  1247. map_irq.domid = DOMID_SELF;
  1248. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1249. map_irq.index = gsi;
  1250. map_irq.pirq = pirq;
  1251. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1252. if (rc) {
  1253. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1254. gsi, irq, pirq, rc);
  1255. xen_free_irq(irq);
  1256. continue;
  1257. }
  1258. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1259. __startup_pirq(irq);
  1260. }
  1261. }
  1262. static void restore_cpu_virqs(unsigned int cpu)
  1263. {
  1264. struct evtchn_bind_virq bind_virq;
  1265. int virq, irq, evtchn;
  1266. for (virq = 0; virq < NR_VIRQS; virq++) {
  1267. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1268. continue;
  1269. BUG_ON(virq_from_irq(irq) != virq);
  1270. /* Get a new binding from Xen. */
  1271. bind_virq.virq = virq;
  1272. bind_virq.vcpu = cpu;
  1273. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1274. &bind_virq) != 0)
  1275. BUG();
  1276. evtchn = bind_virq.port;
  1277. /* Record the new mapping. */
  1278. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1279. bind_evtchn_to_cpu(evtchn, cpu);
  1280. }
  1281. }
  1282. static void restore_cpu_ipis(unsigned int cpu)
  1283. {
  1284. struct evtchn_bind_ipi bind_ipi;
  1285. int ipi, irq, evtchn;
  1286. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1287. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1288. continue;
  1289. BUG_ON(ipi_from_irq(irq) != ipi);
  1290. /* Get a new binding from Xen. */
  1291. bind_ipi.vcpu = cpu;
  1292. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1293. &bind_ipi) != 0)
  1294. BUG();
  1295. evtchn = bind_ipi.port;
  1296. /* Record the new mapping. */
  1297. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1298. bind_evtchn_to_cpu(evtchn, cpu);
  1299. }
  1300. }
  1301. /* Clear an irq's pending state, in preparation for polling on it */
  1302. void xen_clear_irq_pending(int irq)
  1303. {
  1304. int evtchn = evtchn_from_irq(irq);
  1305. if (VALID_EVTCHN(evtchn))
  1306. clear_evtchn(evtchn);
  1307. }
  1308. EXPORT_SYMBOL(xen_clear_irq_pending);
  1309. void xen_set_irq_pending(int irq)
  1310. {
  1311. int evtchn = evtchn_from_irq(irq);
  1312. if (VALID_EVTCHN(evtchn))
  1313. set_evtchn(evtchn);
  1314. }
  1315. bool xen_test_irq_pending(int irq)
  1316. {
  1317. int evtchn = evtchn_from_irq(irq);
  1318. bool ret = false;
  1319. if (VALID_EVTCHN(evtchn))
  1320. ret = test_evtchn(evtchn);
  1321. return ret;
  1322. }
  1323. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1324. * the irq will be disabled so it won't deliver an interrupt. */
  1325. void xen_poll_irq_timeout(int irq, u64 timeout)
  1326. {
  1327. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1328. if (VALID_EVTCHN(evtchn)) {
  1329. struct sched_poll poll;
  1330. poll.nr_ports = 1;
  1331. poll.timeout = timeout;
  1332. set_xen_guest_handle(poll.ports, &evtchn);
  1333. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1334. BUG();
  1335. }
  1336. }
  1337. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1338. /* Poll waiting for an irq to become pending. In the usual case, the
  1339. * irq will be disabled so it won't deliver an interrupt. */
  1340. void xen_poll_irq(int irq)
  1341. {
  1342. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1343. }
  1344. /* Check whether the IRQ line is shared with other guests. */
  1345. int xen_test_irq_shared(int irq)
  1346. {
  1347. struct irq_info *info = info_for_irq(irq);
  1348. struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
  1349. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1350. return 0;
  1351. return !(irq_status.flags & XENIRQSTAT_shared);
  1352. }
  1353. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1354. void xen_irq_resume(void)
  1355. {
  1356. unsigned int cpu, evtchn;
  1357. struct irq_info *info;
  1358. init_evtchn_cpu_bindings();
  1359. /* New event-channel space is not 'live' yet. */
  1360. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1361. mask_evtchn(evtchn);
  1362. /* No IRQ <-> event-channel mappings. */
  1363. list_for_each_entry(info, &xen_irq_list_head, list)
  1364. info->evtchn = 0; /* zap event-channel binding */
  1365. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1366. evtchn_to_irq[evtchn] = -1;
  1367. for_each_possible_cpu(cpu) {
  1368. restore_cpu_virqs(cpu);
  1369. restore_cpu_ipis(cpu);
  1370. }
  1371. restore_pirqs();
  1372. }
  1373. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1374. .name = "xen-dyn",
  1375. .irq_disable = disable_dynirq,
  1376. .irq_mask = disable_dynirq,
  1377. .irq_unmask = enable_dynirq,
  1378. .irq_ack = ack_dynirq,
  1379. .irq_mask_ack = mask_ack_dynirq,
  1380. .irq_set_affinity = set_affinity_irq,
  1381. .irq_retrigger = retrigger_dynirq,
  1382. };
  1383. static struct irq_chip xen_pirq_chip __read_mostly = {
  1384. .name = "xen-pirq",
  1385. .irq_startup = startup_pirq,
  1386. .irq_shutdown = shutdown_pirq,
  1387. .irq_enable = enable_pirq,
  1388. .irq_disable = disable_pirq,
  1389. .irq_mask = disable_dynirq,
  1390. .irq_unmask = enable_dynirq,
  1391. .irq_ack = eoi_pirq,
  1392. .irq_eoi = eoi_pirq,
  1393. .irq_mask_ack = mask_ack_pirq,
  1394. .irq_set_affinity = set_affinity_irq,
  1395. .irq_retrigger = retrigger_dynirq,
  1396. };
  1397. static struct irq_chip xen_percpu_chip __read_mostly = {
  1398. .name = "xen-percpu",
  1399. .irq_disable = disable_dynirq,
  1400. .irq_mask = disable_dynirq,
  1401. .irq_unmask = enable_dynirq,
  1402. .irq_ack = ack_dynirq,
  1403. };
  1404. int xen_set_callback_via(uint64_t via)
  1405. {
  1406. struct xen_hvm_param a;
  1407. a.domid = DOMID_SELF;
  1408. a.index = HVM_PARAM_CALLBACK_IRQ;
  1409. a.value = via;
  1410. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1411. }
  1412. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1413. #ifdef CONFIG_XEN_PVHVM
  1414. /* Vector callbacks are better than PCI interrupts to receive event
  1415. * channel notifications because we can receive vector callbacks on any
  1416. * vcpu and we don't need PCI support or APIC interactions. */
  1417. void xen_callback_vector(void)
  1418. {
  1419. int rc;
  1420. uint64_t callback_via;
  1421. if (xen_have_vector_callback) {
  1422. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1423. rc = xen_set_callback_via(callback_via);
  1424. if (rc) {
  1425. printk(KERN_ERR "Request for Xen HVM callback vector"
  1426. " failed.\n");
  1427. xen_have_vector_callback = 0;
  1428. return;
  1429. }
  1430. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1431. "enabled\n");
  1432. /* in the restore case the vector has already been allocated */
  1433. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1434. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1435. }
  1436. }
  1437. #else
  1438. void xen_callback_vector(void) {}
  1439. #endif
  1440. void __init xen_init_IRQ(void)
  1441. {
  1442. int i;
  1443. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1444. GFP_KERNEL);
  1445. BUG_ON(!evtchn_to_irq);
  1446. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1447. evtchn_to_irq[i] = -1;
  1448. init_evtchn_cpu_bindings();
  1449. /* No event channels are 'live' right now. */
  1450. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1451. mask_evtchn(i);
  1452. pirq_needs_eoi = pirq_needs_eoi_flag;
  1453. #ifdef CONFIG_X86
  1454. if (xen_hvm_domain()) {
  1455. xen_callback_vector();
  1456. native_init_IRQ();
  1457. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1458. * __acpi_register_gsi can point at the right function */
  1459. pci_xen_hvm_init();
  1460. } else {
  1461. int rc;
  1462. struct physdev_pirq_eoi_gmfn eoi_gmfn;
  1463. irq_ctx_init(smp_processor_id());
  1464. if (xen_initial_domain())
  1465. pci_xen_initial_domain();
  1466. pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
  1467. eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map);
  1468. rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
  1469. if (rc != 0) {
  1470. free_page((unsigned long) pirq_eoi_map);
  1471. pirq_eoi_map = NULL;
  1472. } else
  1473. pirq_needs_eoi = pirq_check_eoi_map;
  1474. }
  1475. #endif
  1476. }