intel_crt.c 19 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. */
  26. #include <linux/dmi.h>
  27. #include <linux/i2c.h>
  28. #include <linux/slab.h>
  29. #include "drmP.h"
  30. #include "drm.h"
  31. #include "drm_crtc.h"
  32. #include "drm_crtc_helper.h"
  33. #include "drm_edid.h"
  34. #include "intel_drv.h"
  35. #include "i915_drm.h"
  36. #include "i915_drv.h"
  37. /* Here's the desired hotplug mode */
  38. #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
  39. ADPA_CRT_HOTPLUG_WARMUP_10MS | \
  40. ADPA_CRT_HOTPLUG_SAMPLE_4S | \
  41. ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
  42. ADPA_CRT_HOTPLUG_VOLREF_325MV | \
  43. ADPA_CRT_HOTPLUG_ENABLE)
  44. struct intel_crt {
  45. struct intel_encoder base;
  46. bool force_hotplug_required;
  47. };
  48. static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  49. {
  50. return container_of(intel_attached_encoder(connector),
  51. struct intel_crt, base);
  52. }
  53. static void pch_crt_dpms(struct drm_encoder *encoder, int mode)
  54. {
  55. struct drm_device *dev = encoder->dev;
  56. struct drm_i915_private *dev_priv = dev->dev_private;
  57. u32 temp;
  58. temp = I915_READ(PCH_ADPA);
  59. temp &= ~ADPA_DAC_ENABLE;
  60. switch (mode) {
  61. case DRM_MODE_DPMS_ON:
  62. temp |= ADPA_DAC_ENABLE;
  63. break;
  64. case DRM_MODE_DPMS_STANDBY:
  65. case DRM_MODE_DPMS_SUSPEND:
  66. case DRM_MODE_DPMS_OFF:
  67. /* Just leave port enable cleared */
  68. break;
  69. }
  70. I915_WRITE(PCH_ADPA, temp);
  71. }
  72. static void gmch_crt_dpms(struct drm_encoder *encoder, int mode)
  73. {
  74. struct drm_device *dev = encoder->dev;
  75. struct drm_i915_private *dev_priv = dev->dev_private;
  76. u32 temp;
  77. temp = I915_READ(ADPA);
  78. temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  79. temp &= ~ADPA_DAC_ENABLE;
  80. if (IS_VALLEYVIEW(dev) && mode != DRM_MODE_DPMS_ON)
  81. mode = DRM_MODE_DPMS_OFF;
  82. switch (mode) {
  83. case DRM_MODE_DPMS_ON:
  84. temp |= ADPA_DAC_ENABLE;
  85. break;
  86. case DRM_MODE_DPMS_STANDBY:
  87. temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  88. break;
  89. case DRM_MODE_DPMS_SUSPEND:
  90. temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  91. break;
  92. case DRM_MODE_DPMS_OFF:
  93. temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  94. break;
  95. }
  96. I915_WRITE(ADPA, temp);
  97. }
  98. static int intel_crt_mode_valid(struct drm_connector *connector,
  99. struct drm_display_mode *mode)
  100. {
  101. struct drm_device *dev = connector->dev;
  102. int max_clock = 0;
  103. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  104. return MODE_NO_DBLESCAN;
  105. if (mode->clock < 25000)
  106. return MODE_CLOCK_LOW;
  107. if (IS_GEN2(dev))
  108. max_clock = 350000;
  109. else
  110. max_clock = 400000;
  111. if (mode->clock > max_clock)
  112. return MODE_CLOCK_HIGH;
  113. return MODE_OK;
  114. }
  115. static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
  116. const struct drm_display_mode *mode,
  117. struct drm_display_mode *adjusted_mode)
  118. {
  119. return true;
  120. }
  121. static void intel_crt_mode_set(struct drm_encoder *encoder,
  122. struct drm_display_mode *mode,
  123. struct drm_display_mode *adjusted_mode)
  124. {
  125. struct drm_device *dev = encoder->dev;
  126. struct drm_crtc *crtc = encoder->crtc;
  127. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  128. struct drm_i915_private *dev_priv = dev->dev_private;
  129. int dpll_md_reg;
  130. u32 adpa, dpll_md;
  131. u32 adpa_reg;
  132. dpll_md_reg = DPLL_MD(intel_crtc->pipe);
  133. if (HAS_PCH_SPLIT(dev))
  134. adpa_reg = PCH_ADPA;
  135. else
  136. adpa_reg = ADPA;
  137. /*
  138. * Disable separate mode multiplier used when cloning SDVO to CRT
  139. * XXX this needs to be adjusted when we really are cloning
  140. */
  141. if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
  142. dpll_md = I915_READ(dpll_md_reg);
  143. I915_WRITE(dpll_md_reg,
  144. dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
  145. }
  146. adpa = ADPA_HOTPLUG_BITS;
  147. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  148. adpa |= ADPA_HSYNC_ACTIVE_HIGH;
  149. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  150. adpa |= ADPA_VSYNC_ACTIVE_HIGH;
  151. /* For CPT allow 3 pipe config, for others just use A or B */
  152. if (HAS_PCH_CPT(dev))
  153. adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
  154. else if (intel_crtc->pipe == 0)
  155. adpa |= ADPA_PIPE_A_SELECT;
  156. else
  157. adpa |= ADPA_PIPE_B_SELECT;
  158. if (!HAS_PCH_SPLIT(dev))
  159. I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
  160. I915_WRITE(adpa_reg, adpa);
  161. }
  162. static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
  163. {
  164. struct drm_device *dev = connector->dev;
  165. struct intel_crt *crt = intel_attached_crt(connector);
  166. struct drm_i915_private *dev_priv = dev->dev_private;
  167. u32 adpa;
  168. bool ret;
  169. /* The first time through, trigger an explicit detection cycle */
  170. if (crt->force_hotplug_required) {
  171. bool turn_off_dac = HAS_PCH_SPLIT(dev);
  172. u32 save_adpa;
  173. crt->force_hotplug_required = 0;
  174. save_adpa = adpa = I915_READ(PCH_ADPA);
  175. DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
  176. adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
  177. if (turn_off_dac)
  178. adpa &= ~ADPA_DAC_ENABLE;
  179. I915_WRITE(PCH_ADPA, adpa);
  180. if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
  181. 1000))
  182. DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
  183. if (turn_off_dac) {
  184. I915_WRITE(PCH_ADPA, save_adpa);
  185. POSTING_READ(PCH_ADPA);
  186. }
  187. }
  188. /* Check the status to see if both blue and green are on now */
  189. adpa = I915_READ(PCH_ADPA);
  190. if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
  191. ret = true;
  192. else
  193. ret = false;
  194. DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
  195. return ret;
  196. }
  197. static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
  198. {
  199. struct drm_device *dev = connector->dev;
  200. struct drm_i915_private *dev_priv = dev->dev_private;
  201. u32 adpa;
  202. bool ret;
  203. u32 save_adpa;
  204. save_adpa = adpa = I915_READ(ADPA);
  205. DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
  206. adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
  207. I915_WRITE(ADPA, adpa);
  208. if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
  209. 1000)) {
  210. DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
  211. I915_WRITE(ADPA, save_adpa);
  212. }
  213. /* Check the status to see if both blue and green are on now */
  214. adpa = I915_READ(ADPA);
  215. if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
  216. ret = true;
  217. else
  218. ret = false;
  219. DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
  220. /* FIXME: debug force function and remove */
  221. ret = true;
  222. return ret;
  223. }
  224. /**
  225. * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  226. *
  227. * Not for i915G/i915GM
  228. *
  229. * \return true if CRT is connected.
  230. * \return false if CRT is disconnected.
  231. */
  232. static bool intel_crt_detect_hotplug(struct drm_connector *connector)
  233. {
  234. struct drm_device *dev = connector->dev;
  235. struct drm_i915_private *dev_priv = dev->dev_private;
  236. u32 hotplug_en, orig, stat;
  237. bool ret = false;
  238. int i, tries = 0;
  239. if (HAS_PCH_SPLIT(dev))
  240. return intel_ironlake_crt_detect_hotplug(connector);
  241. if (IS_VALLEYVIEW(dev))
  242. return valleyview_crt_detect_hotplug(connector);
  243. /*
  244. * On 4 series desktop, CRT detect sequence need to be done twice
  245. * to get a reliable result.
  246. */
  247. if (IS_G4X(dev) && !IS_GM45(dev))
  248. tries = 2;
  249. else
  250. tries = 1;
  251. hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
  252. hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
  253. for (i = 0; i < tries ; i++) {
  254. /* turn on the FORCE_DETECT */
  255. I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
  256. /* wait for FORCE_DETECT to go off */
  257. if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
  258. CRT_HOTPLUG_FORCE_DETECT) == 0,
  259. 1000))
  260. DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
  261. }
  262. stat = I915_READ(PORT_HOTPLUG_STAT);
  263. if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
  264. ret = true;
  265. /* clear the interrupt we just generated, if any */
  266. I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
  267. /* and put the bits back */
  268. I915_WRITE(PORT_HOTPLUG_EN, orig);
  269. return ret;
  270. }
  271. static struct edid *intel_crt_get_edid(struct drm_connector *connector,
  272. struct i2c_adapter *i2c)
  273. {
  274. struct edid *edid;
  275. edid = drm_get_edid(connector, i2c);
  276. if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
  277. DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
  278. intel_gmbus_force_bit(i2c, true);
  279. edid = drm_get_edid(connector, i2c);
  280. intel_gmbus_force_bit(i2c, false);
  281. }
  282. return edid;
  283. }
  284. /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
  285. static int intel_crt_ddc_get_modes(struct drm_connector *connector,
  286. struct i2c_adapter *adapter)
  287. {
  288. struct edid *edid;
  289. edid = intel_crt_get_edid(connector, adapter);
  290. if (!edid)
  291. return 0;
  292. return intel_connector_update_modes(connector, edid);
  293. }
  294. static bool intel_crt_detect_ddc(struct drm_connector *connector)
  295. {
  296. struct intel_crt *crt = intel_attached_crt(connector);
  297. struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
  298. struct edid *edid;
  299. struct i2c_adapter *i2c;
  300. BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
  301. i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
  302. edid = intel_crt_get_edid(connector, i2c);
  303. if (edid) {
  304. bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
  305. /*
  306. * This may be a DVI-I connector with a shared DDC
  307. * link between analog and digital outputs, so we
  308. * have to check the EDID input spec of the attached device.
  309. */
  310. if (!is_digital) {
  311. DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
  312. return true;
  313. }
  314. DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
  315. } else {
  316. DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
  317. }
  318. kfree(edid);
  319. return false;
  320. }
  321. static enum drm_connector_status
  322. intel_crt_load_detect(struct intel_crt *crt)
  323. {
  324. struct drm_device *dev = crt->base.base.dev;
  325. struct drm_i915_private *dev_priv = dev->dev_private;
  326. uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
  327. uint32_t save_bclrpat;
  328. uint32_t save_vtotal;
  329. uint32_t vtotal, vactive;
  330. uint32_t vsample;
  331. uint32_t vblank, vblank_start, vblank_end;
  332. uint32_t dsl;
  333. uint32_t bclrpat_reg;
  334. uint32_t vtotal_reg;
  335. uint32_t vblank_reg;
  336. uint32_t vsync_reg;
  337. uint32_t pipeconf_reg;
  338. uint32_t pipe_dsl_reg;
  339. uint8_t st00;
  340. enum drm_connector_status status;
  341. DRM_DEBUG_KMS("starting load-detect on CRT\n");
  342. bclrpat_reg = BCLRPAT(pipe);
  343. vtotal_reg = VTOTAL(pipe);
  344. vblank_reg = VBLANK(pipe);
  345. vsync_reg = VSYNC(pipe);
  346. pipeconf_reg = PIPECONF(pipe);
  347. pipe_dsl_reg = PIPEDSL(pipe);
  348. save_bclrpat = I915_READ(bclrpat_reg);
  349. save_vtotal = I915_READ(vtotal_reg);
  350. vblank = I915_READ(vblank_reg);
  351. vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
  352. vactive = (save_vtotal & 0x7ff) + 1;
  353. vblank_start = (vblank & 0xfff) + 1;
  354. vblank_end = ((vblank >> 16) & 0xfff) + 1;
  355. /* Set the border color to purple. */
  356. I915_WRITE(bclrpat_reg, 0x500050);
  357. if (!IS_GEN2(dev)) {
  358. uint32_t pipeconf = I915_READ(pipeconf_reg);
  359. I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
  360. POSTING_READ(pipeconf_reg);
  361. /* Wait for next Vblank to substitue
  362. * border color for Color info */
  363. intel_wait_for_vblank(dev, pipe);
  364. st00 = I915_READ8(VGA_MSR_WRITE);
  365. status = ((st00 & (1 << 4)) != 0) ?
  366. connector_status_connected :
  367. connector_status_disconnected;
  368. I915_WRITE(pipeconf_reg, pipeconf);
  369. } else {
  370. bool restore_vblank = false;
  371. int count, detect;
  372. /*
  373. * If there isn't any border, add some.
  374. * Yes, this will flicker
  375. */
  376. if (vblank_start <= vactive && vblank_end >= vtotal) {
  377. uint32_t vsync = I915_READ(vsync_reg);
  378. uint32_t vsync_start = (vsync & 0xffff) + 1;
  379. vblank_start = vsync_start;
  380. I915_WRITE(vblank_reg,
  381. (vblank_start - 1) |
  382. ((vblank_end - 1) << 16));
  383. restore_vblank = true;
  384. }
  385. /* sample in the vertical border, selecting the larger one */
  386. if (vblank_start - vactive >= vtotal - vblank_end)
  387. vsample = (vblank_start + vactive) >> 1;
  388. else
  389. vsample = (vtotal + vblank_end) >> 1;
  390. /*
  391. * Wait for the border to be displayed
  392. */
  393. while (I915_READ(pipe_dsl_reg) >= vactive)
  394. ;
  395. while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
  396. ;
  397. /*
  398. * Watch ST00 for an entire scanline
  399. */
  400. detect = 0;
  401. count = 0;
  402. do {
  403. count++;
  404. /* Read the ST00 VGA status register */
  405. st00 = I915_READ8(VGA_MSR_WRITE);
  406. if (st00 & (1 << 4))
  407. detect++;
  408. } while ((I915_READ(pipe_dsl_reg) == dsl));
  409. /* restore vblank if necessary */
  410. if (restore_vblank)
  411. I915_WRITE(vblank_reg, vblank);
  412. /*
  413. * If more than 3/4 of the scanline detected a monitor,
  414. * then it is assumed to be present. This works even on i830,
  415. * where there isn't any way to force the border color across
  416. * the screen
  417. */
  418. status = detect * 4 > count * 3 ?
  419. connector_status_connected :
  420. connector_status_disconnected;
  421. }
  422. /* Restore previous settings */
  423. I915_WRITE(bclrpat_reg, save_bclrpat);
  424. return status;
  425. }
  426. static enum drm_connector_status
  427. intel_crt_detect(struct drm_connector *connector, bool force)
  428. {
  429. struct drm_device *dev = connector->dev;
  430. struct intel_crt *crt = intel_attached_crt(connector);
  431. enum drm_connector_status status;
  432. struct intel_load_detect_pipe tmp;
  433. if (I915_HAS_HOTPLUG(dev)) {
  434. /* We can not rely on the HPD pin always being correctly wired
  435. * up, for example many KVM do not pass it through, and so
  436. * only trust an assertion that the monitor is connected.
  437. */
  438. if (intel_crt_detect_hotplug(connector)) {
  439. DRM_DEBUG_KMS("CRT detected via hotplug\n");
  440. return connector_status_connected;
  441. } else
  442. DRM_DEBUG_KMS("CRT not detected via hotplug\n");
  443. }
  444. if (intel_crt_detect_ddc(connector))
  445. return connector_status_connected;
  446. /* Load detection is broken on HPD capable machines. Whoever wants a
  447. * broken monitor (without edid) to work behind a broken kvm (that fails
  448. * to have the right resistors for HP detection) needs to fix this up.
  449. * For now just bail out. */
  450. if (I915_HAS_HOTPLUG(dev))
  451. return connector_status_disconnected;
  452. if (!force)
  453. return connector->status;
  454. /* for pre-945g platforms use load detect */
  455. if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
  456. &tmp)) {
  457. if (intel_crt_detect_ddc(connector))
  458. status = connector_status_connected;
  459. else
  460. status = intel_crt_load_detect(crt);
  461. intel_release_load_detect_pipe(&crt->base, connector,
  462. &tmp);
  463. } else
  464. status = connector_status_unknown;
  465. return status;
  466. }
  467. static void intel_crt_destroy(struct drm_connector *connector)
  468. {
  469. drm_sysfs_connector_remove(connector);
  470. drm_connector_cleanup(connector);
  471. kfree(connector);
  472. }
  473. static int intel_crt_get_modes(struct drm_connector *connector)
  474. {
  475. struct drm_device *dev = connector->dev;
  476. struct drm_i915_private *dev_priv = dev->dev_private;
  477. int ret;
  478. struct i2c_adapter *i2c;
  479. i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
  480. ret = intel_crt_ddc_get_modes(connector, i2c);
  481. if (ret || !IS_G4X(dev))
  482. return ret;
  483. /* Try to probe digital port for output in DVI-I -> VGA mode. */
  484. i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
  485. return intel_crt_ddc_get_modes(connector, i2c);
  486. }
  487. static int intel_crt_set_property(struct drm_connector *connector,
  488. struct drm_property *property,
  489. uint64_t value)
  490. {
  491. return 0;
  492. }
  493. static void intel_crt_reset(struct drm_connector *connector)
  494. {
  495. struct drm_device *dev = connector->dev;
  496. struct intel_crt *crt = intel_attached_crt(connector);
  497. if (HAS_PCH_SPLIT(dev))
  498. crt->force_hotplug_required = 1;
  499. }
  500. /*
  501. * Routines for controlling stuff on the analog port
  502. */
  503. static const struct drm_encoder_helper_funcs pch_encoder_funcs = {
  504. .mode_fixup = intel_crt_mode_fixup,
  505. .prepare = intel_encoder_prepare,
  506. .commit = intel_encoder_commit,
  507. .mode_set = intel_crt_mode_set,
  508. .dpms = pch_crt_dpms,
  509. };
  510. static const struct drm_encoder_helper_funcs gmch_encoder_funcs = {
  511. .mode_fixup = intel_crt_mode_fixup,
  512. .prepare = intel_encoder_prepare,
  513. .commit = intel_encoder_commit,
  514. .mode_set = intel_crt_mode_set,
  515. .dpms = gmch_crt_dpms,
  516. };
  517. static const struct drm_connector_funcs intel_crt_connector_funcs = {
  518. .reset = intel_crt_reset,
  519. .dpms = drm_helper_connector_dpms,
  520. .detect = intel_crt_detect,
  521. .fill_modes = drm_helper_probe_single_connector_modes,
  522. .destroy = intel_crt_destroy,
  523. .set_property = intel_crt_set_property,
  524. };
  525. static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
  526. .mode_valid = intel_crt_mode_valid,
  527. .get_modes = intel_crt_get_modes,
  528. .best_encoder = intel_best_encoder,
  529. };
  530. static const struct drm_encoder_funcs intel_crt_enc_funcs = {
  531. .destroy = intel_encoder_destroy,
  532. };
  533. static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
  534. {
  535. DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
  536. return 1;
  537. }
  538. static const struct dmi_system_id intel_no_crt[] = {
  539. {
  540. .callback = intel_no_crt_dmi_callback,
  541. .ident = "ACER ZGB",
  542. .matches = {
  543. DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
  544. DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
  545. },
  546. },
  547. { }
  548. };
  549. void intel_crt_init(struct drm_device *dev)
  550. {
  551. struct drm_connector *connector;
  552. struct intel_crt *crt;
  553. struct intel_connector *intel_connector;
  554. struct drm_i915_private *dev_priv = dev->dev_private;
  555. const struct drm_encoder_helper_funcs *encoder_helper_funcs;
  556. /* Skip machines without VGA that falsely report hotplug events */
  557. if (dmi_check_system(intel_no_crt))
  558. return;
  559. crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
  560. if (!crt)
  561. return;
  562. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  563. if (!intel_connector) {
  564. kfree(crt);
  565. return;
  566. }
  567. connector = &intel_connector->base;
  568. drm_connector_init(dev, &intel_connector->base,
  569. &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  570. drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
  571. DRM_MODE_ENCODER_DAC);
  572. intel_connector_attach_encoder(intel_connector, &crt->base);
  573. crt->base.type = INTEL_OUTPUT_ANALOG;
  574. crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
  575. 1 << INTEL_ANALOG_CLONE_BIT |
  576. 1 << INTEL_SDVO_LVDS_CLONE_BIT);
  577. if (IS_HASWELL(dev))
  578. crt->base.crtc_mask = (1 << 0);
  579. else
  580. crt->base.crtc_mask = (1 << 0) | (1 << 1);
  581. if (IS_GEN2(dev))
  582. connector->interlace_allowed = 0;
  583. else
  584. connector->interlace_allowed = 1;
  585. connector->doublescan_allowed = 0;
  586. if (HAS_PCH_SPLIT(dev))
  587. encoder_helper_funcs = &pch_encoder_funcs;
  588. else
  589. encoder_helper_funcs = &gmch_encoder_funcs;
  590. drm_encoder_helper_add(&crt->base.base, encoder_helper_funcs);
  591. drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
  592. drm_sysfs_connector_add(connector);
  593. if (I915_HAS_HOTPLUG(dev))
  594. connector->polled = DRM_CONNECTOR_POLL_HPD;
  595. else
  596. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  597. /*
  598. * Configure the automatic hotplug detection stuff
  599. */
  600. crt->force_hotplug_required = 0;
  601. if (HAS_PCH_SPLIT(dev)) {
  602. u32 adpa;
  603. adpa = I915_READ(PCH_ADPA);
  604. adpa &= ~ADPA_CRT_HOTPLUG_MASK;
  605. adpa |= ADPA_HOTPLUG_BITS;
  606. I915_WRITE(PCH_ADPA, adpa);
  607. POSTING_READ(PCH_ADPA);
  608. DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
  609. crt->force_hotplug_required = 1;
  610. }
  611. dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
  612. }