aic94xx_init.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862
  1. /*
  2. * Aic94xx SAS/SATA driver initialization.
  3. *
  4. * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
  5. * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
  6. *
  7. * This file is licensed under GPLv2.
  8. *
  9. * This file is part of the aic94xx driver.
  10. *
  11. * The aic94xx driver is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; version 2 of the
  14. * License.
  15. *
  16. * The aic94xx driver is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with the aic94xx driver; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  24. *
  25. */
  26. #include <linux/config.h>
  27. #include <linux/module.h>
  28. #include <linux/init.h>
  29. #include <linux/kernel.h>
  30. #include <linux/pci.h>
  31. #include <linux/delay.h>
  32. #include <scsi/scsi_host.h>
  33. #include "aic94xx.h"
  34. #include "aic94xx_reg.h"
  35. #include "aic94xx_hwi.h"
  36. #include "aic94xx_seq.h"
  37. /* The format is "version.release.patchlevel" */
  38. #define ASD_DRIVER_VERSION "1.0.2"
  39. static int use_msi = 0;
  40. module_param_named(use_msi, use_msi, int, S_IRUGO);
  41. MODULE_PARM_DESC(use_msi, "\n"
  42. "\tEnable(1) or disable(0) using PCI MSI.\n"
  43. "\tDefault: 0");
  44. static int lldd_max_execute_num = 0;
  45. module_param_named(collector, lldd_max_execute_num, int, S_IRUGO);
  46. MODULE_PARM_DESC(collector, "\n"
  47. "\tIf greater than one, tells the SAS Layer to run in Task Collector\n"
  48. "\tMode. If 1 or 0, tells the SAS Layer to run in Direct Mode.\n"
  49. "\tThe aic94xx SAS LLDD supports both modes.\n"
  50. "\tDefault: 0 (Direct Mode).\n");
  51. char sas_addr_str[2*SAS_ADDR_SIZE + 1] = "";
  52. static struct scsi_transport_template *aic94xx_transport_template;
  53. static struct scsi_host_template aic94xx_sht = {
  54. .module = THIS_MODULE,
  55. /* .name is initialized */
  56. .name = "aic94xx",
  57. .queuecommand = sas_queuecommand,
  58. .target_alloc = sas_target_alloc,
  59. .slave_configure = sas_slave_configure,
  60. .slave_destroy = sas_slave_destroy,
  61. .change_queue_depth = sas_change_queue_depth,
  62. .change_queue_type = sas_change_queue_type,
  63. .bios_param = sas_bios_param,
  64. .can_queue = 1,
  65. .cmd_per_lun = 1,
  66. .this_id = -1,
  67. .sg_tablesize = SG_ALL,
  68. .max_sectors = SCSI_DEFAULT_MAX_SECTORS,
  69. .use_clustering = ENABLE_CLUSTERING,
  70. };
  71. static int __devinit asd_map_memio(struct asd_ha_struct *asd_ha)
  72. {
  73. int err, i;
  74. struct asd_ha_addrspace *io_handle;
  75. asd_ha->iospace = 0;
  76. for (i = 0; i < 3; i += 2) {
  77. io_handle = &asd_ha->io_handle[i==0?0:1];
  78. io_handle->start = pci_resource_start(asd_ha->pcidev, i);
  79. io_handle->len = pci_resource_len(asd_ha->pcidev, i);
  80. io_handle->flags = pci_resource_flags(asd_ha->pcidev, i);
  81. err = -ENODEV;
  82. if (!io_handle->start || !io_handle->len) {
  83. asd_printk("MBAR%d start or length for %s is 0.\n",
  84. i==0?0:1, pci_name(asd_ha->pcidev));
  85. goto Err;
  86. }
  87. err = pci_request_region(asd_ha->pcidev, i, ASD_DRIVER_NAME);
  88. if (err) {
  89. asd_printk("couldn't reserve memory region for %s\n",
  90. pci_name(asd_ha->pcidev));
  91. goto Err;
  92. }
  93. if (io_handle->flags & IORESOURCE_CACHEABLE)
  94. io_handle->addr = ioremap(io_handle->start,
  95. io_handle->len);
  96. else
  97. io_handle->addr = ioremap_nocache(io_handle->start,
  98. io_handle->len);
  99. if (!io_handle->addr) {
  100. asd_printk("couldn't map MBAR%d of %s\n", i==0?0:1,
  101. pci_name(asd_ha->pcidev));
  102. goto Err_unreq;
  103. }
  104. }
  105. return 0;
  106. Err_unreq:
  107. pci_release_region(asd_ha->pcidev, i);
  108. Err:
  109. if (i > 0) {
  110. io_handle = &asd_ha->io_handle[0];
  111. iounmap(io_handle->addr);
  112. pci_release_region(asd_ha->pcidev, 0);
  113. }
  114. return err;
  115. }
  116. static void __devexit asd_unmap_memio(struct asd_ha_struct *asd_ha)
  117. {
  118. struct asd_ha_addrspace *io_handle;
  119. io_handle = &asd_ha->io_handle[1];
  120. iounmap(io_handle->addr);
  121. pci_release_region(asd_ha->pcidev, 2);
  122. io_handle = &asd_ha->io_handle[0];
  123. iounmap(io_handle->addr);
  124. pci_release_region(asd_ha->pcidev, 0);
  125. }
  126. static int __devinit asd_map_ioport(struct asd_ha_struct *asd_ha)
  127. {
  128. int i = PCI_IOBAR_OFFSET, err;
  129. struct asd_ha_addrspace *io_handle = &asd_ha->io_handle[0];
  130. asd_ha->iospace = 1;
  131. io_handle->start = pci_resource_start(asd_ha->pcidev, i);
  132. io_handle->len = pci_resource_len(asd_ha->pcidev, i);
  133. io_handle->flags = pci_resource_flags(asd_ha->pcidev, i);
  134. io_handle->addr = (void __iomem *) io_handle->start;
  135. if (!io_handle->start || !io_handle->len) {
  136. asd_printk("couldn't get IO ports for %s\n",
  137. pci_name(asd_ha->pcidev));
  138. return -ENODEV;
  139. }
  140. err = pci_request_region(asd_ha->pcidev, i, ASD_DRIVER_NAME);
  141. if (err) {
  142. asd_printk("couldn't reserve io space for %s\n",
  143. pci_name(asd_ha->pcidev));
  144. }
  145. return err;
  146. }
  147. static void __devexit asd_unmap_ioport(struct asd_ha_struct *asd_ha)
  148. {
  149. pci_release_region(asd_ha->pcidev, PCI_IOBAR_OFFSET);
  150. }
  151. static int __devinit asd_map_ha(struct asd_ha_struct *asd_ha)
  152. {
  153. int err;
  154. u16 cmd_reg;
  155. err = pci_read_config_word(asd_ha->pcidev, PCI_COMMAND, &cmd_reg);
  156. if (err) {
  157. asd_printk("couldn't read command register of %s\n",
  158. pci_name(asd_ha->pcidev));
  159. goto Err;
  160. }
  161. err = -ENODEV;
  162. if (cmd_reg & PCI_COMMAND_MEMORY) {
  163. if ((err = asd_map_memio(asd_ha)))
  164. goto Err;
  165. } else if (cmd_reg & PCI_COMMAND_IO) {
  166. if ((err = asd_map_ioport(asd_ha)))
  167. goto Err;
  168. asd_printk("%s ioport mapped -- upgrade your hardware\n",
  169. pci_name(asd_ha->pcidev));
  170. } else {
  171. asd_printk("no proper device access to %s\n",
  172. pci_name(asd_ha->pcidev));
  173. goto Err;
  174. }
  175. return 0;
  176. Err:
  177. return err;
  178. }
  179. static void __devexit asd_unmap_ha(struct asd_ha_struct *asd_ha)
  180. {
  181. if (asd_ha->iospace)
  182. asd_unmap_ioport(asd_ha);
  183. else
  184. asd_unmap_memio(asd_ha);
  185. }
  186. static const char *asd_dev_rev[30] = {
  187. [0] = "A0",
  188. [1] = "A1",
  189. [8] = "B0",
  190. };
  191. static int __devinit asd_common_setup(struct asd_ha_struct *asd_ha)
  192. {
  193. int err, i;
  194. err = pci_read_config_byte(asd_ha->pcidev, PCI_REVISION_ID,
  195. &asd_ha->revision_id);
  196. if (err) {
  197. asd_printk("couldn't read REVISION ID register of %s\n",
  198. pci_name(asd_ha->pcidev));
  199. goto Err;
  200. }
  201. err = -ENODEV;
  202. if (asd_ha->revision_id < AIC9410_DEV_REV_B0) {
  203. asd_printk("%s is revision %s (%X), which is not supported\n",
  204. pci_name(asd_ha->pcidev),
  205. asd_dev_rev[asd_ha->revision_id],
  206. asd_ha->revision_id);
  207. goto Err;
  208. }
  209. /* Provide some sane default values. */
  210. asd_ha->hw_prof.max_scbs = 512;
  211. asd_ha->hw_prof.max_ddbs = 128;
  212. asd_ha->hw_prof.num_phys = ASD_MAX_PHYS;
  213. /* All phys are enabled, by default. */
  214. asd_ha->hw_prof.enabled_phys = 0xFF;
  215. for (i = 0; i < ASD_MAX_PHYS; i++) {
  216. asd_ha->hw_prof.phy_desc[i].max_sas_lrate = PHY_LINKRATE_3;
  217. asd_ha->hw_prof.phy_desc[i].min_sas_lrate = PHY_LINKRATE_1_5;
  218. asd_ha->hw_prof.phy_desc[i].max_sata_lrate= PHY_LINKRATE_1_5;
  219. asd_ha->hw_prof.phy_desc[i].min_sata_lrate= PHY_LINKRATE_1_5;
  220. }
  221. return 0;
  222. Err:
  223. return err;
  224. }
  225. static int __devinit asd_aic9410_setup(struct asd_ha_struct *asd_ha)
  226. {
  227. int err = asd_common_setup(asd_ha);
  228. if (err)
  229. return err;
  230. asd_ha->hw_prof.addr_range = 8;
  231. asd_ha->hw_prof.port_name_base = 0;
  232. asd_ha->hw_prof.dev_name_base = 8;
  233. asd_ha->hw_prof.sata_name_base = 16;
  234. return 0;
  235. }
  236. static int __devinit asd_aic9405_setup(struct asd_ha_struct *asd_ha)
  237. {
  238. int err = asd_common_setup(asd_ha);
  239. if (err)
  240. return err;
  241. asd_ha->hw_prof.addr_range = 4;
  242. asd_ha->hw_prof.port_name_base = 0;
  243. asd_ha->hw_prof.dev_name_base = 4;
  244. asd_ha->hw_prof.sata_name_base = 8;
  245. return 0;
  246. }
  247. static ssize_t asd_show_dev_rev(struct device *dev,
  248. struct device_attribute *attr, char *buf)
  249. {
  250. struct asd_ha_struct *asd_ha = dev_to_asd_ha(dev);
  251. return snprintf(buf, PAGE_SIZE, "%s\n",
  252. asd_dev_rev[asd_ha->revision_id]);
  253. }
  254. static DEVICE_ATTR(revision, S_IRUGO, asd_show_dev_rev, NULL);
  255. static ssize_t asd_show_dev_bios_build(struct device *dev,
  256. struct device_attribute *attr,char *buf)
  257. {
  258. struct asd_ha_struct *asd_ha = dev_to_asd_ha(dev);
  259. return snprintf(buf, PAGE_SIZE, "%d\n", asd_ha->hw_prof.bios.bld);
  260. }
  261. static DEVICE_ATTR(bios_build, S_IRUGO, asd_show_dev_bios_build, NULL);
  262. static ssize_t asd_show_dev_pcba_sn(struct device *dev,
  263. struct device_attribute *attr, char *buf)
  264. {
  265. struct asd_ha_struct *asd_ha = dev_to_asd_ha(dev);
  266. return snprintf(buf, PAGE_SIZE, "%s\n", asd_ha->hw_prof.pcba_sn);
  267. }
  268. static DEVICE_ATTR(pcba_sn, S_IRUGO, asd_show_dev_pcba_sn, NULL);
  269. static void asd_create_dev_attrs(struct asd_ha_struct *asd_ha)
  270. {
  271. device_create_file(&asd_ha->pcidev->dev, &dev_attr_revision);
  272. device_create_file(&asd_ha->pcidev->dev, &dev_attr_bios_build);
  273. device_create_file(&asd_ha->pcidev->dev, &dev_attr_pcba_sn);
  274. }
  275. static void asd_remove_dev_attrs(struct asd_ha_struct *asd_ha)
  276. {
  277. device_remove_file(&asd_ha->pcidev->dev, &dev_attr_revision);
  278. device_remove_file(&asd_ha->pcidev->dev, &dev_attr_bios_build);
  279. device_remove_file(&asd_ha->pcidev->dev, &dev_attr_pcba_sn);
  280. }
  281. /* The first entry, 0, is used for dynamic ids, the rest for devices
  282. * we know about.
  283. */
  284. static struct asd_pcidev_struct {
  285. const char * name;
  286. int (*setup)(struct asd_ha_struct *asd_ha);
  287. } asd_pcidev_data[] = {
  288. /* Id 0 is used for dynamic ids. */
  289. { .name = "Adaptec AIC-94xx SAS/SATA Host Adapter",
  290. .setup = asd_aic9410_setup
  291. },
  292. { .name = "Adaptec AIC-9410W SAS/SATA Host Adapter",
  293. .setup = asd_aic9410_setup
  294. },
  295. { .name = "Adaptec AIC-9405W SAS/SATA Host Adapter",
  296. .setup = asd_aic9405_setup
  297. },
  298. };
  299. static inline int asd_create_ha_caches(struct asd_ha_struct *asd_ha)
  300. {
  301. asd_ha->scb_pool = dma_pool_create(ASD_DRIVER_NAME "_scb_pool",
  302. &asd_ha->pcidev->dev,
  303. sizeof(struct scb),
  304. 8, 0);
  305. if (!asd_ha->scb_pool) {
  306. asd_printk("couldn't create scb pool\n");
  307. return -ENOMEM;
  308. }
  309. return 0;
  310. }
  311. /**
  312. * asd_free_edbs -- free empty data buffers
  313. * asd_ha: pointer to host adapter structure
  314. */
  315. static inline void asd_free_edbs(struct asd_ha_struct *asd_ha)
  316. {
  317. struct asd_seq_data *seq = &asd_ha->seq;
  318. int i;
  319. for (i = 0; i < seq->num_edbs; i++)
  320. asd_free_coherent(asd_ha, seq->edb_arr[i]);
  321. kfree(seq->edb_arr);
  322. seq->edb_arr = NULL;
  323. }
  324. static inline void asd_free_escbs(struct asd_ha_struct *asd_ha)
  325. {
  326. struct asd_seq_data *seq = &asd_ha->seq;
  327. int i;
  328. for (i = 0; i < seq->num_escbs; i++) {
  329. if (!list_empty(&seq->escb_arr[i]->list))
  330. list_del_init(&seq->escb_arr[i]->list);
  331. asd_ascb_free(seq->escb_arr[i]);
  332. }
  333. kfree(seq->escb_arr);
  334. seq->escb_arr = NULL;
  335. }
  336. static inline void asd_destroy_ha_caches(struct asd_ha_struct *asd_ha)
  337. {
  338. int i;
  339. if (asd_ha->hw_prof.ddb_ext)
  340. asd_free_coherent(asd_ha, asd_ha->hw_prof.ddb_ext);
  341. if (asd_ha->hw_prof.scb_ext)
  342. asd_free_coherent(asd_ha, asd_ha->hw_prof.scb_ext);
  343. if (asd_ha->hw_prof.ddb_bitmap)
  344. kfree(asd_ha->hw_prof.ddb_bitmap);
  345. asd_ha->hw_prof.ddb_bitmap = NULL;
  346. for (i = 0; i < ASD_MAX_PHYS; i++) {
  347. struct asd_phy *phy = &asd_ha->phys[i];
  348. asd_free_coherent(asd_ha, phy->id_frm_tok);
  349. }
  350. if (asd_ha->seq.escb_arr)
  351. asd_free_escbs(asd_ha);
  352. if (asd_ha->seq.edb_arr)
  353. asd_free_edbs(asd_ha);
  354. if (asd_ha->hw_prof.ue.area) {
  355. kfree(asd_ha->hw_prof.ue.area);
  356. asd_ha->hw_prof.ue.area = NULL;
  357. }
  358. if (asd_ha->seq.tc_index_array) {
  359. kfree(asd_ha->seq.tc_index_array);
  360. kfree(asd_ha->seq.tc_index_bitmap);
  361. asd_ha->seq.tc_index_array = NULL;
  362. asd_ha->seq.tc_index_bitmap = NULL;
  363. }
  364. if (asd_ha->seq.actual_dl) {
  365. asd_free_coherent(asd_ha, asd_ha->seq.actual_dl);
  366. asd_ha->seq.actual_dl = NULL;
  367. asd_ha->seq.dl = NULL;
  368. }
  369. if (asd_ha->seq.next_scb.vaddr) {
  370. dma_pool_free(asd_ha->scb_pool, asd_ha->seq.next_scb.vaddr,
  371. asd_ha->seq.next_scb.dma_handle);
  372. asd_ha->seq.next_scb.vaddr = NULL;
  373. }
  374. dma_pool_destroy(asd_ha->scb_pool);
  375. asd_ha->scb_pool = NULL;
  376. }
  377. kmem_cache_t *asd_dma_token_cache;
  378. kmem_cache_t *asd_ascb_cache;
  379. static int asd_create_global_caches(void)
  380. {
  381. if (!asd_dma_token_cache) {
  382. asd_dma_token_cache
  383. = kmem_cache_create(ASD_DRIVER_NAME "_dma_token",
  384. sizeof(struct asd_dma_tok),
  385. 0,
  386. SLAB_HWCACHE_ALIGN,
  387. NULL, NULL);
  388. if (!asd_dma_token_cache) {
  389. asd_printk("couldn't create dma token cache\n");
  390. return -ENOMEM;
  391. }
  392. }
  393. if (!asd_ascb_cache) {
  394. asd_ascb_cache = kmem_cache_create(ASD_DRIVER_NAME "_ascb",
  395. sizeof(struct asd_ascb),
  396. 0,
  397. SLAB_HWCACHE_ALIGN,
  398. NULL, NULL);
  399. if (!asd_ascb_cache) {
  400. asd_printk("couldn't create ascb cache\n");
  401. goto Err;
  402. }
  403. }
  404. return 0;
  405. Err:
  406. kmem_cache_destroy(asd_dma_token_cache);
  407. asd_dma_token_cache = NULL;
  408. return -ENOMEM;
  409. }
  410. static void asd_destroy_global_caches(void)
  411. {
  412. if (asd_dma_token_cache)
  413. kmem_cache_destroy(asd_dma_token_cache);
  414. asd_dma_token_cache = NULL;
  415. if (asd_ascb_cache)
  416. kmem_cache_destroy(asd_ascb_cache);
  417. asd_ascb_cache = NULL;
  418. }
  419. static int asd_register_sas_ha(struct asd_ha_struct *asd_ha)
  420. {
  421. int i;
  422. struct asd_sas_phy **sas_phys =
  423. kmalloc(ASD_MAX_PHYS * sizeof(struct asd_sas_phy), GFP_KERNEL);
  424. struct asd_sas_port **sas_ports =
  425. kmalloc(ASD_MAX_PHYS * sizeof(struct asd_sas_port), GFP_KERNEL);
  426. if (!sas_phys || !sas_ports) {
  427. kfree(sas_phys);
  428. kfree(sas_ports);
  429. return -ENOMEM;
  430. }
  431. asd_ha->sas_ha.sas_ha_name = (char *) asd_ha->name;
  432. asd_ha->sas_ha.lldd_module = THIS_MODULE;
  433. asd_ha->sas_ha.sas_addr = &asd_ha->hw_prof.sas_addr[0];
  434. for (i = 0; i < ASD_MAX_PHYS; i++) {
  435. sas_phys[i] = &asd_ha->phys[i].sas_phy;
  436. sas_ports[i] = &asd_ha->ports[i];
  437. }
  438. asd_ha->sas_ha.sas_phy = sas_phys;
  439. asd_ha->sas_ha.sas_port= sas_ports;
  440. asd_ha->sas_ha.num_phys= ASD_MAX_PHYS;
  441. asd_ha->sas_ha.lldd_queue_size = asd_ha->seq.can_queue;
  442. return sas_register_ha(&asd_ha->sas_ha);
  443. }
  444. static int asd_unregister_sas_ha(struct asd_ha_struct *asd_ha)
  445. {
  446. int err;
  447. err = sas_unregister_ha(&asd_ha->sas_ha);
  448. sas_remove_host(asd_ha->sas_ha.core.shost);
  449. scsi_remove_host(asd_ha->sas_ha.core.shost);
  450. scsi_host_put(asd_ha->sas_ha.core.shost);
  451. kfree(asd_ha->sas_ha.sas_phy);
  452. kfree(asd_ha->sas_ha.sas_port);
  453. return err;
  454. }
  455. static int __devinit asd_pci_probe(struct pci_dev *dev,
  456. const struct pci_device_id *id)
  457. {
  458. struct asd_pcidev_struct *asd_dev;
  459. unsigned asd_id = (unsigned) id->driver_data;
  460. struct asd_ha_struct *asd_ha;
  461. struct Scsi_Host *shost;
  462. int err;
  463. if (asd_id >= ARRAY_SIZE(asd_pcidev_data)) {
  464. asd_printk("wrong driver_data in PCI table\n");
  465. return -ENODEV;
  466. }
  467. if ((err = pci_enable_device(dev))) {
  468. asd_printk("couldn't enable device %s\n", pci_name(dev));
  469. return err;
  470. }
  471. pci_set_master(dev);
  472. err = -ENOMEM;
  473. shost = scsi_host_alloc(&aic94xx_sht, sizeof(void *));
  474. if (!shost)
  475. goto Err;
  476. asd_dev = &asd_pcidev_data[asd_id];
  477. asd_ha = kzalloc(sizeof(*asd_ha), GFP_KERNEL);
  478. if (!asd_ha) {
  479. asd_printk("out of memory\n");
  480. goto Err;
  481. }
  482. asd_ha->pcidev = dev;
  483. asd_ha->sas_ha.pcidev = asd_ha->pcidev;
  484. asd_ha->sas_ha.lldd_ha = asd_ha;
  485. asd_ha->name = asd_dev->name;
  486. asd_printk("found %s, device %s\n", asd_ha->name, pci_name(dev));
  487. SHOST_TO_SAS_HA(shost) = &asd_ha->sas_ha;
  488. asd_ha->sas_ha.core.shost = shost;
  489. shost->transportt = aic94xx_transport_template;
  490. shost->max_id = ~0;
  491. shost->max_lun = ~0;
  492. shost->max_cmd_len = 16;
  493. err = scsi_add_host(shost, &dev->dev);
  494. if (err) {
  495. scsi_host_put(shost);
  496. goto Err_free;
  497. }
  498. err = asd_dev->setup(asd_ha);
  499. if (err)
  500. goto Err_free;
  501. err = -ENODEV;
  502. if (!pci_set_dma_mask(dev, DMA_64BIT_MASK)
  503. && !pci_set_consistent_dma_mask(dev, DMA_64BIT_MASK))
  504. ;
  505. else if (!pci_set_dma_mask(dev, DMA_32BIT_MASK)
  506. && !pci_set_consistent_dma_mask(dev, DMA_32BIT_MASK))
  507. ;
  508. else {
  509. asd_printk("no suitable DMA mask for %s\n", pci_name(dev));
  510. goto Err_free;
  511. }
  512. pci_set_drvdata(dev, asd_ha);
  513. err = asd_map_ha(asd_ha);
  514. if (err)
  515. goto Err_free;
  516. err = asd_create_ha_caches(asd_ha);
  517. if (err)
  518. goto Err_unmap;
  519. err = asd_init_hw(asd_ha);
  520. if (err)
  521. goto Err_free_cache;
  522. asd_printk("device %s: SAS addr %llx, PCBA SN %s, %d phys, %d enabled "
  523. "phys, flash %s, BIOS %s%d\n",
  524. pci_name(dev), SAS_ADDR(asd_ha->hw_prof.sas_addr),
  525. asd_ha->hw_prof.pcba_sn, asd_ha->hw_prof.max_phys,
  526. asd_ha->hw_prof.num_phys,
  527. asd_ha->hw_prof.flash.present ? "present" : "not present",
  528. asd_ha->hw_prof.bios.present ? "build " : "not present",
  529. asd_ha->hw_prof.bios.bld);
  530. shost->can_queue = asd_ha->seq.can_queue;
  531. if (use_msi)
  532. pci_enable_msi(asd_ha->pcidev);
  533. err = request_irq(asd_ha->pcidev->irq, asd_hw_isr, SA_SHIRQ,
  534. ASD_DRIVER_NAME, asd_ha);
  535. if (err) {
  536. asd_printk("couldn't get irq %d for %s\n",
  537. asd_ha->pcidev->irq, pci_name(asd_ha->pcidev));
  538. goto Err_irq;
  539. }
  540. asd_enable_ints(asd_ha);
  541. err = asd_init_post_escbs(asd_ha);
  542. if (err) {
  543. asd_printk("couldn't post escbs for %s\n",
  544. pci_name(asd_ha->pcidev));
  545. goto Err_escbs;
  546. }
  547. ASD_DPRINTK("escbs posted\n");
  548. asd_create_dev_attrs(asd_ha);
  549. err = asd_register_sas_ha(asd_ha);
  550. if (err)
  551. goto Err_reg_sas;
  552. err = asd_enable_phys(asd_ha, asd_ha->hw_prof.enabled_phys);
  553. if (err) {
  554. asd_printk("coudln't enable phys, err:%d\n", err);
  555. goto Err_en_phys;
  556. }
  557. ASD_DPRINTK("enabled phys\n");
  558. /* give the phy enabling interrupt event time to come in (1s
  559. * is empirically about all it takes) */
  560. ssleep(1);
  561. /* Wait for discovery to finish */
  562. scsi_flush_work(asd_ha->sas_ha.core.shost);
  563. return 0;
  564. Err_en_phys:
  565. asd_unregister_sas_ha(asd_ha);
  566. Err_reg_sas:
  567. asd_remove_dev_attrs(asd_ha);
  568. Err_escbs:
  569. asd_disable_ints(asd_ha);
  570. free_irq(dev->irq, asd_ha);
  571. Err_irq:
  572. if (use_msi)
  573. pci_disable_msi(dev);
  574. asd_chip_hardrst(asd_ha);
  575. Err_free_cache:
  576. asd_destroy_ha_caches(asd_ha);
  577. Err_unmap:
  578. asd_unmap_ha(asd_ha);
  579. Err_free:
  580. kfree(asd_ha);
  581. scsi_remove_host(shost);
  582. Err:
  583. pci_disable_device(dev);
  584. return err;
  585. }
  586. static void asd_free_queues(struct asd_ha_struct *asd_ha)
  587. {
  588. unsigned long flags;
  589. LIST_HEAD(pending);
  590. struct list_head *n, *pos;
  591. spin_lock_irqsave(&asd_ha->seq.pend_q_lock, flags);
  592. asd_ha->seq.pending = 0;
  593. list_splice_init(&asd_ha->seq.pend_q, &pending);
  594. spin_unlock_irqrestore(&asd_ha->seq.pend_q_lock, flags);
  595. if (!list_empty(&pending))
  596. ASD_DPRINTK("Uh-oh! Pending is not empty!\n");
  597. list_for_each_safe(pos, n, &pending) {
  598. struct asd_ascb *ascb = list_entry(pos, struct asd_ascb, list);
  599. list_del_init(pos);
  600. ASD_DPRINTK("freeing from pending\n");
  601. asd_ascb_free(ascb);
  602. }
  603. }
  604. static void asd_turn_off_leds(struct asd_ha_struct *asd_ha)
  605. {
  606. u8 phy_mask = asd_ha->hw_prof.enabled_phys;
  607. u8 i;
  608. for_each_phy(phy_mask, phy_mask, i) {
  609. asd_turn_led(asd_ha, i, 0);
  610. asd_control_led(asd_ha, i, 0);
  611. }
  612. }
  613. static void __devexit asd_pci_remove(struct pci_dev *dev)
  614. {
  615. struct asd_ha_struct *asd_ha = pci_get_drvdata(dev);
  616. if (!asd_ha)
  617. return;
  618. asd_unregister_sas_ha(asd_ha);
  619. asd_disable_ints(asd_ha);
  620. asd_remove_dev_attrs(asd_ha);
  621. /* XXX more here as needed */
  622. free_irq(dev->irq, asd_ha);
  623. if (use_msi)
  624. pci_disable_msi(asd_ha->pcidev);
  625. asd_turn_off_leds(asd_ha);
  626. asd_chip_hardrst(asd_ha);
  627. asd_free_queues(asd_ha);
  628. asd_destroy_ha_caches(asd_ha);
  629. asd_unmap_ha(asd_ha);
  630. kfree(asd_ha);
  631. pci_disable_device(dev);
  632. return;
  633. }
  634. static ssize_t asd_version_show(struct device_driver *driver, char *buf)
  635. {
  636. return snprintf(buf, PAGE_SIZE, "%s\n", ASD_DRIVER_VERSION);
  637. }
  638. static DRIVER_ATTR(version, S_IRUGO, asd_version_show, NULL);
  639. static void asd_create_driver_attrs(struct device_driver *driver)
  640. {
  641. driver_create_file(driver, &driver_attr_version);
  642. }
  643. static void asd_remove_driver_attrs(struct device_driver *driver)
  644. {
  645. driver_remove_file(driver, &driver_attr_version);
  646. }
  647. static struct sas_domain_function_template aic94xx_transport_functions = {
  648. .lldd_port_formed = asd_update_port_links,
  649. .lldd_dev_found = asd_dev_found,
  650. .lldd_dev_gone = asd_dev_gone,
  651. .lldd_execute_task = asd_execute_task,
  652. .lldd_abort_task = asd_abort_task,
  653. .lldd_abort_task_set = asd_abort_task_set,
  654. .lldd_clear_aca = asd_clear_aca,
  655. .lldd_clear_task_set = asd_clear_task_set,
  656. .lldd_I_T_nexus_reset = NULL,
  657. .lldd_lu_reset = asd_lu_reset,
  658. .lldd_query_task = asd_query_task,
  659. .lldd_clear_nexus_port = asd_clear_nexus_port,
  660. .lldd_clear_nexus_ha = asd_clear_nexus_ha,
  661. .lldd_control_phy = asd_control_phy,
  662. };
  663. static const struct pci_device_id aic94xx_pci_table[] __devinitdata = {
  664. {PCI_DEVICE(PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_RAZOR10),
  665. 0, 0, 1},
  666. {PCI_DEVICE(PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_RAZOR12),
  667. 0, 0, 1},
  668. {PCI_DEVICE(PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_RAZOR1E),
  669. 0, 0, 1},
  670. {PCI_DEVICE(PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_RAZOR30),
  671. 0, 0, 2},
  672. {PCI_DEVICE(PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_RAZOR32),
  673. 0, 0, 2},
  674. {PCI_DEVICE(PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_RAZOR3E),
  675. 0, 0, 2},
  676. {PCI_DEVICE(PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_RAZOR3F),
  677. 0, 0, 2},
  678. {}
  679. };
  680. MODULE_DEVICE_TABLE(pci, aic94xx_pci_table);
  681. static struct pci_driver aic94xx_pci_driver = {
  682. .name = ASD_DRIVER_NAME,
  683. .id_table = aic94xx_pci_table,
  684. .probe = asd_pci_probe,
  685. .remove = __devexit_p(asd_pci_remove),
  686. };
  687. static int __init aic94xx_init(void)
  688. {
  689. int err;
  690. asd_printk("%s version %s loaded\n", ASD_DRIVER_DESCRIPTION,
  691. ASD_DRIVER_VERSION);
  692. err = asd_create_global_caches();
  693. if (err)
  694. return err;
  695. aic94xx_transport_template =
  696. sas_domain_attach_transport(&aic94xx_transport_functions);
  697. if (err)
  698. goto out_destroy_caches;
  699. err = pci_register_driver(&aic94xx_pci_driver);
  700. if (err)
  701. goto out_release_transport;
  702. asd_create_driver_attrs(&aic94xx_pci_driver.driver);
  703. return err;
  704. out_release_transport:
  705. sas_release_transport(aic94xx_transport_template);
  706. out_destroy_caches:
  707. asd_destroy_global_caches();
  708. return err;
  709. }
  710. static void __exit aic94xx_exit(void)
  711. {
  712. asd_remove_driver_attrs(&aic94xx_pci_driver.driver);
  713. pci_unregister_driver(&aic94xx_pci_driver);
  714. sas_release_transport(aic94xx_transport_template);
  715. asd_destroy_global_caches();
  716. asd_printk("%s version %s unloaded\n", ASD_DRIVER_DESCRIPTION,
  717. ASD_DRIVER_VERSION);
  718. }
  719. module_init(aic94xx_init);
  720. module_exit(aic94xx_exit);
  721. MODULE_AUTHOR("Luben Tuikov <luben_tuikov@adaptec.com>");
  722. MODULE_DESCRIPTION(ASD_DRIVER_DESCRIPTION);
  723. MODULE_LICENSE("GPL v2");
  724. MODULE_VERSION(ASD_DRIVER_VERSION);