i2s.c 25 KB

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  1. /* sound/soc/samsung/i2s.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6. * Jaswinder Singh <jassi.brar@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/slab.h>
  14. #include <linux/clk.h>
  15. #include <linux/io.h>
  16. #include <sound/soc.h>
  17. #include <sound/pcm_params.h>
  18. #include <plat/audio.h>
  19. #include "dma.h"
  20. #include "i2s.h"
  21. #include "i2s-regs.h"
  22. #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  23. struct i2s_dai {
  24. /* Platform device for this DAI */
  25. struct platform_device *pdev;
  26. /* IOREMAP'd SFRs */
  27. void __iomem *addr;
  28. /* Physical base address of SFRs */
  29. u32 base;
  30. /* Rate of RCLK source clock */
  31. unsigned long rclk_srcrate;
  32. /* Frame Clock */
  33. unsigned frmclk;
  34. /*
  35. * Specifically requested RCLK,BCLK by MACHINE Driver.
  36. * 0 indicates CPU driver is free to choose any value.
  37. */
  38. unsigned rfs, bfs;
  39. /* I2S Controller's core clock */
  40. struct clk *clk;
  41. /* Clock for generating I2S signals */
  42. struct clk *op_clk;
  43. /* Array of clock names for op_clk */
  44. const char **src_clk;
  45. /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  46. struct i2s_dai *pri_dai;
  47. /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  48. struct i2s_dai *sec_dai;
  49. #define DAI_OPENED (1 << 0) /* Dai is opened */
  50. #define DAI_MANAGER (1 << 1) /* Dai is the manager */
  51. unsigned mode;
  52. /* Driver for this DAI */
  53. struct snd_soc_dai_driver i2s_dai_drv;
  54. /* DMA parameters */
  55. struct s3c_dma_params dma_playback;
  56. struct s3c_dma_params dma_capture;
  57. u32 quirks;
  58. u32 suspend_i2smod;
  59. u32 suspend_i2scon;
  60. u32 suspend_i2spsr;
  61. };
  62. /* Lock for cross i/f checks */
  63. static DEFINE_SPINLOCK(lock);
  64. /* If this is the 'overlay' stereo DAI */
  65. static inline bool is_secondary(struct i2s_dai *i2s)
  66. {
  67. return i2s->pri_dai ? true : false;
  68. }
  69. /* If operating in SoC-Slave mode */
  70. static inline bool is_slave(struct i2s_dai *i2s)
  71. {
  72. return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
  73. }
  74. /* If this interface of the controller is transmitting data */
  75. static inline bool tx_active(struct i2s_dai *i2s)
  76. {
  77. u32 active;
  78. if (!i2s)
  79. return false;
  80. active = readl(i2s->addr + I2SCON);
  81. if (is_secondary(i2s))
  82. active &= CON_TXSDMA_ACTIVE;
  83. else
  84. active &= CON_TXDMA_ACTIVE;
  85. return active ? true : false;
  86. }
  87. /* If the other interface of the controller is transmitting data */
  88. static inline bool other_tx_active(struct i2s_dai *i2s)
  89. {
  90. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  91. return tx_active(other);
  92. }
  93. /* If any interface of the controller is transmitting data */
  94. static inline bool any_tx_active(struct i2s_dai *i2s)
  95. {
  96. return tx_active(i2s) || other_tx_active(i2s);
  97. }
  98. /* If this interface of the controller is receiving data */
  99. static inline bool rx_active(struct i2s_dai *i2s)
  100. {
  101. u32 active;
  102. if (!i2s)
  103. return false;
  104. active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
  105. return active ? true : false;
  106. }
  107. /* If the other interface of the controller is receiving data */
  108. static inline bool other_rx_active(struct i2s_dai *i2s)
  109. {
  110. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  111. return rx_active(other);
  112. }
  113. /* If any interface of the controller is receiving data */
  114. static inline bool any_rx_active(struct i2s_dai *i2s)
  115. {
  116. return rx_active(i2s) || other_rx_active(i2s);
  117. }
  118. /* If the other DAI is transmitting or receiving data */
  119. static inline bool other_active(struct i2s_dai *i2s)
  120. {
  121. return other_rx_active(i2s) || other_tx_active(i2s);
  122. }
  123. /* If this DAI is transmitting or receiving data */
  124. static inline bool this_active(struct i2s_dai *i2s)
  125. {
  126. return tx_active(i2s) || rx_active(i2s);
  127. }
  128. /* If the controller is active anyway */
  129. static inline bool any_active(struct i2s_dai *i2s)
  130. {
  131. return this_active(i2s) || other_active(i2s);
  132. }
  133. static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
  134. {
  135. return snd_soc_dai_get_drvdata(dai);
  136. }
  137. static inline bool is_opened(struct i2s_dai *i2s)
  138. {
  139. if (i2s && (i2s->mode & DAI_OPENED))
  140. return true;
  141. else
  142. return false;
  143. }
  144. static inline bool is_manager(struct i2s_dai *i2s)
  145. {
  146. if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
  147. return true;
  148. else
  149. return false;
  150. }
  151. /* Read RCLK of I2S (in multiples of LRCLK) */
  152. static inline unsigned get_rfs(struct i2s_dai *i2s)
  153. {
  154. u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3;
  155. switch (rfs) {
  156. case 3: return 768;
  157. case 2: return 384;
  158. case 1: return 512;
  159. default: return 256;
  160. }
  161. }
  162. /* Write RCLK of I2S (in multiples of LRCLK) */
  163. static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
  164. {
  165. u32 mod = readl(i2s->addr + I2SMOD);
  166. mod &= ~MOD_RCLK_MASK;
  167. switch (rfs) {
  168. case 768:
  169. mod |= MOD_RCLK_768FS;
  170. break;
  171. case 512:
  172. mod |= MOD_RCLK_512FS;
  173. break;
  174. case 384:
  175. mod |= MOD_RCLK_384FS;
  176. break;
  177. default:
  178. mod |= MOD_RCLK_256FS;
  179. break;
  180. }
  181. writel(mod, i2s->addr + I2SMOD);
  182. }
  183. /* Read Bit-Clock of I2S (in multiples of LRCLK) */
  184. static inline unsigned get_bfs(struct i2s_dai *i2s)
  185. {
  186. u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3;
  187. switch (bfs) {
  188. case 3: return 24;
  189. case 2: return 16;
  190. case 1: return 48;
  191. default: return 32;
  192. }
  193. }
  194. /* Write Bit-Clock of I2S (in multiples of LRCLK) */
  195. static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
  196. {
  197. u32 mod = readl(i2s->addr + I2SMOD);
  198. mod &= ~MOD_BCLK_MASK;
  199. switch (bfs) {
  200. case 48:
  201. mod |= MOD_BCLK_48FS;
  202. break;
  203. case 32:
  204. mod |= MOD_BCLK_32FS;
  205. break;
  206. case 24:
  207. mod |= MOD_BCLK_24FS;
  208. break;
  209. case 16:
  210. mod |= MOD_BCLK_16FS;
  211. break;
  212. default:
  213. dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
  214. return;
  215. }
  216. writel(mod, i2s->addr + I2SMOD);
  217. }
  218. /* Sample-Size */
  219. static inline int get_blc(struct i2s_dai *i2s)
  220. {
  221. int blc = readl(i2s->addr + I2SMOD);
  222. blc = (blc >> 13) & 0x3;
  223. switch (blc) {
  224. case 2: return 24;
  225. case 1: return 8;
  226. default: return 16;
  227. }
  228. }
  229. /* TX Channel Control */
  230. static void i2s_txctrl(struct i2s_dai *i2s, int on)
  231. {
  232. void __iomem *addr = i2s->addr;
  233. u32 con = readl(addr + I2SCON);
  234. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  235. if (on) {
  236. con |= CON_ACTIVE;
  237. con &= ~CON_TXCH_PAUSE;
  238. if (is_secondary(i2s)) {
  239. con |= CON_TXSDMA_ACTIVE;
  240. con &= ~CON_TXSDMA_PAUSE;
  241. } else {
  242. con |= CON_TXDMA_ACTIVE;
  243. con &= ~CON_TXDMA_PAUSE;
  244. }
  245. if (any_rx_active(i2s))
  246. mod |= MOD_TXRX;
  247. else
  248. mod |= MOD_TXONLY;
  249. } else {
  250. if (is_secondary(i2s)) {
  251. con |= CON_TXSDMA_PAUSE;
  252. con &= ~CON_TXSDMA_ACTIVE;
  253. } else {
  254. con |= CON_TXDMA_PAUSE;
  255. con &= ~CON_TXDMA_ACTIVE;
  256. }
  257. if (other_tx_active(i2s)) {
  258. writel(con, addr + I2SCON);
  259. return;
  260. }
  261. con |= CON_TXCH_PAUSE;
  262. if (any_rx_active(i2s))
  263. mod |= MOD_RXONLY;
  264. else
  265. con &= ~CON_ACTIVE;
  266. }
  267. writel(mod, addr + I2SMOD);
  268. writel(con, addr + I2SCON);
  269. }
  270. /* RX Channel Control */
  271. static void i2s_rxctrl(struct i2s_dai *i2s, int on)
  272. {
  273. void __iomem *addr = i2s->addr;
  274. u32 con = readl(addr + I2SCON);
  275. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  276. if (on) {
  277. con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
  278. con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
  279. if (any_tx_active(i2s))
  280. mod |= MOD_TXRX;
  281. else
  282. mod |= MOD_RXONLY;
  283. } else {
  284. con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
  285. con &= ~CON_RXDMA_ACTIVE;
  286. if (any_tx_active(i2s))
  287. mod |= MOD_TXONLY;
  288. else
  289. con &= ~CON_ACTIVE;
  290. }
  291. writel(mod, addr + I2SMOD);
  292. writel(con, addr + I2SCON);
  293. }
  294. /* Flush FIFO of an interface */
  295. static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
  296. {
  297. void __iomem *fic;
  298. u32 val;
  299. if (!i2s)
  300. return;
  301. if (is_secondary(i2s))
  302. fic = i2s->addr + I2SFICS;
  303. else
  304. fic = i2s->addr + I2SFIC;
  305. /* Flush the FIFO */
  306. writel(readl(fic) | flush, fic);
  307. /* Be patient */
  308. val = msecs_to_loops(1) / 1000; /* 1 usec */
  309. while (--val)
  310. cpu_relax();
  311. writel(readl(fic) & ~flush, fic);
  312. }
  313. static int i2s_set_sysclk(struct snd_soc_dai *dai,
  314. int clk_id, unsigned int rfs, int dir)
  315. {
  316. struct i2s_dai *i2s = to_info(dai);
  317. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  318. u32 mod = readl(i2s->addr + I2SMOD);
  319. switch (clk_id) {
  320. case SAMSUNG_I2S_CDCLK:
  321. /* Shouldn't matter in GATING(CLOCK_IN) mode */
  322. if (dir == SND_SOC_CLOCK_IN)
  323. rfs = 0;
  324. if ((rfs && other->rfs && (other->rfs != rfs)) ||
  325. (any_active(i2s) &&
  326. (((dir == SND_SOC_CLOCK_IN)
  327. && !(mod & MOD_CDCLKCON)) ||
  328. ((dir == SND_SOC_CLOCK_OUT)
  329. && (mod & MOD_CDCLKCON))))) {
  330. dev_err(&i2s->pdev->dev,
  331. "%s:%d Other DAI busy\n", __func__, __LINE__);
  332. return -EAGAIN;
  333. }
  334. if (dir == SND_SOC_CLOCK_IN)
  335. mod |= MOD_CDCLKCON;
  336. else
  337. mod &= ~MOD_CDCLKCON;
  338. i2s->rfs = rfs;
  339. break;
  340. case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
  341. case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
  342. if ((i2s->quirks & QUIRK_NO_MUXPSR)
  343. || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
  344. clk_id = 0;
  345. else
  346. clk_id = 1;
  347. if (!any_active(i2s)) {
  348. if (i2s->op_clk) {
  349. if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
  350. (!clk_id && (mod & MOD_IMS_SYSMUX))) {
  351. clk_disable(i2s->op_clk);
  352. clk_put(i2s->op_clk);
  353. } else {
  354. i2s->rclk_srcrate =
  355. clk_get_rate(i2s->op_clk);
  356. return 0;
  357. }
  358. }
  359. i2s->op_clk = clk_get(&i2s->pdev->dev,
  360. i2s->src_clk[clk_id]);
  361. clk_enable(i2s->op_clk);
  362. i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
  363. /* Over-ride the other's */
  364. if (other) {
  365. other->op_clk = i2s->op_clk;
  366. other->rclk_srcrate = i2s->rclk_srcrate;
  367. }
  368. } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
  369. || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
  370. dev_err(&i2s->pdev->dev,
  371. "%s:%d Other DAI busy\n", __func__, __LINE__);
  372. return -EAGAIN;
  373. } else {
  374. /* Call can't be on the active DAI */
  375. i2s->op_clk = other->op_clk;
  376. i2s->rclk_srcrate = other->rclk_srcrate;
  377. return 0;
  378. }
  379. if (clk_id == 0)
  380. mod &= ~MOD_IMS_SYSMUX;
  381. else
  382. mod |= MOD_IMS_SYSMUX;
  383. break;
  384. default:
  385. dev_err(&i2s->pdev->dev, "We don't serve that!\n");
  386. return -EINVAL;
  387. }
  388. writel(mod, i2s->addr + I2SMOD);
  389. return 0;
  390. }
  391. static int i2s_set_fmt(struct snd_soc_dai *dai,
  392. unsigned int fmt)
  393. {
  394. struct i2s_dai *i2s = to_info(dai);
  395. u32 mod = readl(i2s->addr + I2SMOD);
  396. u32 tmp = 0;
  397. /* Format is priority */
  398. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  399. case SND_SOC_DAIFMT_RIGHT_J:
  400. tmp |= MOD_LR_RLOW;
  401. tmp |= MOD_SDF_MSB;
  402. break;
  403. case SND_SOC_DAIFMT_LEFT_J:
  404. tmp |= MOD_LR_RLOW;
  405. tmp |= MOD_SDF_LSB;
  406. break;
  407. case SND_SOC_DAIFMT_I2S:
  408. tmp |= MOD_SDF_IIS;
  409. break;
  410. default:
  411. dev_err(&i2s->pdev->dev, "Format not supported\n");
  412. return -EINVAL;
  413. }
  414. /*
  415. * INV flag is relative to the FORMAT flag - if set it simply
  416. * flips the polarity specified by the Standard
  417. */
  418. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  419. case SND_SOC_DAIFMT_NB_NF:
  420. break;
  421. case SND_SOC_DAIFMT_NB_IF:
  422. if (tmp & MOD_LR_RLOW)
  423. tmp &= ~MOD_LR_RLOW;
  424. else
  425. tmp |= MOD_LR_RLOW;
  426. break;
  427. default:
  428. dev_err(&i2s->pdev->dev, "Polarity not supported\n");
  429. return -EINVAL;
  430. }
  431. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  432. case SND_SOC_DAIFMT_CBM_CFM:
  433. tmp |= MOD_SLAVE;
  434. break;
  435. case SND_SOC_DAIFMT_CBS_CFS:
  436. /* Set default source clock in Master mode */
  437. if (i2s->rclk_srcrate == 0)
  438. i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
  439. 0, SND_SOC_CLOCK_IN);
  440. break;
  441. default:
  442. dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
  443. return -EINVAL;
  444. }
  445. if (any_active(i2s) &&
  446. ((mod & (MOD_SDF_MASK | MOD_LR_RLOW
  447. | MOD_SLAVE)) != tmp)) {
  448. dev_err(&i2s->pdev->dev,
  449. "%s:%d Other DAI busy\n", __func__, __LINE__);
  450. return -EAGAIN;
  451. }
  452. mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE);
  453. mod |= tmp;
  454. writel(mod, i2s->addr + I2SMOD);
  455. return 0;
  456. }
  457. static int i2s_hw_params(struct snd_pcm_substream *substream,
  458. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  459. {
  460. struct i2s_dai *i2s = to_info(dai);
  461. u32 mod = readl(i2s->addr + I2SMOD);
  462. if (!is_secondary(i2s))
  463. mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
  464. switch (params_channels(params)) {
  465. case 6:
  466. mod |= MOD_DC2_EN;
  467. case 4:
  468. mod |= MOD_DC1_EN;
  469. break;
  470. case 2:
  471. break;
  472. default:
  473. dev_err(&i2s->pdev->dev, "%d channels not supported\n",
  474. params_channels(params));
  475. return -EINVAL;
  476. }
  477. if (is_secondary(i2s))
  478. mod &= ~MOD_BLCS_MASK;
  479. else
  480. mod &= ~MOD_BLCP_MASK;
  481. if (is_manager(i2s))
  482. mod &= ~MOD_BLC_MASK;
  483. switch (params_format(params)) {
  484. case SNDRV_PCM_FORMAT_S8:
  485. if (is_secondary(i2s))
  486. mod |= MOD_BLCS_8BIT;
  487. else
  488. mod |= MOD_BLCP_8BIT;
  489. if (is_manager(i2s))
  490. mod |= MOD_BLC_8BIT;
  491. break;
  492. case SNDRV_PCM_FORMAT_S16_LE:
  493. if (is_secondary(i2s))
  494. mod |= MOD_BLCS_16BIT;
  495. else
  496. mod |= MOD_BLCP_16BIT;
  497. if (is_manager(i2s))
  498. mod |= MOD_BLC_16BIT;
  499. break;
  500. case SNDRV_PCM_FORMAT_S24_LE:
  501. if (is_secondary(i2s))
  502. mod |= MOD_BLCS_24BIT;
  503. else
  504. mod |= MOD_BLCP_24BIT;
  505. if (is_manager(i2s))
  506. mod |= MOD_BLC_24BIT;
  507. break;
  508. default:
  509. dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
  510. params_format(params));
  511. return -EINVAL;
  512. }
  513. writel(mod, i2s->addr + I2SMOD);
  514. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  515. snd_soc_dai_set_dma_data(dai, substream,
  516. (void *)&i2s->dma_playback);
  517. else
  518. snd_soc_dai_set_dma_data(dai, substream,
  519. (void *)&i2s->dma_capture);
  520. i2s->frmclk = params_rate(params);
  521. return 0;
  522. }
  523. /* We set constraints on the substream acc to the version of I2S */
  524. static int i2s_startup(struct snd_pcm_substream *substream,
  525. struct snd_soc_dai *dai)
  526. {
  527. struct i2s_dai *i2s = to_info(dai);
  528. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  529. unsigned long flags;
  530. spin_lock_irqsave(&lock, flags);
  531. i2s->mode |= DAI_OPENED;
  532. if (is_manager(other))
  533. i2s->mode &= ~DAI_MANAGER;
  534. else
  535. i2s->mode |= DAI_MANAGER;
  536. /* Enforce set_sysclk in Master mode */
  537. i2s->rclk_srcrate = 0;
  538. spin_unlock_irqrestore(&lock, flags);
  539. return 0;
  540. }
  541. static void i2s_shutdown(struct snd_pcm_substream *substream,
  542. struct snd_soc_dai *dai)
  543. {
  544. struct i2s_dai *i2s = to_info(dai);
  545. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  546. unsigned long flags;
  547. spin_lock_irqsave(&lock, flags);
  548. i2s->mode &= ~DAI_OPENED;
  549. i2s->mode &= ~DAI_MANAGER;
  550. if (is_opened(other))
  551. other->mode |= DAI_MANAGER;
  552. /* Reset any constraint on RFS and BFS */
  553. i2s->rfs = 0;
  554. i2s->bfs = 0;
  555. spin_unlock_irqrestore(&lock, flags);
  556. /* Gate CDCLK by default */
  557. if (!is_opened(other))
  558. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  559. 0, SND_SOC_CLOCK_IN);
  560. }
  561. static int config_setup(struct i2s_dai *i2s)
  562. {
  563. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  564. unsigned rfs, bfs, blc;
  565. u32 psr;
  566. blc = get_blc(i2s);
  567. bfs = i2s->bfs;
  568. if (!bfs && other)
  569. bfs = other->bfs;
  570. /* Select least possible multiple(2) if no constraint set */
  571. if (!bfs)
  572. bfs = blc * 2;
  573. rfs = i2s->rfs;
  574. if (!rfs && other)
  575. rfs = other->rfs;
  576. if ((rfs == 256 || rfs == 512) && (blc == 24)) {
  577. dev_err(&i2s->pdev->dev,
  578. "%d-RFS not supported for 24-blc\n", rfs);
  579. return -EINVAL;
  580. }
  581. if (!rfs) {
  582. if (bfs == 16 || bfs == 32)
  583. rfs = 256;
  584. else
  585. rfs = 384;
  586. }
  587. /* If already setup and running */
  588. if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
  589. dev_err(&i2s->pdev->dev,
  590. "%s:%d Other DAI busy\n", __func__, __LINE__);
  591. return -EAGAIN;
  592. }
  593. /* Don't bother RFS, BFS & PSR in Slave mode */
  594. if (is_slave(i2s))
  595. return 0;
  596. set_bfs(i2s, bfs);
  597. set_rfs(i2s, rfs);
  598. if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
  599. psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
  600. writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
  601. dev_dbg(&i2s->pdev->dev,
  602. "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
  603. i2s->rclk_srcrate, psr, rfs, bfs);
  604. }
  605. return 0;
  606. }
  607. static int i2s_trigger(struct snd_pcm_substream *substream,
  608. int cmd, struct snd_soc_dai *dai)
  609. {
  610. int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
  611. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  612. struct i2s_dai *i2s = to_info(rtd->cpu_dai);
  613. unsigned long flags;
  614. switch (cmd) {
  615. case SNDRV_PCM_TRIGGER_START:
  616. case SNDRV_PCM_TRIGGER_RESUME:
  617. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  618. local_irq_save(flags);
  619. if (config_setup(i2s)) {
  620. local_irq_restore(flags);
  621. return -EINVAL;
  622. }
  623. if (capture)
  624. i2s_rxctrl(i2s, 1);
  625. else
  626. i2s_txctrl(i2s, 1);
  627. local_irq_restore(flags);
  628. break;
  629. case SNDRV_PCM_TRIGGER_STOP:
  630. case SNDRV_PCM_TRIGGER_SUSPEND:
  631. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  632. local_irq_save(flags);
  633. if (capture)
  634. i2s_rxctrl(i2s, 0);
  635. else
  636. i2s_txctrl(i2s, 0);
  637. if (capture)
  638. i2s_fifo(i2s, FIC_RXFLUSH);
  639. else
  640. i2s_fifo(i2s, FIC_TXFLUSH);
  641. local_irq_restore(flags);
  642. break;
  643. }
  644. return 0;
  645. }
  646. static int i2s_set_clkdiv(struct snd_soc_dai *dai,
  647. int div_id, int div)
  648. {
  649. struct i2s_dai *i2s = to_info(dai);
  650. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  651. switch (div_id) {
  652. case SAMSUNG_I2S_DIV_BCLK:
  653. if ((any_active(i2s) && div && (get_bfs(i2s) != div))
  654. || (other && other->bfs && (other->bfs != div))) {
  655. dev_err(&i2s->pdev->dev,
  656. "%s:%d Other DAI busy\n", __func__, __LINE__);
  657. return -EAGAIN;
  658. }
  659. i2s->bfs = div;
  660. break;
  661. default:
  662. dev_err(&i2s->pdev->dev,
  663. "Invalid clock divider(%d)\n", div_id);
  664. return -EINVAL;
  665. }
  666. return 0;
  667. }
  668. static snd_pcm_sframes_t
  669. i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
  670. {
  671. struct i2s_dai *i2s = to_info(dai);
  672. u32 reg = readl(i2s->addr + I2SFIC);
  673. snd_pcm_sframes_t delay;
  674. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  675. delay = FIC_RXCOUNT(reg);
  676. else if (is_secondary(i2s))
  677. delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
  678. else
  679. delay = FIC_TXCOUNT(reg);
  680. return delay;
  681. }
  682. #ifdef CONFIG_PM
  683. static int i2s_suspend(struct snd_soc_dai *dai)
  684. {
  685. struct i2s_dai *i2s = to_info(dai);
  686. if (dai->active) {
  687. i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
  688. i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
  689. i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
  690. }
  691. return 0;
  692. }
  693. static int i2s_resume(struct snd_soc_dai *dai)
  694. {
  695. struct i2s_dai *i2s = to_info(dai);
  696. if (dai->active) {
  697. writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
  698. writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
  699. writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
  700. }
  701. return 0;
  702. }
  703. #else
  704. #define i2s_suspend NULL
  705. #define i2s_resume NULL
  706. #endif
  707. static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
  708. {
  709. struct i2s_dai *i2s = to_info(dai);
  710. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  711. if (other && other->clk) /* If this is probe on secondary */
  712. goto probe_exit;
  713. i2s->addr = ioremap(i2s->base, 0x100);
  714. if (i2s->addr == NULL) {
  715. dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
  716. return -ENXIO;
  717. }
  718. i2s->clk = clk_get(&i2s->pdev->dev, "iis");
  719. if (IS_ERR(i2s->clk)) {
  720. dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
  721. iounmap(i2s->addr);
  722. return -ENOENT;
  723. }
  724. clk_enable(i2s->clk);
  725. if (other) {
  726. other->addr = i2s->addr;
  727. other->clk = i2s->clk;
  728. }
  729. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  730. writel(CON_RSTCLR, i2s->addr + I2SCON);
  731. probe_exit:
  732. /* Reset any constraint on RFS and BFS */
  733. i2s->rfs = 0;
  734. i2s->bfs = 0;
  735. i2s_txctrl(i2s, 0);
  736. i2s_rxctrl(i2s, 0);
  737. i2s_fifo(i2s, FIC_TXFLUSH);
  738. i2s_fifo(other, FIC_TXFLUSH);
  739. i2s_fifo(i2s, FIC_RXFLUSH);
  740. /* Gate CDCLK by default */
  741. if (!is_opened(other))
  742. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  743. 0, SND_SOC_CLOCK_IN);
  744. return 0;
  745. }
  746. static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
  747. {
  748. struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
  749. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  750. if (!other || !other->clk) {
  751. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  752. writel(0, i2s->addr + I2SCON);
  753. clk_disable(i2s->clk);
  754. clk_put(i2s->clk);
  755. iounmap(i2s->addr);
  756. }
  757. i2s->clk = NULL;
  758. return 0;
  759. }
  760. static struct snd_soc_dai_ops samsung_i2s_dai_ops = {
  761. .trigger = i2s_trigger,
  762. .hw_params = i2s_hw_params,
  763. .set_fmt = i2s_set_fmt,
  764. .set_clkdiv = i2s_set_clkdiv,
  765. .set_sysclk = i2s_set_sysclk,
  766. .startup = i2s_startup,
  767. .shutdown = i2s_shutdown,
  768. .delay = i2s_delay,
  769. };
  770. #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
  771. #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
  772. SNDRV_PCM_FMTBIT_S16_LE | \
  773. SNDRV_PCM_FMTBIT_S24_LE)
  774. static __devinit
  775. struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
  776. {
  777. struct i2s_dai *i2s;
  778. i2s = kzalloc(sizeof(struct i2s_dai), GFP_KERNEL);
  779. if (i2s == NULL)
  780. return NULL;
  781. i2s->pdev = pdev;
  782. i2s->pri_dai = NULL;
  783. i2s->sec_dai = NULL;
  784. i2s->i2s_dai_drv.symmetric_rates = 1;
  785. i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
  786. i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
  787. i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
  788. i2s->i2s_dai_drv.suspend = i2s_suspend;
  789. i2s->i2s_dai_drv.resume = i2s_resume;
  790. i2s->i2s_dai_drv.playback.channels_min = 2;
  791. i2s->i2s_dai_drv.playback.channels_max = 2;
  792. i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
  793. i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
  794. if (!sec) {
  795. i2s->i2s_dai_drv.capture.channels_min = 2;
  796. i2s->i2s_dai_drv.capture.channels_max = 2;
  797. i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
  798. i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
  799. } else { /* Create a new platform_device for Secondary */
  800. i2s->pdev = platform_device_register_resndata(NULL,
  801. pdev->name, pdev->id + SAMSUNG_I2S_SECOFF,
  802. NULL, 0, NULL, 0);
  803. if (IS_ERR(i2s->pdev)) {
  804. kfree(i2s);
  805. return NULL;
  806. }
  807. }
  808. /* Pre-assign snd_soc_dai_set_drvdata */
  809. dev_set_drvdata(&i2s->pdev->dev, i2s);
  810. return i2s;
  811. }
  812. static __devinit int samsung_i2s_probe(struct platform_device *pdev)
  813. {
  814. u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan;
  815. struct i2s_dai *pri_dai, *sec_dai = NULL;
  816. struct s3c_audio_pdata *i2s_pdata;
  817. struct samsung_i2s *i2s_cfg;
  818. struct resource *res;
  819. u32 regs_base, quirks;
  820. int ret = 0;
  821. /* Call during Seconday interface registration */
  822. if (pdev->id >= SAMSUNG_I2S_SECOFF) {
  823. sec_dai = dev_get_drvdata(&pdev->dev);
  824. snd_soc_register_dai(&sec_dai->pdev->dev,
  825. &sec_dai->i2s_dai_drv);
  826. return 0;
  827. }
  828. i2s_pdata = pdev->dev.platform_data;
  829. if (i2s_pdata == NULL) {
  830. dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
  831. return -EINVAL;
  832. }
  833. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  834. if (!res) {
  835. dev_err(&pdev->dev, "Unable to get I2S-TX dma resource\n");
  836. return -ENXIO;
  837. }
  838. dma_pl_chan = res->start;
  839. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  840. if (!res) {
  841. dev_err(&pdev->dev, "Unable to get I2S-RX dma resource\n");
  842. return -ENXIO;
  843. }
  844. dma_cp_chan = res->start;
  845. res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
  846. if (res)
  847. dma_pl_sec_chan = res->start;
  848. else
  849. dma_pl_sec_chan = 0;
  850. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  851. if (!res) {
  852. dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
  853. return -ENXIO;
  854. }
  855. if (!request_mem_region(res->start, resource_size(res),
  856. "samsung-i2s")) {
  857. dev_err(&pdev->dev, "Unable to request SFR region\n");
  858. return -EBUSY;
  859. }
  860. regs_base = res->start;
  861. i2s_cfg = &i2s_pdata->type.i2s;
  862. quirks = i2s_cfg->quirks;
  863. pri_dai = i2s_alloc_dai(pdev, false);
  864. if (!pri_dai) {
  865. dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
  866. ret = -ENOMEM;
  867. goto err1;
  868. }
  869. pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
  870. pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
  871. pri_dai->dma_playback.client =
  872. (struct s3c2410_dma_client *)&pri_dai->dma_playback;
  873. pri_dai->dma_capture.client =
  874. (struct s3c2410_dma_client *)&pri_dai->dma_capture;
  875. pri_dai->dma_playback.channel = dma_pl_chan;
  876. pri_dai->dma_capture.channel = dma_cp_chan;
  877. pri_dai->src_clk = i2s_cfg->src_clk;
  878. pri_dai->dma_playback.dma_size = 4;
  879. pri_dai->dma_capture.dma_size = 4;
  880. pri_dai->base = regs_base;
  881. pri_dai->quirks = quirks;
  882. if (quirks & QUIRK_PRI_6CHAN)
  883. pri_dai->i2s_dai_drv.playback.channels_max = 6;
  884. if (quirks & QUIRK_SEC_DAI) {
  885. sec_dai = i2s_alloc_dai(pdev, true);
  886. if (!sec_dai) {
  887. dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
  888. ret = -ENOMEM;
  889. goto err2;
  890. }
  891. sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
  892. sec_dai->dma_playback.client =
  893. (struct s3c2410_dma_client *)&sec_dai->dma_playback;
  894. /* Use iDMA always if SysDMA not provided */
  895. sec_dai->dma_playback.channel = dma_pl_sec_chan ? : -1;
  896. sec_dai->src_clk = i2s_cfg->src_clk;
  897. sec_dai->dma_playback.dma_size = 4;
  898. sec_dai->base = regs_base;
  899. sec_dai->quirks = quirks;
  900. sec_dai->pri_dai = pri_dai;
  901. pri_dai->sec_dai = sec_dai;
  902. }
  903. if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
  904. dev_err(&pdev->dev, "Unable to configure gpio\n");
  905. ret = -EINVAL;
  906. goto err3;
  907. }
  908. snd_soc_register_dai(&pri_dai->pdev->dev, &pri_dai->i2s_dai_drv);
  909. return 0;
  910. err3:
  911. kfree(sec_dai);
  912. err2:
  913. kfree(pri_dai);
  914. err1:
  915. release_mem_region(regs_base, resource_size(res));
  916. return ret;
  917. }
  918. static __devexit int samsung_i2s_remove(struct platform_device *pdev)
  919. {
  920. struct i2s_dai *i2s, *other;
  921. i2s = dev_get_drvdata(&pdev->dev);
  922. other = i2s->pri_dai ? : i2s->sec_dai;
  923. if (other) {
  924. other->pri_dai = NULL;
  925. other->sec_dai = NULL;
  926. } else {
  927. struct resource *res;
  928. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  929. if (res)
  930. release_mem_region(res->start, resource_size(res));
  931. }
  932. i2s->pri_dai = NULL;
  933. i2s->sec_dai = NULL;
  934. kfree(i2s);
  935. snd_soc_unregister_dai(&pdev->dev);
  936. return 0;
  937. }
  938. static struct platform_driver samsung_i2s_driver = {
  939. .probe = samsung_i2s_probe,
  940. .remove = samsung_i2s_remove,
  941. .driver = {
  942. .name = "samsung-i2s",
  943. .owner = THIS_MODULE,
  944. },
  945. };
  946. static int __init samsung_i2s_init(void)
  947. {
  948. return platform_driver_register(&samsung_i2s_driver);
  949. }
  950. module_init(samsung_i2s_init);
  951. static void __exit samsung_i2s_exit(void)
  952. {
  953. platform_driver_unregister(&samsung_i2s_driver);
  954. }
  955. module_exit(samsung_i2s_exit);
  956. /* Module information */
  957. MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>");
  958. MODULE_DESCRIPTION("Samsung I2S Interface");
  959. MODULE_ALIAS("platform:samsung-i2s");
  960. MODULE_LICENSE("GPL");