Kconfig 23 KB

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  1. #
  2. # For a description of the syntax of this configuration file,
  3. # see Documentation/kbuild/kconfig-language.txt.
  4. #
  5. mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
  6. config MMU
  7. bool
  8. default n
  9. config FPU
  10. bool
  11. default n
  12. config RWSEM_GENERIC_SPINLOCK
  13. bool
  14. default y
  15. config RWSEM_XCHGADD_ALGORITHM
  16. bool
  17. default n
  18. config BLACKFIN
  19. bool
  20. default y
  21. config ZONE_DMA
  22. bool
  23. default y
  24. config BFIN
  25. bool
  26. default y
  27. config SEMAPHORE_SLEEPERS
  28. bool
  29. default y
  30. config GENERIC_FIND_NEXT_BIT
  31. bool
  32. default y
  33. config GENERIC_HWEIGHT
  34. bool
  35. default y
  36. config GENERIC_HARDIRQS
  37. bool
  38. default y
  39. config GENERIC_IRQ_PROBE
  40. bool
  41. default y
  42. config GENERIC_TIME
  43. bool
  44. default n
  45. config GENERIC_GPIO
  46. bool
  47. default y
  48. config FORCE_MAX_ZONEORDER
  49. int
  50. default "14"
  51. config GENERIC_CALIBRATE_DELAY
  52. bool
  53. default y
  54. config IRQCHIP_DEMUX_GPIO
  55. bool
  56. depends on (BF53x || BF561 || BF54x)
  57. default y
  58. source "init/Kconfig"
  59. source "kernel/Kconfig.preempt"
  60. menu "Blackfin Processor Options"
  61. comment "Processor and Board Settings"
  62. choice
  63. prompt "CPU"
  64. default BF533
  65. config BF531
  66. bool "BF531"
  67. help
  68. BF531 Processor Support.
  69. config BF532
  70. bool "BF532"
  71. help
  72. BF532 Processor Support.
  73. config BF533
  74. bool "BF533"
  75. help
  76. BF533 Processor Support.
  77. config BF534
  78. bool "BF534"
  79. help
  80. BF534 Processor Support.
  81. config BF536
  82. bool "BF536"
  83. help
  84. BF536 Processor Support.
  85. config BF537
  86. bool "BF537"
  87. help
  88. BF537 Processor Support.
  89. config BF542
  90. bool "BF542"
  91. help
  92. BF542 Processor Support.
  93. config BF544
  94. bool "BF544"
  95. help
  96. BF544 Processor Support.
  97. config BF548
  98. bool "BF548"
  99. help
  100. BF548 Processor Support.
  101. config BF549
  102. bool "BF549"
  103. help
  104. BF549 Processor Support.
  105. config BF561
  106. bool "BF561"
  107. help
  108. Not Supported Yet - Work in progress - BF561 Processor Support.
  109. endchoice
  110. choice
  111. prompt "Silicon Rev"
  112. default BF_REV_0_2 if BF537
  113. default BF_REV_0_3 if BF533
  114. default BF_REV_0_0 if BF549
  115. config BF_REV_0_0
  116. bool "0.0"
  117. depends on (BF549)
  118. config BF_REV_0_2
  119. bool "0.2"
  120. depends on (BF537 || BF536 || BF534)
  121. config BF_REV_0_3
  122. bool "0.3"
  123. depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
  124. config BF_REV_0_4
  125. bool "0.4"
  126. depends on (BF561 || BF533 || BF532 || BF531)
  127. config BF_REV_0_5
  128. bool "0.5"
  129. depends on (BF561 || BF533 || BF532 || BF531)
  130. config BF_REV_ANY
  131. bool "any"
  132. config BF_REV_NONE
  133. bool "none"
  134. endchoice
  135. config BF53x
  136. bool
  137. depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
  138. default y
  139. config BF54x
  140. bool
  141. depends on (BF542 || BF544 || BF548 || BF549)
  142. default y
  143. config BFIN_DUAL_CORE
  144. bool
  145. depends on (BF561)
  146. default y
  147. config BFIN_SINGLE_CORE
  148. bool
  149. depends on !BFIN_DUAL_CORE
  150. default y
  151. choice
  152. prompt "System type"
  153. default BFIN533_STAMP
  154. help
  155. Do NOT change the board here. Please use the top level
  156. configuration to ensure that all the other settings are
  157. correct.
  158. config BFIN533_EZKIT
  159. bool "BF533-EZKIT"
  160. depends on (BF533 || BF532 || BF531)
  161. help
  162. BF533-EZKIT-LITE board Support.
  163. config BFIN533_STAMP
  164. bool "BF533-STAMP"
  165. depends on (BF533 || BF532 || BF531)
  166. help
  167. BF533-STAMP board Support.
  168. config BFIN537_STAMP
  169. bool "BF537-STAMP"
  170. depends on (BF537 || BF536 || BF534)
  171. help
  172. BF537-STAMP board Support.
  173. config BFIN533_BLUETECHNIX_CM
  174. bool "Bluetechnix CM-BF533"
  175. depends on (BF533)
  176. help
  177. CM-BF533 support for EVAL- and DEV-Board.
  178. config BFIN537_BLUETECHNIX_CM
  179. bool "Bluetechnix CM-BF537"
  180. depends on (BF537)
  181. help
  182. CM-BF537 support for EVAL- and DEV-Board.
  183. config BFIN548_EZKIT
  184. bool "BF548-EZKIT"
  185. depends on (BF548 || BF549)
  186. help
  187. BFIN548-EZKIT board Support.
  188. config BFIN561_BLUETECHNIX_CM
  189. bool "Bluetechnix CM-BF561"
  190. depends on (BF561)
  191. help
  192. CM-BF561 support for EVAL- and DEV-Board.
  193. config BFIN561_EZKIT
  194. bool "BF561-EZKIT"
  195. depends on (BF561)
  196. help
  197. BF561-EZKIT-LITE board Support.
  198. config BFIN561_TEPLA
  199. bool "BF561-TEPLA"
  200. depends on (BF561)
  201. help
  202. BF561-TEPLA board Support.
  203. config PNAV10
  204. bool "PNAV 1.0 board"
  205. depends on (BF537)
  206. help
  207. PNAV 1.0 board Support.
  208. config GENERIC_BOARD
  209. bool "Custom"
  210. depends on (BF537 || BF536 \
  211. || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
  212. help
  213. GENERIC or Custom board Support.
  214. endchoice
  215. config MEM_GENERIC_BOARD
  216. bool
  217. depends on GENERIC_BOARD
  218. default y
  219. config MEM_MT48LC64M4A2FB_7E
  220. bool
  221. depends on (BFIN533_STAMP)
  222. default y
  223. config MEM_MT48LC16M16A2TG_75
  224. bool
  225. depends on (BFIN533_EZKIT || BFIN561_EZKIT \
  226. || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
  227. default y
  228. config MEM_MT48LC32M8A2_75
  229. bool
  230. depends on (BFIN537_STAMP || PNAV10)
  231. default y
  232. config MEM_MT48LC8M32B2B5_7
  233. bool
  234. depends on (BFIN561_BLUETECHNIX_CM)
  235. default y
  236. config BFIN_SHARED_FLASH_ENET
  237. bool
  238. depends on (BFIN533_STAMP)
  239. default y
  240. source "arch/blackfin/mach-bf533/Kconfig"
  241. source "arch/blackfin/mach-bf561/Kconfig"
  242. source "arch/blackfin/mach-bf537/Kconfig"
  243. source "arch/blackfin/mach-bf548/Kconfig"
  244. menu "Board customizations"
  245. config CMDLINE_BOOL
  246. bool "Default bootloader kernel arguments"
  247. config CMDLINE
  248. string "Initial kernel command string"
  249. depends on CMDLINE_BOOL
  250. default "console=ttyBF0,57600"
  251. help
  252. If you don't have a boot loader capable of passing a command line string
  253. to the kernel, you may specify one here. As a minimum, you should specify
  254. the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
  255. comment "Clock/PLL Setup"
  256. config CLKIN_HZ
  257. int "Crystal Frequency in Hz"
  258. default "11059200" if BFIN533_STAMP
  259. default "27000000" if BFIN533_EZKIT
  260. default "25000000" if BFIN537_STAMP
  261. default "30000000" if BFIN561_EZKIT
  262. default "24576000" if PNAV10
  263. help
  264. The frequency of CLKIN crystal oscillator on the board in Hz.
  265. config BFIN_KERNEL_CLOCK
  266. bool "Re-program Clocks while Kernel boots?"
  267. default n
  268. help
  269. This option decides if kernel clocks are re-programed from the
  270. bootloader settings. If the clocks are not set, the SDRAM settings
  271. are also not changed, and the Bootloader does 100% of the hardware
  272. configuration.
  273. config PLL_BYPASS
  274. bool "Bypass PLL"
  275. depends on BFIN_KERNEL_CLOCK
  276. default n
  277. config CLKIN_HALF
  278. bool "Half Clock In"
  279. depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
  280. default n
  281. help
  282. If this is set the clock will be divided by 2, before it goes to the PLL.
  283. config VCO_MULT
  284. int "VCO Multiplier"
  285. depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
  286. range 1 64
  287. default "22" if BFIN533_EZKIT
  288. default "45" if BFIN533_STAMP
  289. default "20" if BFIN537_STAMP
  290. default "22" if BFIN533_BLUETECHNIX_CM
  291. default "20" if BFIN537_BLUETECHNIX_CM
  292. default "20" if BFIN561_BLUETECHNIX_CM
  293. default "20" if BFIN561_EZKIT
  294. help
  295. This controls the frequency of the on-chip PLL. This can be between 1 and 64.
  296. PLL Frequency = (Crystal Frequency) * (this setting)
  297. choice
  298. prompt "Core Clock Divider"
  299. depends on BFIN_KERNEL_CLOCK
  300. default CCLK_DIV_1
  301. help
  302. This sets the frequency of the core. It can be 1, 2, 4 or 8
  303. Core Frequency = (PLL frequency) / (this setting)
  304. config CCLK_DIV_1
  305. bool "1"
  306. config CCLK_DIV_2
  307. bool "2"
  308. config CCLK_DIV_4
  309. bool "4"
  310. config CCLK_DIV_8
  311. bool "8"
  312. endchoice
  313. config SCLK_DIV
  314. int "System Clock Divider"
  315. depends on BFIN_KERNEL_CLOCK
  316. range 1 15
  317. default 5 if BFIN533_EZKIT
  318. default 5 if BFIN533_STAMP
  319. default 4 if BFIN537_STAMP
  320. default 5 if BFIN533_BLUETECHNIX_CM
  321. default 4 if BFIN537_BLUETECHNIX_CM
  322. default 4 if BFIN561_BLUETECHNIX_CM
  323. default 5 if BFIN561_EZKIT
  324. help
  325. This sets the frequency of the system clock (including SDRAM or DDR).
  326. This can be between 1 and 15
  327. System Clock = (PLL frequency) / (this setting)
  328. #
  329. # Max & Min Speeds for various Chips
  330. #
  331. config MAX_VCO_HZ
  332. int
  333. default 600000000 if BF522
  334. default 600000000 if BF525
  335. default 600000000 if BF527
  336. default 400000000 if BF531
  337. default 400000000 if BF532
  338. default 750000000 if BF533
  339. default 500000000 if BF534
  340. default 400000000 if BF536
  341. default 600000000 if BF537
  342. default 533000000 if BF538
  343. default 533000000 if BF539
  344. default 600000000 if BF542
  345. default 533000000 if BF544
  346. default 533000000 if BF549
  347. default 600000000 if BF561
  348. config MIN_VCO_HZ
  349. int
  350. default 50000000
  351. config MAX_SCLK_HZ
  352. int
  353. default 133000000
  354. config MIN_SCLK_HZ
  355. int
  356. default 27000000
  357. comment "Kernel Timer/Scheduler"
  358. source kernel/Kconfig.hz
  359. comment "Memory Setup"
  360. config MEM_SIZE
  361. int "SDRAM Memory Size in MBytes"
  362. default 32 if BFIN533_EZKIT
  363. default 64 if BFIN537_STAMP
  364. default 64 if BFIN561_EZKIT
  365. default 128 if BFIN533_STAMP
  366. default 64 if PNAV10
  367. config MEM_ADD_WIDTH
  368. int "SDRAM Memory Address Width"
  369. default 9 if BFIN533_EZKIT
  370. default 9 if BFIN561_EZKIT
  371. default 10 if BFIN537_STAMP
  372. default 11 if BFIN533_STAMP
  373. default 10 if PNAV10
  374. config ENET_FLASH_PIN
  375. int "PF port/pin used for flash and ethernet sharing"
  376. depends on (BFIN533_STAMP)
  377. default 0
  378. help
  379. PF port/pin used for flash and ethernet sharing to allow other PF
  380. pins to be used on other platforms without having to touch common
  381. code.
  382. For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
  383. config BOOT_LOAD
  384. hex "Kernel load address for booting"
  385. default "0x1000"
  386. help
  387. This option allows you to set the load address of the kernel.
  388. This can be useful if you are on a board which has a small amount
  389. of memory or you wish to reserve some memory at the beginning of
  390. the address space.
  391. Note that you generally want to keep this value at or above 4k
  392. (0x1000) as this will allow the kernel to capture NULL pointer
  393. references.
  394. comment "LED Status Indicators"
  395. depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
  396. config BFIN_ALIVE_LED
  397. bool "Enable Board Alive"
  398. depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
  399. default n
  400. help
  401. Blink the LEDs you select when the kernel is running. Helps detect
  402. a hung kernel.
  403. config BFIN_ALIVE_LED_NUM
  404. int "LED"
  405. depends on BFIN_ALIVE_LED
  406. range 1 3 if BFIN533_STAMP
  407. default "3" if BFIN533_STAMP
  408. help
  409. Select the LED (marked on the board) for you to blink.
  410. config BFIN_IDLE_LED
  411. bool "Enable System Load/Idle LED"
  412. depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
  413. default n
  414. help
  415. Blinks the LED you select when to determine kernel load.
  416. config BFIN_IDLE_LED_NUM
  417. int "LED"
  418. depends on BFIN_IDLE_LED
  419. range 1 3 if BFIN533_STAMP
  420. default "2" if BFIN533_STAMP
  421. help
  422. Select the LED (marked on the board) for you to blink.
  423. #
  424. # Sorry - but you need to put the hex address here -
  425. #
  426. # Flag Data register
  427. config BFIN_ALIVE_LED_PORT
  428. hex
  429. default 0xFFC00700 if (BFIN533_STAMP)
  430. # Peripheral Flag Direction Register
  431. config BFIN_ALIVE_LED_DPORT
  432. hex
  433. default 0xFFC00730 if (BFIN533_STAMP)
  434. config BFIN_ALIVE_LED_PIN
  435. hex
  436. default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
  437. default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
  438. default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
  439. config BFIN_IDLE_LED_PORT
  440. hex
  441. default 0xFFC00700 if (BFIN533_STAMP)
  442. # Peripheral Flag Direction Register
  443. config BFIN_IDLE_LED_DPORT
  444. hex
  445. default 0xFFC00730 if (BFIN533_STAMP)
  446. config BFIN_IDLE_LED_PIN
  447. hex
  448. default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
  449. default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
  450. default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
  451. endmenu
  452. menu "Blackfin Kernel Optimizations"
  453. comment "Memory Optimizations"
  454. config I_ENTRY_L1
  455. bool "Locate interrupt entry code in L1 Memory"
  456. default y
  457. help
  458. If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
  459. into L1 instruction memory.(less latency)
  460. config EXCPT_IRQ_SYSC_L1
  461. bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory"
  462. default y
  463. help
  464. If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked
  465. into L1 instruction memory.(less latency)
  466. config DO_IRQ_L1
  467. bool "Locate frequently called do_irq dispatcher function in L1 Memory"
  468. default y
  469. help
  470. If enabled frequently called do_irq dispatcher function is linked
  471. into L1 instruction memory.(less latency)
  472. config CORE_TIMER_IRQ_L1
  473. bool "Locate frequently called timer_interrupt() function in L1 Memory"
  474. default y
  475. help
  476. If enabled frequently called timer_interrupt() function is linked
  477. into L1 instruction memory.(less latency)
  478. config IDLE_L1
  479. bool "Locate frequently idle function in L1 Memory"
  480. default y
  481. help
  482. If enabled frequently called idle function is linked
  483. into L1 instruction memory.(less latency)
  484. config SCHEDULE_L1
  485. bool "Locate kernel schedule function in L1 Memory"
  486. default y
  487. help
  488. If enabled frequently called kernel schedule is linked
  489. into L1 instruction memory.(less latency)
  490. config ARITHMETIC_OPS_L1
  491. bool "Locate kernel owned arithmetic functions in L1 Memory"
  492. default y
  493. help
  494. If enabled arithmetic functions are linked
  495. into L1 instruction memory.(less latency)
  496. config ACCESS_OK_L1
  497. bool "Locate access_ok function in L1 Memory"
  498. default y
  499. help
  500. If enabled access_ok function is linked
  501. into L1 instruction memory.(less latency)
  502. config MEMSET_L1
  503. bool "Locate memset function in L1 Memory"
  504. default y
  505. help
  506. If enabled memset function is linked
  507. into L1 instruction memory.(less latency)
  508. config MEMCPY_L1
  509. bool "Locate memcpy function in L1 Memory"
  510. default y
  511. help
  512. If enabled memcpy function is linked
  513. into L1 instruction memory.(less latency)
  514. config SYS_BFIN_SPINLOCK_L1
  515. bool "Locate sys_bfin_spinlock function in L1 Memory"
  516. default y
  517. help
  518. If enabled sys_bfin_spinlock function is linked
  519. into L1 instruction memory.(less latency)
  520. config IP_CHECKSUM_L1
  521. bool "Locate IP Checksum function in L1 Memory"
  522. default n
  523. help
  524. If enabled IP Checksum function is linked
  525. into L1 instruction memory.(less latency)
  526. config CACHELINE_ALIGNED_L1
  527. bool "Locate cacheline_aligned data to L1 Data Memory"
  528. default y if !BF54x
  529. default n if BF54x
  530. depends on !BF531
  531. help
  532. If enabled cacheline_anligned data is linked
  533. into L1 data memory.(less latency)
  534. config SYSCALL_TAB_L1
  535. bool "Locate Syscall Table L1 Data Memory"
  536. default n
  537. depends on !BF531
  538. help
  539. If enabled the Syscall LUT is linked
  540. into L1 data memory.(less latency)
  541. config CPLB_SWITCH_TAB_L1
  542. bool "Locate CPLB Switch Tables L1 Data Memory"
  543. default n
  544. depends on !BF531
  545. help
  546. If enabled the CPLB Switch Tables are linked
  547. into L1 data memory.(less latency)
  548. endmenu
  549. choice
  550. prompt "Kernel executes from"
  551. help
  552. Choose the memory type that the kernel will be running in.
  553. config RAMKERNEL
  554. bool "RAM"
  555. help
  556. The kernel will be resident in RAM when running.
  557. config ROMKERNEL
  558. bool "ROM"
  559. help
  560. The kernel will be resident in FLASH/ROM when running.
  561. endchoice
  562. source "mm/Kconfig"
  563. config LARGE_ALLOCS
  564. bool "Allow allocating large blocks (> 1MB) of memory"
  565. help
  566. Allow the slab memory allocator to keep chains for very large
  567. memory sizes - upto 32MB. You may need this if your system has
  568. a lot of RAM, and you need to able to allocate very large
  569. contiguous chunks. If unsure, say N.
  570. config BFIN_DMA_5XX
  571. bool "Enable DMA Support"
  572. depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
  573. default y
  574. help
  575. DMA driver for BF5xx.
  576. choice
  577. prompt "Uncached SDRAM region"
  578. default DMA_UNCACHED_1M
  579. depends BFIN_DMA_5XX
  580. config DMA_UNCACHED_2M
  581. bool "Enable 2M DMA region"
  582. config DMA_UNCACHED_1M
  583. bool "Enable 1M DMA region"
  584. config DMA_UNCACHED_NONE
  585. bool "Disable DMA region"
  586. endchoice
  587. comment "Cache Support"
  588. config BLKFIN_CACHE
  589. bool "Enable ICACHE"
  590. config BLKFIN_DCACHE
  591. bool "Enable DCACHE"
  592. config BLKFIN_DCACHE_BANKA
  593. bool "Enable only 16k BankA DCACHE - BankB is SRAM"
  594. depends on BLKFIN_DCACHE && !BF531
  595. default n
  596. config BLKFIN_CACHE_LOCK
  597. bool "Enable Cache Locking"
  598. choice
  599. prompt "Policy"
  600. depends on BLKFIN_DCACHE
  601. default BLKFIN_WB
  602. config BLKFIN_WB
  603. bool "Write back"
  604. help
  605. Write Back Policy:
  606. Cached data will be written back to SDRAM only when needed.
  607. This can give a nice increase in performance, but beware of
  608. broken drivers that do not properly invalidate/flush their
  609. cache.
  610. Write Through Policy:
  611. Cached data will always be written back to SDRAM when the
  612. cache is updated. This is a completely safe setting, but
  613. performance is worse than Write Back.
  614. If you are unsure of the options and you want to be safe,
  615. then go with Write Through.
  616. config BLKFIN_WT
  617. bool "Write through"
  618. help
  619. Write Back Policy:
  620. Cached data will be written back to SDRAM only when needed.
  621. This can give a nice increase in performance, but beware of
  622. broken drivers that do not properly invalidate/flush their
  623. cache.
  624. Write Through Policy:
  625. Cached data will always be written back to SDRAM when the
  626. cache is updated. This is a completely safe setting, but
  627. performance is worse than Write Back.
  628. If you are unsure of the options and you want to be safe,
  629. then go with Write Through.
  630. endchoice
  631. config L1_MAX_PIECE
  632. int "Set the max L1 SRAM pieces"
  633. default 16
  634. help
  635. Set the max memory pieces for the L1 SRAM allocation algorithm.
  636. Min value is 16. Max value is 1024.
  637. comment "Asynchonous Memory Configuration"
  638. menu "EBIU_AMBCTL Global Control"
  639. config C_AMCKEN
  640. bool "Enable CLKOUT"
  641. default y
  642. config C_CDPRIO
  643. bool "DMA has priority over core for ext. accesses"
  644. depends on !BF54x
  645. default n
  646. config C_B0PEN
  647. depends on BF561
  648. bool "Bank 0 16 bit packing enable"
  649. default y
  650. config C_B1PEN
  651. depends on BF561
  652. bool "Bank 1 16 bit packing enable"
  653. default y
  654. config C_B2PEN
  655. depends on BF561
  656. bool "Bank 2 16 bit packing enable"
  657. default y
  658. config C_B3PEN
  659. depends on BF561
  660. bool "Bank 3 16 bit packing enable"
  661. default n
  662. choice
  663. prompt"Enable Asynchonous Memory Banks"
  664. default C_AMBEN_ALL
  665. config C_AMBEN
  666. bool "Disable All Banks"
  667. config C_AMBEN_B0
  668. bool "Enable Bank 0"
  669. config C_AMBEN_B0_B1
  670. bool "Enable Bank 0 & 1"
  671. config C_AMBEN_B0_B1_B2
  672. bool "Enable Bank 0 & 1 & 2"
  673. config C_AMBEN_ALL
  674. bool "Enable All Banks"
  675. endchoice
  676. endmenu
  677. menu "EBIU_AMBCTL Control"
  678. config BANK_0
  679. hex "Bank 0"
  680. default 0x7BB0
  681. config BANK_1
  682. hex "Bank 1"
  683. default 0x7BB0
  684. config BANK_2
  685. hex "Bank 2"
  686. default 0x7BB0
  687. config BANK_3
  688. hex "Bank 3"
  689. default 0x99B3
  690. endmenu
  691. endmenu
  692. #############################################################################
  693. menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
  694. config PCI
  695. bool "PCI support"
  696. help
  697. Support for PCI bus.
  698. source "drivers/pci/Kconfig"
  699. config HOTPLUG
  700. bool "Support for hot-pluggable device"
  701. help
  702. Say Y here if you want to plug devices into your computer while
  703. the system is running, and be able to use them quickly. In many
  704. cases, the devices can likewise be unplugged at any time too.
  705. One well known example of this is PCMCIA- or PC-cards, credit-card
  706. size devices such as network cards, modems or hard drives which are
  707. plugged into slots found on all modern laptop computers. Another
  708. example, used on modern desktops as well as laptops, is USB.
  709. Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
  710. software (at <http://linux-hotplug.sourceforge.net/>) and install it.
  711. Then your kernel will automatically call out to a user mode "policy
  712. agent" (/sbin/hotplug) to load modules and set up software needed
  713. to use devices as you hotplug them.
  714. source "drivers/pcmcia/Kconfig"
  715. source "drivers/pci/hotplug/Kconfig"
  716. endmenu
  717. menu "Executable file formats"
  718. source "fs/Kconfig.binfmt"
  719. endmenu
  720. menu "Power management options"
  721. source "kernel/power/Kconfig"
  722. choice
  723. prompt "Select PM Wakeup Event Source"
  724. default PM_WAKEUP_GPIO_BY_SIC_IWR
  725. depends on PM
  726. help
  727. If you have a GPIO already configured as input with the corresponding PORTx_MASK
  728. bit set - "Specify Wakeup Event by SIC_IWR value"
  729. config PM_WAKEUP_GPIO_BY_SIC_IWR
  730. bool "Specify Wakeup Event by SIC_IWR value"
  731. config PM_WAKEUP_BY_GPIO
  732. bool "Cause Wakeup Event by GPIO"
  733. config PM_WAKEUP_GPIO_API
  734. bool "Configure Wakeup Event by PM GPIO API"
  735. endchoice
  736. config PM_WAKEUP_SIC_IWR
  737. hex "Wakeup Events (SIC_IWR)"
  738. depends on PM_WAKEUP_GPIO_BY_SIC_IWR
  739. default 0x80000000 if (BF537 || BF536 || BF534)
  740. default 0x100000 if (BF533 || BF532 || BF531)
  741. config PM_WAKEUP_GPIO_NUMBER
  742. int "Wakeup GPIO number"
  743. range 0 47
  744. depends on PM_WAKEUP_BY_GPIO
  745. default 2 if BFIN537_STAMP
  746. choice
  747. prompt "GPIO Polarity"
  748. depends on PM_WAKEUP_BY_GPIO
  749. default PM_WAKEUP_GPIO_POLAR_H
  750. config PM_WAKEUP_GPIO_POLAR_H
  751. bool "Active High"
  752. config PM_WAKEUP_GPIO_POLAR_L
  753. bool "Active Low"
  754. config PM_WAKEUP_GPIO_POLAR_EDGE_F
  755. bool "Falling EDGE"
  756. config PM_WAKEUP_GPIO_POLAR_EDGE_R
  757. bool "Rising EDGE"
  758. config PM_WAKEUP_GPIO_POLAR_EDGE_B
  759. bool "Both EDGE"
  760. endchoice
  761. endmenu
  762. if (BF537 || BF533 || BF54x)
  763. menu "CPU Frequency scaling"
  764. source "drivers/cpufreq/Kconfig"
  765. config CPU_FREQ
  766. bool
  767. default n
  768. help
  769. If you want to enable this option, you should select the
  770. DPMC driver from Character Devices.
  771. endmenu
  772. endif
  773. source "net/Kconfig"
  774. source "drivers/Kconfig"
  775. source "fs/Kconfig"
  776. source "arch/blackfin/oprofile/Kconfig"
  777. menu "Kernel hacking"
  778. source "lib/Kconfig.debug"
  779. config DEBUG_HWERR
  780. bool "Hardware error interrupt debugging"
  781. depends on DEBUG_KERNEL
  782. help
  783. When enabled, the hardware error interrupt is never disabled, and
  784. will happen immediately when an error condition occurs. This comes
  785. at a slight cost in code size, but is necessary if you are getting
  786. hardware error interrupts and need to know where they are coming
  787. from.
  788. config DEBUG_ICACHE_CHECK
  789. bool "Check Instruction cache coherancy"
  790. depends on DEBUG_KERNEL
  791. depends on DEBUG_HWERR
  792. help
  793. Say Y here if you are getting wierd unexplained errors. This will
  794. ensure that icache is what SDRAM says it should be, by doing a
  795. byte wise comparision between SDRAM and instruction cache. This
  796. also relocates the irq_panic() function to L1 memory, (which is
  797. un-cached).
  798. config DEBUG_KERNEL_START
  799. bool "Debug Kernel Startup"
  800. depends on DEBUG_KERNEL
  801. help
  802. Say Y here to put in an mini-execption handler before the kernel
  803. replaces the bootloader exception handler. This will stop kernels
  804. from dieing at startup with no visible error messages.
  805. config DEBUG_SERIAL_EARLY_INIT
  806. bool "Initialize serial driver early"
  807. default n
  808. depends on SERIAL_BFIN
  809. help
  810. Say Y here if you want to get kernel output early when kernel
  811. crashes before the normal console initialization. If this option
  812. is enable, console output will always go to the ttyBF0, no matter
  813. what kernel boot paramters you set.
  814. config DEBUG_HUNT_FOR_ZERO
  815. bool "Catch NULL pointer reads/writes"
  816. default y
  817. help
  818. Say Y here to catch reads/writes to anywhere in the memory range
  819. from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
  820. catching common programming errors such as NULL pointer dereferences.
  821. Misbehaving applications will be killed (generate a SEGV) while the
  822. kernel will trigger a panic.
  823. Enabling this option will take up an extra entry in CPLB table.
  824. Otherwise, there is no extra overhead.
  825. config DEBUG_BFIN_NO_KERN_HWTRACE
  826. bool "Trace user apps (turn off hwtrace in kernel)"
  827. default n
  828. help
  829. Some pieces of the kernel contain a lot of flow changes which can
  830. quickly fill up the hardware trace buffer. When debugging crashes,
  831. the hardware trace may indicate that the problem lies in kernel
  832. space when in reality an application is buggy.
  833. Say Y here to disable hardware tracing in some known "jumpy" pieces
  834. of code so that the trace buffer will extend further back.
  835. config DUAL_CORE_TEST_MODULE
  836. tristate "Dual Core Test Module"
  837. depends on (BF561)
  838. default n
  839. help
  840. Say Y here to build-in dual core test module for dual core test.
  841. config CPLB_INFO
  842. bool "Display the CPLB information"
  843. help
  844. Display the CPLB information.
  845. config ACCESS_CHECK
  846. bool "Check the user pointer address"
  847. default y
  848. help
  849. Usually the pointer transfer from user space is checked to see if its
  850. address is in the kernel space.
  851. Say N here to disable that check to improve the performance.
  852. endmenu
  853. source "security/Kconfig"
  854. source "crypto/Kconfig"
  855. source "lib/Kconfig"