e1000_main.c 123 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.0.58 4/20/05
  23. * o Accepted ethtool cleanup patch from Stephen Hemminger
  24. * 6.0.44+ 2/15/05
  25. * o applied Anton's patch to resolve tx hang in hardware
  26. * o Applied Andrew Mortons patch - e1000 stops working after resume
  27. */
  28. char e1000_driver_name[] = "e1000";
  29. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  30. #ifndef CONFIG_E1000_NAPI
  31. #define DRIVERNAPI
  32. #else
  33. #define DRIVERNAPI "-NAPI"
  34. #endif
  35. #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
  36. char e1000_driver_version[] = DRV_VERSION;
  37. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  38. /* e1000_pci_tbl - PCI Device ID Table
  39. *
  40. * Last entry must be all 0s
  41. *
  42. * Macro expands to...
  43. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  44. */
  45. static struct pci_device_id e1000_pci_tbl[] = {
  46. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  47. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  51. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  52. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  53. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  54. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  60. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  65. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  67. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  71. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  72. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  78. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  83. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  84. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  87. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  88. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  89. /* required last entry */
  90. {0,}
  91. };
  92. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  93. int e1000_up(struct e1000_adapter *adapter);
  94. void e1000_down(struct e1000_adapter *adapter);
  95. void e1000_reset(struct e1000_adapter *adapter);
  96. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  97. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  98. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  99. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  100. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  101. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  102. struct e1000_tx_ring *txdr);
  103. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  104. struct e1000_rx_ring *rxdr);
  105. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  106. struct e1000_tx_ring *tx_ring);
  107. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  108. struct e1000_rx_ring *rx_ring);
  109. void e1000_update_stats(struct e1000_adapter *adapter);
  110. /* Local Function Prototypes */
  111. static int e1000_init_module(void);
  112. static void e1000_exit_module(void);
  113. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  114. static void __devexit e1000_remove(struct pci_dev *pdev);
  115. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  116. #ifdef CONFIG_E1000_MQ
  117. static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
  118. #endif
  119. static int e1000_sw_init(struct e1000_adapter *adapter);
  120. static int e1000_open(struct net_device *netdev);
  121. static int e1000_close(struct net_device *netdev);
  122. static void e1000_configure_tx(struct e1000_adapter *adapter);
  123. static void e1000_configure_rx(struct e1000_adapter *adapter);
  124. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  125. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  126. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  127. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  128. struct e1000_tx_ring *tx_ring);
  129. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  130. struct e1000_rx_ring *rx_ring);
  131. static void e1000_set_multi(struct net_device *netdev);
  132. static void e1000_update_phy_info(unsigned long data);
  133. static void e1000_watchdog(unsigned long data);
  134. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  135. static void e1000_82547_tx_fifo_stall(unsigned long data);
  136. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  137. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  138. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  139. static int e1000_set_mac(struct net_device *netdev, void *p);
  140. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  141. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  142. struct e1000_tx_ring *tx_ring);
  143. #ifdef CONFIG_E1000_NAPI
  144. static int e1000_clean(struct net_device *poll_dev, int *budget);
  145. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  146. struct e1000_rx_ring *rx_ring,
  147. int *work_done, int work_to_do);
  148. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  149. struct e1000_rx_ring *rx_ring,
  150. int *work_done, int work_to_do);
  151. #else
  152. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  153. struct e1000_rx_ring *rx_ring);
  154. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  155. struct e1000_rx_ring *rx_ring);
  156. #endif
  157. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  158. struct e1000_rx_ring *rx_ring);
  159. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  160. struct e1000_rx_ring *rx_ring);
  161. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  162. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  163. int cmd);
  164. void e1000_set_ethtool_ops(struct net_device *netdev);
  165. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  166. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  167. static void e1000_tx_timeout(struct net_device *dev);
  168. static void e1000_tx_timeout_task(struct net_device *dev);
  169. static void e1000_smartspeed(struct e1000_adapter *adapter);
  170. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  171. struct sk_buff *skb);
  172. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  173. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  174. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  175. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  176. #ifdef CONFIG_PM
  177. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  178. static int e1000_resume(struct pci_dev *pdev);
  179. #endif
  180. #ifdef CONFIG_NET_POLL_CONTROLLER
  181. /* for netdump / net console */
  182. static void e1000_netpoll (struct net_device *netdev);
  183. #endif
  184. #ifdef CONFIG_E1000_MQ
  185. /* for multiple Rx queues */
  186. void e1000_rx_schedule(void *data);
  187. #endif
  188. /* Exported from other modules */
  189. extern void e1000_check_options(struct e1000_adapter *adapter);
  190. static struct pci_driver e1000_driver = {
  191. .name = e1000_driver_name,
  192. .id_table = e1000_pci_tbl,
  193. .probe = e1000_probe,
  194. .remove = __devexit_p(e1000_remove),
  195. /* Power Managment Hooks */
  196. #ifdef CONFIG_PM
  197. .suspend = e1000_suspend,
  198. .resume = e1000_resume
  199. #endif
  200. };
  201. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  202. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  203. MODULE_LICENSE("GPL");
  204. MODULE_VERSION(DRV_VERSION);
  205. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  206. module_param(debug, int, 0);
  207. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  208. /**
  209. * e1000_init_module - Driver Registration Routine
  210. *
  211. * e1000_init_module is the first routine called when the driver is
  212. * loaded. All it does is register with the PCI subsystem.
  213. **/
  214. static int __init
  215. e1000_init_module(void)
  216. {
  217. int ret;
  218. printk(KERN_INFO "%s - version %s\n",
  219. e1000_driver_string, e1000_driver_version);
  220. printk(KERN_INFO "%s\n", e1000_copyright);
  221. ret = pci_module_init(&e1000_driver);
  222. return ret;
  223. }
  224. module_init(e1000_init_module);
  225. /**
  226. * e1000_exit_module - Driver Exit Cleanup Routine
  227. *
  228. * e1000_exit_module is called just before the driver is removed
  229. * from memory.
  230. **/
  231. static void __exit
  232. e1000_exit_module(void)
  233. {
  234. pci_unregister_driver(&e1000_driver);
  235. }
  236. module_exit(e1000_exit_module);
  237. /**
  238. * e1000_irq_disable - Mask off interrupt generation on the NIC
  239. * @adapter: board private structure
  240. **/
  241. static inline void
  242. e1000_irq_disable(struct e1000_adapter *adapter)
  243. {
  244. atomic_inc(&adapter->irq_sem);
  245. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  246. E1000_WRITE_FLUSH(&adapter->hw);
  247. synchronize_irq(adapter->pdev->irq);
  248. }
  249. /**
  250. * e1000_irq_enable - Enable default interrupt generation settings
  251. * @adapter: board private structure
  252. **/
  253. static inline void
  254. e1000_irq_enable(struct e1000_adapter *adapter)
  255. {
  256. if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
  257. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  258. E1000_WRITE_FLUSH(&adapter->hw);
  259. }
  260. }
  261. static void
  262. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  263. {
  264. struct net_device *netdev = adapter->netdev;
  265. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  266. uint16_t old_vid = adapter->mng_vlan_id;
  267. if(adapter->vlgrp) {
  268. if(!adapter->vlgrp->vlan_devices[vid]) {
  269. if(adapter->hw.mng_cookie.status &
  270. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  271. e1000_vlan_rx_add_vid(netdev, vid);
  272. adapter->mng_vlan_id = vid;
  273. } else
  274. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  275. if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  276. (vid != old_vid) &&
  277. !adapter->vlgrp->vlan_devices[old_vid])
  278. e1000_vlan_rx_kill_vid(netdev, old_vid);
  279. }
  280. }
  281. }
  282. /**
  283. * e1000_release_hw_control - release control of the h/w to f/w
  284. * @adapter: address of board private structure
  285. *
  286. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  287. * For ASF and Pass Through versions of f/w this means that the
  288. * driver is no longer loaded. For AMT version (only with 82573) i
  289. * of the f/w this means that the netowrk i/f is closed.
  290. *
  291. **/
  292. static inline void
  293. e1000_release_hw_control(struct e1000_adapter *adapter)
  294. {
  295. uint32_t ctrl_ext;
  296. uint32_t swsm;
  297. /* Let firmware taken over control of h/w */
  298. switch (adapter->hw.mac_type) {
  299. case e1000_82571:
  300. case e1000_82572:
  301. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  302. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  303. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  304. break;
  305. case e1000_82573:
  306. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  307. E1000_WRITE_REG(&adapter->hw, SWSM,
  308. swsm & ~E1000_SWSM_DRV_LOAD);
  309. default:
  310. break;
  311. }
  312. }
  313. /**
  314. * e1000_get_hw_control - get control of the h/w from f/w
  315. * @adapter: address of board private structure
  316. *
  317. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  318. * For ASF and Pass Through versions of f/w this means that
  319. * the driver is loaded. For AMT version (only with 82573)
  320. * of the f/w this means that the netowrk i/f is open.
  321. *
  322. **/
  323. static inline void
  324. e1000_get_hw_control(struct e1000_adapter *adapter)
  325. {
  326. uint32_t ctrl_ext;
  327. uint32_t swsm;
  328. /* Let firmware know the driver has taken over */
  329. switch (adapter->hw.mac_type) {
  330. case e1000_82571:
  331. case e1000_82572:
  332. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  333. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  334. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  335. break;
  336. case e1000_82573:
  337. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  338. E1000_WRITE_REG(&adapter->hw, SWSM,
  339. swsm | E1000_SWSM_DRV_LOAD);
  340. break;
  341. default:
  342. break;
  343. }
  344. }
  345. int
  346. e1000_up(struct e1000_adapter *adapter)
  347. {
  348. struct net_device *netdev = adapter->netdev;
  349. int i, err;
  350. /* hardware has been reset, we need to reload some things */
  351. /* Reset the PHY if it was previously powered down */
  352. if(adapter->hw.media_type == e1000_media_type_copper) {
  353. uint16_t mii_reg;
  354. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  355. if(mii_reg & MII_CR_POWER_DOWN)
  356. e1000_phy_reset(&adapter->hw);
  357. }
  358. e1000_set_multi(netdev);
  359. e1000_restore_vlan(adapter);
  360. e1000_configure_tx(adapter);
  361. e1000_setup_rctl(adapter);
  362. e1000_configure_rx(adapter);
  363. for (i = 0; i < adapter->num_rx_queues; i++) {
  364. adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
  365. }
  366. #ifdef CONFIG_PCI_MSI
  367. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  368. adapter->have_msi = TRUE;
  369. if((err = pci_enable_msi(adapter->pdev))) {
  370. DPRINTK(PROBE, ERR,
  371. "Unable to allocate MSI interrupt Error: %d\n", err);
  372. adapter->have_msi = FALSE;
  373. }
  374. }
  375. #endif
  376. if((err = request_irq(adapter->pdev->irq, &e1000_intr,
  377. SA_SHIRQ | SA_SAMPLE_RANDOM,
  378. netdev->name, netdev))) {
  379. DPRINTK(PROBE, ERR,
  380. "Unable to allocate interrupt Error: %d\n", err);
  381. return err;
  382. }
  383. #ifdef CONFIG_E1000_MQ
  384. e1000_setup_queue_mapping(adapter);
  385. #endif
  386. adapter->tx_queue_len = netdev->tx_queue_len;
  387. mod_timer(&adapter->watchdog_timer, jiffies);
  388. #ifdef CONFIG_E1000_NAPI
  389. netif_poll_enable(netdev);
  390. #endif
  391. e1000_irq_enable(adapter);
  392. return 0;
  393. }
  394. void
  395. e1000_down(struct e1000_adapter *adapter)
  396. {
  397. struct net_device *netdev = adapter->netdev;
  398. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  399. e1000_check_mng_mode(&adapter->hw);
  400. e1000_irq_disable(adapter);
  401. #ifdef CONFIG_E1000_MQ
  402. while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
  403. #endif
  404. free_irq(adapter->pdev->irq, netdev);
  405. #ifdef CONFIG_PCI_MSI
  406. if(adapter->hw.mac_type > e1000_82547_rev_2 &&
  407. adapter->have_msi == TRUE)
  408. pci_disable_msi(adapter->pdev);
  409. #endif
  410. del_timer_sync(&adapter->tx_fifo_stall_timer);
  411. del_timer_sync(&adapter->watchdog_timer);
  412. del_timer_sync(&adapter->phy_info_timer);
  413. #ifdef CONFIG_E1000_NAPI
  414. netif_poll_disable(netdev);
  415. #endif
  416. netdev->tx_queue_len = adapter->tx_queue_len;
  417. adapter->link_speed = 0;
  418. adapter->link_duplex = 0;
  419. netif_carrier_off(netdev);
  420. netif_stop_queue(netdev);
  421. e1000_reset(adapter);
  422. e1000_clean_all_tx_rings(adapter);
  423. e1000_clean_all_rx_rings(adapter);
  424. /* Power down the PHY so no link is implied when interface is down *
  425. * The PHY cannot be powered down if any of the following is TRUE *
  426. * (a) WoL is enabled
  427. * (b) AMT is active
  428. * (c) SoL/IDER session is active */
  429. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  430. adapter->hw.media_type == e1000_media_type_copper &&
  431. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  432. !mng_mode_enabled &&
  433. !e1000_check_phy_reset_block(&adapter->hw)) {
  434. uint16_t mii_reg;
  435. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  436. mii_reg |= MII_CR_POWER_DOWN;
  437. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  438. mdelay(1);
  439. }
  440. }
  441. void
  442. e1000_reset(struct e1000_adapter *adapter)
  443. {
  444. uint32_t pba, manc;
  445. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  446. /* Repartition Pba for greater than 9k mtu
  447. * To take effect CTRL.RST is required.
  448. */
  449. switch (adapter->hw.mac_type) {
  450. case e1000_82547:
  451. case e1000_82547_rev_2:
  452. pba = E1000_PBA_30K;
  453. break;
  454. case e1000_82571:
  455. case e1000_82572:
  456. pba = E1000_PBA_38K;
  457. break;
  458. case e1000_82573:
  459. pba = E1000_PBA_12K;
  460. break;
  461. default:
  462. pba = E1000_PBA_48K;
  463. break;
  464. }
  465. if((adapter->hw.mac_type != e1000_82573) &&
  466. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  467. pba -= 8; /* allocate more FIFO for Tx */
  468. if(adapter->hw.mac_type == e1000_82547) {
  469. adapter->tx_fifo_head = 0;
  470. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  471. adapter->tx_fifo_size =
  472. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  473. atomic_set(&adapter->tx_fifo_stall, 0);
  474. }
  475. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  476. /* flow control settings */
  477. /* Set the FC high water mark to 90% of the FIFO size.
  478. * Required to clear last 3 LSB */
  479. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  480. adapter->hw.fc_high_water = fc_high_water_mark;
  481. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  482. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  483. adapter->hw.fc_send_xon = 1;
  484. adapter->hw.fc = adapter->hw.original_fc;
  485. /* Allow time for pending master requests to run */
  486. e1000_reset_hw(&adapter->hw);
  487. if(adapter->hw.mac_type >= e1000_82544)
  488. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  489. if(e1000_init_hw(&adapter->hw))
  490. DPRINTK(PROBE, ERR, "Hardware Error\n");
  491. e1000_update_mng_vlan(adapter);
  492. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  493. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  494. e1000_reset_adaptive(&adapter->hw);
  495. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  496. if (adapter->en_mng_pt) {
  497. manc = E1000_READ_REG(&adapter->hw, MANC);
  498. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  499. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  500. }
  501. }
  502. /**
  503. * e1000_probe - Device Initialization Routine
  504. * @pdev: PCI device information struct
  505. * @ent: entry in e1000_pci_tbl
  506. *
  507. * Returns 0 on success, negative on failure
  508. *
  509. * e1000_probe initializes an adapter identified by a pci_dev structure.
  510. * The OS initialization, configuring of the adapter private structure,
  511. * and a hardware reset occur.
  512. **/
  513. static int __devinit
  514. e1000_probe(struct pci_dev *pdev,
  515. const struct pci_device_id *ent)
  516. {
  517. struct net_device *netdev;
  518. struct e1000_adapter *adapter;
  519. unsigned long mmio_start, mmio_len;
  520. static int cards_found = 0;
  521. int i, err, pci_using_dac;
  522. uint16_t eeprom_data;
  523. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  524. if((err = pci_enable_device(pdev)))
  525. return err;
  526. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  527. pci_using_dac = 1;
  528. } else {
  529. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  530. E1000_ERR("No usable DMA configuration, aborting\n");
  531. return err;
  532. }
  533. pci_using_dac = 0;
  534. }
  535. if((err = pci_request_regions(pdev, e1000_driver_name)))
  536. return err;
  537. pci_set_master(pdev);
  538. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  539. if(!netdev) {
  540. err = -ENOMEM;
  541. goto err_alloc_etherdev;
  542. }
  543. SET_MODULE_OWNER(netdev);
  544. SET_NETDEV_DEV(netdev, &pdev->dev);
  545. pci_set_drvdata(pdev, netdev);
  546. adapter = netdev_priv(netdev);
  547. adapter->netdev = netdev;
  548. adapter->pdev = pdev;
  549. adapter->hw.back = adapter;
  550. adapter->msg_enable = (1 << debug) - 1;
  551. mmio_start = pci_resource_start(pdev, BAR_0);
  552. mmio_len = pci_resource_len(pdev, BAR_0);
  553. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  554. if(!adapter->hw.hw_addr) {
  555. err = -EIO;
  556. goto err_ioremap;
  557. }
  558. for(i = BAR_1; i <= BAR_5; i++) {
  559. if(pci_resource_len(pdev, i) == 0)
  560. continue;
  561. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  562. adapter->hw.io_base = pci_resource_start(pdev, i);
  563. break;
  564. }
  565. }
  566. netdev->open = &e1000_open;
  567. netdev->stop = &e1000_close;
  568. netdev->hard_start_xmit = &e1000_xmit_frame;
  569. netdev->get_stats = &e1000_get_stats;
  570. netdev->set_multicast_list = &e1000_set_multi;
  571. netdev->set_mac_address = &e1000_set_mac;
  572. netdev->change_mtu = &e1000_change_mtu;
  573. netdev->do_ioctl = &e1000_ioctl;
  574. e1000_set_ethtool_ops(netdev);
  575. netdev->tx_timeout = &e1000_tx_timeout;
  576. netdev->watchdog_timeo = 5 * HZ;
  577. #ifdef CONFIG_E1000_NAPI
  578. netdev->poll = &e1000_clean;
  579. netdev->weight = 64;
  580. #endif
  581. netdev->vlan_rx_register = e1000_vlan_rx_register;
  582. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  583. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  584. #ifdef CONFIG_NET_POLL_CONTROLLER
  585. netdev->poll_controller = e1000_netpoll;
  586. #endif
  587. strcpy(netdev->name, pci_name(pdev));
  588. netdev->mem_start = mmio_start;
  589. netdev->mem_end = mmio_start + mmio_len;
  590. netdev->base_addr = adapter->hw.io_base;
  591. adapter->bd_number = cards_found;
  592. /* setup the private structure */
  593. if((err = e1000_sw_init(adapter)))
  594. goto err_sw_init;
  595. if((err = e1000_check_phy_reset_block(&adapter->hw)))
  596. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  597. if(adapter->hw.mac_type >= e1000_82543) {
  598. netdev->features = NETIF_F_SG |
  599. NETIF_F_HW_CSUM |
  600. NETIF_F_HW_VLAN_TX |
  601. NETIF_F_HW_VLAN_RX |
  602. NETIF_F_HW_VLAN_FILTER;
  603. }
  604. #ifdef NETIF_F_TSO
  605. if((adapter->hw.mac_type >= e1000_82544) &&
  606. (adapter->hw.mac_type != e1000_82547))
  607. netdev->features |= NETIF_F_TSO;
  608. #ifdef NETIF_F_TSO_IPV6
  609. if(adapter->hw.mac_type > e1000_82547_rev_2)
  610. netdev->features |= NETIF_F_TSO_IPV6;
  611. #endif
  612. #endif
  613. if(pci_using_dac)
  614. netdev->features |= NETIF_F_HIGHDMA;
  615. /* hard_start_xmit is safe against parallel locking */
  616. netdev->features |= NETIF_F_LLTX;
  617. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  618. /* before reading the EEPROM, reset the controller to
  619. * put the device in a known good starting state */
  620. e1000_reset_hw(&adapter->hw);
  621. /* make sure the EEPROM is good */
  622. if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  623. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  624. err = -EIO;
  625. goto err_eeprom;
  626. }
  627. /* copy the MAC address out of the EEPROM */
  628. if(e1000_read_mac_addr(&adapter->hw))
  629. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  630. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  631. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  632. if(!is_valid_ether_addr(netdev->perm_addr)) {
  633. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  634. err = -EIO;
  635. goto err_eeprom;
  636. }
  637. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  638. e1000_get_bus_info(&adapter->hw);
  639. init_timer(&adapter->tx_fifo_stall_timer);
  640. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  641. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  642. init_timer(&adapter->watchdog_timer);
  643. adapter->watchdog_timer.function = &e1000_watchdog;
  644. adapter->watchdog_timer.data = (unsigned long) adapter;
  645. INIT_WORK(&adapter->watchdog_task,
  646. (void (*)(void *))e1000_watchdog_task, adapter);
  647. init_timer(&adapter->phy_info_timer);
  648. adapter->phy_info_timer.function = &e1000_update_phy_info;
  649. adapter->phy_info_timer.data = (unsigned long) adapter;
  650. INIT_WORK(&adapter->tx_timeout_task,
  651. (void (*)(void *))e1000_tx_timeout_task, netdev);
  652. /* we're going to reset, so assume we have no link for now */
  653. netif_carrier_off(netdev);
  654. netif_stop_queue(netdev);
  655. e1000_check_options(adapter);
  656. /* Initial Wake on LAN setting
  657. * If APM wake is enabled in the EEPROM,
  658. * enable the ACPI Magic Packet filter
  659. */
  660. switch(adapter->hw.mac_type) {
  661. case e1000_82542_rev2_0:
  662. case e1000_82542_rev2_1:
  663. case e1000_82543:
  664. break;
  665. case e1000_82544:
  666. e1000_read_eeprom(&adapter->hw,
  667. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  668. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  669. break;
  670. case e1000_82546:
  671. case e1000_82546_rev_3:
  672. case e1000_82571:
  673. if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  674. && (adapter->hw.media_type == e1000_media_type_copper)) {
  675. e1000_read_eeprom(&adapter->hw,
  676. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  677. break;
  678. }
  679. /* Fall Through */
  680. default:
  681. e1000_read_eeprom(&adapter->hw,
  682. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  683. break;
  684. }
  685. if(eeprom_data & eeprom_apme_mask)
  686. adapter->wol |= E1000_WUFC_MAG;
  687. /* reset the hardware with the new settings */
  688. e1000_reset(adapter);
  689. /* If the controller is 82573 and f/w is AMT, do not set
  690. * DRV_LOAD until the interface is up. For all other cases,
  691. * let the f/w know that the h/w is now under the control
  692. * of the driver. */
  693. if (adapter->hw.mac_type != e1000_82573 ||
  694. !e1000_check_mng_mode(&adapter->hw))
  695. e1000_get_hw_control(adapter);
  696. strcpy(netdev->name, "eth%d");
  697. if((err = register_netdev(netdev)))
  698. goto err_register;
  699. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  700. cards_found++;
  701. return 0;
  702. err_register:
  703. err_sw_init:
  704. err_eeprom:
  705. iounmap(adapter->hw.hw_addr);
  706. err_ioremap:
  707. free_netdev(netdev);
  708. err_alloc_etherdev:
  709. pci_release_regions(pdev);
  710. return err;
  711. }
  712. /**
  713. * e1000_remove - Device Removal Routine
  714. * @pdev: PCI device information struct
  715. *
  716. * e1000_remove is called by the PCI subsystem to alert the driver
  717. * that it should release a PCI device. The could be caused by a
  718. * Hot-Plug event, or because the driver is going to be removed from
  719. * memory.
  720. **/
  721. static void __devexit
  722. e1000_remove(struct pci_dev *pdev)
  723. {
  724. struct net_device *netdev = pci_get_drvdata(pdev);
  725. struct e1000_adapter *adapter = netdev_priv(netdev);
  726. uint32_t manc;
  727. #ifdef CONFIG_E1000_NAPI
  728. int i;
  729. #endif
  730. flush_scheduled_work();
  731. if(adapter->hw.mac_type >= e1000_82540 &&
  732. adapter->hw.media_type == e1000_media_type_copper) {
  733. manc = E1000_READ_REG(&adapter->hw, MANC);
  734. if(manc & E1000_MANC_SMBUS_EN) {
  735. manc |= E1000_MANC_ARP_EN;
  736. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  737. }
  738. }
  739. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  740. * would have already happened in close and is redundant. */
  741. e1000_release_hw_control(adapter);
  742. unregister_netdev(netdev);
  743. #ifdef CONFIG_E1000_NAPI
  744. for (i = 0; i < adapter->num_rx_queues; i++)
  745. __dev_put(&adapter->polling_netdev[i]);
  746. #endif
  747. if(!e1000_check_phy_reset_block(&adapter->hw))
  748. e1000_phy_hw_reset(&adapter->hw);
  749. kfree(adapter->tx_ring);
  750. kfree(adapter->rx_ring);
  751. #ifdef CONFIG_E1000_NAPI
  752. kfree(adapter->polling_netdev);
  753. #endif
  754. iounmap(adapter->hw.hw_addr);
  755. pci_release_regions(pdev);
  756. #ifdef CONFIG_E1000_MQ
  757. free_percpu(adapter->cpu_netdev);
  758. free_percpu(adapter->cpu_tx_ring);
  759. #endif
  760. free_netdev(netdev);
  761. pci_disable_device(pdev);
  762. }
  763. /**
  764. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  765. * @adapter: board private structure to initialize
  766. *
  767. * e1000_sw_init initializes the Adapter private data structure.
  768. * Fields are initialized based on PCI device information and
  769. * OS network device settings (MTU size).
  770. **/
  771. static int __devinit
  772. e1000_sw_init(struct e1000_adapter *adapter)
  773. {
  774. struct e1000_hw *hw = &adapter->hw;
  775. struct net_device *netdev = adapter->netdev;
  776. struct pci_dev *pdev = adapter->pdev;
  777. #ifdef CONFIG_E1000_NAPI
  778. int i;
  779. #endif
  780. /* PCI config space info */
  781. hw->vendor_id = pdev->vendor;
  782. hw->device_id = pdev->device;
  783. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  784. hw->subsystem_id = pdev->subsystem_device;
  785. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  786. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  787. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  788. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  789. hw->max_frame_size = netdev->mtu +
  790. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  791. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  792. /* identify the MAC */
  793. if(e1000_set_mac_type(hw)) {
  794. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  795. return -EIO;
  796. }
  797. /* initialize eeprom parameters */
  798. if(e1000_init_eeprom_params(hw)) {
  799. E1000_ERR("EEPROM initialization failed\n");
  800. return -EIO;
  801. }
  802. switch(hw->mac_type) {
  803. default:
  804. break;
  805. case e1000_82541:
  806. case e1000_82547:
  807. case e1000_82541_rev_2:
  808. case e1000_82547_rev_2:
  809. hw->phy_init_script = 1;
  810. break;
  811. }
  812. e1000_set_media_type(hw);
  813. hw->wait_autoneg_complete = FALSE;
  814. hw->tbi_compatibility_en = TRUE;
  815. hw->adaptive_ifs = TRUE;
  816. /* Copper options */
  817. if(hw->media_type == e1000_media_type_copper) {
  818. hw->mdix = AUTO_ALL_MODES;
  819. hw->disable_polarity_correction = FALSE;
  820. hw->master_slave = E1000_MASTER_SLAVE;
  821. }
  822. #ifdef CONFIG_E1000_MQ
  823. /* Number of supported queues */
  824. switch (hw->mac_type) {
  825. case e1000_82571:
  826. case e1000_82572:
  827. /* These controllers support 2 tx queues, but with a single
  828. * qdisc implementation, multiple tx queues aren't quite as
  829. * interesting. If we can find a logical way of mapping
  830. * flows to a queue, then perhaps we can up the num_tx_queue
  831. * count back to its default. Until then, we run the risk of
  832. * terrible performance due to SACK overload. */
  833. adapter->num_tx_queues = 1;
  834. adapter->num_rx_queues = 2;
  835. break;
  836. default:
  837. adapter->num_tx_queues = 1;
  838. adapter->num_rx_queues = 1;
  839. break;
  840. }
  841. adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
  842. adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
  843. DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
  844. adapter->num_rx_queues,
  845. ((adapter->num_rx_queues == 1)
  846. ? ((num_online_cpus() > 1)
  847. ? "(due to unsupported feature in current adapter)"
  848. : "(due to unsupported system configuration)")
  849. : ""));
  850. DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
  851. adapter->num_tx_queues);
  852. #else
  853. adapter->num_tx_queues = 1;
  854. adapter->num_rx_queues = 1;
  855. #endif
  856. if (e1000_alloc_queues(adapter)) {
  857. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  858. return -ENOMEM;
  859. }
  860. #ifdef CONFIG_E1000_NAPI
  861. for (i = 0; i < adapter->num_rx_queues; i++) {
  862. adapter->polling_netdev[i].priv = adapter;
  863. adapter->polling_netdev[i].poll = &e1000_clean;
  864. adapter->polling_netdev[i].weight = 64;
  865. dev_hold(&adapter->polling_netdev[i]);
  866. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  867. }
  868. spin_lock_init(&adapter->tx_queue_lock);
  869. #endif
  870. atomic_set(&adapter->irq_sem, 1);
  871. spin_lock_init(&adapter->stats_lock);
  872. return 0;
  873. }
  874. /**
  875. * e1000_alloc_queues - Allocate memory for all rings
  876. * @adapter: board private structure to initialize
  877. *
  878. * We allocate one ring per queue at run-time since we don't know the
  879. * number of queues at compile-time. The polling_netdev array is
  880. * intended for Multiqueue, but should work fine with a single queue.
  881. **/
  882. static int __devinit
  883. e1000_alloc_queues(struct e1000_adapter *adapter)
  884. {
  885. int size;
  886. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  887. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  888. if (!adapter->tx_ring)
  889. return -ENOMEM;
  890. memset(adapter->tx_ring, 0, size);
  891. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  892. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  893. if (!adapter->rx_ring) {
  894. kfree(adapter->tx_ring);
  895. return -ENOMEM;
  896. }
  897. memset(adapter->rx_ring, 0, size);
  898. #ifdef CONFIG_E1000_NAPI
  899. size = sizeof(struct net_device) * adapter->num_rx_queues;
  900. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  901. if (!adapter->polling_netdev) {
  902. kfree(adapter->tx_ring);
  903. kfree(adapter->rx_ring);
  904. return -ENOMEM;
  905. }
  906. memset(adapter->polling_netdev, 0, size);
  907. #endif
  908. #ifdef CONFIG_E1000_MQ
  909. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  910. adapter->rx_sched_call_data.info = adapter->netdev;
  911. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  912. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  913. #endif
  914. return E1000_SUCCESS;
  915. }
  916. #ifdef CONFIG_E1000_MQ
  917. static void __devinit
  918. e1000_setup_queue_mapping(struct e1000_adapter *adapter)
  919. {
  920. int i, cpu;
  921. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  922. adapter->rx_sched_call_data.info = adapter->netdev;
  923. cpus_clear(adapter->rx_sched_call_data.cpumask);
  924. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  925. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  926. lock_cpu_hotplug();
  927. i = 0;
  928. for_each_online_cpu(cpu) {
  929. *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
  930. /* This is incomplete because we'd like to assign separate
  931. * physical cpus to these netdev polling structures and
  932. * avoid saturating a subset of cpus.
  933. */
  934. if (i < adapter->num_rx_queues) {
  935. *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
  936. adapter->rx_ring[i].cpu = cpu;
  937. cpu_set(cpu, adapter->cpumask);
  938. } else
  939. *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
  940. i++;
  941. }
  942. unlock_cpu_hotplug();
  943. }
  944. #endif
  945. /**
  946. * e1000_open - Called when a network interface is made active
  947. * @netdev: network interface device structure
  948. *
  949. * Returns 0 on success, negative value on failure
  950. *
  951. * The open entry point is called when a network interface is made
  952. * active by the system (IFF_UP). At this point all resources needed
  953. * for transmit and receive operations are allocated, the interrupt
  954. * handler is registered with the OS, the watchdog timer is started,
  955. * and the stack is notified that the interface is ready.
  956. **/
  957. static int
  958. e1000_open(struct net_device *netdev)
  959. {
  960. struct e1000_adapter *adapter = netdev_priv(netdev);
  961. int err;
  962. /* allocate transmit descriptors */
  963. if ((err = e1000_setup_all_tx_resources(adapter)))
  964. goto err_setup_tx;
  965. /* allocate receive descriptors */
  966. if ((err = e1000_setup_all_rx_resources(adapter)))
  967. goto err_setup_rx;
  968. if((err = e1000_up(adapter)))
  969. goto err_up;
  970. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  971. if((adapter->hw.mng_cookie.status &
  972. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  973. e1000_update_mng_vlan(adapter);
  974. }
  975. /* If AMT is enabled, let the firmware know that the network
  976. * interface is now open */
  977. if (adapter->hw.mac_type == e1000_82573 &&
  978. e1000_check_mng_mode(&adapter->hw))
  979. e1000_get_hw_control(adapter);
  980. return E1000_SUCCESS;
  981. err_up:
  982. e1000_free_all_rx_resources(adapter);
  983. err_setup_rx:
  984. e1000_free_all_tx_resources(adapter);
  985. err_setup_tx:
  986. e1000_reset(adapter);
  987. return err;
  988. }
  989. /**
  990. * e1000_close - Disables a network interface
  991. * @netdev: network interface device structure
  992. *
  993. * Returns 0, this is not allowed to fail
  994. *
  995. * The close entry point is called when an interface is de-activated
  996. * by the OS. The hardware is still under the drivers control, but
  997. * needs to be disabled. A global MAC reset is issued to stop the
  998. * hardware, and all transmit and receive resources are freed.
  999. **/
  1000. static int
  1001. e1000_close(struct net_device *netdev)
  1002. {
  1003. struct e1000_adapter *adapter = netdev_priv(netdev);
  1004. e1000_down(adapter);
  1005. e1000_free_all_tx_resources(adapter);
  1006. e1000_free_all_rx_resources(adapter);
  1007. if((adapter->hw.mng_cookie.status &
  1008. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1009. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1010. }
  1011. /* If AMT is enabled, let the firmware know that the network
  1012. * interface is now closed */
  1013. if (adapter->hw.mac_type == e1000_82573 &&
  1014. e1000_check_mng_mode(&adapter->hw))
  1015. e1000_release_hw_control(adapter);
  1016. return 0;
  1017. }
  1018. /**
  1019. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1020. * @adapter: address of board private structure
  1021. * @start: address of beginning of memory
  1022. * @len: length of memory
  1023. **/
  1024. static inline boolean_t
  1025. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1026. void *start, unsigned long len)
  1027. {
  1028. unsigned long begin = (unsigned long) start;
  1029. unsigned long end = begin + len;
  1030. /* First rev 82545 and 82546 need to not allow any memory
  1031. * write location to cross 64k boundary due to errata 23 */
  1032. if (adapter->hw.mac_type == e1000_82545 ||
  1033. adapter->hw.mac_type == e1000_82546) {
  1034. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1035. }
  1036. return TRUE;
  1037. }
  1038. /**
  1039. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1040. * @adapter: board private structure
  1041. * @txdr: tx descriptor ring (for a specific queue) to setup
  1042. *
  1043. * Return 0 on success, negative on failure
  1044. **/
  1045. static int
  1046. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1047. struct e1000_tx_ring *txdr)
  1048. {
  1049. struct pci_dev *pdev = adapter->pdev;
  1050. int size;
  1051. size = sizeof(struct e1000_buffer) * txdr->count;
  1052. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1053. if(!txdr->buffer_info) {
  1054. DPRINTK(PROBE, ERR,
  1055. "Unable to allocate memory for the transmit descriptor ring\n");
  1056. return -ENOMEM;
  1057. }
  1058. memset(txdr->buffer_info, 0, size);
  1059. /* round up to nearest 4K */
  1060. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1061. E1000_ROUNDUP(txdr->size, 4096);
  1062. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1063. if(!txdr->desc) {
  1064. setup_tx_desc_die:
  1065. vfree(txdr->buffer_info);
  1066. DPRINTK(PROBE, ERR,
  1067. "Unable to allocate memory for the transmit descriptor ring\n");
  1068. return -ENOMEM;
  1069. }
  1070. /* Fix for errata 23, can't cross 64kB boundary */
  1071. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1072. void *olddesc = txdr->desc;
  1073. dma_addr_t olddma = txdr->dma;
  1074. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1075. "at %p\n", txdr->size, txdr->desc);
  1076. /* Try again, without freeing the previous */
  1077. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1078. if(!txdr->desc) {
  1079. /* Failed allocation, critical failure */
  1080. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1081. goto setup_tx_desc_die;
  1082. }
  1083. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1084. /* give up */
  1085. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1086. txdr->dma);
  1087. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1088. DPRINTK(PROBE, ERR,
  1089. "Unable to allocate aligned memory "
  1090. "for the transmit descriptor ring\n");
  1091. vfree(txdr->buffer_info);
  1092. return -ENOMEM;
  1093. } else {
  1094. /* Free old allocation, new allocation was successful */
  1095. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1096. }
  1097. }
  1098. memset(txdr->desc, 0, txdr->size);
  1099. txdr->next_to_use = 0;
  1100. txdr->next_to_clean = 0;
  1101. spin_lock_init(&txdr->tx_lock);
  1102. return 0;
  1103. }
  1104. /**
  1105. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1106. * (Descriptors) for all queues
  1107. * @adapter: board private structure
  1108. *
  1109. * If this function returns with an error, then it's possible one or
  1110. * more of the rings is populated (while the rest are not). It is the
  1111. * callers duty to clean those orphaned rings.
  1112. *
  1113. * Return 0 on success, negative on failure
  1114. **/
  1115. int
  1116. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1117. {
  1118. int i, err = 0;
  1119. for (i = 0; i < adapter->num_tx_queues; i++) {
  1120. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1121. if (err) {
  1122. DPRINTK(PROBE, ERR,
  1123. "Allocation for Tx Queue %u failed\n", i);
  1124. break;
  1125. }
  1126. }
  1127. return err;
  1128. }
  1129. /**
  1130. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1131. * @adapter: board private structure
  1132. *
  1133. * Configure the Tx unit of the MAC after a reset.
  1134. **/
  1135. static void
  1136. e1000_configure_tx(struct e1000_adapter *adapter)
  1137. {
  1138. uint64_t tdba;
  1139. struct e1000_hw *hw = &adapter->hw;
  1140. uint32_t tdlen, tctl, tipg, tarc;
  1141. /* Setup the HW Tx Head and Tail descriptor pointers */
  1142. switch (adapter->num_tx_queues) {
  1143. case 2:
  1144. tdba = adapter->tx_ring[1].dma;
  1145. tdlen = adapter->tx_ring[1].count *
  1146. sizeof(struct e1000_tx_desc);
  1147. E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
  1148. E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
  1149. E1000_WRITE_REG(hw, TDLEN1, tdlen);
  1150. E1000_WRITE_REG(hw, TDH1, 0);
  1151. E1000_WRITE_REG(hw, TDT1, 0);
  1152. adapter->tx_ring[1].tdh = E1000_TDH1;
  1153. adapter->tx_ring[1].tdt = E1000_TDT1;
  1154. /* Fall Through */
  1155. case 1:
  1156. default:
  1157. tdba = adapter->tx_ring[0].dma;
  1158. tdlen = adapter->tx_ring[0].count *
  1159. sizeof(struct e1000_tx_desc);
  1160. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1161. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1162. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1163. E1000_WRITE_REG(hw, TDH, 0);
  1164. E1000_WRITE_REG(hw, TDT, 0);
  1165. adapter->tx_ring[0].tdh = E1000_TDH;
  1166. adapter->tx_ring[0].tdt = E1000_TDT;
  1167. break;
  1168. }
  1169. /* Set the default values for the Tx Inter Packet Gap timer */
  1170. switch (hw->mac_type) {
  1171. case e1000_82542_rev2_0:
  1172. case e1000_82542_rev2_1:
  1173. tipg = DEFAULT_82542_TIPG_IPGT;
  1174. tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  1175. tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  1176. break;
  1177. default:
  1178. if (hw->media_type == e1000_media_type_fiber ||
  1179. hw->media_type == e1000_media_type_internal_serdes)
  1180. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1181. else
  1182. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1183. tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  1184. tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  1185. }
  1186. E1000_WRITE_REG(hw, TIPG, tipg);
  1187. /* Set the Tx Interrupt Delay register */
  1188. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1189. if (hw->mac_type >= e1000_82540)
  1190. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1191. /* Program the Transmit Control Register */
  1192. tctl = E1000_READ_REG(hw, TCTL);
  1193. tctl &= ~E1000_TCTL_CT;
  1194. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1195. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1196. E1000_WRITE_REG(hw, TCTL, tctl);
  1197. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1198. tarc = E1000_READ_REG(hw, TARC0);
  1199. tarc |= ((1 << 25) | (1 << 21));
  1200. E1000_WRITE_REG(hw, TARC0, tarc);
  1201. tarc = E1000_READ_REG(hw, TARC1);
  1202. tarc |= (1 << 25);
  1203. if (tctl & E1000_TCTL_MULR)
  1204. tarc &= ~(1 << 28);
  1205. else
  1206. tarc |= (1 << 28);
  1207. E1000_WRITE_REG(hw, TARC1, tarc);
  1208. }
  1209. e1000_config_collision_dist(hw);
  1210. /* Setup Transmit Descriptor Settings for eop descriptor */
  1211. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1212. E1000_TXD_CMD_IFCS;
  1213. if (hw->mac_type < e1000_82543)
  1214. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1215. else
  1216. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1217. /* Cache if we're 82544 running in PCI-X because we'll
  1218. * need this to apply a workaround later in the send path. */
  1219. if (hw->mac_type == e1000_82544 &&
  1220. hw->bus_type == e1000_bus_type_pcix)
  1221. adapter->pcix_82544 = 1;
  1222. }
  1223. /**
  1224. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1225. * @adapter: board private structure
  1226. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1227. *
  1228. * Returns 0 on success, negative on failure
  1229. **/
  1230. static int
  1231. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1232. struct e1000_rx_ring *rxdr)
  1233. {
  1234. struct pci_dev *pdev = adapter->pdev;
  1235. int size, desc_len;
  1236. size = sizeof(struct e1000_buffer) * rxdr->count;
  1237. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1238. if (!rxdr->buffer_info) {
  1239. DPRINTK(PROBE, ERR,
  1240. "Unable to allocate memory for the receive descriptor ring\n");
  1241. return -ENOMEM;
  1242. }
  1243. memset(rxdr->buffer_info, 0, size);
  1244. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1245. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1246. if(!rxdr->ps_page) {
  1247. vfree(rxdr->buffer_info);
  1248. DPRINTK(PROBE, ERR,
  1249. "Unable to allocate memory for the receive descriptor ring\n");
  1250. return -ENOMEM;
  1251. }
  1252. memset(rxdr->ps_page, 0, size);
  1253. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1254. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1255. if(!rxdr->ps_page_dma) {
  1256. vfree(rxdr->buffer_info);
  1257. kfree(rxdr->ps_page);
  1258. DPRINTK(PROBE, ERR,
  1259. "Unable to allocate memory for the receive descriptor ring\n");
  1260. return -ENOMEM;
  1261. }
  1262. memset(rxdr->ps_page_dma, 0, size);
  1263. if(adapter->hw.mac_type <= e1000_82547_rev_2)
  1264. desc_len = sizeof(struct e1000_rx_desc);
  1265. else
  1266. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1267. /* Round up to nearest 4K */
  1268. rxdr->size = rxdr->count * desc_len;
  1269. E1000_ROUNDUP(rxdr->size, 4096);
  1270. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1271. if (!rxdr->desc) {
  1272. DPRINTK(PROBE, ERR,
  1273. "Unable to allocate memory for the receive descriptor ring\n");
  1274. setup_rx_desc_die:
  1275. vfree(rxdr->buffer_info);
  1276. kfree(rxdr->ps_page);
  1277. kfree(rxdr->ps_page_dma);
  1278. return -ENOMEM;
  1279. }
  1280. /* Fix for errata 23, can't cross 64kB boundary */
  1281. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1282. void *olddesc = rxdr->desc;
  1283. dma_addr_t olddma = rxdr->dma;
  1284. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1285. "at %p\n", rxdr->size, rxdr->desc);
  1286. /* Try again, without freeing the previous */
  1287. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1288. /* Failed allocation, critical failure */
  1289. if (!rxdr->desc) {
  1290. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1291. DPRINTK(PROBE, ERR,
  1292. "Unable to allocate memory "
  1293. "for the receive descriptor ring\n");
  1294. goto setup_rx_desc_die;
  1295. }
  1296. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1297. /* give up */
  1298. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1299. rxdr->dma);
  1300. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1301. DPRINTK(PROBE, ERR,
  1302. "Unable to allocate aligned memory "
  1303. "for the receive descriptor ring\n");
  1304. goto setup_rx_desc_die;
  1305. } else {
  1306. /* Free old allocation, new allocation was successful */
  1307. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1308. }
  1309. }
  1310. memset(rxdr->desc, 0, rxdr->size);
  1311. rxdr->next_to_clean = 0;
  1312. rxdr->next_to_use = 0;
  1313. return 0;
  1314. }
  1315. /**
  1316. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1317. * (Descriptors) for all queues
  1318. * @adapter: board private structure
  1319. *
  1320. * If this function returns with an error, then it's possible one or
  1321. * more of the rings is populated (while the rest are not). It is the
  1322. * callers duty to clean those orphaned rings.
  1323. *
  1324. * Return 0 on success, negative on failure
  1325. **/
  1326. int
  1327. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1328. {
  1329. int i, err = 0;
  1330. for (i = 0; i < adapter->num_rx_queues; i++) {
  1331. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1332. if (err) {
  1333. DPRINTK(PROBE, ERR,
  1334. "Allocation for Rx Queue %u failed\n", i);
  1335. break;
  1336. }
  1337. }
  1338. return err;
  1339. }
  1340. /**
  1341. * e1000_setup_rctl - configure the receive control registers
  1342. * @adapter: Board private structure
  1343. **/
  1344. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1345. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1346. static void
  1347. e1000_setup_rctl(struct e1000_adapter *adapter)
  1348. {
  1349. uint32_t rctl, rfctl;
  1350. uint32_t psrctl = 0;
  1351. #ifdef CONFIG_E1000_PACKET_SPLIT
  1352. uint32_t pages = 0;
  1353. #endif
  1354. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1355. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1356. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1357. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1358. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1359. if(adapter->hw.tbi_compatibility_on == 1)
  1360. rctl |= E1000_RCTL_SBP;
  1361. else
  1362. rctl &= ~E1000_RCTL_SBP;
  1363. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1364. rctl &= ~E1000_RCTL_LPE;
  1365. else
  1366. rctl |= E1000_RCTL_LPE;
  1367. /* Setup buffer sizes */
  1368. if(adapter->hw.mac_type >= e1000_82571) {
  1369. /* We can now specify buffers in 1K increments.
  1370. * BSIZE and BSEX are ignored in this case. */
  1371. rctl |= adapter->rx_buffer_len << 0x11;
  1372. } else {
  1373. rctl &= ~E1000_RCTL_SZ_4096;
  1374. rctl |= E1000_RCTL_BSEX;
  1375. switch (adapter->rx_buffer_len) {
  1376. case E1000_RXBUFFER_2048:
  1377. default:
  1378. rctl |= E1000_RCTL_SZ_2048;
  1379. rctl &= ~E1000_RCTL_BSEX;
  1380. break;
  1381. case E1000_RXBUFFER_4096:
  1382. rctl |= E1000_RCTL_SZ_4096;
  1383. break;
  1384. case E1000_RXBUFFER_8192:
  1385. rctl |= E1000_RCTL_SZ_8192;
  1386. break;
  1387. case E1000_RXBUFFER_16384:
  1388. rctl |= E1000_RCTL_SZ_16384;
  1389. break;
  1390. }
  1391. }
  1392. #ifdef CONFIG_E1000_PACKET_SPLIT
  1393. /* 82571 and greater support packet-split where the protocol
  1394. * header is placed in skb->data and the packet data is
  1395. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1396. * In the case of a non-split, skb->data is linearly filled,
  1397. * followed by the page buffers. Therefore, skb->data is
  1398. * sized to hold the largest protocol header.
  1399. */
  1400. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1401. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1402. PAGE_SIZE <= 16384)
  1403. adapter->rx_ps_pages = pages;
  1404. else
  1405. adapter->rx_ps_pages = 0;
  1406. #endif
  1407. if (adapter->rx_ps_pages) {
  1408. /* Configure extra packet-split registers */
  1409. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1410. rfctl |= E1000_RFCTL_EXTEN;
  1411. /* disable IPv6 packet split support */
  1412. rfctl |= E1000_RFCTL_IPV6_DIS;
  1413. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1414. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1415. psrctl |= adapter->rx_ps_bsize0 >>
  1416. E1000_PSRCTL_BSIZE0_SHIFT;
  1417. switch (adapter->rx_ps_pages) {
  1418. case 3:
  1419. psrctl |= PAGE_SIZE <<
  1420. E1000_PSRCTL_BSIZE3_SHIFT;
  1421. case 2:
  1422. psrctl |= PAGE_SIZE <<
  1423. E1000_PSRCTL_BSIZE2_SHIFT;
  1424. case 1:
  1425. psrctl |= PAGE_SIZE >>
  1426. E1000_PSRCTL_BSIZE1_SHIFT;
  1427. break;
  1428. }
  1429. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1430. }
  1431. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1432. }
  1433. /**
  1434. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1435. * @adapter: board private structure
  1436. *
  1437. * Configure the Rx unit of the MAC after a reset.
  1438. **/
  1439. static void
  1440. e1000_configure_rx(struct e1000_adapter *adapter)
  1441. {
  1442. uint64_t rdba;
  1443. struct e1000_hw *hw = &adapter->hw;
  1444. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1445. #ifdef CONFIG_E1000_MQ
  1446. uint32_t reta, mrqc;
  1447. int i;
  1448. #endif
  1449. if (adapter->rx_ps_pages) {
  1450. rdlen = adapter->rx_ring[0].count *
  1451. sizeof(union e1000_rx_desc_packet_split);
  1452. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1453. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1454. } else {
  1455. rdlen = adapter->rx_ring[0].count *
  1456. sizeof(struct e1000_rx_desc);
  1457. adapter->clean_rx = e1000_clean_rx_irq;
  1458. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1459. }
  1460. /* disable receives while setting up the descriptors */
  1461. rctl = E1000_READ_REG(hw, RCTL);
  1462. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1463. /* set the Receive Delay Timer Register */
  1464. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1465. if (hw->mac_type >= e1000_82540) {
  1466. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1467. if(adapter->itr > 1)
  1468. E1000_WRITE_REG(hw, ITR,
  1469. 1000000000 / (adapter->itr * 256));
  1470. }
  1471. if (hw->mac_type >= e1000_82571) {
  1472. /* Reset delay timers after every interrupt */
  1473. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1474. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1475. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1476. E1000_WRITE_FLUSH(hw);
  1477. }
  1478. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1479. * the Base and Length of the Rx Descriptor Ring */
  1480. switch (adapter->num_rx_queues) {
  1481. #ifdef CONFIG_E1000_MQ
  1482. case 2:
  1483. rdba = adapter->rx_ring[1].dma;
  1484. E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
  1485. E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
  1486. E1000_WRITE_REG(hw, RDLEN1, rdlen);
  1487. E1000_WRITE_REG(hw, RDH1, 0);
  1488. E1000_WRITE_REG(hw, RDT1, 0);
  1489. adapter->rx_ring[1].rdh = E1000_RDH1;
  1490. adapter->rx_ring[1].rdt = E1000_RDT1;
  1491. /* Fall Through */
  1492. #endif
  1493. case 1:
  1494. default:
  1495. rdba = adapter->rx_ring[0].dma;
  1496. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1497. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1498. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1499. E1000_WRITE_REG(hw, RDH, 0);
  1500. E1000_WRITE_REG(hw, RDT, 0);
  1501. adapter->rx_ring[0].rdh = E1000_RDH;
  1502. adapter->rx_ring[0].rdt = E1000_RDT;
  1503. break;
  1504. }
  1505. #ifdef CONFIG_E1000_MQ
  1506. if (adapter->num_rx_queues > 1) {
  1507. uint32_t random[10];
  1508. get_random_bytes(&random[0], 40);
  1509. if (hw->mac_type <= e1000_82572) {
  1510. E1000_WRITE_REG(hw, RSSIR, 0);
  1511. E1000_WRITE_REG(hw, RSSIM, 0);
  1512. }
  1513. switch (adapter->num_rx_queues) {
  1514. case 2:
  1515. default:
  1516. reta = 0x00800080;
  1517. mrqc = E1000_MRQC_ENABLE_RSS_2Q;
  1518. break;
  1519. }
  1520. /* Fill out redirection table */
  1521. for (i = 0; i < 32; i++)
  1522. E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
  1523. /* Fill out hash function seeds */
  1524. for (i = 0; i < 10; i++)
  1525. E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
  1526. mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
  1527. E1000_MRQC_RSS_FIELD_IPV4_TCP);
  1528. E1000_WRITE_REG(hw, MRQC, mrqc);
  1529. }
  1530. /* Multiqueue and packet checksumming are mutually exclusive. */
  1531. if (hw->mac_type >= e1000_82571) {
  1532. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1533. rxcsum |= E1000_RXCSUM_PCSD;
  1534. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1535. }
  1536. #else
  1537. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1538. if (hw->mac_type >= e1000_82543) {
  1539. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1540. if(adapter->rx_csum == TRUE) {
  1541. rxcsum |= E1000_RXCSUM_TUOFL;
  1542. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1543. * Must be used in conjunction with packet-split. */
  1544. if ((hw->mac_type >= e1000_82571) &&
  1545. (adapter->rx_ps_pages)) {
  1546. rxcsum |= E1000_RXCSUM_IPPCSE;
  1547. }
  1548. } else {
  1549. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1550. /* don't need to clear IPPCSE as it defaults to 0 */
  1551. }
  1552. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1553. }
  1554. #endif /* CONFIG_E1000_MQ */
  1555. if (hw->mac_type == e1000_82573)
  1556. E1000_WRITE_REG(hw, ERT, 0x0100);
  1557. /* Enable Receives */
  1558. E1000_WRITE_REG(hw, RCTL, rctl);
  1559. }
  1560. /**
  1561. * e1000_free_tx_resources - Free Tx Resources per Queue
  1562. * @adapter: board private structure
  1563. * @tx_ring: Tx descriptor ring for a specific queue
  1564. *
  1565. * Free all transmit software resources
  1566. **/
  1567. static void
  1568. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1569. struct e1000_tx_ring *tx_ring)
  1570. {
  1571. struct pci_dev *pdev = adapter->pdev;
  1572. e1000_clean_tx_ring(adapter, tx_ring);
  1573. vfree(tx_ring->buffer_info);
  1574. tx_ring->buffer_info = NULL;
  1575. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1576. tx_ring->desc = NULL;
  1577. }
  1578. /**
  1579. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1580. * @adapter: board private structure
  1581. *
  1582. * Free all transmit software resources
  1583. **/
  1584. void
  1585. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1586. {
  1587. int i;
  1588. for (i = 0; i < adapter->num_tx_queues; i++)
  1589. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1590. }
  1591. static inline void
  1592. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1593. struct e1000_buffer *buffer_info)
  1594. {
  1595. if(buffer_info->dma) {
  1596. pci_unmap_page(adapter->pdev,
  1597. buffer_info->dma,
  1598. buffer_info->length,
  1599. PCI_DMA_TODEVICE);
  1600. buffer_info->dma = 0;
  1601. }
  1602. if(buffer_info->skb) {
  1603. dev_kfree_skb_any(buffer_info->skb);
  1604. buffer_info->skb = NULL;
  1605. }
  1606. }
  1607. /**
  1608. * e1000_clean_tx_ring - Free Tx Buffers
  1609. * @adapter: board private structure
  1610. * @tx_ring: ring to be cleaned
  1611. **/
  1612. static void
  1613. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1614. struct e1000_tx_ring *tx_ring)
  1615. {
  1616. struct e1000_buffer *buffer_info;
  1617. unsigned long size;
  1618. unsigned int i;
  1619. /* Free all the Tx ring sk_buffs */
  1620. for(i = 0; i < tx_ring->count; i++) {
  1621. buffer_info = &tx_ring->buffer_info[i];
  1622. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1623. }
  1624. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1625. memset(tx_ring->buffer_info, 0, size);
  1626. /* Zero out the descriptor ring */
  1627. memset(tx_ring->desc, 0, tx_ring->size);
  1628. tx_ring->next_to_use = 0;
  1629. tx_ring->next_to_clean = 0;
  1630. tx_ring->last_tx_tso = 0;
  1631. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1632. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1633. }
  1634. /**
  1635. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1636. * @adapter: board private structure
  1637. **/
  1638. static void
  1639. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1640. {
  1641. int i;
  1642. for (i = 0; i < adapter->num_tx_queues; i++)
  1643. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1644. }
  1645. /**
  1646. * e1000_free_rx_resources - Free Rx Resources
  1647. * @adapter: board private structure
  1648. * @rx_ring: ring to clean the resources from
  1649. *
  1650. * Free all receive software resources
  1651. **/
  1652. static void
  1653. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1654. struct e1000_rx_ring *rx_ring)
  1655. {
  1656. struct pci_dev *pdev = adapter->pdev;
  1657. e1000_clean_rx_ring(adapter, rx_ring);
  1658. vfree(rx_ring->buffer_info);
  1659. rx_ring->buffer_info = NULL;
  1660. kfree(rx_ring->ps_page);
  1661. rx_ring->ps_page = NULL;
  1662. kfree(rx_ring->ps_page_dma);
  1663. rx_ring->ps_page_dma = NULL;
  1664. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1665. rx_ring->desc = NULL;
  1666. }
  1667. /**
  1668. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1669. * @adapter: board private structure
  1670. *
  1671. * Free all receive software resources
  1672. **/
  1673. void
  1674. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1675. {
  1676. int i;
  1677. for (i = 0; i < adapter->num_rx_queues; i++)
  1678. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1679. }
  1680. /**
  1681. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1682. * @adapter: board private structure
  1683. * @rx_ring: ring to free buffers from
  1684. **/
  1685. static void
  1686. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1687. struct e1000_rx_ring *rx_ring)
  1688. {
  1689. struct e1000_buffer *buffer_info;
  1690. struct e1000_ps_page *ps_page;
  1691. struct e1000_ps_page_dma *ps_page_dma;
  1692. struct pci_dev *pdev = adapter->pdev;
  1693. unsigned long size;
  1694. unsigned int i, j;
  1695. /* Free all the Rx ring sk_buffs */
  1696. for(i = 0; i < rx_ring->count; i++) {
  1697. buffer_info = &rx_ring->buffer_info[i];
  1698. if(buffer_info->skb) {
  1699. ps_page = &rx_ring->ps_page[i];
  1700. ps_page_dma = &rx_ring->ps_page_dma[i];
  1701. pci_unmap_single(pdev,
  1702. buffer_info->dma,
  1703. buffer_info->length,
  1704. PCI_DMA_FROMDEVICE);
  1705. dev_kfree_skb(buffer_info->skb);
  1706. buffer_info->skb = NULL;
  1707. for(j = 0; j < adapter->rx_ps_pages; j++) {
  1708. if(!ps_page->ps_page[j]) break;
  1709. pci_unmap_single(pdev,
  1710. ps_page_dma->ps_page_dma[j],
  1711. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1712. ps_page_dma->ps_page_dma[j] = 0;
  1713. put_page(ps_page->ps_page[j]);
  1714. ps_page->ps_page[j] = NULL;
  1715. }
  1716. }
  1717. }
  1718. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1719. memset(rx_ring->buffer_info, 0, size);
  1720. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1721. memset(rx_ring->ps_page, 0, size);
  1722. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1723. memset(rx_ring->ps_page_dma, 0, size);
  1724. /* Zero out the descriptor ring */
  1725. memset(rx_ring->desc, 0, rx_ring->size);
  1726. rx_ring->next_to_clean = 0;
  1727. rx_ring->next_to_use = 0;
  1728. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1729. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1730. }
  1731. /**
  1732. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1733. * @adapter: board private structure
  1734. **/
  1735. static void
  1736. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1737. {
  1738. int i;
  1739. for (i = 0; i < adapter->num_rx_queues; i++)
  1740. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1741. }
  1742. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1743. * and memory write and invalidate disabled for certain operations
  1744. */
  1745. static void
  1746. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1747. {
  1748. struct net_device *netdev = adapter->netdev;
  1749. uint32_t rctl;
  1750. e1000_pci_clear_mwi(&adapter->hw);
  1751. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1752. rctl |= E1000_RCTL_RST;
  1753. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1754. E1000_WRITE_FLUSH(&adapter->hw);
  1755. mdelay(5);
  1756. if(netif_running(netdev))
  1757. e1000_clean_all_rx_rings(adapter);
  1758. }
  1759. static void
  1760. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1761. {
  1762. struct net_device *netdev = adapter->netdev;
  1763. uint32_t rctl;
  1764. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1765. rctl &= ~E1000_RCTL_RST;
  1766. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1767. E1000_WRITE_FLUSH(&adapter->hw);
  1768. mdelay(5);
  1769. if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1770. e1000_pci_set_mwi(&adapter->hw);
  1771. if(netif_running(netdev)) {
  1772. e1000_configure_rx(adapter);
  1773. e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
  1774. }
  1775. }
  1776. /**
  1777. * e1000_set_mac - Change the Ethernet Address of the NIC
  1778. * @netdev: network interface device structure
  1779. * @p: pointer to an address structure
  1780. *
  1781. * Returns 0 on success, negative on failure
  1782. **/
  1783. static int
  1784. e1000_set_mac(struct net_device *netdev, void *p)
  1785. {
  1786. struct e1000_adapter *adapter = netdev_priv(netdev);
  1787. struct sockaddr *addr = p;
  1788. if(!is_valid_ether_addr(addr->sa_data))
  1789. return -EADDRNOTAVAIL;
  1790. /* 82542 2.0 needs to be in reset to write receive address registers */
  1791. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1792. e1000_enter_82542_rst(adapter);
  1793. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1794. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1795. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1796. /* With 82571 controllers, LAA may be overwritten (with the default)
  1797. * due to controller reset from the other port. */
  1798. if (adapter->hw.mac_type == e1000_82571) {
  1799. /* activate the work around */
  1800. adapter->hw.laa_is_present = 1;
  1801. /* Hold a copy of the LAA in RAR[14] This is done so that
  1802. * between the time RAR[0] gets clobbered and the time it
  1803. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1804. * of the RARs and no incoming packets directed to this port
  1805. * are dropped. Eventaully the LAA will be in RAR[0] and
  1806. * RAR[14] */
  1807. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1808. E1000_RAR_ENTRIES - 1);
  1809. }
  1810. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1811. e1000_leave_82542_rst(adapter);
  1812. return 0;
  1813. }
  1814. /**
  1815. * e1000_set_multi - Multicast and Promiscuous mode set
  1816. * @netdev: network interface device structure
  1817. *
  1818. * The set_multi entry point is called whenever the multicast address
  1819. * list or the network interface flags are updated. This routine is
  1820. * responsible for configuring the hardware for proper multicast,
  1821. * promiscuous mode, and all-multi behavior.
  1822. **/
  1823. static void
  1824. e1000_set_multi(struct net_device *netdev)
  1825. {
  1826. struct e1000_adapter *adapter = netdev_priv(netdev);
  1827. struct e1000_hw *hw = &adapter->hw;
  1828. struct dev_mc_list *mc_ptr;
  1829. uint32_t rctl;
  1830. uint32_t hash_value;
  1831. int i, rar_entries = E1000_RAR_ENTRIES;
  1832. /* reserve RAR[14] for LAA over-write work-around */
  1833. if (adapter->hw.mac_type == e1000_82571)
  1834. rar_entries--;
  1835. /* Check for Promiscuous and All Multicast modes */
  1836. rctl = E1000_READ_REG(hw, RCTL);
  1837. if(netdev->flags & IFF_PROMISC) {
  1838. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1839. } else if(netdev->flags & IFF_ALLMULTI) {
  1840. rctl |= E1000_RCTL_MPE;
  1841. rctl &= ~E1000_RCTL_UPE;
  1842. } else {
  1843. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1844. }
  1845. E1000_WRITE_REG(hw, RCTL, rctl);
  1846. /* 82542 2.0 needs to be in reset to write receive address registers */
  1847. if(hw->mac_type == e1000_82542_rev2_0)
  1848. e1000_enter_82542_rst(adapter);
  1849. /* load the first 14 multicast address into the exact filters 1-14
  1850. * RAR 0 is used for the station MAC adddress
  1851. * if there are not 14 addresses, go ahead and clear the filters
  1852. * -- with 82571 controllers only 0-13 entries are filled here
  1853. */
  1854. mc_ptr = netdev->mc_list;
  1855. for(i = 1; i < rar_entries; i++) {
  1856. if (mc_ptr) {
  1857. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1858. mc_ptr = mc_ptr->next;
  1859. } else {
  1860. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1861. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1862. }
  1863. }
  1864. /* clear the old settings from the multicast hash table */
  1865. for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1866. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1867. /* load any remaining addresses into the hash table */
  1868. for(; mc_ptr; mc_ptr = mc_ptr->next) {
  1869. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1870. e1000_mta_set(hw, hash_value);
  1871. }
  1872. if(hw->mac_type == e1000_82542_rev2_0)
  1873. e1000_leave_82542_rst(adapter);
  1874. }
  1875. /* Need to wait a few seconds after link up to get diagnostic information from
  1876. * the phy */
  1877. static void
  1878. e1000_update_phy_info(unsigned long data)
  1879. {
  1880. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1881. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1882. }
  1883. /**
  1884. * e1000_82547_tx_fifo_stall - Timer Call-back
  1885. * @data: pointer to adapter cast into an unsigned long
  1886. **/
  1887. static void
  1888. e1000_82547_tx_fifo_stall(unsigned long data)
  1889. {
  1890. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1891. struct net_device *netdev = adapter->netdev;
  1892. uint32_t tctl;
  1893. if(atomic_read(&adapter->tx_fifo_stall)) {
  1894. if((E1000_READ_REG(&adapter->hw, TDT) ==
  1895. E1000_READ_REG(&adapter->hw, TDH)) &&
  1896. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1897. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1898. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1899. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1900. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1901. E1000_WRITE_REG(&adapter->hw, TCTL,
  1902. tctl & ~E1000_TCTL_EN);
  1903. E1000_WRITE_REG(&adapter->hw, TDFT,
  1904. adapter->tx_head_addr);
  1905. E1000_WRITE_REG(&adapter->hw, TDFH,
  1906. adapter->tx_head_addr);
  1907. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1908. adapter->tx_head_addr);
  1909. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1910. adapter->tx_head_addr);
  1911. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1912. E1000_WRITE_FLUSH(&adapter->hw);
  1913. adapter->tx_fifo_head = 0;
  1914. atomic_set(&adapter->tx_fifo_stall, 0);
  1915. netif_wake_queue(netdev);
  1916. } else {
  1917. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1918. }
  1919. }
  1920. }
  1921. /**
  1922. * e1000_watchdog - Timer Call-back
  1923. * @data: pointer to adapter cast into an unsigned long
  1924. **/
  1925. static void
  1926. e1000_watchdog(unsigned long data)
  1927. {
  1928. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1929. /* Do the rest outside of interrupt context */
  1930. schedule_work(&adapter->watchdog_task);
  1931. }
  1932. static void
  1933. e1000_watchdog_task(struct e1000_adapter *adapter)
  1934. {
  1935. struct net_device *netdev = adapter->netdev;
  1936. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1937. uint32_t link;
  1938. e1000_check_for_link(&adapter->hw);
  1939. if (adapter->hw.mac_type == e1000_82573) {
  1940. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1941. if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1942. e1000_update_mng_vlan(adapter);
  1943. }
  1944. if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1945. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1946. link = !adapter->hw.serdes_link_down;
  1947. else
  1948. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1949. if(link) {
  1950. if(!netif_carrier_ok(netdev)) {
  1951. e1000_get_speed_and_duplex(&adapter->hw,
  1952. &adapter->link_speed,
  1953. &adapter->link_duplex);
  1954. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1955. adapter->link_speed,
  1956. adapter->link_duplex == FULL_DUPLEX ?
  1957. "Full Duplex" : "Half Duplex");
  1958. netif_carrier_on(netdev);
  1959. netif_wake_queue(netdev);
  1960. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1961. adapter->smartspeed = 0;
  1962. }
  1963. } else {
  1964. if(netif_carrier_ok(netdev)) {
  1965. adapter->link_speed = 0;
  1966. adapter->link_duplex = 0;
  1967. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1968. netif_carrier_off(netdev);
  1969. netif_stop_queue(netdev);
  1970. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1971. }
  1972. e1000_smartspeed(adapter);
  1973. }
  1974. e1000_update_stats(adapter);
  1975. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1976. adapter->tpt_old = adapter->stats.tpt;
  1977. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1978. adapter->colc_old = adapter->stats.colc;
  1979. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1980. adapter->gorcl_old = adapter->stats.gorcl;
  1981. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1982. adapter->gotcl_old = adapter->stats.gotcl;
  1983. e1000_update_adaptive(&adapter->hw);
  1984. #ifdef CONFIG_E1000_MQ
  1985. txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  1986. #endif
  1987. if (!netif_carrier_ok(netdev)) {
  1988. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1989. /* We've lost link, so the controller stops DMA,
  1990. * but we've got queued Tx work that's never going
  1991. * to get done, so reset controller to flush Tx.
  1992. * (Do the reset outside of interrupt context). */
  1993. schedule_work(&adapter->tx_timeout_task);
  1994. }
  1995. }
  1996. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  1997. if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  1998. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  1999. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2000. * else is between 2000-8000. */
  2001. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2002. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2003. adapter->gotcl - adapter->gorcl :
  2004. adapter->gorcl - adapter->gotcl) / 10000;
  2005. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2006. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2007. }
  2008. /* Cause software interrupt to ensure rx ring is cleaned */
  2009. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2010. /* Force detection of hung controller every watchdog period */
  2011. adapter->detect_tx_hung = TRUE;
  2012. /* With 82571 controllers, LAA may be overwritten due to controller
  2013. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2014. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2015. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2016. /* Reset the timer */
  2017. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2018. }
  2019. #define E1000_TX_FLAGS_CSUM 0x00000001
  2020. #define E1000_TX_FLAGS_VLAN 0x00000002
  2021. #define E1000_TX_FLAGS_TSO 0x00000004
  2022. #define E1000_TX_FLAGS_IPV4 0x00000008
  2023. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2024. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2025. static inline int
  2026. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2027. struct sk_buff *skb)
  2028. {
  2029. #ifdef NETIF_F_TSO
  2030. struct e1000_context_desc *context_desc;
  2031. struct e1000_buffer *buffer_info;
  2032. unsigned int i;
  2033. uint32_t cmd_length = 0;
  2034. uint16_t ipcse = 0, tucse, mss;
  2035. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2036. int err;
  2037. if(skb_shinfo(skb)->tso_size) {
  2038. if (skb_header_cloned(skb)) {
  2039. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2040. if (err)
  2041. return err;
  2042. }
  2043. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2044. mss = skb_shinfo(skb)->tso_size;
  2045. if(skb->protocol == ntohs(ETH_P_IP)) {
  2046. skb->nh.iph->tot_len = 0;
  2047. skb->nh.iph->check = 0;
  2048. skb->h.th->check =
  2049. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2050. skb->nh.iph->daddr,
  2051. 0,
  2052. IPPROTO_TCP,
  2053. 0);
  2054. cmd_length = E1000_TXD_CMD_IP;
  2055. ipcse = skb->h.raw - skb->data - 1;
  2056. #ifdef NETIF_F_TSO_IPV6
  2057. } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
  2058. skb->nh.ipv6h->payload_len = 0;
  2059. skb->h.th->check =
  2060. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2061. &skb->nh.ipv6h->daddr,
  2062. 0,
  2063. IPPROTO_TCP,
  2064. 0);
  2065. ipcse = 0;
  2066. #endif
  2067. }
  2068. ipcss = skb->nh.raw - skb->data;
  2069. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2070. tucss = skb->h.raw - skb->data;
  2071. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2072. tucse = 0;
  2073. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2074. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2075. i = tx_ring->next_to_use;
  2076. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2077. buffer_info = &tx_ring->buffer_info[i];
  2078. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2079. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2080. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2081. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2082. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2083. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2084. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2085. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2086. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2087. buffer_info->time_stamp = jiffies;
  2088. if (++i == tx_ring->count) i = 0;
  2089. tx_ring->next_to_use = i;
  2090. return 1;
  2091. }
  2092. #endif
  2093. return 0;
  2094. }
  2095. static inline boolean_t
  2096. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2097. struct sk_buff *skb)
  2098. {
  2099. struct e1000_context_desc *context_desc;
  2100. struct e1000_buffer *buffer_info;
  2101. unsigned int i;
  2102. uint8_t css;
  2103. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  2104. css = skb->h.raw - skb->data;
  2105. i = tx_ring->next_to_use;
  2106. buffer_info = &tx_ring->buffer_info[i];
  2107. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2108. context_desc->upper_setup.tcp_fields.tucss = css;
  2109. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2110. context_desc->upper_setup.tcp_fields.tucse = 0;
  2111. context_desc->tcp_seg_setup.data = 0;
  2112. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2113. buffer_info->time_stamp = jiffies;
  2114. if (unlikely(++i == tx_ring->count)) i = 0;
  2115. tx_ring->next_to_use = i;
  2116. return TRUE;
  2117. }
  2118. return FALSE;
  2119. }
  2120. #define E1000_MAX_TXD_PWR 12
  2121. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2122. static inline int
  2123. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2124. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2125. unsigned int nr_frags, unsigned int mss)
  2126. {
  2127. struct e1000_buffer *buffer_info;
  2128. unsigned int len = skb->len;
  2129. unsigned int offset = 0, size, count = 0, i;
  2130. unsigned int f;
  2131. len -= skb->data_len;
  2132. i = tx_ring->next_to_use;
  2133. while(len) {
  2134. buffer_info = &tx_ring->buffer_info[i];
  2135. size = min(len, max_per_txd);
  2136. #ifdef NETIF_F_TSO
  2137. /* Workaround for Controller erratum --
  2138. * descriptor for non-tso packet in a linear SKB that follows a
  2139. * tso gets written back prematurely before the data is fully
  2140. * DMAd to the controller */
  2141. if (!skb->data_len && tx_ring->last_tx_tso &&
  2142. !skb_shinfo(skb)->tso_size) {
  2143. tx_ring->last_tx_tso = 0;
  2144. size -= 4;
  2145. }
  2146. /* Workaround for premature desc write-backs
  2147. * in TSO mode. Append 4-byte sentinel desc */
  2148. if(unlikely(mss && !nr_frags && size == len && size > 8))
  2149. size -= 4;
  2150. #endif
  2151. /* work-around for errata 10 and it applies
  2152. * to all controllers in PCI-X mode
  2153. * The fix is to make sure that the first descriptor of a
  2154. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2155. */
  2156. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2157. (size > 2015) && count == 0))
  2158. size = 2015;
  2159. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2160. * terminating buffers within evenly-aligned dwords. */
  2161. if(unlikely(adapter->pcix_82544 &&
  2162. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2163. size > 4))
  2164. size -= 4;
  2165. buffer_info->length = size;
  2166. buffer_info->dma =
  2167. pci_map_single(adapter->pdev,
  2168. skb->data + offset,
  2169. size,
  2170. PCI_DMA_TODEVICE);
  2171. buffer_info->time_stamp = jiffies;
  2172. len -= size;
  2173. offset += size;
  2174. count++;
  2175. if(unlikely(++i == tx_ring->count)) i = 0;
  2176. }
  2177. for(f = 0; f < nr_frags; f++) {
  2178. struct skb_frag_struct *frag;
  2179. frag = &skb_shinfo(skb)->frags[f];
  2180. len = frag->size;
  2181. offset = frag->page_offset;
  2182. while(len) {
  2183. buffer_info = &tx_ring->buffer_info[i];
  2184. size = min(len, max_per_txd);
  2185. #ifdef NETIF_F_TSO
  2186. /* Workaround for premature desc write-backs
  2187. * in TSO mode. Append 4-byte sentinel desc */
  2188. if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2189. size -= 4;
  2190. #endif
  2191. /* Workaround for potential 82544 hang in PCI-X.
  2192. * Avoid terminating buffers within evenly-aligned
  2193. * dwords. */
  2194. if(unlikely(adapter->pcix_82544 &&
  2195. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2196. size > 4))
  2197. size -= 4;
  2198. buffer_info->length = size;
  2199. buffer_info->dma =
  2200. pci_map_page(adapter->pdev,
  2201. frag->page,
  2202. offset,
  2203. size,
  2204. PCI_DMA_TODEVICE);
  2205. buffer_info->time_stamp = jiffies;
  2206. len -= size;
  2207. offset += size;
  2208. count++;
  2209. if(unlikely(++i == tx_ring->count)) i = 0;
  2210. }
  2211. }
  2212. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2213. tx_ring->buffer_info[i].skb = skb;
  2214. tx_ring->buffer_info[first].next_to_watch = i;
  2215. return count;
  2216. }
  2217. static inline void
  2218. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2219. int tx_flags, int count)
  2220. {
  2221. struct e1000_tx_desc *tx_desc = NULL;
  2222. struct e1000_buffer *buffer_info;
  2223. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2224. unsigned int i;
  2225. if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2226. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2227. E1000_TXD_CMD_TSE;
  2228. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2229. if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2230. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2231. }
  2232. if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2233. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2234. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2235. }
  2236. if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2237. txd_lower |= E1000_TXD_CMD_VLE;
  2238. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2239. }
  2240. i = tx_ring->next_to_use;
  2241. while(count--) {
  2242. buffer_info = &tx_ring->buffer_info[i];
  2243. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2244. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2245. tx_desc->lower.data =
  2246. cpu_to_le32(txd_lower | buffer_info->length);
  2247. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2248. if(unlikely(++i == tx_ring->count)) i = 0;
  2249. }
  2250. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2251. /* Force memory writes to complete before letting h/w
  2252. * know there are new descriptors to fetch. (Only
  2253. * applicable for weak-ordered memory model archs,
  2254. * such as IA-64). */
  2255. wmb();
  2256. tx_ring->next_to_use = i;
  2257. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2258. }
  2259. /**
  2260. * 82547 workaround to avoid controller hang in half-duplex environment.
  2261. * The workaround is to avoid queuing a large packet that would span
  2262. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2263. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2264. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2265. * to the beginning of the Tx FIFO.
  2266. **/
  2267. #define E1000_FIFO_HDR 0x10
  2268. #define E1000_82547_PAD_LEN 0x3E0
  2269. static inline int
  2270. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2271. {
  2272. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2273. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2274. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2275. if(adapter->link_duplex != HALF_DUPLEX)
  2276. goto no_fifo_stall_required;
  2277. if(atomic_read(&adapter->tx_fifo_stall))
  2278. return 1;
  2279. if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2280. atomic_set(&adapter->tx_fifo_stall, 1);
  2281. return 1;
  2282. }
  2283. no_fifo_stall_required:
  2284. adapter->tx_fifo_head += skb_fifo_len;
  2285. if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2286. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2287. return 0;
  2288. }
  2289. #define MINIMUM_DHCP_PACKET_SIZE 282
  2290. static inline int
  2291. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2292. {
  2293. struct e1000_hw *hw = &adapter->hw;
  2294. uint16_t length, offset;
  2295. if(vlan_tx_tag_present(skb)) {
  2296. if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2297. ( adapter->hw.mng_cookie.status &
  2298. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2299. return 0;
  2300. }
  2301. if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2302. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2303. if((htons(ETH_P_IP) == eth->h_proto)) {
  2304. const struct iphdr *ip =
  2305. (struct iphdr *)((uint8_t *)skb->data+14);
  2306. if(IPPROTO_UDP == ip->protocol) {
  2307. struct udphdr *udp =
  2308. (struct udphdr *)((uint8_t *)ip +
  2309. (ip->ihl << 2));
  2310. if(ntohs(udp->dest) == 67) {
  2311. offset = (uint8_t *)udp + 8 - skb->data;
  2312. length = skb->len - offset;
  2313. return e1000_mng_write_dhcp_info(hw,
  2314. (uint8_t *)udp + 8,
  2315. length);
  2316. }
  2317. }
  2318. }
  2319. }
  2320. return 0;
  2321. }
  2322. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2323. static int
  2324. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2325. {
  2326. struct e1000_adapter *adapter = netdev_priv(netdev);
  2327. struct e1000_tx_ring *tx_ring;
  2328. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2329. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2330. unsigned int tx_flags = 0;
  2331. unsigned int len = skb->len;
  2332. unsigned long flags;
  2333. unsigned int nr_frags = 0;
  2334. unsigned int mss = 0;
  2335. int count = 0;
  2336. int tso;
  2337. unsigned int f;
  2338. len -= skb->data_len;
  2339. #ifdef CONFIG_E1000_MQ
  2340. tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2341. #else
  2342. tx_ring = adapter->tx_ring;
  2343. #endif
  2344. if (unlikely(skb->len <= 0)) {
  2345. dev_kfree_skb_any(skb);
  2346. return NETDEV_TX_OK;
  2347. }
  2348. #ifdef NETIF_F_TSO
  2349. mss = skb_shinfo(skb)->tso_size;
  2350. /* The controller does a simple calculation to
  2351. * make sure there is enough room in the FIFO before
  2352. * initiating the DMA for each buffer. The calc is:
  2353. * 4 = ceil(buffer len/mss). To make sure we don't
  2354. * overrun the FIFO, adjust the max buffer len if mss
  2355. * drops. */
  2356. if(mss) {
  2357. uint8_t hdr_len;
  2358. max_per_txd = min(mss << 2, max_per_txd);
  2359. max_txd_pwr = fls(max_per_txd) - 1;
  2360. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2361. * points to just header, pull a few bytes of payload from
  2362. * frags into skb->data */
  2363. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2364. if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
  2365. (adapter->hw.mac_type == e1000_82571 ||
  2366. adapter->hw.mac_type == e1000_82572)) {
  2367. len = skb->len - skb->data_len;
  2368. }
  2369. }
  2370. if((mss) || (skb->ip_summed == CHECKSUM_HW))
  2371. /* reserve a descriptor for the offload context */
  2372. count++;
  2373. count++;
  2374. #else
  2375. if(skb->ip_summed == CHECKSUM_HW)
  2376. count++;
  2377. #endif
  2378. #ifdef NETIF_F_TSO
  2379. /* Controller Erratum workaround */
  2380. if (!skb->data_len && tx_ring->last_tx_tso &&
  2381. !skb_shinfo(skb)->tso_size)
  2382. count++;
  2383. #endif
  2384. count += TXD_USE_COUNT(len, max_txd_pwr);
  2385. if(adapter->pcix_82544)
  2386. count++;
  2387. /* work-around for errata 10 and it applies to all controllers
  2388. * in PCI-X mode, so add one more descriptor to the count
  2389. */
  2390. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2391. (len > 2015)))
  2392. count++;
  2393. nr_frags = skb_shinfo(skb)->nr_frags;
  2394. for(f = 0; f < nr_frags; f++)
  2395. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2396. max_txd_pwr);
  2397. if(adapter->pcix_82544)
  2398. count += nr_frags;
  2399. unsigned int pull_size;
  2400. pull_size = min((unsigned int)4, skb->data_len);
  2401. if (!__pskb_pull_tail(skb, pull_size)) {
  2402. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2403. dev_kfree_skb_any(skb);
  2404. return -EFAULT;
  2405. }
  2406. if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2407. e1000_transfer_dhcp_info(adapter, skb);
  2408. local_irq_save(flags);
  2409. if (!spin_trylock(&tx_ring->tx_lock)) {
  2410. /* Collision - tell upper layer to requeue */
  2411. local_irq_restore(flags);
  2412. return NETDEV_TX_LOCKED;
  2413. }
  2414. /* need: count + 2 desc gap to keep tail from touching
  2415. * head, otherwise try next time */
  2416. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2417. netif_stop_queue(netdev);
  2418. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2419. return NETDEV_TX_BUSY;
  2420. }
  2421. if(unlikely(adapter->hw.mac_type == e1000_82547)) {
  2422. if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2423. netif_stop_queue(netdev);
  2424. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2425. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2426. return NETDEV_TX_BUSY;
  2427. }
  2428. }
  2429. if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2430. tx_flags |= E1000_TX_FLAGS_VLAN;
  2431. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2432. }
  2433. first = tx_ring->next_to_use;
  2434. tso = e1000_tso(adapter, tx_ring, skb);
  2435. if (tso < 0) {
  2436. dev_kfree_skb_any(skb);
  2437. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2438. return NETDEV_TX_OK;
  2439. }
  2440. if (likely(tso)) {
  2441. tx_ring->last_tx_tso = 1;
  2442. tx_flags |= E1000_TX_FLAGS_TSO;
  2443. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2444. tx_flags |= E1000_TX_FLAGS_CSUM;
  2445. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2446. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2447. * no longer assume, we must. */
  2448. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2449. tx_flags |= E1000_TX_FLAGS_IPV4;
  2450. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2451. e1000_tx_map(adapter, tx_ring, skb, first,
  2452. max_per_txd, nr_frags, mss));
  2453. netdev->trans_start = jiffies;
  2454. /* Make sure there is space in the ring for the next send. */
  2455. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2456. netif_stop_queue(netdev);
  2457. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2458. return NETDEV_TX_OK;
  2459. }
  2460. /**
  2461. * e1000_tx_timeout - Respond to a Tx Hang
  2462. * @netdev: network interface device structure
  2463. **/
  2464. static void
  2465. e1000_tx_timeout(struct net_device *netdev)
  2466. {
  2467. struct e1000_adapter *adapter = netdev_priv(netdev);
  2468. /* Do the reset outside of interrupt context */
  2469. schedule_work(&adapter->tx_timeout_task);
  2470. }
  2471. static void
  2472. e1000_tx_timeout_task(struct net_device *netdev)
  2473. {
  2474. struct e1000_adapter *adapter = netdev_priv(netdev);
  2475. adapter->tx_timeout_count++;
  2476. e1000_down(adapter);
  2477. e1000_up(adapter);
  2478. }
  2479. /**
  2480. * e1000_get_stats - Get System Network Statistics
  2481. * @netdev: network interface device structure
  2482. *
  2483. * Returns the address of the device statistics structure.
  2484. * The statistics are actually updated from the timer callback.
  2485. **/
  2486. static struct net_device_stats *
  2487. e1000_get_stats(struct net_device *netdev)
  2488. {
  2489. struct e1000_adapter *adapter = netdev_priv(netdev);
  2490. /* only return the current stats */
  2491. return &adapter->net_stats;
  2492. }
  2493. /**
  2494. * e1000_change_mtu - Change the Maximum Transfer Unit
  2495. * @netdev: network interface device structure
  2496. * @new_mtu: new value for maximum frame size
  2497. *
  2498. * Returns 0 on success, negative on failure
  2499. **/
  2500. static int
  2501. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2502. {
  2503. struct e1000_adapter *adapter = netdev_priv(netdev);
  2504. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2505. if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2506. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2507. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2508. return -EINVAL;
  2509. }
  2510. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2511. /* might want this to be bigger enum check... */
  2512. /* 82571 controllers limit jumbo frame size to 10500 bytes */
  2513. if ((adapter->hw.mac_type == e1000_82571 ||
  2514. adapter->hw.mac_type == e1000_82572) &&
  2515. max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2516. DPRINTK(PROBE, ERR, "MTU > 9216 bytes not supported "
  2517. "on 82571 and 82572 controllers.\n");
  2518. return -EINVAL;
  2519. }
  2520. if(adapter->hw.mac_type == e1000_82573 &&
  2521. max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2522. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2523. "on 82573\n");
  2524. return -EINVAL;
  2525. }
  2526. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  2527. adapter->rx_buffer_len = max_frame;
  2528. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2529. } else {
  2530. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2531. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2532. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2533. "on 82542\n");
  2534. return -EINVAL;
  2535. } else {
  2536. if(max_frame <= E1000_RXBUFFER_2048) {
  2537. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2538. } else if(max_frame <= E1000_RXBUFFER_4096) {
  2539. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2540. } else if(max_frame <= E1000_RXBUFFER_8192) {
  2541. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2542. } else if(max_frame <= E1000_RXBUFFER_16384) {
  2543. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2544. }
  2545. }
  2546. }
  2547. netdev->mtu = new_mtu;
  2548. if(netif_running(netdev)) {
  2549. e1000_down(adapter);
  2550. e1000_up(adapter);
  2551. }
  2552. adapter->hw.max_frame_size = max_frame;
  2553. return 0;
  2554. }
  2555. /**
  2556. * e1000_update_stats - Update the board statistics counters
  2557. * @adapter: board private structure
  2558. **/
  2559. void
  2560. e1000_update_stats(struct e1000_adapter *adapter)
  2561. {
  2562. struct e1000_hw *hw = &adapter->hw;
  2563. unsigned long flags;
  2564. uint16_t phy_tmp;
  2565. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2566. spin_lock_irqsave(&adapter->stats_lock, flags);
  2567. /* these counters are modified from e1000_adjust_tbi_stats,
  2568. * called from the interrupt context, so they must only
  2569. * be written while holding adapter->stats_lock
  2570. */
  2571. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2572. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2573. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2574. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2575. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2576. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2577. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2578. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2579. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2580. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2581. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2582. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2583. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2584. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2585. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2586. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2587. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2588. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2589. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2590. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2591. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2592. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2593. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2594. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2595. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2596. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2597. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2598. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2599. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2600. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2601. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2602. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2603. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2604. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2605. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2606. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2607. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2608. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2609. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2610. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2611. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2612. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2613. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2614. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2615. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2616. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2617. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2618. /* used for adaptive IFS */
  2619. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2620. adapter->stats.tpt += hw->tx_packet_delta;
  2621. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2622. adapter->stats.colc += hw->collision_delta;
  2623. if(hw->mac_type >= e1000_82543) {
  2624. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2625. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2626. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2627. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2628. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2629. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2630. }
  2631. if(hw->mac_type > e1000_82547_rev_2) {
  2632. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2633. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2634. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2635. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2636. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2637. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2638. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2639. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2640. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2641. }
  2642. /* Fill out the OS statistics structure */
  2643. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2644. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2645. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2646. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2647. adapter->net_stats.multicast = adapter->stats.mprc;
  2648. adapter->net_stats.collisions = adapter->stats.colc;
  2649. /* Rx Errors */
  2650. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2651. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2652. adapter->stats.rlec + adapter->stats.cexterr;
  2653. adapter->net_stats.rx_dropped = 0;
  2654. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2655. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2656. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2657. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2658. /* Tx Errors */
  2659. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2660. adapter->stats.latecol;
  2661. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2662. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2663. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2664. /* Tx Dropped needs to be maintained elsewhere */
  2665. /* Phy Stats */
  2666. if(hw->media_type == e1000_media_type_copper) {
  2667. if((adapter->link_speed == SPEED_1000) &&
  2668. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2669. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2670. adapter->phy_stats.idle_errors += phy_tmp;
  2671. }
  2672. if((hw->mac_type <= e1000_82546) &&
  2673. (hw->phy_type == e1000_phy_m88) &&
  2674. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2675. adapter->phy_stats.receive_errors += phy_tmp;
  2676. }
  2677. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2678. }
  2679. #ifdef CONFIG_E1000_MQ
  2680. void
  2681. e1000_rx_schedule(void *data)
  2682. {
  2683. struct net_device *poll_dev, *netdev = data;
  2684. struct e1000_adapter *adapter = netdev->priv;
  2685. int this_cpu = get_cpu();
  2686. poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
  2687. if (poll_dev == NULL) {
  2688. put_cpu();
  2689. return;
  2690. }
  2691. if (likely(netif_rx_schedule_prep(poll_dev)))
  2692. __netif_rx_schedule(poll_dev);
  2693. else
  2694. e1000_irq_enable(adapter);
  2695. put_cpu();
  2696. }
  2697. #endif
  2698. /**
  2699. * e1000_intr - Interrupt Handler
  2700. * @irq: interrupt number
  2701. * @data: pointer to a network interface device structure
  2702. * @pt_regs: CPU registers structure
  2703. **/
  2704. static irqreturn_t
  2705. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2706. {
  2707. struct net_device *netdev = data;
  2708. struct e1000_adapter *adapter = netdev_priv(netdev);
  2709. struct e1000_hw *hw = &adapter->hw;
  2710. uint32_t icr = E1000_READ_REG(hw, ICR);
  2711. #if defined(CONFIG_E1000_NAPI) && defined(CONFIG_E1000_MQ) || !defined(CONFIG_E1000_NAPI)
  2712. int i;
  2713. #endif
  2714. if(unlikely(!icr))
  2715. return IRQ_NONE; /* Not our interrupt */
  2716. if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2717. hw->get_link_status = 1;
  2718. mod_timer(&adapter->watchdog_timer, jiffies);
  2719. }
  2720. #ifdef CONFIG_E1000_NAPI
  2721. atomic_inc(&adapter->irq_sem);
  2722. E1000_WRITE_REG(hw, IMC, ~0);
  2723. E1000_WRITE_FLUSH(hw);
  2724. #ifdef CONFIG_E1000_MQ
  2725. if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
  2726. /* We must setup the cpumask once count == 0 since
  2727. * each cpu bit is cleared when the work is done. */
  2728. adapter->rx_sched_call_data.cpumask = adapter->cpumask;
  2729. atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
  2730. atomic_set(&adapter->rx_sched_call_data.count,
  2731. adapter->num_rx_queues);
  2732. smp_call_async_mask(&adapter->rx_sched_call_data);
  2733. } else {
  2734. printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
  2735. }
  2736. #else /* if !CONFIG_E1000_MQ */
  2737. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2738. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2739. else
  2740. e1000_irq_enable(adapter);
  2741. #endif /* CONFIG_E1000_MQ */
  2742. #else /* if !CONFIG_E1000_NAPI */
  2743. /* Writing IMC and IMS is needed for 82547.
  2744. Due to Hub Link bus being occupied, an interrupt
  2745. de-assertion message is not able to be sent.
  2746. When an interrupt assertion message is generated later,
  2747. two messages are re-ordered and sent out.
  2748. That causes APIC to think 82547 is in de-assertion
  2749. state, while 82547 is in assertion state, resulting
  2750. in dead lock. Writing IMC forces 82547 into
  2751. de-assertion state.
  2752. */
  2753. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
  2754. atomic_inc(&adapter->irq_sem);
  2755. E1000_WRITE_REG(hw, IMC, ~0);
  2756. }
  2757. for(i = 0; i < E1000_MAX_INTR; i++)
  2758. if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2759. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2760. break;
  2761. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2762. e1000_irq_enable(adapter);
  2763. #endif /* CONFIG_E1000_NAPI */
  2764. return IRQ_HANDLED;
  2765. }
  2766. #ifdef CONFIG_E1000_NAPI
  2767. /**
  2768. * e1000_clean - NAPI Rx polling callback
  2769. * @adapter: board private structure
  2770. **/
  2771. static int
  2772. e1000_clean(struct net_device *poll_dev, int *budget)
  2773. {
  2774. struct e1000_adapter *adapter;
  2775. int work_to_do = min(*budget, poll_dev->quota);
  2776. int tx_cleaned, i = 0, work_done = 0;
  2777. /* Must NOT use netdev_priv macro here. */
  2778. adapter = poll_dev->priv;
  2779. /* Keep link state information with original netdev */
  2780. if (!netif_carrier_ok(adapter->netdev))
  2781. goto quit_polling;
  2782. while (poll_dev != &adapter->polling_netdev[i]) {
  2783. i++;
  2784. if (unlikely(i == adapter->num_rx_queues))
  2785. BUG();
  2786. }
  2787. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2788. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2789. &work_done, work_to_do);
  2790. *budget -= work_done;
  2791. poll_dev->quota -= work_done;
  2792. /* If no Tx and not enough Rx work done, exit the polling mode */
  2793. if((!tx_cleaned && (work_done == 0)) ||
  2794. !netif_running(adapter->netdev)) {
  2795. quit_polling:
  2796. netif_rx_complete(poll_dev);
  2797. e1000_irq_enable(adapter);
  2798. return 0;
  2799. }
  2800. return 1;
  2801. }
  2802. #endif
  2803. /**
  2804. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2805. * @adapter: board private structure
  2806. **/
  2807. static boolean_t
  2808. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2809. struct e1000_tx_ring *tx_ring)
  2810. {
  2811. struct net_device *netdev = adapter->netdev;
  2812. struct e1000_tx_desc *tx_desc, *eop_desc;
  2813. struct e1000_buffer *buffer_info;
  2814. unsigned int i, eop;
  2815. boolean_t cleaned = FALSE;
  2816. i = tx_ring->next_to_clean;
  2817. eop = tx_ring->buffer_info[i].next_to_watch;
  2818. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2819. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2820. for(cleaned = FALSE; !cleaned; ) {
  2821. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2822. buffer_info = &tx_ring->buffer_info[i];
  2823. cleaned = (i == eop);
  2824. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2825. tx_desc->buffer_addr = 0;
  2826. tx_desc->lower.data = 0;
  2827. tx_desc->upper.data = 0;
  2828. if(unlikely(++i == tx_ring->count)) i = 0;
  2829. }
  2830. #ifdef CONFIG_E1000_MQ
  2831. tx_ring->tx_stats.packets++;
  2832. #endif
  2833. eop = tx_ring->buffer_info[i].next_to_watch;
  2834. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2835. }
  2836. tx_ring->next_to_clean = i;
  2837. spin_lock(&tx_ring->tx_lock);
  2838. if(unlikely(cleaned && netif_queue_stopped(netdev) &&
  2839. netif_carrier_ok(netdev)))
  2840. netif_wake_queue(netdev);
  2841. spin_unlock(&tx_ring->tx_lock);
  2842. if (adapter->detect_tx_hung) {
  2843. /* Detect a transmit hang in hardware, this serializes the
  2844. * check with the clearing of time_stamp and movement of i */
  2845. adapter->detect_tx_hung = FALSE;
  2846. if (tx_ring->buffer_info[i].dma &&
  2847. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  2848. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2849. E1000_STATUS_TXOFF)) {
  2850. /* detected Tx unit hang */
  2851. i = tx_ring->next_to_clean;
  2852. eop = tx_ring->buffer_info[i].next_to_watch;
  2853. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2854. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2855. " Tx Queue <%lu>\n"
  2856. " TDH <%x>\n"
  2857. " TDT <%x>\n"
  2858. " next_to_use <%x>\n"
  2859. " next_to_clean <%x>\n"
  2860. "buffer_info[next_to_clean]\n"
  2861. " dma <%llx>\n"
  2862. " time_stamp <%lx>\n"
  2863. " next_to_watch <%x>\n"
  2864. " jiffies <%lx>\n"
  2865. " next_to_watch.status <%x>\n",
  2866. (unsigned long)((tx_ring - adapter->tx_ring) /
  2867. sizeof(struct e1000_tx_ring)),
  2868. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2869. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2870. tx_ring->next_to_use,
  2871. i,
  2872. (unsigned long long)tx_ring->buffer_info[i].dma,
  2873. tx_ring->buffer_info[i].time_stamp,
  2874. eop,
  2875. jiffies,
  2876. eop_desc->upper.fields.status);
  2877. netif_stop_queue(netdev);
  2878. }
  2879. }
  2880. return cleaned;
  2881. }
  2882. /**
  2883. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2884. * @adapter: board private structure
  2885. * @status_err: receive descriptor status and error fields
  2886. * @csum: receive descriptor csum field
  2887. * @sk_buff: socket buffer with received data
  2888. **/
  2889. static inline void
  2890. e1000_rx_checksum(struct e1000_adapter *adapter,
  2891. uint32_t status_err, uint32_t csum,
  2892. struct sk_buff *skb)
  2893. {
  2894. uint16_t status = (uint16_t)status_err;
  2895. uint8_t errors = (uint8_t)(status_err >> 24);
  2896. skb->ip_summed = CHECKSUM_NONE;
  2897. /* 82543 or newer only */
  2898. if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2899. /* Ignore Checksum bit is set */
  2900. if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2901. /* TCP/UDP checksum error bit is set */
  2902. if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2903. /* let the stack verify checksum errors */
  2904. adapter->hw_csum_err++;
  2905. return;
  2906. }
  2907. /* TCP/UDP Checksum has not been calculated */
  2908. if(adapter->hw.mac_type <= e1000_82547_rev_2) {
  2909. if(!(status & E1000_RXD_STAT_TCPCS))
  2910. return;
  2911. } else {
  2912. if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2913. return;
  2914. }
  2915. /* It must be a TCP or UDP packet with a valid checksum */
  2916. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2917. /* TCP checksum is good */
  2918. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2919. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2920. /* IP fragment with UDP payload */
  2921. /* Hardware complements the payload checksum, so we undo it
  2922. * and then put the value in host order for further stack use.
  2923. */
  2924. csum = ntohl(csum ^ 0xFFFF);
  2925. skb->csum = csum;
  2926. skb->ip_summed = CHECKSUM_HW;
  2927. }
  2928. adapter->hw_csum_good++;
  2929. }
  2930. /**
  2931. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2932. * @adapter: board private structure
  2933. **/
  2934. static boolean_t
  2935. #ifdef CONFIG_E1000_NAPI
  2936. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2937. struct e1000_rx_ring *rx_ring,
  2938. int *work_done, int work_to_do)
  2939. #else
  2940. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2941. struct e1000_rx_ring *rx_ring)
  2942. #endif
  2943. {
  2944. struct net_device *netdev = adapter->netdev;
  2945. struct pci_dev *pdev = adapter->pdev;
  2946. struct e1000_rx_desc *rx_desc;
  2947. struct e1000_buffer *buffer_info;
  2948. struct sk_buff *skb;
  2949. unsigned long flags;
  2950. uint32_t length;
  2951. uint8_t last_byte;
  2952. unsigned int i;
  2953. boolean_t cleaned = FALSE;
  2954. i = rx_ring->next_to_clean;
  2955. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2956. while(rx_desc->status & E1000_RXD_STAT_DD) {
  2957. buffer_info = &rx_ring->buffer_info[i];
  2958. #ifdef CONFIG_E1000_NAPI
  2959. if(*work_done >= work_to_do)
  2960. break;
  2961. (*work_done)++;
  2962. #endif
  2963. cleaned = TRUE;
  2964. pci_unmap_single(pdev,
  2965. buffer_info->dma,
  2966. buffer_info->length,
  2967. PCI_DMA_FROMDEVICE);
  2968. skb = buffer_info->skb;
  2969. length = le16_to_cpu(rx_desc->length);
  2970. if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
  2971. /* All receives must fit into a single buffer */
  2972. E1000_DBG("%s: Receive packet consumed multiple"
  2973. " buffers\n", netdev->name);
  2974. dev_kfree_skb_irq(skb);
  2975. goto next_desc;
  2976. }
  2977. if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  2978. last_byte = *(skb->data + length - 1);
  2979. if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
  2980. rx_desc->errors, length, last_byte)) {
  2981. spin_lock_irqsave(&adapter->stats_lock, flags);
  2982. e1000_tbi_adjust_stats(&adapter->hw,
  2983. &adapter->stats,
  2984. length, skb->data);
  2985. spin_unlock_irqrestore(&adapter->stats_lock,
  2986. flags);
  2987. length--;
  2988. } else {
  2989. dev_kfree_skb_irq(skb);
  2990. goto next_desc;
  2991. }
  2992. }
  2993. /* Good Receive */
  2994. skb_put(skb, length - ETHERNET_FCS_SIZE);
  2995. /* Receive Checksum Offload */
  2996. e1000_rx_checksum(adapter,
  2997. (uint32_t)(rx_desc->status) |
  2998. ((uint32_t)(rx_desc->errors) << 24),
  2999. rx_desc->csum, skb);
  3000. skb->protocol = eth_type_trans(skb, netdev);
  3001. #ifdef CONFIG_E1000_NAPI
  3002. if(unlikely(adapter->vlgrp &&
  3003. (rx_desc->status & E1000_RXD_STAT_VP))) {
  3004. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3005. le16_to_cpu(rx_desc->special) &
  3006. E1000_RXD_SPC_VLAN_MASK);
  3007. } else {
  3008. netif_receive_skb(skb);
  3009. }
  3010. #else /* CONFIG_E1000_NAPI */
  3011. if(unlikely(adapter->vlgrp &&
  3012. (rx_desc->status & E1000_RXD_STAT_VP))) {
  3013. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3014. le16_to_cpu(rx_desc->special) &
  3015. E1000_RXD_SPC_VLAN_MASK);
  3016. } else {
  3017. netif_rx(skb);
  3018. }
  3019. #endif /* CONFIG_E1000_NAPI */
  3020. netdev->last_rx = jiffies;
  3021. #ifdef CONFIG_E1000_MQ
  3022. rx_ring->rx_stats.packets++;
  3023. rx_ring->rx_stats.bytes += length;
  3024. #endif
  3025. next_desc:
  3026. rx_desc->status = 0;
  3027. buffer_info->skb = NULL;
  3028. if(unlikely(++i == rx_ring->count)) i = 0;
  3029. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3030. }
  3031. rx_ring->next_to_clean = i;
  3032. adapter->alloc_rx_buf(adapter, rx_ring);
  3033. return cleaned;
  3034. }
  3035. /**
  3036. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3037. * @adapter: board private structure
  3038. **/
  3039. static boolean_t
  3040. #ifdef CONFIG_E1000_NAPI
  3041. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3042. struct e1000_rx_ring *rx_ring,
  3043. int *work_done, int work_to_do)
  3044. #else
  3045. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3046. struct e1000_rx_ring *rx_ring)
  3047. #endif
  3048. {
  3049. union e1000_rx_desc_packet_split *rx_desc;
  3050. struct net_device *netdev = adapter->netdev;
  3051. struct pci_dev *pdev = adapter->pdev;
  3052. struct e1000_buffer *buffer_info;
  3053. struct e1000_ps_page *ps_page;
  3054. struct e1000_ps_page_dma *ps_page_dma;
  3055. struct sk_buff *skb;
  3056. unsigned int i, j;
  3057. uint32_t length, staterr;
  3058. boolean_t cleaned = FALSE;
  3059. i = rx_ring->next_to_clean;
  3060. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3061. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3062. while(staterr & E1000_RXD_STAT_DD) {
  3063. buffer_info = &rx_ring->buffer_info[i];
  3064. ps_page = &rx_ring->ps_page[i];
  3065. ps_page_dma = &rx_ring->ps_page_dma[i];
  3066. #ifdef CONFIG_E1000_NAPI
  3067. if(unlikely(*work_done >= work_to_do))
  3068. break;
  3069. (*work_done)++;
  3070. #endif
  3071. cleaned = TRUE;
  3072. pci_unmap_single(pdev, buffer_info->dma,
  3073. buffer_info->length,
  3074. PCI_DMA_FROMDEVICE);
  3075. skb = buffer_info->skb;
  3076. if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3077. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3078. " the full packet\n", netdev->name);
  3079. dev_kfree_skb_irq(skb);
  3080. goto next_desc;
  3081. }
  3082. if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3083. dev_kfree_skb_irq(skb);
  3084. goto next_desc;
  3085. }
  3086. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3087. if(unlikely(!length)) {
  3088. E1000_DBG("%s: Last part of the packet spanning"
  3089. " multiple descriptors\n", netdev->name);
  3090. dev_kfree_skb_irq(skb);
  3091. goto next_desc;
  3092. }
  3093. /* Good Receive */
  3094. skb_put(skb, length);
  3095. for(j = 0; j < adapter->rx_ps_pages; j++) {
  3096. if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3097. break;
  3098. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3099. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3100. ps_page_dma->ps_page_dma[j] = 0;
  3101. skb_shinfo(skb)->frags[j].page =
  3102. ps_page->ps_page[j];
  3103. ps_page->ps_page[j] = NULL;
  3104. skb_shinfo(skb)->frags[j].page_offset = 0;
  3105. skb_shinfo(skb)->frags[j].size = length;
  3106. skb_shinfo(skb)->nr_frags++;
  3107. skb->len += length;
  3108. skb->data_len += length;
  3109. }
  3110. e1000_rx_checksum(adapter, staterr,
  3111. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3112. skb->protocol = eth_type_trans(skb, netdev);
  3113. if(likely(rx_desc->wb.upper.header_status &
  3114. E1000_RXDPS_HDRSTAT_HDRSP)) {
  3115. adapter->rx_hdr_split++;
  3116. #ifdef HAVE_RX_ZERO_COPY
  3117. skb_shinfo(skb)->zero_copy = TRUE;
  3118. #endif
  3119. }
  3120. #ifdef CONFIG_E1000_NAPI
  3121. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3122. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3123. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3124. E1000_RXD_SPC_VLAN_MASK);
  3125. } else {
  3126. netif_receive_skb(skb);
  3127. }
  3128. #else /* CONFIG_E1000_NAPI */
  3129. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3130. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3131. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3132. E1000_RXD_SPC_VLAN_MASK);
  3133. } else {
  3134. netif_rx(skb);
  3135. }
  3136. #endif /* CONFIG_E1000_NAPI */
  3137. netdev->last_rx = jiffies;
  3138. #ifdef CONFIG_E1000_MQ
  3139. rx_ring->rx_stats.packets++;
  3140. rx_ring->rx_stats.bytes += length;
  3141. #endif
  3142. next_desc:
  3143. rx_desc->wb.middle.status_error &= ~0xFF;
  3144. buffer_info->skb = NULL;
  3145. if(unlikely(++i == rx_ring->count)) i = 0;
  3146. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3147. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3148. }
  3149. rx_ring->next_to_clean = i;
  3150. adapter->alloc_rx_buf(adapter, rx_ring);
  3151. return cleaned;
  3152. }
  3153. /**
  3154. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3155. * @adapter: address of board private structure
  3156. **/
  3157. static void
  3158. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3159. struct e1000_rx_ring *rx_ring)
  3160. {
  3161. struct net_device *netdev = adapter->netdev;
  3162. struct pci_dev *pdev = adapter->pdev;
  3163. struct e1000_rx_desc *rx_desc;
  3164. struct e1000_buffer *buffer_info;
  3165. struct sk_buff *skb;
  3166. unsigned int i;
  3167. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3168. i = rx_ring->next_to_use;
  3169. buffer_info = &rx_ring->buffer_info[i];
  3170. while(!buffer_info->skb) {
  3171. skb = dev_alloc_skb(bufsz);
  3172. if(unlikely(!skb)) {
  3173. /* Better luck next round */
  3174. break;
  3175. }
  3176. /* Fix for errata 23, can't cross 64kB boundary */
  3177. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3178. struct sk_buff *oldskb = skb;
  3179. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3180. "at %p\n", bufsz, skb->data);
  3181. /* Try again, without freeing the previous */
  3182. skb = dev_alloc_skb(bufsz);
  3183. /* Failed allocation, critical failure */
  3184. if (!skb) {
  3185. dev_kfree_skb(oldskb);
  3186. break;
  3187. }
  3188. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3189. /* give up */
  3190. dev_kfree_skb(skb);
  3191. dev_kfree_skb(oldskb);
  3192. break; /* while !buffer_info->skb */
  3193. } else {
  3194. /* Use new allocation */
  3195. dev_kfree_skb(oldskb);
  3196. }
  3197. }
  3198. /* Make buffer alignment 2 beyond a 16 byte boundary
  3199. * this will result in a 16 byte aligned IP header after
  3200. * the 14 byte MAC header is removed
  3201. */
  3202. skb_reserve(skb, NET_IP_ALIGN);
  3203. skb->dev = netdev;
  3204. buffer_info->skb = skb;
  3205. buffer_info->length = adapter->rx_buffer_len;
  3206. buffer_info->dma = pci_map_single(pdev,
  3207. skb->data,
  3208. adapter->rx_buffer_len,
  3209. PCI_DMA_FROMDEVICE);
  3210. /* Fix for errata 23, can't cross 64kB boundary */
  3211. if (!e1000_check_64k_bound(adapter,
  3212. (void *)(unsigned long)buffer_info->dma,
  3213. adapter->rx_buffer_len)) {
  3214. DPRINTK(RX_ERR, ERR,
  3215. "dma align check failed: %u bytes at %p\n",
  3216. adapter->rx_buffer_len,
  3217. (void *)(unsigned long)buffer_info->dma);
  3218. dev_kfree_skb(skb);
  3219. buffer_info->skb = NULL;
  3220. pci_unmap_single(pdev, buffer_info->dma,
  3221. adapter->rx_buffer_len,
  3222. PCI_DMA_FROMDEVICE);
  3223. break; /* while !buffer_info->skb */
  3224. }
  3225. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3226. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3227. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3228. /* Force memory writes to complete before letting h/w
  3229. * know there are new descriptors to fetch. (Only
  3230. * applicable for weak-ordered memory model archs,
  3231. * such as IA-64). */
  3232. wmb();
  3233. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3234. }
  3235. if(unlikely(++i == rx_ring->count)) i = 0;
  3236. buffer_info = &rx_ring->buffer_info[i];
  3237. }
  3238. rx_ring->next_to_use = i;
  3239. }
  3240. /**
  3241. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3242. * @adapter: address of board private structure
  3243. **/
  3244. static void
  3245. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3246. struct e1000_rx_ring *rx_ring)
  3247. {
  3248. struct net_device *netdev = adapter->netdev;
  3249. struct pci_dev *pdev = adapter->pdev;
  3250. union e1000_rx_desc_packet_split *rx_desc;
  3251. struct e1000_buffer *buffer_info;
  3252. struct e1000_ps_page *ps_page;
  3253. struct e1000_ps_page_dma *ps_page_dma;
  3254. struct sk_buff *skb;
  3255. unsigned int i, j;
  3256. i = rx_ring->next_to_use;
  3257. buffer_info = &rx_ring->buffer_info[i];
  3258. ps_page = &rx_ring->ps_page[i];
  3259. ps_page_dma = &rx_ring->ps_page_dma[i];
  3260. while(!buffer_info->skb) {
  3261. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3262. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  3263. if (j < adapter->rx_ps_pages) {
  3264. if (likely(!ps_page->ps_page[j])) {
  3265. ps_page->ps_page[j] =
  3266. alloc_page(GFP_ATOMIC);
  3267. if (unlikely(!ps_page->ps_page[j]))
  3268. goto no_buffers;
  3269. ps_page_dma->ps_page_dma[j] =
  3270. pci_map_page(pdev,
  3271. ps_page->ps_page[j],
  3272. 0, PAGE_SIZE,
  3273. PCI_DMA_FROMDEVICE);
  3274. }
  3275. /* Refresh the desc even if buffer_addrs didn't
  3276. * change because each write-back erases
  3277. * this info.
  3278. */
  3279. rx_desc->read.buffer_addr[j+1] =
  3280. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3281. } else
  3282. rx_desc->read.buffer_addr[j+1] = ~0;
  3283. }
  3284. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3285. if(unlikely(!skb))
  3286. break;
  3287. /* Make buffer alignment 2 beyond a 16 byte boundary
  3288. * this will result in a 16 byte aligned IP header after
  3289. * the 14 byte MAC header is removed
  3290. */
  3291. skb_reserve(skb, NET_IP_ALIGN);
  3292. skb->dev = netdev;
  3293. buffer_info->skb = skb;
  3294. buffer_info->length = adapter->rx_ps_bsize0;
  3295. buffer_info->dma = pci_map_single(pdev, skb->data,
  3296. adapter->rx_ps_bsize0,
  3297. PCI_DMA_FROMDEVICE);
  3298. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3299. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3300. /* Force memory writes to complete before letting h/w
  3301. * know there are new descriptors to fetch. (Only
  3302. * applicable for weak-ordered memory model archs,
  3303. * such as IA-64). */
  3304. wmb();
  3305. /* Hardware increments by 16 bytes, but packet split
  3306. * descriptors are 32 bytes...so we increment tail
  3307. * twice as much.
  3308. */
  3309. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3310. }
  3311. if(unlikely(++i == rx_ring->count)) i = 0;
  3312. buffer_info = &rx_ring->buffer_info[i];
  3313. ps_page = &rx_ring->ps_page[i];
  3314. ps_page_dma = &rx_ring->ps_page_dma[i];
  3315. }
  3316. no_buffers:
  3317. rx_ring->next_to_use = i;
  3318. }
  3319. /**
  3320. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3321. * @adapter:
  3322. **/
  3323. static void
  3324. e1000_smartspeed(struct e1000_adapter *adapter)
  3325. {
  3326. uint16_t phy_status;
  3327. uint16_t phy_ctrl;
  3328. if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3329. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3330. return;
  3331. if(adapter->smartspeed == 0) {
  3332. /* If Master/Slave config fault is asserted twice,
  3333. * we assume back-to-back */
  3334. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3335. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3336. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3337. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3338. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3339. if(phy_ctrl & CR_1000T_MS_ENABLE) {
  3340. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3341. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3342. phy_ctrl);
  3343. adapter->smartspeed++;
  3344. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3345. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3346. &phy_ctrl)) {
  3347. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3348. MII_CR_RESTART_AUTO_NEG);
  3349. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3350. phy_ctrl);
  3351. }
  3352. }
  3353. return;
  3354. } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3355. /* If still no link, perhaps using 2/3 pair cable */
  3356. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3357. phy_ctrl |= CR_1000T_MS_ENABLE;
  3358. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3359. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3360. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3361. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3362. MII_CR_RESTART_AUTO_NEG);
  3363. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3364. }
  3365. }
  3366. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3367. if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3368. adapter->smartspeed = 0;
  3369. }
  3370. /**
  3371. * e1000_ioctl -
  3372. * @netdev:
  3373. * @ifreq:
  3374. * @cmd:
  3375. **/
  3376. static int
  3377. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3378. {
  3379. switch (cmd) {
  3380. case SIOCGMIIPHY:
  3381. case SIOCGMIIREG:
  3382. case SIOCSMIIREG:
  3383. return e1000_mii_ioctl(netdev, ifr, cmd);
  3384. default:
  3385. return -EOPNOTSUPP;
  3386. }
  3387. }
  3388. /**
  3389. * e1000_mii_ioctl -
  3390. * @netdev:
  3391. * @ifreq:
  3392. * @cmd:
  3393. **/
  3394. static int
  3395. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3396. {
  3397. struct e1000_adapter *adapter = netdev_priv(netdev);
  3398. struct mii_ioctl_data *data = if_mii(ifr);
  3399. int retval;
  3400. uint16_t mii_reg;
  3401. uint16_t spddplx;
  3402. unsigned long flags;
  3403. if(adapter->hw.media_type != e1000_media_type_copper)
  3404. return -EOPNOTSUPP;
  3405. switch (cmd) {
  3406. case SIOCGMIIPHY:
  3407. data->phy_id = adapter->hw.phy_addr;
  3408. break;
  3409. case SIOCGMIIREG:
  3410. if(!capable(CAP_NET_ADMIN))
  3411. return -EPERM;
  3412. spin_lock_irqsave(&adapter->stats_lock, flags);
  3413. if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3414. &data->val_out)) {
  3415. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3416. return -EIO;
  3417. }
  3418. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3419. break;
  3420. case SIOCSMIIREG:
  3421. if(!capable(CAP_NET_ADMIN))
  3422. return -EPERM;
  3423. if(data->reg_num & ~(0x1F))
  3424. return -EFAULT;
  3425. mii_reg = data->val_in;
  3426. spin_lock_irqsave(&adapter->stats_lock, flags);
  3427. if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3428. mii_reg)) {
  3429. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3430. return -EIO;
  3431. }
  3432. if(adapter->hw.phy_type == e1000_phy_m88) {
  3433. switch (data->reg_num) {
  3434. case PHY_CTRL:
  3435. if(mii_reg & MII_CR_POWER_DOWN)
  3436. break;
  3437. if(mii_reg & MII_CR_AUTO_NEG_EN) {
  3438. adapter->hw.autoneg = 1;
  3439. adapter->hw.autoneg_advertised = 0x2F;
  3440. } else {
  3441. if (mii_reg & 0x40)
  3442. spddplx = SPEED_1000;
  3443. else if (mii_reg & 0x2000)
  3444. spddplx = SPEED_100;
  3445. else
  3446. spddplx = SPEED_10;
  3447. spddplx += (mii_reg & 0x100)
  3448. ? FULL_DUPLEX :
  3449. HALF_DUPLEX;
  3450. retval = e1000_set_spd_dplx(adapter,
  3451. spddplx);
  3452. if(retval) {
  3453. spin_unlock_irqrestore(
  3454. &adapter->stats_lock,
  3455. flags);
  3456. return retval;
  3457. }
  3458. }
  3459. if(netif_running(adapter->netdev)) {
  3460. e1000_down(adapter);
  3461. e1000_up(adapter);
  3462. } else
  3463. e1000_reset(adapter);
  3464. break;
  3465. case M88E1000_PHY_SPEC_CTRL:
  3466. case M88E1000_EXT_PHY_SPEC_CTRL:
  3467. if(e1000_phy_reset(&adapter->hw)) {
  3468. spin_unlock_irqrestore(
  3469. &adapter->stats_lock, flags);
  3470. return -EIO;
  3471. }
  3472. break;
  3473. }
  3474. } else {
  3475. switch (data->reg_num) {
  3476. case PHY_CTRL:
  3477. if(mii_reg & MII_CR_POWER_DOWN)
  3478. break;
  3479. if(netif_running(adapter->netdev)) {
  3480. e1000_down(adapter);
  3481. e1000_up(adapter);
  3482. } else
  3483. e1000_reset(adapter);
  3484. break;
  3485. }
  3486. }
  3487. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3488. break;
  3489. default:
  3490. return -EOPNOTSUPP;
  3491. }
  3492. return E1000_SUCCESS;
  3493. }
  3494. void
  3495. e1000_pci_set_mwi(struct e1000_hw *hw)
  3496. {
  3497. struct e1000_adapter *adapter = hw->back;
  3498. int ret_val = pci_set_mwi(adapter->pdev);
  3499. if(ret_val)
  3500. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3501. }
  3502. void
  3503. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3504. {
  3505. struct e1000_adapter *adapter = hw->back;
  3506. pci_clear_mwi(adapter->pdev);
  3507. }
  3508. void
  3509. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3510. {
  3511. struct e1000_adapter *adapter = hw->back;
  3512. pci_read_config_word(adapter->pdev, reg, value);
  3513. }
  3514. void
  3515. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3516. {
  3517. struct e1000_adapter *adapter = hw->back;
  3518. pci_write_config_word(adapter->pdev, reg, *value);
  3519. }
  3520. uint32_t
  3521. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3522. {
  3523. return inl(port);
  3524. }
  3525. void
  3526. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3527. {
  3528. outl(value, port);
  3529. }
  3530. static void
  3531. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3532. {
  3533. struct e1000_adapter *adapter = netdev_priv(netdev);
  3534. uint32_t ctrl, rctl;
  3535. e1000_irq_disable(adapter);
  3536. adapter->vlgrp = grp;
  3537. if(grp) {
  3538. /* enable VLAN tag insert/strip */
  3539. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3540. ctrl |= E1000_CTRL_VME;
  3541. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3542. /* enable VLAN receive filtering */
  3543. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3544. rctl |= E1000_RCTL_VFE;
  3545. rctl &= ~E1000_RCTL_CFIEN;
  3546. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3547. e1000_update_mng_vlan(adapter);
  3548. } else {
  3549. /* disable VLAN tag insert/strip */
  3550. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3551. ctrl &= ~E1000_CTRL_VME;
  3552. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3553. /* disable VLAN filtering */
  3554. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3555. rctl &= ~E1000_RCTL_VFE;
  3556. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3557. if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3558. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3559. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3560. }
  3561. }
  3562. e1000_irq_enable(adapter);
  3563. }
  3564. static void
  3565. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3566. {
  3567. struct e1000_adapter *adapter = netdev_priv(netdev);
  3568. uint32_t vfta, index;
  3569. if((adapter->hw.mng_cookie.status &
  3570. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3571. (vid == adapter->mng_vlan_id))
  3572. return;
  3573. /* add VID to filter table */
  3574. index = (vid >> 5) & 0x7F;
  3575. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3576. vfta |= (1 << (vid & 0x1F));
  3577. e1000_write_vfta(&adapter->hw, index, vfta);
  3578. }
  3579. static void
  3580. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3581. {
  3582. struct e1000_adapter *adapter = netdev_priv(netdev);
  3583. uint32_t vfta, index;
  3584. e1000_irq_disable(adapter);
  3585. if(adapter->vlgrp)
  3586. adapter->vlgrp->vlan_devices[vid] = NULL;
  3587. e1000_irq_enable(adapter);
  3588. if((adapter->hw.mng_cookie.status &
  3589. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3590. (vid == adapter->mng_vlan_id))
  3591. return;
  3592. /* remove VID from filter table */
  3593. index = (vid >> 5) & 0x7F;
  3594. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3595. vfta &= ~(1 << (vid & 0x1F));
  3596. e1000_write_vfta(&adapter->hw, index, vfta);
  3597. }
  3598. static void
  3599. e1000_restore_vlan(struct e1000_adapter *adapter)
  3600. {
  3601. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3602. if(adapter->vlgrp) {
  3603. uint16_t vid;
  3604. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3605. if(!adapter->vlgrp->vlan_devices[vid])
  3606. continue;
  3607. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3608. }
  3609. }
  3610. }
  3611. int
  3612. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3613. {
  3614. adapter->hw.autoneg = 0;
  3615. /* Fiber NICs only allow 1000 gbps Full duplex */
  3616. if((adapter->hw.media_type == e1000_media_type_fiber) &&
  3617. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3618. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3619. return -EINVAL;
  3620. }
  3621. switch(spddplx) {
  3622. case SPEED_10 + DUPLEX_HALF:
  3623. adapter->hw.forced_speed_duplex = e1000_10_half;
  3624. break;
  3625. case SPEED_10 + DUPLEX_FULL:
  3626. adapter->hw.forced_speed_duplex = e1000_10_full;
  3627. break;
  3628. case SPEED_100 + DUPLEX_HALF:
  3629. adapter->hw.forced_speed_duplex = e1000_100_half;
  3630. break;
  3631. case SPEED_100 + DUPLEX_FULL:
  3632. adapter->hw.forced_speed_duplex = e1000_100_full;
  3633. break;
  3634. case SPEED_1000 + DUPLEX_FULL:
  3635. adapter->hw.autoneg = 1;
  3636. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3637. break;
  3638. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3639. default:
  3640. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3641. return -EINVAL;
  3642. }
  3643. return 0;
  3644. }
  3645. #ifdef CONFIG_PM
  3646. static int
  3647. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3648. {
  3649. struct net_device *netdev = pci_get_drvdata(pdev);
  3650. struct e1000_adapter *adapter = netdev_priv(netdev);
  3651. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3652. uint32_t wufc = adapter->wol;
  3653. netif_device_detach(netdev);
  3654. if(netif_running(netdev))
  3655. e1000_down(adapter);
  3656. status = E1000_READ_REG(&adapter->hw, STATUS);
  3657. if(status & E1000_STATUS_LU)
  3658. wufc &= ~E1000_WUFC_LNKC;
  3659. if(wufc) {
  3660. e1000_setup_rctl(adapter);
  3661. e1000_set_multi(netdev);
  3662. /* turn on all-multi mode if wake on multicast is enabled */
  3663. if(adapter->wol & E1000_WUFC_MC) {
  3664. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3665. rctl |= E1000_RCTL_MPE;
  3666. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3667. }
  3668. if(adapter->hw.mac_type >= e1000_82540) {
  3669. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3670. /* advertise wake from D3Cold */
  3671. #define E1000_CTRL_ADVD3WUC 0x00100000
  3672. /* phy power management enable */
  3673. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3674. ctrl |= E1000_CTRL_ADVD3WUC |
  3675. E1000_CTRL_EN_PHY_PWR_MGMT;
  3676. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3677. }
  3678. if(adapter->hw.media_type == e1000_media_type_fiber ||
  3679. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3680. /* keep the laser running in D3 */
  3681. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3682. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3683. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3684. }
  3685. /* Allow time for pending master requests to run */
  3686. e1000_disable_pciex_master(&adapter->hw);
  3687. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3688. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3689. pci_enable_wake(pdev, 3, 1);
  3690. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3691. } else {
  3692. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3693. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3694. pci_enable_wake(pdev, 3, 0);
  3695. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3696. }
  3697. pci_save_state(pdev);
  3698. if(adapter->hw.mac_type >= e1000_82540 &&
  3699. adapter->hw.media_type == e1000_media_type_copper) {
  3700. manc = E1000_READ_REG(&adapter->hw, MANC);
  3701. if(manc & E1000_MANC_SMBUS_EN) {
  3702. manc |= E1000_MANC_ARP_EN;
  3703. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3704. pci_enable_wake(pdev, 3, 1);
  3705. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3706. }
  3707. }
  3708. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3709. * would have already happened in close and is redundant. */
  3710. e1000_release_hw_control(adapter);
  3711. pci_disable_device(pdev);
  3712. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3713. return 0;
  3714. }
  3715. static int
  3716. e1000_resume(struct pci_dev *pdev)
  3717. {
  3718. struct net_device *netdev = pci_get_drvdata(pdev);
  3719. struct e1000_adapter *adapter = netdev_priv(netdev);
  3720. uint32_t manc, ret_val;
  3721. pci_set_power_state(pdev, PCI_D0);
  3722. pci_restore_state(pdev);
  3723. ret_val = pci_enable_device(pdev);
  3724. pci_set_master(pdev);
  3725. pci_enable_wake(pdev, PCI_D3hot, 0);
  3726. pci_enable_wake(pdev, PCI_D3cold, 0);
  3727. e1000_reset(adapter);
  3728. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3729. if(netif_running(netdev))
  3730. e1000_up(adapter);
  3731. netif_device_attach(netdev);
  3732. if(adapter->hw.mac_type >= e1000_82540 &&
  3733. adapter->hw.media_type == e1000_media_type_copper) {
  3734. manc = E1000_READ_REG(&adapter->hw, MANC);
  3735. manc &= ~(E1000_MANC_ARP_EN);
  3736. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3737. }
  3738. /* If the controller is 82573 and f/w is AMT, do not set
  3739. * DRV_LOAD until the interface is up. For all other cases,
  3740. * let the f/w know that the h/w is now under the control
  3741. * of the driver. */
  3742. if (adapter->hw.mac_type != e1000_82573 ||
  3743. !e1000_check_mng_mode(&adapter->hw))
  3744. e1000_get_hw_control(adapter);
  3745. return 0;
  3746. }
  3747. #endif
  3748. #ifdef CONFIG_NET_POLL_CONTROLLER
  3749. /*
  3750. * Polling 'interrupt' - used by things like netconsole to send skbs
  3751. * without having to re-enable interrupts. It's not called while
  3752. * the interrupt routine is executing.
  3753. */
  3754. static void
  3755. e1000_netpoll(struct net_device *netdev)
  3756. {
  3757. struct e1000_adapter *adapter = netdev_priv(netdev);
  3758. disable_irq(adapter->pdev->irq);
  3759. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3760. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3761. enable_irq(adapter->pdev->irq);
  3762. }
  3763. #endif
  3764. /* e1000_main.c */