samsung_pwm_timer.c 11 KB

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  1. /*
  2. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com/
  4. *
  5. * samsung - Common hr-timer support (s3c and s5p)
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/interrupt.h>
  12. #include <linux/irq.h>
  13. #include <linux/err.h>
  14. #include <linux/clk.h>
  15. #include <linux/clockchips.h>
  16. #include <linux/list.h>
  17. #include <linux/module.h>
  18. #include <linux/of.h>
  19. #include <linux/of_address.h>
  20. #include <linux/of_irq.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <clocksource/samsung_pwm.h>
  24. #include <asm/sched_clock.h>
  25. /*
  26. * Clocksource driver
  27. */
  28. #define REG_TCFG0 0x00
  29. #define REG_TCFG1 0x04
  30. #define REG_TCON 0x08
  31. #define REG_TINT_CSTAT 0x44
  32. #define REG_TCNTB(chan) (0x0c + 12 * (chan))
  33. #define REG_TCMPB(chan) (0x10 + 12 * (chan))
  34. #define TCFG0_PRESCALER_MASK 0xff
  35. #define TCFG0_PRESCALER1_SHIFT 8
  36. #define TCFG1_SHIFT(x) ((x) * 4)
  37. #define TCFG1_MUX_MASK 0xf
  38. #define TCON_START(chan) (1 << (4 * (chan) + 0))
  39. #define TCON_MANUALUPDATE(chan) (1 << (4 * (chan) + 1))
  40. #define TCON_INVERT(chan) (1 << (4 * (chan) + 2))
  41. #define TCON_AUTORELOAD(chan) (1 << (4 * (chan) + 3))
  42. struct samsung_timer_source {
  43. unsigned int event_id;
  44. unsigned int source_id;
  45. unsigned int tcnt_max;
  46. unsigned int tscaler_div;
  47. unsigned int tdiv;
  48. };
  49. static struct samsung_pwm *pwm;
  50. static struct clk *timerclk;
  51. static struct samsung_timer_source timer_source;
  52. static unsigned long clock_count_per_tick;
  53. static void samsung_timer_set_prescale(struct samsung_pwm *pwm,
  54. unsigned int channel, u16 prescale)
  55. {
  56. unsigned long flags;
  57. u8 shift = 0;
  58. u32 reg;
  59. if (channel >= 2)
  60. shift = TCFG0_PRESCALER1_SHIFT;
  61. spin_lock_irqsave(&pwm->slock, flags);
  62. reg = readl(pwm->base + REG_TCFG0);
  63. reg &= ~(TCFG0_PRESCALER_MASK << shift);
  64. reg |= (prescale - 1) << shift;
  65. writel(reg, pwm->base + REG_TCFG0);
  66. spin_unlock_irqrestore(&pwm->slock, flags);
  67. }
  68. static void samsung_timer_set_divisor(struct samsung_pwm *pwm,
  69. unsigned int channel, u8 divisor)
  70. {
  71. u8 shift = TCFG1_SHIFT(channel);
  72. unsigned long flags;
  73. u32 reg;
  74. u8 bits;
  75. bits = (fls(divisor) - 1) - pwm->variant.div_base;
  76. spin_lock_irqsave(&pwm->slock, flags);
  77. reg = readl(pwm->base + REG_TCFG1);
  78. reg &= ~(TCFG1_MUX_MASK << shift);
  79. reg |= bits << shift;
  80. writel(reg, pwm->base + REG_TCFG1);
  81. spin_unlock_irqrestore(&pwm->slock, flags);
  82. }
  83. static void samsung_time_stop(unsigned int channel)
  84. {
  85. unsigned long tcon;
  86. unsigned long flags;
  87. if (channel > 0)
  88. ++channel;
  89. spin_lock_irqsave(&pwm->slock, flags);
  90. tcon = __raw_readl(pwm->base + REG_TCON);
  91. tcon &= ~TCON_START(channel);
  92. __raw_writel(tcon, pwm->base + REG_TCON);
  93. spin_unlock_irqrestore(&pwm->slock, flags);
  94. }
  95. static void samsung_time_setup(unsigned int channel, unsigned long tcnt)
  96. {
  97. unsigned long tcon;
  98. unsigned long flags;
  99. unsigned int tcon_chan = channel;
  100. if (tcon_chan > 0)
  101. ++tcon_chan;
  102. spin_lock_irqsave(&pwm->slock, flags);
  103. tcon = __raw_readl(pwm->base + REG_TCON);
  104. tcnt--;
  105. tcon &= ~(TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan));
  106. tcon |= TCON_MANUALUPDATE(tcon_chan);
  107. __raw_writel(tcnt, pwm->base + REG_TCNTB(channel));
  108. __raw_writel(tcnt, pwm->base + REG_TCMPB(channel));
  109. __raw_writel(tcon, pwm->base + REG_TCON);
  110. spin_unlock_irqrestore(&pwm->slock, flags);
  111. }
  112. static void samsung_time_start(unsigned int channel, bool periodic)
  113. {
  114. unsigned long tcon;
  115. unsigned long flags;
  116. if (channel > 0)
  117. ++channel;
  118. spin_lock_irqsave(&pwm->slock, flags);
  119. tcon = __raw_readl(pwm->base + REG_TCON);
  120. tcon &= ~TCON_MANUALUPDATE(channel);
  121. tcon |= TCON_START(channel);
  122. if (periodic)
  123. tcon |= TCON_AUTORELOAD(channel);
  124. else
  125. tcon &= ~TCON_AUTORELOAD(channel);
  126. __raw_writel(tcon, pwm->base + REG_TCON);
  127. spin_unlock_irqrestore(&pwm->slock, flags);
  128. }
  129. static int samsung_set_next_event(unsigned long cycles,
  130. struct clock_event_device *evt)
  131. {
  132. samsung_time_setup(timer_source.event_id, cycles);
  133. samsung_time_start(timer_source.event_id, false);
  134. return 0;
  135. }
  136. static void samsung_timer_resume(void)
  137. {
  138. /* event timer restart */
  139. samsung_time_setup(timer_source.event_id, clock_count_per_tick);
  140. samsung_time_start(timer_source.event_id, true);
  141. /* source timer restart */
  142. samsung_time_setup(timer_source.source_id, timer_source.tcnt_max);
  143. samsung_time_start(timer_source.source_id, true);
  144. }
  145. static void samsung_set_mode(enum clock_event_mode mode,
  146. struct clock_event_device *evt)
  147. {
  148. samsung_time_stop(timer_source.event_id);
  149. switch (mode) {
  150. case CLOCK_EVT_MODE_PERIODIC:
  151. samsung_time_setup(timer_source.event_id, clock_count_per_tick);
  152. samsung_time_start(timer_source.event_id, true);
  153. break;
  154. case CLOCK_EVT_MODE_ONESHOT:
  155. break;
  156. case CLOCK_EVT_MODE_UNUSED:
  157. case CLOCK_EVT_MODE_SHUTDOWN:
  158. break;
  159. case CLOCK_EVT_MODE_RESUME:
  160. samsung_timer_resume();
  161. break;
  162. }
  163. }
  164. static struct clock_event_device time_event_device = {
  165. .name = "samsung_event_timer",
  166. .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
  167. .rating = 200,
  168. .set_next_event = samsung_set_next_event,
  169. .set_mode = samsung_set_mode,
  170. };
  171. static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id)
  172. {
  173. struct clock_event_device *evt = dev_id;
  174. if (pwm->variant.has_tint_cstat) {
  175. u32 mask = (1 << timer_source.event_id);
  176. writel(mask | (mask << 5), pwm->base + REG_TINT_CSTAT);
  177. }
  178. evt->event_handler(evt);
  179. return IRQ_HANDLED;
  180. }
  181. static struct irqaction samsung_clock_event_irq = {
  182. .name = "samsung_time_irq",
  183. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  184. .handler = samsung_clock_event_isr,
  185. .dev_id = &time_event_device,
  186. };
  187. static void __init samsung_clockevent_init(void)
  188. {
  189. unsigned long pclk;
  190. unsigned long clock_rate;
  191. unsigned int irq_number;
  192. pclk = clk_get_rate(timerclk);
  193. samsung_timer_set_prescale(pwm, timer_source.event_id,
  194. timer_source.tscaler_div);
  195. samsung_timer_set_divisor(pwm, timer_source.event_id,
  196. timer_source.tdiv);
  197. clock_rate = pclk / (timer_source.tscaler_div * timer_source.tdiv);
  198. clock_count_per_tick = clock_rate / HZ;
  199. time_event_device.cpumask = cpumask_of(0);
  200. clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
  201. irq_number = pwm->irq[timer_source.event_id];
  202. setup_irq(irq_number, &samsung_clock_event_irq);
  203. if (pwm->variant.has_tint_cstat) {
  204. u32 mask = (1 << timer_source.event_id);
  205. writel(mask | (mask << 5), pwm->base + REG_TINT_CSTAT);
  206. }
  207. }
  208. static void __iomem *samsung_timer_reg(void)
  209. {
  210. switch (timer_source.source_id) {
  211. case 0:
  212. case 1:
  213. case 2:
  214. case 3:
  215. return pwm->base + timer_source.source_id * 0x0c + 0x14;
  216. case 4:
  217. return pwm->base + 0x40;
  218. default:
  219. BUG();
  220. }
  221. }
  222. /*
  223. * Override the global weak sched_clock symbol with this
  224. * local implementation which uses the clocksource to get some
  225. * better resolution when scheduling the kernel. We accept that
  226. * this wraps around for now, since it is just a relative time
  227. * stamp. (Inspired by U300 implementation.)
  228. */
  229. static u32 notrace samsung_read_sched_clock(void)
  230. {
  231. void __iomem *reg = samsung_timer_reg();
  232. if (!reg)
  233. return 0;
  234. return ~__raw_readl(reg);
  235. }
  236. static void __init samsung_clocksource_init(void)
  237. {
  238. void __iomem *reg = samsung_timer_reg();
  239. unsigned long pclk;
  240. unsigned long clock_rate;
  241. int ret;
  242. pclk = clk_get_rate(timerclk);
  243. samsung_timer_set_prescale(pwm, timer_source.source_id,
  244. timer_source.tscaler_div);
  245. samsung_timer_set_divisor(pwm, timer_source.source_id,
  246. timer_source.tdiv);
  247. clock_rate = pclk / (timer_source.tscaler_div * timer_source.tdiv);
  248. samsung_time_setup(timer_source.source_id, timer_source.tcnt_max);
  249. samsung_time_start(timer_source.source_id, true);
  250. setup_sched_clock(samsung_read_sched_clock,
  251. pwm->variant.bits, clock_rate);
  252. ret = clocksource_mmio_init(reg, "samsung_clocksource_timer",
  253. clock_rate, 250, pwm->variant.bits,
  254. clocksource_mmio_readl_down);
  255. if (ret)
  256. panic("samsung_clocksource_timer: can't register clocksource\n");
  257. }
  258. static void __init samsung_timer_resources(void)
  259. {
  260. timerclk = clk_get(NULL, "timers");
  261. if (IS_ERR(timerclk))
  262. panic("failed to get timers clock for timer");
  263. clk_prepare_enable(timerclk);
  264. timer_source.tcnt_max = (1UL << pwm->variant.bits) - 1;
  265. if (pwm->variant.bits == 16) {
  266. timer_source.tscaler_div = 25;
  267. timer_source.tdiv = 2;
  268. } else {
  269. timer_source.tscaler_div = 2;
  270. timer_source.tdiv = 1;
  271. }
  272. }
  273. /*
  274. * PWM master driver
  275. */
  276. static void __init samsung_pwm_clocksource_init(void)
  277. {
  278. u8 mask;
  279. int channel;
  280. if (!pwm)
  281. panic("no pwm clocksource device found");
  282. mask = ~pwm->variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1);
  283. channel = fls(mask) - 1;
  284. if (channel < 0)
  285. panic("failed to find PWM channel for clocksource");
  286. timer_source.source_id = channel;
  287. mask &= ~(1 << channel);
  288. channel = fls(mask) - 1;
  289. if (channel < 0)
  290. panic("failed to find PWM channel for clock event");
  291. timer_source.event_id = channel;
  292. samsung_timer_resources();
  293. samsung_clockevent_init();
  294. samsung_clocksource_init();
  295. }
  296. static void __init samsung_pwm_alloc(struct device_node *np,
  297. const struct samsung_pwm_variant *variant)
  298. {
  299. struct resource res;
  300. struct property *prop;
  301. const __be32 *cur;
  302. u32 val;
  303. int i;
  304. pwm = kzalloc(sizeof(*pwm), GFP_KERNEL);
  305. if (!pwm) {
  306. pr_err("%s: could not allocate PWM device struct\n", __func__);
  307. return;
  308. }
  309. memcpy(&pwm->variant, variant, sizeof(pwm->variant));
  310. spin_lock_init(&pwm->slock);
  311. for (i = 0; i < SAMSUNG_PWM_NUM; ++i)
  312. pwm->irq[i] = irq_of_parse_and_map(np, i);
  313. of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) {
  314. if (val >= SAMSUNG_PWM_NUM) {
  315. pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n",
  316. __func__);
  317. continue;
  318. }
  319. pwm->variant.output_mask |= 1 << val;
  320. }
  321. of_address_to_resource(np, 0, &res);
  322. if (!request_mem_region(res.start,
  323. resource_size(&res), "samsung-pwm")) {
  324. pr_err("%s: failed to request IO mem region\n", __func__);
  325. return;
  326. }
  327. pwm->base = ioremap(res.start, resource_size(&res));
  328. if (!pwm->base) {
  329. pr_err("%s: failed to map PWM registers\n", __func__);
  330. release_mem_region(res.start, resource_size(&res));
  331. return;
  332. }
  333. samsung_pwm_clocksource_init();
  334. }
  335. static const struct samsung_pwm_variant s3c24xx_variant = {
  336. .bits = 16,
  337. .div_base = 1,
  338. .has_tint_cstat = false,
  339. .tclk_mask = (1 << 4),
  340. };
  341. static void __init s3c2410_pwm_clocksource_init(struct device_node *np)
  342. {
  343. samsung_pwm_alloc(np, &s3c24xx_variant);
  344. }
  345. CLOCKSOURCE_OF_DECLARE(s3c2410_pwm, "samsung,s3c2410-pwm", s3c2410_pwm_clocksource_init);
  346. static const struct samsung_pwm_variant s3c64xx_variant = {
  347. .bits = 32,
  348. .div_base = 0,
  349. .has_tint_cstat = true,
  350. .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5),
  351. };
  352. static void __init s3c64xx_pwm_clocksource_init(struct device_node *np)
  353. {
  354. samsung_pwm_alloc(np, &s3c64xx_variant);
  355. }
  356. CLOCKSOURCE_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init);
  357. static const struct samsung_pwm_variant s5p64x0_variant = {
  358. .bits = 32,
  359. .div_base = 0,
  360. .has_tint_cstat = true,
  361. .tclk_mask = 0,
  362. };
  363. static void __init s5p64x0_pwm_clocksource_init(struct device_node *np)
  364. {
  365. samsung_pwm_alloc(np, &s5p64x0_variant);
  366. }
  367. CLOCKSOURCE_OF_DECLARE(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init);
  368. static const struct samsung_pwm_variant s5p_variant = {
  369. .bits = 32,
  370. .div_base = 0,
  371. .has_tint_cstat = true,
  372. .tclk_mask = (1 << 5),
  373. };
  374. static void __init s5p_pwm_clocksource_init(struct device_node *np)
  375. {
  376. samsung_pwm_alloc(np, &s5p_variant);
  377. }
  378. CLOCKSOURCE_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init);