cx88-dvb.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776
  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "nxt200x.h"
  41. #include "cx24123.h"
  42. #include "isl6421.h"
  43. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  44. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  45. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  46. MODULE_LICENSE("GPL");
  47. static unsigned int debug = 0;
  48. module_param(debug, int, 0644);
  49. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  50. #define dprintk(level,fmt, arg...) if (debug >= level) \
  51. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  52. /* ------------------------------------------------------------------ */
  53. static int dvb_buf_setup(struct videobuf_queue *q,
  54. unsigned int *count, unsigned int *size)
  55. {
  56. struct cx8802_dev *dev = q->priv_data;
  57. dev->ts_packet_size = 188 * 4;
  58. dev->ts_packet_count = 32;
  59. *size = dev->ts_packet_size * dev->ts_packet_count;
  60. *count = 32;
  61. return 0;
  62. }
  63. static int dvb_buf_prepare(struct videobuf_queue *q,
  64. struct videobuf_buffer *vb, enum v4l2_field field)
  65. {
  66. struct cx8802_dev *dev = q->priv_data;
  67. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  68. }
  69. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  70. {
  71. struct cx8802_dev *dev = q->priv_data;
  72. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  73. }
  74. static void dvb_buf_release(struct videobuf_queue *q,
  75. struct videobuf_buffer *vb)
  76. {
  77. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  78. }
  79. static struct videobuf_queue_ops dvb_qops = {
  80. .buf_setup = dvb_buf_setup,
  81. .buf_prepare = dvb_buf_prepare,
  82. .buf_queue = dvb_buf_queue,
  83. .buf_release = dvb_buf_release,
  84. };
  85. /* ------------------------------------------------------------------ */
  86. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  87. {
  88. struct cx8802_dev *dev= fe->dvb->priv;
  89. struct cx8802_driver *drv = NULL;
  90. int ret = 0;
  91. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  92. if (drv) {
  93. if (acquire)
  94. ret = drv->request_acquire(drv);
  95. else
  96. ret = drv->request_release(drv);
  97. }
  98. return ret;
  99. }
  100. /* ------------------------------------------------------------------ */
  101. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  102. {
  103. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  104. static u8 reset [] = { RESET, 0x80 };
  105. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  106. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  107. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  108. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  109. mt352_write(fe, clock_config, sizeof(clock_config));
  110. udelay(200);
  111. mt352_write(fe, reset, sizeof(reset));
  112. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  113. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  114. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  115. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  116. return 0;
  117. }
  118. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  119. {
  120. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  121. static u8 reset [] = { RESET, 0x80 };
  122. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  123. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  124. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  125. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  126. mt352_write(fe, clock_config, sizeof(clock_config));
  127. udelay(200);
  128. mt352_write(fe, reset, sizeof(reset));
  129. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  130. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  131. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  132. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  133. return 0;
  134. }
  135. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  136. {
  137. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  138. static u8 reset [] = { 0x50, 0x80 };
  139. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  140. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  141. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  142. static u8 dntv_extra[] = { 0xB5, 0x7A };
  143. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  144. mt352_write(fe, clock_config, sizeof(clock_config));
  145. udelay(2000);
  146. mt352_write(fe, reset, sizeof(reset));
  147. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  148. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  149. udelay(2000);
  150. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  151. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  152. return 0;
  153. }
  154. static struct mt352_config dvico_fusionhdtv = {
  155. .demod_address = 0x0f,
  156. .demod_init = dvico_fusionhdtv_demod_init,
  157. };
  158. static struct mt352_config dntv_live_dvbt_config = {
  159. .demod_address = 0x0f,
  160. .demod_init = dntv_live_dvbt_demod_init,
  161. };
  162. static struct mt352_config dvico_fusionhdtv_dual = {
  163. .demod_address = 0x0f,
  164. .demod_init = dvico_dual_demod_init,
  165. };
  166. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  167. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  168. {
  169. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  170. static u8 reset [] = { 0x50, 0x80 };
  171. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  172. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  173. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  174. static u8 dntv_extra[] = { 0xB5, 0x7A };
  175. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  176. mt352_write(fe, clock_config, sizeof(clock_config));
  177. udelay(2000);
  178. mt352_write(fe, reset, sizeof(reset));
  179. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  180. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  181. udelay(2000);
  182. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  183. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  184. return 0;
  185. }
  186. static struct mt352_config dntv_live_dvbt_pro_config = {
  187. .demod_address = 0x0f,
  188. .no_tuner = 1,
  189. .demod_init = dntv_live_dvbt_pro_demod_init,
  190. };
  191. #endif
  192. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  193. .demod_address = 0x0f,
  194. .no_tuner = 1,
  195. };
  196. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  197. .demod_address = 0x0f,
  198. };
  199. static struct cx22702_config connexant_refboard_config = {
  200. .demod_address = 0x43,
  201. .output_mode = CX22702_SERIAL_OUTPUT,
  202. };
  203. static struct cx22702_config hauppauge_hvr_config = {
  204. .demod_address = 0x63,
  205. .output_mode = CX22702_SERIAL_OUTPUT,
  206. };
  207. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  208. {
  209. struct cx8802_dev *dev= fe->dvb->priv;
  210. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  211. return 0;
  212. }
  213. static struct or51132_config pchdtv_hd3000 = {
  214. .demod_address = 0x15,
  215. .set_ts_params = or51132_set_ts_param,
  216. };
  217. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  218. {
  219. struct cx8802_dev *dev= fe->dvb->priv;
  220. struct cx88_core *core = dev->core;
  221. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  222. if (index == 0)
  223. cx_clear(MO_GP0_IO, 8);
  224. else
  225. cx_set(MO_GP0_IO, 8);
  226. return 0;
  227. }
  228. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  229. {
  230. struct cx8802_dev *dev= fe->dvb->priv;
  231. if (is_punctured)
  232. dev->ts_gen_cntrl |= 0x04;
  233. else
  234. dev->ts_gen_cntrl &= ~0x04;
  235. return 0;
  236. }
  237. static struct lgdt330x_config fusionhdtv_3_gold = {
  238. .demod_address = 0x0e,
  239. .demod_chip = LGDT3302,
  240. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  241. .set_ts_params = lgdt330x_set_ts_param,
  242. };
  243. static struct lgdt330x_config fusionhdtv_5_gold = {
  244. .demod_address = 0x0e,
  245. .demod_chip = LGDT3303,
  246. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  247. .set_ts_params = lgdt330x_set_ts_param,
  248. };
  249. static struct lgdt330x_config pchdtv_hd5500 = {
  250. .demod_address = 0x59,
  251. .demod_chip = LGDT3303,
  252. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  253. .set_ts_params = lgdt330x_set_ts_param,
  254. };
  255. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  256. {
  257. struct cx8802_dev *dev= fe->dvb->priv;
  258. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  259. return 0;
  260. }
  261. static struct nxt200x_config ati_hdtvwonder = {
  262. .demod_address = 0x0a,
  263. .set_ts_params = nxt200x_set_ts_param,
  264. };
  265. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  266. int is_punctured)
  267. {
  268. struct cx8802_dev *dev= fe->dvb->priv;
  269. dev->ts_gen_cntrl = 0x02;
  270. return 0;
  271. }
  272. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  273. fe_sec_voltage_t voltage)
  274. {
  275. struct cx8802_dev *dev= fe->dvb->priv;
  276. struct cx88_core *core = dev->core;
  277. if (voltage == SEC_VOLTAGE_OFF)
  278. cx_write(MO_GP0_IO, 0x000006fb);
  279. else
  280. cx_write(MO_GP0_IO, 0x000006f9);
  281. if (core->prev_set_voltage)
  282. return core->prev_set_voltage(fe, voltage);
  283. return 0;
  284. }
  285. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  286. fe_sec_voltage_t voltage)
  287. {
  288. struct cx8802_dev *dev= fe->dvb->priv;
  289. struct cx88_core *core = dev->core;
  290. if (voltage == SEC_VOLTAGE_OFF) {
  291. dprintk(1,"LNB Voltage OFF\n");
  292. cx_write(MO_GP0_IO, 0x0000efff);
  293. }
  294. if (core->prev_set_voltage)
  295. return core->prev_set_voltage(fe, voltage);
  296. return 0;
  297. }
  298. static struct cx24123_config geniatech_dvbs_config = {
  299. .demod_address = 0x55,
  300. .set_ts_params = cx24123_set_ts_param,
  301. };
  302. static struct cx24123_config hauppauge_novas_config = {
  303. .demod_address = 0x55,
  304. .set_ts_params = cx24123_set_ts_param,
  305. };
  306. static struct cx24123_config kworld_dvbs_100_config = {
  307. .demod_address = 0x15,
  308. .set_ts_params = cx24123_set_ts_param,
  309. .lnb_polarity = 1,
  310. };
  311. static int dvb_register(struct cx8802_dev *dev)
  312. {
  313. /* init struct videobuf_dvb */
  314. dev->dvb.name = dev->core->name;
  315. dev->ts_gen_cntrl = 0x0c;
  316. /* init frontend */
  317. switch (dev->core->boardnr) {
  318. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  319. dev->dvb.frontend = dvb_attach(cx22702_attach,
  320. &connexant_refboard_config,
  321. &dev->core->i2c_adap);
  322. if (dev->dvb.frontend != NULL) {
  323. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  324. &dev->core->i2c_adap,
  325. DVB_PLL_THOMSON_DTT759X);
  326. }
  327. break;
  328. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  329. case CX88_BOARD_CONEXANT_DVB_T1:
  330. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  331. case CX88_BOARD_WINFAST_DTV1000:
  332. dev->dvb.frontend = dvb_attach(cx22702_attach,
  333. &connexant_refboard_config,
  334. &dev->core->i2c_adap);
  335. if (dev->dvb.frontend != NULL) {
  336. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  337. &dev->core->i2c_adap,
  338. DVB_PLL_THOMSON_DTT7579);
  339. }
  340. break;
  341. case CX88_BOARD_WINFAST_DTV2000H:
  342. case CX88_BOARD_HAUPPAUGE_HVR1100:
  343. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  344. case CX88_BOARD_HAUPPAUGE_HVR1300:
  345. case CX88_BOARD_HAUPPAUGE_HVR3000:
  346. dev->dvb.frontend = dvb_attach(cx22702_attach,
  347. &hauppauge_hvr_config,
  348. &dev->core->i2c_adap);
  349. if (dev->dvb.frontend != NULL) {
  350. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  351. &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
  352. }
  353. break;
  354. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  355. dev->dvb.frontend = dvb_attach(mt352_attach,
  356. &dvico_fusionhdtv,
  357. &dev->core->i2c_adap);
  358. if (dev->dvb.frontend != NULL) {
  359. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  360. NULL, DVB_PLL_THOMSON_DTT7579);
  361. break;
  362. }
  363. /* ZL10353 replaces MT352 on later cards */
  364. dev->dvb.frontend = dvb_attach(zl10353_attach,
  365. &dvico_fusionhdtv_plus_v1_1,
  366. &dev->core->i2c_adap);
  367. if (dev->dvb.frontend != NULL) {
  368. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  369. NULL, DVB_PLL_THOMSON_DTT7579);
  370. }
  371. break;
  372. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  373. /* The tin box says DEE1601, but it seems to be DTT7579
  374. * compatible, with a slightly different MT352 AGC gain. */
  375. dev->dvb.frontend = dvb_attach(mt352_attach,
  376. &dvico_fusionhdtv_dual,
  377. &dev->core->i2c_adap);
  378. if (dev->dvb.frontend != NULL) {
  379. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  380. NULL, DVB_PLL_THOMSON_DTT7579);
  381. break;
  382. }
  383. /* ZL10353 replaces MT352 on later cards */
  384. dev->dvb.frontend = dvb_attach(zl10353_attach,
  385. &dvico_fusionhdtv_plus_v1_1,
  386. &dev->core->i2c_adap);
  387. if (dev->dvb.frontend != NULL) {
  388. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  389. NULL, DVB_PLL_THOMSON_DTT7579);
  390. }
  391. break;
  392. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  393. dev->dvb.frontend = dvb_attach(mt352_attach,
  394. &dvico_fusionhdtv,
  395. &dev->core->i2c_adap);
  396. if (dev->dvb.frontend != NULL) {
  397. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  398. NULL, DVB_PLL_LG_Z201);
  399. }
  400. break;
  401. case CX88_BOARD_KWORLD_DVB_T:
  402. case CX88_BOARD_DNTV_LIVE_DVB_T:
  403. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  404. dev->dvb.frontend = dvb_attach(mt352_attach,
  405. &dntv_live_dvbt_config,
  406. &dev->core->i2c_adap);
  407. if (dev->dvb.frontend != NULL) {
  408. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  409. NULL, DVB_PLL_UNKNOWN_1);
  410. }
  411. break;
  412. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  413. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  414. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  415. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  416. &dev->vp3054->adap);
  417. if (dev->dvb.frontend != NULL) {
  418. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  419. &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
  420. }
  421. #else
  422. printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
  423. #endif
  424. break;
  425. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  426. dev->dvb.frontend = dvb_attach(zl10353_attach,
  427. &dvico_fusionhdtv_hybrid,
  428. &dev->core->i2c_adap);
  429. if (dev->dvb.frontend != NULL) {
  430. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  431. &dev->core->i2c_adap,
  432. DVB_PLL_THOMSON_FE6600);
  433. }
  434. break;
  435. case CX88_BOARD_PCHDTV_HD3000:
  436. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  437. &dev->core->i2c_adap);
  438. if (dev->dvb.frontend != NULL) {
  439. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  440. &dev->core->i2c_adap,
  441. DVB_PLL_THOMSON_DTT761X);
  442. }
  443. break;
  444. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  445. dev->ts_gen_cntrl = 0x08;
  446. {
  447. /* Do a hardware reset of chip before using it. */
  448. struct cx88_core *core = dev->core;
  449. cx_clear(MO_GP0_IO, 1);
  450. mdelay(100);
  451. cx_set(MO_GP0_IO, 1);
  452. mdelay(200);
  453. /* Select RF connector callback */
  454. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  455. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  456. &fusionhdtv_3_gold,
  457. &dev->core->i2c_adap);
  458. if (dev->dvb.frontend != NULL) {
  459. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  460. &dev->core->i2c_adap,
  461. DVB_PLL_MICROTUNE_4042);
  462. }
  463. }
  464. break;
  465. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  466. dev->ts_gen_cntrl = 0x08;
  467. {
  468. /* Do a hardware reset of chip before using it. */
  469. struct cx88_core *core = dev->core;
  470. cx_clear(MO_GP0_IO, 1);
  471. mdelay(100);
  472. cx_set(MO_GP0_IO, 9);
  473. mdelay(200);
  474. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  475. &fusionhdtv_3_gold,
  476. &dev->core->i2c_adap);
  477. if (dev->dvb.frontend != NULL) {
  478. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  479. &dev->core->i2c_adap,
  480. DVB_PLL_THOMSON_DTT761X);
  481. }
  482. }
  483. break;
  484. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  485. dev->ts_gen_cntrl = 0x08;
  486. {
  487. /* Do a hardware reset of chip before using it. */
  488. struct cx88_core *core = dev->core;
  489. cx_clear(MO_GP0_IO, 1);
  490. mdelay(100);
  491. cx_set(MO_GP0_IO, 1);
  492. mdelay(200);
  493. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  494. &fusionhdtv_5_gold,
  495. &dev->core->i2c_adap);
  496. if (dev->dvb.frontend != NULL) {
  497. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  498. &dev->core->i2c_adap,
  499. DVB_PLL_LG_TDVS_H06XF);
  500. }
  501. }
  502. break;
  503. case CX88_BOARD_PCHDTV_HD5500:
  504. dev->ts_gen_cntrl = 0x08;
  505. {
  506. /* Do a hardware reset of chip before using it. */
  507. struct cx88_core *core = dev->core;
  508. cx_clear(MO_GP0_IO, 1);
  509. mdelay(100);
  510. cx_set(MO_GP0_IO, 1);
  511. mdelay(200);
  512. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  513. &pchdtv_hd5500,
  514. &dev->core->i2c_adap);
  515. if (dev->dvb.frontend != NULL) {
  516. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  517. &dev->core->i2c_adap,
  518. DVB_PLL_LG_TDVS_H06XF);
  519. }
  520. }
  521. break;
  522. case CX88_BOARD_ATI_HDTVWONDER:
  523. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  524. &ati_hdtvwonder,
  525. &dev->core->i2c_adap);
  526. if (dev->dvb.frontend != NULL) {
  527. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  528. NULL, DVB_PLL_TUV1236D);
  529. }
  530. break;
  531. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  532. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  533. dev->dvb.frontend = dvb_attach(cx24123_attach,
  534. &hauppauge_novas_config,
  535. &dev->core->i2c_adap);
  536. if (dev->dvb.frontend) {
  537. dvb_attach(isl6421_attach, dev->dvb.frontend,
  538. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  539. }
  540. break;
  541. case CX88_BOARD_KWORLD_DVBS_100:
  542. dev->dvb.frontend = dvb_attach(cx24123_attach,
  543. &kworld_dvbs_100_config,
  544. &dev->core->i2c_adap);
  545. if (dev->dvb.frontend) {
  546. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  547. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  548. }
  549. break;
  550. case CX88_BOARD_GENIATECH_DVBS:
  551. dev->dvb.frontend = dvb_attach(cx24123_attach,
  552. &geniatech_dvbs_config,
  553. &dev->core->i2c_adap);
  554. if (dev->dvb.frontend) {
  555. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  556. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  557. }
  558. break;
  559. default:
  560. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  561. dev->core->name);
  562. break;
  563. }
  564. if (NULL == dev->dvb.frontend) {
  565. printk(KERN_ERR "%s/2: frontend initialization failed\n", dev->core->name);
  566. return -1;
  567. }
  568. /* Ensure all frontends negotiate bus access */
  569. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  570. /* Put the analog decoder in standby to keep it quiet */
  571. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  572. /* register everything */
  573. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  574. }
  575. /* ----------------------------------------------------------- */
  576. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  577. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  578. {
  579. struct cx88_core *core = drv->core;
  580. int err = 0;
  581. dprintk( 1, "%s\n", __FUNCTION__);
  582. switch (core->boardnr) {
  583. case CX88_BOARD_HAUPPAUGE_HVR1300:
  584. /* We arrive here with either the cx23416 or the cx22702
  585. * on the bus. Take the bus from the cx23416 and enable the
  586. * cx22702 demod
  587. */
  588. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  589. cx_clear(MO_GP0_IO, 0x00000004);
  590. udelay(1000);
  591. break;
  592. default:
  593. err = -ENODEV;
  594. }
  595. return err;
  596. }
  597. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  598. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  599. {
  600. struct cx88_core *core = drv->core;
  601. int err = 0;
  602. dprintk( 1, "%s\n", __FUNCTION__);
  603. switch (core->boardnr) {
  604. case CX88_BOARD_HAUPPAUGE_HVR1300:
  605. /* Do Nothing, leave the cx22702 on the bus. */
  606. break;
  607. default:
  608. err = -ENODEV;
  609. }
  610. return err;
  611. }
  612. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  613. {
  614. struct cx88_core *core = drv->core;
  615. struct cx8802_dev *dev = drv->core->dvbdev;
  616. int err;
  617. dprintk( 1, "%s\n", __FUNCTION__);
  618. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  619. core->boardnr,
  620. core->name,
  621. core->pci_bus,
  622. core->pci_slot);
  623. err = -ENODEV;
  624. if (!(core->board.mpeg & CX88_MPEG_DVB))
  625. goto fail_core;
  626. /* If vp3054 isn't enabled, a stub will just return 0 */
  627. err = vp3054_i2c_probe(dev);
  628. if (0 != err)
  629. goto fail_core;
  630. /* dvb stuff */
  631. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  632. videobuf_queue_pci_init(&dev->dvb.dvbq, &dvb_qops,
  633. dev->pci, &dev->slock,
  634. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  635. V4L2_FIELD_TOP,
  636. sizeof(struct cx88_buffer),
  637. dev);
  638. err = dvb_register(dev);
  639. if (err != 0)
  640. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  641. core->name, err);
  642. fail_core:
  643. return err;
  644. }
  645. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  646. {
  647. struct cx8802_dev *dev = drv->core->dvbdev;
  648. /* dvb */
  649. videobuf_dvb_unregister(&dev->dvb);
  650. vp3054_i2c_remove(dev);
  651. return 0;
  652. }
  653. static struct cx8802_driver cx8802_dvb_driver = {
  654. .type_id = CX88_MPEG_DVB,
  655. .hw_access = CX8802_DRVCTL_SHARED,
  656. .probe = cx8802_dvb_probe,
  657. .remove = cx8802_dvb_remove,
  658. .advise_acquire = cx8802_dvb_advise_acquire,
  659. .advise_release = cx8802_dvb_advise_release,
  660. };
  661. static int dvb_init(void)
  662. {
  663. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  664. (CX88_VERSION_CODE >> 16) & 0xff,
  665. (CX88_VERSION_CODE >> 8) & 0xff,
  666. CX88_VERSION_CODE & 0xff);
  667. #ifdef SNAPSHOT
  668. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  669. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  670. #endif
  671. return cx8802_register_driver(&cx8802_dvb_driver);
  672. }
  673. static void dvb_fini(void)
  674. {
  675. cx8802_unregister_driver(&cx8802_dvb_driver);
  676. }
  677. module_init(dvb_init);
  678. module_exit(dvb_fini);
  679. /*
  680. * Local variables:
  681. * c-basic-offset: 8
  682. * compile-command: "make DVB=1"
  683. * End:
  684. */