iwl3945-base.c 127 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define IWL39_VERSION "1.2.26k" VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. #define DRV_VERSION IWL39_VERSION
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /*************** STATION TABLE MANAGEMENT ****
  85. * mac80211 should be examined to determine if sta_info is duplicating
  86. * the functionality provided here
  87. */
  88. /**************************************************************/
  89. #if 0 /* temporary disable till we add real remove station */
  90. /**
  91. * iwl3945_remove_station - Remove driver's knowledge of station.
  92. *
  93. * NOTE: This does not remove station from device's station table.
  94. */
  95. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  96. {
  97. int index = IWL_INVALID_STATION;
  98. int i;
  99. unsigned long flags;
  100. spin_lock_irqsave(&priv->sta_lock, flags);
  101. if (is_ap)
  102. index = IWL_AP_ID;
  103. else if (is_broadcast_ether_addr(addr))
  104. index = priv->hw_params.bcast_sta_id;
  105. else
  106. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  107. if (priv->stations_39[i].used &&
  108. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  109. addr)) {
  110. index = i;
  111. break;
  112. }
  113. if (unlikely(index == IWL_INVALID_STATION))
  114. goto out;
  115. if (priv->stations_39[index].used) {
  116. priv->stations_39[index].used = 0;
  117. priv->num_stations--;
  118. }
  119. BUG_ON(priv->num_stations < 0);
  120. out:
  121. spin_unlock_irqrestore(&priv->sta_lock, flags);
  122. return 0;
  123. }
  124. #endif
  125. /**
  126. * iwl3945_clear_stations_table - Clear the driver's station table
  127. *
  128. * NOTE: This does not clear or otherwise alter the device's station table.
  129. */
  130. void iwl3945_clear_stations_table(struct iwl_priv *priv)
  131. {
  132. unsigned long flags;
  133. spin_lock_irqsave(&priv->sta_lock, flags);
  134. priv->num_stations = 0;
  135. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  136. spin_unlock_irqrestore(&priv->sta_lock, flags);
  137. }
  138. /**
  139. * iwl3945_add_station - Add station to station tables in driver and device
  140. */
  141. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags, struct ieee80211_sta_ht_cap *ht_info)
  142. {
  143. int i;
  144. int index = IWL_INVALID_STATION;
  145. struct iwl3945_station_entry *station;
  146. unsigned long flags_spin;
  147. u8 rate;
  148. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  149. if (is_ap)
  150. index = IWL_AP_ID;
  151. else if (is_broadcast_ether_addr(addr))
  152. index = priv->hw_params.bcast_sta_id;
  153. else
  154. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  155. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  156. addr)) {
  157. index = i;
  158. break;
  159. }
  160. if (!priv->stations_39[i].used &&
  161. index == IWL_INVALID_STATION)
  162. index = i;
  163. }
  164. /* These two conditions has the same outcome but keep them separate
  165. since they have different meaning */
  166. if (unlikely(index == IWL_INVALID_STATION)) {
  167. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  168. return index;
  169. }
  170. if (priv->stations_39[index].used &&
  171. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  172. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  173. return index;
  174. }
  175. IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
  176. station = &priv->stations_39[index];
  177. station->used = 1;
  178. priv->num_stations++;
  179. /* Set up the REPLY_ADD_STA command to send to device */
  180. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  181. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  182. station->sta.mode = 0;
  183. station->sta.sta.sta_id = index;
  184. station->sta.station_flags = 0;
  185. if (priv->band == IEEE80211_BAND_5GHZ)
  186. rate = IWL_RATE_6M_PLCP;
  187. else
  188. rate = IWL_RATE_1M_PLCP;
  189. /* Turn on both antennas for the station... */
  190. station->sta.rate_n_flags =
  191. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  192. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  193. /* Add station to device's station table */
  194. iwl_send_add_sta(priv,
  195. (struct iwl_addsta_cmd *)&station->sta, flags);
  196. return index;
  197. }
  198. /**
  199. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  200. * @priv: eeprom and antenna fields are used to determine antenna flags
  201. *
  202. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  203. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  204. *
  205. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  206. * IWL_ANTENNA_MAIN - Force MAIN antenna
  207. * IWL_ANTENNA_AUX - Force AUX antenna
  208. */
  209. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  210. {
  211. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  212. switch (iwl3945_mod_params.antenna) {
  213. case IWL_ANTENNA_DIVERSITY:
  214. return 0;
  215. case IWL_ANTENNA_MAIN:
  216. if (eeprom->antenna_switch_type)
  217. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  218. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  219. case IWL_ANTENNA_AUX:
  220. if (eeprom->antenna_switch_type)
  221. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  222. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  223. }
  224. /* bad antenna selector value */
  225. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  226. iwl3945_mod_params.antenna);
  227. return 0; /* "diversity" is default if error */
  228. }
  229. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  230. struct ieee80211_key_conf *keyconf,
  231. u8 sta_id)
  232. {
  233. unsigned long flags;
  234. __le16 key_flags = 0;
  235. int ret;
  236. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  237. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  238. if (sta_id == priv->hw_params.bcast_sta_id)
  239. key_flags |= STA_KEY_MULTICAST_MSK;
  240. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  241. keyconf->hw_key_idx = keyconf->keyidx;
  242. key_flags &= ~STA_KEY_FLG_INVALID;
  243. spin_lock_irqsave(&priv->sta_lock, flags);
  244. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  245. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  246. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  247. keyconf->keylen);
  248. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  249. keyconf->keylen);
  250. if ((priv->stations_39[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  251. == STA_KEY_FLG_NO_ENC)
  252. priv->stations_39[sta_id].sta.key.key_offset =
  253. iwl_get_free_ucode_key_index(priv);
  254. /* else, we are overriding an existing key => no need to allocated room
  255. * in uCode. */
  256. WARN(priv->stations_39[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  257. "no space for a new key");
  258. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  259. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  260. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  261. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  262. ret = iwl_send_add_sta(priv,
  263. (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC);
  264. spin_unlock_irqrestore(&priv->sta_lock, flags);
  265. return ret;
  266. }
  267. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  268. struct ieee80211_key_conf *keyconf,
  269. u8 sta_id)
  270. {
  271. return -EOPNOTSUPP;
  272. }
  273. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  274. struct ieee80211_key_conf *keyconf,
  275. u8 sta_id)
  276. {
  277. return -EOPNOTSUPP;
  278. }
  279. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  280. {
  281. unsigned long flags;
  282. spin_lock_irqsave(&priv->sta_lock, flags);
  283. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  284. memset(&priv->stations_39[sta_id].sta.key, 0,
  285. sizeof(struct iwl4965_keyinfo));
  286. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  287. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  288. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  289. spin_unlock_irqrestore(&priv->sta_lock, flags);
  290. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  291. iwl_send_add_sta(priv,
  292. (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
  293. return 0;
  294. }
  295. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  296. struct ieee80211_key_conf *keyconf, u8 sta_id)
  297. {
  298. int ret = 0;
  299. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  300. switch (keyconf->alg) {
  301. case ALG_CCMP:
  302. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  303. break;
  304. case ALG_TKIP:
  305. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  306. break;
  307. case ALG_WEP:
  308. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  309. break;
  310. default:
  311. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  312. ret = -EINVAL;
  313. }
  314. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  315. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  316. sta_id, ret);
  317. return ret;
  318. }
  319. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  320. {
  321. int ret = -EOPNOTSUPP;
  322. return ret;
  323. }
  324. static int iwl3945_set_static_key(struct iwl_priv *priv,
  325. struct ieee80211_key_conf *key)
  326. {
  327. if (key->alg == ALG_WEP)
  328. return -EOPNOTSUPP;
  329. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  330. return -EINVAL;
  331. }
  332. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  333. {
  334. struct list_head *element;
  335. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  336. priv->frames_count);
  337. while (!list_empty(&priv->free_frames)) {
  338. element = priv->free_frames.next;
  339. list_del(element);
  340. kfree(list_entry(element, struct iwl3945_frame, list));
  341. priv->frames_count--;
  342. }
  343. if (priv->frames_count) {
  344. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  345. priv->frames_count);
  346. priv->frames_count = 0;
  347. }
  348. }
  349. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  350. {
  351. struct iwl3945_frame *frame;
  352. struct list_head *element;
  353. if (list_empty(&priv->free_frames)) {
  354. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  355. if (!frame) {
  356. IWL_ERR(priv, "Could not allocate frame!\n");
  357. return NULL;
  358. }
  359. priv->frames_count++;
  360. return frame;
  361. }
  362. element = priv->free_frames.next;
  363. list_del(element);
  364. return list_entry(element, struct iwl3945_frame, list);
  365. }
  366. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  367. {
  368. memset(frame, 0, sizeof(*frame));
  369. list_add(&frame->list, &priv->free_frames);
  370. }
  371. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  372. struct ieee80211_hdr *hdr,
  373. int left)
  374. {
  375. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  376. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  377. (priv->iw_mode != NL80211_IFTYPE_AP)))
  378. return 0;
  379. if (priv->ibss_beacon->len > left)
  380. return 0;
  381. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  382. return priv->ibss_beacon->len;
  383. }
  384. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  385. {
  386. struct iwl3945_frame *frame;
  387. unsigned int frame_size;
  388. int rc;
  389. u8 rate;
  390. frame = iwl3945_get_free_frame(priv);
  391. if (!frame) {
  392. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  393. "command.\n");
  394. return -ENOMEM;
  395. }
  396. rate = iwl_rate_get_lowest_plcp(priv);
  397. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  398. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  399. &frame->u.cmd[0]);
  400. iwl3945_free_frame(priv, frame);
  401. return rc;
  402. }
  403. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  404. {
  405. if (priv->shared_virt)
  406. pci_free_consistent(priv->pci_dev,
  407. sizeof(struct iwl3945_shared),
  408. priv->shared_virt,
  409. priv->shared_phys);
  410. }
  411. #define MAX_UCODE_BEACON_INTERVAL 1024
  412. #define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
  413. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  414. {
  415. u16 new_val = 0;
  416. u16 beacon_factor = 0;
  417. beacon_factor =
  418. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  419. / MAX_UCODE_BEACON_INTERVAL;
  420. new_val = beacon_val / beacon_factor;
  421. return cpu_to_le16(new_val);
  422. }
  423. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  424. {
  425. u64 interval_tm_unit;
  426. u64 tsf, result;
  427. unsigned long flags;
  428. struct ieee80211_conf *conf = NULL;
  429. u16 beacon_int = 0;
  430. conf = ieee80211_get_hw_conf(priv->hw);
  431. spin_lock_irqsave(&priv->lock, flags);
  432. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  433. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  434. tsf = priv->timestamp;
  435. beacon_int = priv->beacon_int;
  436. spin_unlock_irqrestore(&priv->lock, flags);
  437. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  438. if (beacon_int == 0) {
  439. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  440. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  441. } else {
  442. priv->rxon_timing.beacon_interval =
  443. cpu_to_le16(beacon_int);
  444. priv->rxon_timing.beacon_interval =
  445. iwl3945_adjust_beacon_interval(
  446. le16_to_cpu(priv->rxon_timing.beacon_interval));
  447. }
  448. priv->rxon_timing.atim_window = 0;
  449. } else {
  450. priv->rxon_timing.beacon_interval =
  451. iwl3945_adjust_beacon_interval(conf->beacon_int);
  452. /* TODO: we need to get atim_window from upper stack
  453. * for now we set to 0 */
  454. priv->rxon_timing.atim_window = 0;
  455. }
  456. interval_tm_unit =
  457. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  458. result = do_div(tsf, interval_tm_unit);
  459. priv->rxon_timing.beacon_init_val =
  460. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  461. IWL_DEBUG_ASSOC(priv,
  462. "beacon interval %d beacon timer %d beacon tim %d\n",
  463. le16_to_cpu(priv->rxon_timing.beacon_interval),
  464. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  465. le16_to_cpu(priv->rxon_timing.atim_window));
  466. }
  467. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  468. struct ieee80211_tx_info *info,
  469. struct iwl_cmd *cmd,
  470. struct sk_buff *skb_frag,
  471. int sta_id)
  472. {
  473. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  474. struct iwl3945_hw_key *keyinfo =
  475. &priv->stations_39[sta_id].keyinfo;
  476. switch (keyinfo->alg) {
  477. case ALG_CCMP:
  478. tx->sec_ctl = TX_CMD_SEC_CCM;
  479. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  480. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  481. break;
  482. case ALG_TKIP:
  483. break;
  484. case ALG_WEP:
  485. tx->sec_ctl = TX_CMD_SEC_WEP |
  486. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  487. if (keyinfo->keylen == 13)
  488. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  489. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  490. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  491. "with key %d\n", info->control.hw_key->hw_key_idx);
  492. break;
  493. default:
  494. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  495. break;
  496. }
  497. }
  498. /*
  499. * handle build REPLY_TX command notification.
  500. */
  501. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  502. struct iwl_cmd *cmd,
  503. struct ieee80211_tx_info *info,
  504. struct ieee80211_hdr *hdr, u8 std_id)
  505. {
  506. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  507. __le32 tx_flags = tx->tx_flags;
  508. __le16 fc = hdr->frame_control;
  509. u8 rc_flags = info->control.rates[0].flags;
  510. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  511. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  512. tx_flags |= TX_CMD_FLG_ACK_MSK;
  513. if (ieee80211_is_mgmt(fc))
  514. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  515. if (ieee80211_is_probe_resp(fc) &&
  516. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  517. tx_flags |= TX_CMD_FLG_TSF_MSK;
  518. } else {
  519. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  520. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  521. }
  522. tx->sta_id = std_id;
  523. if (ieee80211_has_morefrags(fc))
  524. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  525. if (ieee80211_is_data_qos(fc)) {
  526. u8 *qc = ieee80211_get_qos_ctl(hdr);
  527. tx->tid_tspec = qc[0] & 0xf;
  528. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  529. } else {
  530. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  531. }
  532. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  533. tx_flags |= TX_CMD_FLG_RTS_MSK;
  534. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  535. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  536. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  537. tx_flags |= TX_CMD_FLG_CTS_MSK;
  538. }
  539. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  540. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  541. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  542. if (ieee80211_is_mgmt(fc)) {
  543. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  544. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  545. else
  546. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  547. } else {
  548. tx->timeout.pm_frame_timeout = 0;
  549. #ifdef CONFIG_IWLWIFI_LEDS
  550. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  551. #endif
  552. }
  553. tx->driver_txop = 0;
  554. tx->tx_flags = tx_flags;
  555. tx->next_frame_len = 0;
  556. }
  557. /*
  558. * start REPLY_TX command process
  559. */
  560. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  561. {
  562. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  563. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  564. struct iwl3945_tx_cmd *tx;
  565. struct iwl_tx_queue *txq = NULL;
  566. struct iwl_queue *q = NULL;
  567. struct iwl_cmd *out_cmd = NULL;
  568. dma_addr_t phys_addr;
  569. dma_addr_t txcmd_phys;
  570. int txq_id = skb_get_queue_mapping(skb);
  571. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  572. u8 id;
  573. u8 unicast;
  574. u8 sta_id;
  575. u8 tid = 0;
  576. u16 seq_number = 0;
  577. __le16 fc;
  578. u8 wait_write_ptr = 0;
  579. u8 *qc = NULL;
  580. unsigned long flags;
  581. int rc;
  582. spin_lock_irqsave(&priv->lock, flags);
  583. if (iwl_is_rfkill(priv)) {
  584. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  585. goto drop_unlock;
  586. }
  587. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  588. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  589. goto drop_unlock;
  590. }
  591. unicast = !is_multicast_ether_addr(hdr->addr1);
  592. id = 0;
  593. fc = hdr->frame_control;
  594. #ifdef CONFIG_IWLWIFI_DEBUG
  595. if (ieee80211_is_auth(fc))
  596. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  597. else if (ieee80211_is_assoc_req(fc))
  598. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  599. else if (ieee80211_is_reassoc_req(fc))
  600. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  601. #endif
  602. /* drop all data frame if we are not associated */
  603. if (ieee80211_is_data(fc) &&
  604. (!iwl_is_monitor_mode(priv)) && /* packet injection */
  605. (!iwl_is_associated(priv) ||
  606. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  607. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  608. goto drop_unlock;
  609. }
  610. spin_unlock_irqrestore(&priv->lock, flags);
  611. hdr_len = ieee80211_hdrlen(fc);
  612. /* Find (or create) index into station table for destination station */
  613. sta_id = iwl_get_sta_id(priv, hdr);
  614. if (sta_id == IWL_INVALID_STATION) {
  615. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  616. hdr->addr1);
  617. goto drop;
  618. }
  619. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  620. if (ieee80211_is_data_qos(fc)) {
  621. qc = ieee80211_get_qos_ctl(hdr);
  622. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  623. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  624. IEEE80211_SCTL_SEQ;
  625. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  626. (hdr->seq_ctrl &
  627. cpu_to_le16(IEEE80211_SCTL_FRAG));
  628. seq_number += 0x10;
  629. }
  630. /* Descriptor for chosen Tx queue */
  631. txq = &priv->txq[txq_id];
  632. q = &txq->q;
  633. spin_lock_irqsave(&priv->lock, flags);
  634. idx = get_cmd_index(q, q->write_ptr, 0);
  635. /* Set up driver data for this TFD */
  636. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  637. txq->txb[q->write_ptr].skb[0] = skb;
  638. /* Init first empty entry in queue's array of Tx/cmd buffers */
  639. out_cmd = txq->cmd[idx];
  640. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  641. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  642. memset(tx, 0, sizeof(*tx));
  643. /*
  644. * Set up the Tx-command (not MAC!) header.
  645. * Store the chosen Tx queue and TFD index within the sequence field;
  646. * after Tx, uCode's Tx response will return this value so driver can
  647. * locate the frame within the tx queue and do post-tx processing.
  648. */
  649. out_cmd->hdr.cmd = REPLY_TX;
  650. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  651. INDEX_TO_SEQ(q->write_ptr)));
  652. /* Copy MAC header from skb into command buffer */
  653. memcpy(tx->hdr, hdr, hdr_len);
  654. if (info->control.hw_key)
  655. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  656. /* TODO need this for burst mode later on */
  657. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  658. /* set is_hcca to 0; it probably will never be implemented */
  659. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  660. /* Total # bytes to be transmitted */
  661. len = (u16)skb->len;
  662. tx->len = cpu_to_le16(len);
  663. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  664. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  665. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  666. txq->need_update = 1;
  667. if (qc)
  668. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  669. } else {
  670. wait_write_ptr = 1;
  671. txq->need_update = 0;
  672. }
  673. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  674. le16_to_cpu(out_cmd->hdr.sequence));
  675. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
  676. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  677. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  678. ieee80211_hdrlen(fc));
  679. /*
  680. * Use the first empty entry in this queue's command buffer array
  681. * to contain the Tx command and MAC header concatenated together
  682. * (payload data will be in another buffer).
  683. * Size of this varies, due to varying MAC header length.
  684. * If end is not dword aligned, we'll have 2 extra bytes at the end
  685. * of the MAC header (device reads on dword boundaries).
  686. * We'll tell device about this padding later.
  687. */
  688. len = sizeof(struct iwl3945_tx_cmd) +
  689. sizeof(struct iwl_cmd_header) + hdr_len;
  690. len_org = len;
  691. len = (len + 3) & ~3;
  692. if (len_org != len)
  693. len_org = 1;
  694. else
  695. len_org = 0;
  696. /* Physical address of this Tx command's header (not MAC header!),
  697. * within command buffer array. */
  698. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  699. len, PCI_DMA_TODEVICE);
  700. /* we do not map meta data ... so we can safely access address to
  701. * provide to unmap command*/
  702. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  703. pci_unmap_len_set(&out_cmd->meta, len, len);
  704. /* Add buffer containing Tx command and MAC(!) header to TFD's
  705. * first entry */
  706. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  707. txcmd_phys, len, 1, 0);
  708. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  709. * if any (802.11 null frames have no payload). */
  710. len = skb->len - hdr_len;
  711. if (len) {
  712. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  713. len, PCI_DMA_TODEVICE);
  714. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  715. phys_addr, len,
  716. 0, U32_PAD(len));
  717. }
  718. /* Tell device the write index *just past* this latest filled TFD */
  719. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  720. rc = iwl_txq_update_write_ptr(priv, txq);
  721. spin_unlock_irqrestore(&priv->lock, flags);
  722. if (rc)
  723. return rc;
  724. if ((iwl_queue_space(q) < q->high_mark)
  725. && priv->mac80211_registered) {
  726. if (wait_write_ptr) {
  727. spin_lock_irqsave(&priv->lock, flags);
  728. txq->need_update = 1;
  729. iwl_txq_update_write_ptr(priv, txq);
  730. spin_unlock_irqrestore(&priv->lock, flags);
  731. }
  732. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  733. }
  734. return 0;
  735. drop_unlock:
  736. spin_unlock_irqrestore(&priv->lock, flags);
  737. drop:
  738. return -1;
  739. }
  740. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  741. #include "iwl-spectrum.h"
  742. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  743. #define BEACON_TIME_MASK_HIGH 0xFF000000
  744. #define TIME_UNIT 1024
  745. /*
  746. * extended beacon time format
  747. * time in usec will be changed into a 32-bit value in 8:24 format
  748. * the high 1 byte is the beacon counts
  749. * the lower 3 bytes is the time in usec within one beacon interval
  750. */
  751. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  752. {
  753. u32 quot;
  754. u32 rem;
  755. u32 interval = beacon_interval * 1024;
  756. if (!interval || !usec)
  757. return 0;
  758. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  759. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  760. return (quot << 24) + rem;
  761. }
  762. /* base is usually what we get from ucode with each received frame,
  763. * the same as HW timer counter counting down
  764. */
  765. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  766. {
  767. u32 base_low = base & BEACON_TIME_MASK_LOW;
  768. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  769. u32 interval = beacon_interval * TIME_UNIT;
  770. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  771. (addon & BEACON_TIME_MASK_HIGH);
  772. if (base_low > addon_low)
  773. res += base_low - addon_low;
  774. else if (base_low < addon_low) {
  775. res += interval + base_low - addon_low;
  776. res += (1 << 24);
  777. } else
  778. res += (1 << 24);
  779. return cpu_to_le32(res);
  780. }
  781. static int iwl3945_get_measurement(struct iwl_priv *priv,
  782. struct ieee80211_measurement_params *params,
  783. u8 type)
  784. {
  785. struct iwl_spectrum_cmd spectrum;
  786. struct iwl_rx_packet *res;
  787. struct iwl_host_cmd cmd = {
  788. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  789. .data = (void *)&spectrum,
  790. .meta.flags = CMD_WANT_SKB,
  791. };
  792. u32 add_time = le64_to_cpu(params->start_time);
  793. int rc;
  794. int spectrum_resp_status;
  795. int duration = le16_to_cpu(params->duration);
  796. if (iwl_is_associated(priv))
  797. add_time =
  798. iwl3945_usecs_to_beacons(
  799. le64_to_cpu(params->start_time) - priv->last_tsf,
  800. le16_to_cpu(priv->rxon_timing.beacon_interval));
  801. memset(&spectrum, 0, sizeof(spectrum));
  802. spectrum.channel_count = cpu_to_le16(1);
  803. spectrum.flags =
  804. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  805. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  806. cmd.len = sizeof(spectrum);
  807. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  808. if (iwl_is_associated(priv))
  809. spectrum.start_time =
  810. iwl3945_add_beacon_time(priv->last_beacon_time,
  811. add_time,
  812. le16_to_cpu(priv->rxon_timing.beacon_interval));
  813. else
  814. spectrum.start_time = 0;
  815. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  816. spectrum.channels[0].channel = params->channel;
  817. spectrum.channels[0].type = type;
  818. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  819. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  820. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  821. rc = iwl_send_cmd_sync(priv, &cmd);
  822. if (rc)
  823. return rc;
  824. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  825. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  826. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  827. rc = -EIO;
  828. }
  829. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  830. switch (spectrum_resp_status) {
  831. case 0: /* Command will be handled */
  832. if (res->u.spectrum.id != 0xff) {
  833. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  834. res->u.spectrum.id);
  835. priv->measurement_status &= ~MEASUREMENT_READY;
  836. }
  837. priv->measurement_status |= MEASUREMENT_ACTIVE;
  838. rc = 0;
  839. break;
  840. case 1: /* Command will not be handled */
  841. rc = -EAGAIN;
  842. break;
  843. }
  844. dev_kfree_skb_any(cmd.meta.u.skb);
  845. return rc;
  846. }
  847. #endif
  848. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  849. struct iwl_rx_mem_buffer *rxb)
  850. {
  851. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  852. struct iwl_alive_resp *palive;
  853. struct delayed_work *pwork;
  854. palive = &pkt->u.alive_frame;
  855. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  856. "0x%01X 0x%01X\n",
  857. palive->is_valid, palive->ver_type,
  858. palive->ver_subtype);
  859. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  860. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  861. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  862. sizeof(struct iwl_alive_resp));
  863. pwork = &priv->init_alive_start;
  864. } else {
  865. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  866. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  867. sizeof(struct iwl_alive_resp));
  868. pwork = &priv->alive_start;
  869. iwl3945_disable_events(priv);
  870. }
  871. /* We delay the ALIVE response by 5ms to
  872. * give the HW RF Kill time to activate... */
  873. if (palive->is_valid == UCODE_VALID_OK)
  874. queue_delayed_work(priv->workqueue, pwork,
  875. msecs_to_jiffies(5));
  876. else
  877. IWL_WARN(priv, "uCode did not respond OK.\n");
  878. }
  879. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  880. struct iwl_rx_mem_buffer *rxb)
  881. {
  882. #ifdef CONFIG_IWLWIFI_DEBUG
  883. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  884. #endif
  885. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  886. return;
  887. }
  888. static void iwl3945_bg_beacon_update(struct work_struct *work)
  889. {
  890. struct iwl_priv *priv =
  891. container_of(work, struct iwl_priv, beacon_update);
  892. struct sk_buff *beacon;
  893. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  894. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  895. if (!beacon) {
  896. IWL_ERR(priv, "update beacon failed\n");
  897. return;
  898. }
  899. mutex_lock(&priv->mutex);
  900. /* new beacon skb is allocated every time; dispose previous.*/
  901. if (priv->ibss_beacon)
  902. dev_kfree_skb(priv->ibss_beacon);
  903. priv->ibss_beacon = beacon;
  904. mutex_unlock(&priv->mutex);
  905. iwl3945_send_beacon_cmd(priv);
  906. }
  907. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  908. struct iwl_rx_mem_buffer *rxb)
  909. {
  910. #ifdef CONFIG_IWLWIFI_DEBUG
  911. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  912. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  913. u8 rate = beacon->beacon_notify_hdr.rate;
  914. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  915. "tsf %d %d rate %d\n",
  916. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  917. beacon->beacon_notify_hdr.failure_frame,
  918. le32_to_cpu(beacon->ibss_mgr_status),
  919. le32_to_cpu(beacon->high_tsf),
  920. le32_to_cpu(beacon->low_tsf), rate);
  921. #endif
  922. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  923. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  924. queue_work(priv->workqueue, &priv->beacon_update);
  925. }
  926. /* Handle notification from uCode that card's power state is changing
  927. * due to software, hardware, or critical temperature RFKILL */
  928. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  929. struct iwl_rx_mem_buffer *rxb)
  930. {
  931. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  932. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  933. unsigned long status = priv->status;
  934. IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
  935. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  936. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  937. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  938. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  939. if (flags & HW_CARD_DISABLED)
  940. set_bit(STATUS_RF_KILL_HW, &priv->status);
  941. else
  942. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  943. if (flags & SW_CARD_DISABLED)
  944. set_bit(STATUS_RF_KILL_SW, &priv->status);
  945. else
  946. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  947. iwl_scan_cancel(priv);
  948. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  949. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  950. (test_bit(STATUS_RF_KILL_SW, &status) !=
  951. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  952. queue_work(priv->workqueue, &priv->rf_kill);
  953. else
  954. wake_up_interruptible(&priv->wait_command_queue);
  955. }
  956. /**
  957. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  958. *
  959. * Setup the RX handlers for each of the reply types sent from the uCode
  960. * to the host.
  961. *
  962. * This function chains into the hardware specific files for them to setup
  963. * any hardware specific handlers as well.
  964. */
  965. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  966. {
  967. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  968. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  969. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  970. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  971. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  972. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  973. iwl_rx_pm_debug_statistics_notif;
  974. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  975. /*
  976. * The same handler is used for both the REPLY to a discrete
  977. * statistics request from the host as well as for the periodic
  978. * statistics notifications (after received beacons) from the uCode.
  979. */
  980. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  981. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  982. iwl_setup_spectrum_handlers(priv);
  983. iwl_setup_rx_scan_handlers(priv);
  984. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  985. /* Set up hardware specific Rx handlers */
  986. iwl3945_hw_rx_handler_setup(priv);
  987. }
  988. /************************** RX-FUNCTIONS ****************************/
  989. /*
  990. * Rx theory of operation
  991. *
  992. * The host allocates 32 DMA target addresses and passes the host address
  993. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  994. * 0 to 31
  995. *
  996. * Rx Queue Indexes
  997. * The host/firmware share two index registers for managing the Rx buffers.
  998. *
  999. * The READ index maps to the first position that the firmware may be writing
  1000. * to -- the driver can read up to (but not including) this position and get
  1001. * good data.
  1002. * The READ index is managed by the firmware once the card is enabled.
  1003. *
  1004. * The WRITE index maps to the last position the driver has read from -- the
  1005. * position preceding WRITE is the last slot the firmware can place a packet.
  1006. *
  1007. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  1008. * WRITE = READ.
  1009. *
  1010. * During initialization, the host sets up the READ queue position to the first
  1011. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  1012. *
  1013. * When the firmware places a packet in a buffer, it will advance the READ index
  1014. * and fire the RX interrupt. The driver can then query the READ index and
  1015. * process as many packets as possible, moving the WRITE index forward as it
  1016. * resets the Rx queue buffers with new memory.
  1017. *
  1018. * The management in the driver is as follows:
  1019. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  1020. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  1021. * to replenish the iwl->rxq->rx_free.
  1022. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  1023. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  1024. * 'processed' and 'read' driver indexes as well)
  1025. * + A received packet is processed and handed to the kernel network stack,
  1026. * detached from the iwl->rxq. The driver 'processed' index is updated.
  1027. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  1028. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  1029. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  1030. * were enough free buffers and RX_STALLED is set it is cleared.
  1031. *
  1032. *
  1033. * Driver sequence:
  1034. *
  1035. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  1036. * iwl3945_rx_queue_restock
  1037. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  1038. * queue, updates firmware pointers, and updates
  1039. * the WRITE index. If insufficient rx_free buffers
  1040. * are available, schedules iwl3945_rx_replenish
  1041. *
  1042. * -- enable interrupts --
  1043. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  1044. * READ INDEX, detaching the SKB from the pool.
  1045. * Moves the packet buffer from queue to rx_used.
  1046. * Calls iwl3945_rx_queue_restock to refill any empty
  1047. * slots.
  1048. * ...
  1049. *
  1050. */
  1051. /**
  1052. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  1053. */
  1054. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  1055. dma_addr_t dma_addr)
  1056. {
  1057. return cpu_to_le32((u32)dma_addr);
  1058. }
  1059. /**
  1060. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  1061. *
  1062. * If there are slots in the RX queue that need to be restocked,
  1063. * and we have free pre-allocated buffers, fill the ranks as much
  1064. * as we can, pulling from rx_free.
  1065. *
  1066. * This moves the 'write' index forward to catch up with 'processed', and
  1067. * also updates the memory address in the firmware to reference the new
  1068. * target buffer.
  1069. */
  1070. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  1071. {
  1072. struct iwl_rx_queue *rxq = &priv->rxq;
  1073. struct list_head *element;
  1074. struct iwl_rx_mem_buffer *rxb;
  1075. unsigned long flags;
  1076. int write, rc;
  1077. spin_lock_irqsave(&rxq->lock, flags);
  1078. write = rxq->write & ~0x7;
  1079. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  1080. /* Get next free Rx buffer, remove from free list */
  1081. element = rxq->rx_free.next;
  1082. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1083. list_del(element);
  1084. /* Point to Rx buffer via next RBD in circular buffer */
  1085. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  1086. rxq->queue[rxq->write] = rxb;
  1087. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  1088. rxq->free_count--;
  1089. }
  1090. spin_unlock_irqrestore(&rxq->lock, flags);
  1091. /* If the pre-allocated buffer pool is dropping low, schedule to
  1092. * refill it */
  1093. if (rxq->free_count <= RX_LOW_WATERMARK)
  1094. queue_work(priv->workqueue, &priv->rx_replenish);
  1095. /* If we've added more space for the firmware to place data, tell it.
  1096. * Increment device's write pointer in multiples of 8. */
  1097. if ((write != (rxq->write & ~0x7))
  1098. || (abs(rxq->write - rxq->read) > 7)) {
  1099. spin_lock_irqsave(&rxq->lock, flags);
  1100. rxq->need_update = 1;
  1101. spin_unlock_irqrestore(&rxq->lock, flags);
  1102. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  1103. if (rc)
  1104. return rc;
  1105. }
  1106. return 0;
  1107. }
  1108. /**
  1109. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  1110. *
  1111. * When moving to rx_free an SKB is allocated for the slot.
  1112. *
  1113. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  1114. * This is called as a scheduled work item (except for during initialization)
  1115. */
  1116. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  1117. {
  1118. struct iwl_rx_queue *rxq = &priv->rxq;
  1119. struct list_head *element;
  1120. struct iwl_rx_mem_buffer *rxb;
  1121. unsigned long flags;
  1122. spin_lock_irqsave(&rxq->lock, flags);
  1123. while (!list_empty(&rxq->rx_used)) {
  1124. element = rxq->rx_used.next;
  1125. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1126. /* Alloc a new receive buffer */
  1127. rxb->skb =
  1128. alloc_skb(priv->hw_params.rx_buf_size,
  1129. __GFP_NOWARN | GFP_ATOMIC);
  1130. if (!rxb->skb) {
  1131. if (net_ratelimit())
  1132. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  1133. /* We don't reschedule replenish work here -- we will
  1134. * call the restock method and if it still needs
  1135. * more buffers it will schedule replenish */
  1136. break;
  1137. }
  1138. /* If radiotap head is required, reserve some headroom here.
  1139. * The physical head count is a variable rx_stats->phy_count.
  1140. * We reserve 4 bytes here. Plus these extra bytes, the
  1141. * headroom of the physical head should be enough for the
  1142. * radiotap head that iwl3945 supported. See iwl3945_rt.
  1143. */
  1144. skb_reserve(rxb->skb, 4);
  1145. priv->alloc_rxb_skb++;
  1146. list_del(element);
  1147. /* Get physical address of RB/SKB */
  1148. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  1149. rxb->skb->data,
  1150. priv->hw_params.rx_buf_size,
  1151. PCI_DMA_FROMDEVICE);
  1152. list_add_tail(&rxb->list, &rxq->rx_free);
  1153. rxq->free_count++;
  1154. }
  1155. spin_unlock_irqrestore(&rxq->lock, flags);
  1156. }
  1157. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1158. {
  1159. unsigned long flags;
  1160. int i;
  1161. spin_lock_irqsave(&rxq->lock, flags);
  1162. INIT_LIST_HEAD(&rxq->rx_free);
  1163. INIT_LIST_HEAD(&rxq->rx_used);
  1164. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1165. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1166. /* In the reset function, these buffers may have been allocated
  1167. * to an SKB, so we need to unmap and free potential storage */
  1168. if (rxq->pool[i].skb != NULL) {
  1169. pci_unmap_single(priv->pci_dev,
  1170. rxq->pool[i].real_dma_addr,
  1171. priv->hw_params.rx_buf_size,
  1172. PCI_DMA_FROMDEVICE);
  1173. priv->alloc_rxb_skb--;
  1174. dev_kfree_skb(rxq->pool[i].skb);
  1175. rxq->pool[i].skb = NULL;
  1176. }
  1177. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1178. }
  1179. /* Set us so that we have processed and used all buffers, but have
  1180. * not restocked the Rx queue with fresh buffers */
  1181. rxq->read = rxq->write = 0;
  1182. rxq->free_count = 0;
  1183. spin_unlock_irqrestore(&rxq->lock, flags);
  1184. }
  1185. /*
  1186. * this should be called while priv->lock is locked
  1187. */
  1188. static void __iwl3945_rx_replenish(void *data)
  1189. {
  1190. struct iwl_priv *priv = data;
  1191. iwl3945_rx_allocate(priv);
  1192. iwl3945_rx_queue_restock(priv);
  1193. }
  1194. void iwl3945_rx_replenish(void *data)
  1195. {
  1196. struct iwl_priv *priv = data;
  1197. unsigned long flags;
  1198. iwl3945_rx_allocate(priv);
  1199. spin_lock_irqsave(&priv->lock, flags);
  1200. iwl3945_rx_queue_restock(priv);
  1201. spin_unlock_irqrestore(&priv->lock, flags);
  1202. }
  1203. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1204. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1205. * This free routine walks the list of POOL entries and if SKB is set to
  1206. * non NULL it is unmapped and freed
  1207. */
  1208. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1209. {
  1210. int i;
  1211. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1212. if (rxq->pool[i].skb != NULL) {
  1213. pci_unmap_single(priv->pci_dev,
  1214. rxq->pool[i].real_dma_addr,
  1215. priv->hw_params.rx_buf_size,
  1216. PCI_DMA_FROMDEVICE);
  1217. dev_kfree_skb(rxq->pool[i].skb);
  1218. }
  1219. }
  1220. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1221. rxq->dma_addr);
  1222. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1223. rxq->rb_stts, rxq->rb_stts_dma);
  1224. rxq->bd = NULL;
  1225. rxq->rb_stts = NULL;
  1226. }
  1227. EXPORT_SYMBOL(iwl3945_rx_queue_free);
  1228. /* Convert linear signal-to-noise ratio into dB */
  1229. static u8 ratio2dB[100] = {
  1230. /* 0 1 2 3 4 5 6 7 8 9 */
  1231. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1232. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1233. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1234. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1235. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1236. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1237. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1238. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1239. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1240. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1241. };
  1242. /* Calculates a relative dB value from a ratio of linear
  1243. * (i.e. not dB) signal levels.
  1244. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1245. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1246. {
  1247. /* 1000:1 or higher just report as 60 dB */
  1248. if (sig_ratio >= 1000)
  1249. return 60;
  1250. /* 100:1 or higher, divide by 10 and use table,
  1251. * add 20 dB to make up for divide by 10 */
  1252. if (sig_ratio >= 100)
  1253. return 20 + (int)ratio2dB[sig_ratio/10];
  1254. /* We shouldn't see this */
  1255. if (sig_ratio < 1)
  1256. return 0;
  1257. /* Use table for ratios 1:1 - 99:1 */
  1258. return (int)ratio2dB[sig_ratio];
  1259. }
  1260. #define PERFECT_RSSI (-20) /* dBm */
  1261. #define WORST_RSSI (-95) /* dBm */
  1262. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1263. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1264. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1265. * about formulas used below. */
  1266. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1267. {
  1268. int sig_qual;
  1269. int degradation = PERFECT_RSSI - rssi_dbm;
  1270. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1271. * as indicator; formula is (signal dbm - noise dbm).
  1272. * SNR at or above 40 is a great signal (100%).
  1273. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1274. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1275. if (noise_dbm) {
  1276. if (rssi_dbm - noise_dbm >= 40)
  1277. return 100;
  1278. else if (rssi_dbm < noise_dbm)
  1279. return 0;
  1280. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1281. /* Else use just the signal level.
  1282. * This formula is a least squares fit of data points collected and
  1283. * compared with a reference system that had a percentage (%) display
  1284. * for signal quality. */
  1285. } else
  1286. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1287. (15 * RSSI_RANGE + 62 * degradation)) /
  1288. (RSSI_RANGE * RSSI_RANGE);
  1289. if (sig_qual > 100)
  1290. sig_qual = 100;
  1291. else if (sig_qual < 1)
  1292. sig_qual = 0;
  1293. return sig_qual;
  1294. }
  1295. /**
  1296. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1297. *
  1298. * Uses the priv->rx_handlers callback function array to invoke
  1299. * the appropriate handlers, including command responses,
  1300. * frame-received notifications, and other notifications.
  1301. */
  1302. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1303. {
  1304. struct iwl_rx_mem_buffer *rxb;
  1305. struct iwl_rx_packet *pkt;
  1306. struct iwl_rx_queue *rxq = &priv->rxq;
  1307. u32 r, i;
  1308. int reclaim;
  1309. unsigned long flags;
  1310. u8 fill_rx = 0;
  1311. u32 count = 8;
  1312. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1313. * buffer that the driver may process (last buffer filled by ucode). */
  1314. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1315. i = rxq->read;
  1316. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  1317. fill_rx = 1;
  1318. /* Rx interrupt, but nothing sent from uCode */
  1319. if (i == r)
  1320. IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  1321. while (i != r) {
  1322. rxb = rxq->queue[i];
  1323. /* If an RXB doesn't have a Rx queue slot associated with it,
  1324. * then a bug has been introduced in the queue refilling
  1325. * routines -- catch it here */
  1326. BUG_ON(rxb == NULL);
  1327. rxq->queue[i] = NULL;
  1328. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1329. priv->hw_params.rx_buf_size,
  1330. PCI_DMA_FROMDEVICE);
  1331. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1332. /* Reclaim a command buffer only if this packet is a response
  1333. * to a (driver-originated) command.
  1334. * If the packet (e.g. Rx frame) originated from uCode,
  1335. * there is no command buffer to reclaim.
  1336. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1337. * but apparently a few don't get set; catch them here. */
  1338. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1339. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1340. (pkt->hdr.cmd != REPLY_TX);
  1341. /* Based on type of command response or notification,
  1342. * handle those that need handling via function in
  1343. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1344. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1345. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1346. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1347. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1348. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1349. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1350. } else {
  1351. /* No handling needed */
  1352. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1353. "r %d i %d No handler needed for %s, 0x%02x\n",
  1354. r, i, get_cmd_string(pkt->hdr.cmd),
  1355. pkt->hdr.cmd);
  1356. }
  1357. if (reclaim) {
  1358. /* Invoke any callbacks, transfer the skb to caller, and
  1359. * fire off the (possibly) blocking iwl_send_cmd()
  1360. * as we reclaim the driver command queue */
  1361. if (rxb && rxb->skb)
  1362. iwl_tx_cmd_complete(priv, rxb);
  1363. else
  1364. IWL_WARN(priv, "Claim null rxb?\n");
  1365. }
  1366. /* For now we just don't re-use anything. We can tweak this
  1367. * later to try and re-use notification packets and SKBs that
  1368. * fail to Rx correctly */
  1369. if (rxb->skb != NULL) {
  1370. priv->alloc_rxb_skb--;
  1371. dev_kfree_skb_any(rxb->skb);
  1372. rxb->skb = NULL;
  1373. }
  1374. spin_lock_irqsave(&rxq->lock, flags);
  1375. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1376. spin_unlock_irqrestore(&rxq->lock, flags);
  1377. i = (i + 1) & RX_QUEUE_MASK;
  1378. /* If there are a lot of unused frames,
  1379. * restock the Rx queue so ucode won't assert. */
  1380. if (fill_rx) {
  1381. count++;
  1382. if (count >= 8) {
  1383. priv->rxq.read = i;
  1384. __iwl3945_rx_replenish(priv);
  1385. count = 0;
  1386. }
  1387. }
  1388. }
  1389. /* Backtrack one entry */
  1390. priv->rxq.read = i;
  1391. iwl3945_rx_queue_restock(priv);
  1392. }
  1393. /* call this function to flush any scheduled tasklet */
  1394. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1395. {
  1396. /* wait to make sure we flush pending tasklet*/
  1397. synchronize_irq(priv->pci_dev->irq);
  1398. tasklet_kill(&priv->irq_tasklet);
  1399. }
  1400. static const char *desc_lookup(int i)
  1401. {
  1402. switch (i) {
  1403. case 1:
  1404. return "FAIL";
  1405. case 2:
  1406. return "BAD_PARAM";
  1407. case 3:
  1408. return "BAD_CHECKSUM";
  1409. case 4:
  1410. return "NMI_INTERRUPT";
  1411. case 5:
  1412. return "SYSASSERT";
  1413. case 6:
  1414. return "FATAL_ERROR";
  1415. }
  1416. return "UNKNOWN";
  1417. }
  1418. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1419. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1420. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1421. {
  1422. u32 i;
  1423. u32 desc, time, count, base, data1;
  1424. u32 blink1, blink2, ilink1, ilink2;
  1425. int rc;
  1426. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1427. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1428. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1429. return;
  1430. }
  1431. rc = iwl_grab_nic_access(priv);
  1432. if (rc) {
  1433. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1434. return;
  1435. }
  1436. count = iwl_read_targ_mem(priv, base);
  1437. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1438. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1439. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1440. priv->status, count);
  1441. }
  1442. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1443. "ilink1 nmiPC Line\n");
  1444. for (i = ERROR_START_OFFSET;
  1445. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1446. i += ERROR_ELEM_SIZE) {
  1447. desc = iwl_read_targ_mem(priv, base + i);
  1448. time =
  1449. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1450. blink1 =
  1451. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1452. blink2 =
  1453. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1454. ilink1 =
  1455. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1456. ilink2 =
  1457. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1458. data1 =
  1459. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1460. IWL_ERR(priv,
  1461. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1462. desc_lookup(desc), desc, time, blink1, blink2,
  1463. ilink1, ilink2, data1);
  1464. }
  1465. iwl_release_nic_access(priv);
  1466. }
  1467. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1468. /**
  1469. * iwl3945_print_event_log - Dump error event log to syslog
  1470. *
  1471. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  1472. */
  1473. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1474. u32 num_events, u32 mode)
  1475. {
  1476. u32 i;
  1477. u32 base; /* SRAM byte address of event log header */
  1478. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1479. u32 ptr; /* SRAM byte address of log data */
  1480. u32 ev, time, data; /* event log data */
  1481. if (num_events == 0)
  1482. return;
  1483. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1484. if (mode == 0)
  1485. event_size = 2 * sizeof(u32);
  1486. else
  1487. event_size = 3 * sizeof(u32);
  1488. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1489. /* "time" is actually "data" for mode 0 (no timestamp).
  1490. * place event id # at far right for easier visual parsing. */
  1491. for (i = 0; i < num_events; i++) {
  1492. ev = iwl_read_targ_mem(priv, ptr);
  1493. ptr += sizeof(u32);
  1494. time = iwl_read_targ_mem(priv, ptr);
  1495. ptr += sizeof(u32);
  1496. if (mode == 0) {
  1497. /* data, ev */
  1498. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1499. } else {
  1500. data = iwl_read_targ_mem(priv, ptr);
  1501. ptr += sizeof(u32);
  1502. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1503. }
  1504. }
  1505. }
  1506. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1507. {
  1508. int rc;
  1509. u32 base; /* SRAM byte address of event log header */
  1510. u32 capacity; /* event log capacity in # entries */
  1511. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1512. u32 num_wraps; /* # times uCode wrapped to top of log */
  1513. u32 next_entry; /* index of next entry to be written by uCode */
  1514. u32 size; /* # entries that we'll print */
  1515. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1516. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1517. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1518. return;
  1519. }
  1520. rc = iwl_grab_nic_access(priv);
  1521. if (rc) {
  1522. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1523. return;
  1524. }
  1525. /* event log header */
  1526. capacity = iwl_read_targ_mem(priv, base);
  1527. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1528. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1529. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1530. size = num_wraps ? capacity : next_entry;
  1531. /* bail out if nothing in log */
  1532. if (size == 0) {
  1533. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1534. iwl_release_nic_access(priv);
  1535. return;
  1536. }
  1537. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1538. size, num_wraps);
  1539. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1540. * i.e the next one that uCode would fill. */
  1541. if (num_wraps)
  1542. iwl3945_print_event_log(priv, next_entry,
  1543. capacity - next_entry, mode);
  1544. /* (then/else) start at top of log */
  1545. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1546. iwl_release_nic_access(priv);
  1547. }
  1548. static void iwl3945_error_recovery(struct iwl_priv *priv)
  1549. {
  1550. unsigned long flags;
  1551. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  1552. sizeof(priv->staging_rxon));
  1553. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1554. iwlcore_commit_rxon(priv);
  1555. priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 1, 0, NULL);
  1556. spin_lock_irqsave(&priv->lock, flags);
  1557. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  1558. priv->error_recovering = 0;
  1559. spin_unlock_irqrestore(&priv->lock, flags);
  1560. }
  1561. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1562. {
  1563. u32 inta, handled = 0;
  1564. u32 inta_fh;
  1565. unsigned long flags;
  1566. #ifdef CONFIG_IWLWIFI_DEBUG
  1567. u32 inta_mask;
  1568. #endif
  1569. spin_lock_irqsave(&priv->lock, flags);
  1570. /* Ack/clear/reset pending uCode interrupts.
  1571. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1572. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1573. inta = iwl_read32(priv, CSR_INT);
  1574. iwl_write32(priv, CSR_INT, inta);
  1575. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1576. * Any new interrupts that happen after this, either while we're
  1577. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1578. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1579. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1580. #ifdef CONFIG_IWLWIFI_DEBUG
  1581. if (priv->debug_level & IWL_DL_ISR) {
  1582. /* just for debug */
  1583. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1584. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1585. inta, inta_mask, inta_fh);
  1586. }
  1587. #endif
  1588. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1589. * atomic, make sure that inta covers all the interrupts that
  1590. * we've discovered, even if FH interrupt came in just after
  1591. * reading CSR_INT. */
  1592. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1593. inta |= CSR_INT_BIT_FH_RX;
  1594. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1595. inta |= CSR_INT_BIT_FH_TX;
  1596. /* Now service all interrupt bits discovered above. */
  1597. if (inta & CSR_INT_BIT_HW_ERR) {
  1598. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  1599. /* Tell the device to stop sending interrupts */
  1600. iwl_disable_interrupts(priv);
  1601. priv->isr_stats.hw++;
  1602. iwl_irq_handle_error(priv);
  1603. handled |= CSR_INT_BIT_HW_ERR;
  1604. spin_unlock_irqrestore(&priv->lock, flags);
  1605. return;
  1606. }
  1607. #ifdef CONFIG_IWLWIFI_DEBUG
  1608. if (priv->debug_level & (IWL_DL_ISR)) {
  1609. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1610. if (inta & CSR_INT_BIT_SCD) {
  1611. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1612. "the frame/frames.\n");
  1613. priv->isr_stats.sch++;
  1614. }
  1615. /* Alive notification via Rx interrupt will do the real work */
  1616. if (inta & CSR_INT_BIT_ALIVE) {
  1617. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1618. priv->isr_stats.alive++;
  1619. }
  1620. }
  1621. #endif
  1622. /* Safely ignore these bits for debug checks below */
  1623. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1624. /* Error detected by uCode */
  1625. if (inta & CSR_INT_BIT_SW_ERR) {
  1626. IWL_ERR(priv, "Microcode SW error detected. "
  1627. "Restarting 0x%X.\n", inta);
  1628. priv->isr_stats.sw++;
  1629. priv->isr_stats.sw_err = inta;
  1630. iwl_irq_handle_error(priv);
  1631. handled |= CSR_INT_BIT_SW_ERR;
  1632. }
  1633. /* uCode wakes up after power-down sleep */
  1634. if (inta & CSR_INT_BIT_WAKEUP) {
  1635. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1636. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1637. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1638. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1639. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1640. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1641. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1642. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1643. priv->isr_stats.wakeup++;
  1644. handled |= CSR_INT_BIT_WAKEUP;
  1645. }
  1646. /* All uCode command responses, including Tx command responses,
  1647. * Rx "responses" (frame-received notification), and other
  1648. * notifications from uCode come through here*/
  1649. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1650. iwl3945_rx_handle(priv);
  1651. priv->isr_stats.rx++;
  1652. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1653. }
  1654. if (inta & CSR_INT_BIT_FH_TX) {
  1655. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1656. priv->isr_stats.tx++;
  1657. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1658. if (!iwl_grab_nic_access(priv)) {
  1659. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1660. (FH39_SRVC_CHNL), 0x0);
  1661. iwl_release_nic_access(priv);
  1662. }
  1663. handled |= CSR_INT_BIT_FH_TX;
  1664. }
  1665. if (inta & ~handled) {
  1666. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1667. priv->isr_stats.unhandled++;
  1668. }
  1669. if (inta & ~CSR_INI_SET_MASK) {
  1670. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1671. inta & ~CSR_INI_SET_MASK);
  1672. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1673. }
  1674. /* Re-enable all interrupts */
  1675. /* only Re-enable if disabled by irq */
  1676. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1677. iwl_enable_interrupts(priv);
  1678. #ifdef CONFIG_IWLWIFI_DEBUG
  1679. if (priv->debug_level & (IWL_DL_ISR)) {
  1680. inta = iwl_read32(priv, CSR_INT);
  1681. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1682. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1683. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1684. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1685. }
  1686. #endif
  1687. spin_unlock_irqrestore(&priv->lock, flags);
  1688. }
  1689. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1690. enum ieee80211_band band,
  1691. u8 is_active, u8 n_probes,
  1692. struct iwl3945_scan_channel *scan_ch)
  1693. {
  1694. const struct ieee80211_channel *channels = NULL;
  1695. const struct ieee80211_supported_band *sband;
  1696. const struct iwl_channel_info *ch_info;
  1697. u16 passive_dwell = 0;
  1698. u16 active_dwell = 0;
  1699. int added, i;
  1700. sband = iwl_get_hw_mode(priv, band);
  1701. if (!sband)
  1702. return 0;
  1703. channels = sband->channels;
  1704. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1705. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1706. if (passive_dwell <= active_dwell)
  1707. passive_dwell = active_dwell + 1;
  1708. for (i = 0, added = 0; i < sband->n_channels; i++) {
  1709. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  1710. continue;
  1711. scan_ch->channel = channels[i].hw_value;
  1712. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1713. if (!is_channel_valid(ch_info)) {
  1714. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1715. scan_ch->channel);
  1716. continue;
  1717. }
  1718. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1719. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1720. /* If passive , set up for auto-switch
  1721. * and use long active_dwell time.
  1722. */
  1723. if (!is_active || is_channel_passive(ch_info) ||
  1724. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1725. scan_ch->type = 0; /* passive */
  1726. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1727. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1728. } else {
  1729. scan_ch->type = 1; /* active */
  1730. }
  1731. /* Set direct probe bits. These may be used both for active
  1732. * scan channels (probes gets sent right away),
  1733. * or for passive channels (probes get se sent only after
  1734. * hearing clear Rx packet).*/
  1735. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1736. if (n_probes)
  1737. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1738. } else {
  1739. /* uCode v1 does not allow setting direct probe bits on
  1740. * passive channel. */
  1741. if ((scan_ch->type & 1) && n_probes)
  1742. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1743. }
  1744. /* Set txpower levels to defaults */
  1745. scan_ch->tpc.dsp_atten = 110;
  1746. /* scan_pwr_info->tpc.dsp_atten; */
  1747. /*scan_pwr_info->tpc.tx_gain; */
  1748. if (band == IEEE80211_BAND_5GHZ)
  1749. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1750. else {
  1751. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1752. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1753. * power level:
  1754. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1755. */
  1756. }
  1757. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1758. scan_ch->channel,
  1759. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1760. (scan_ch->type & 1) ?
  1761. active_dwell : passive_dwell);
  1762. scan_ch++;
  1763. added++;
  1764. }
  1765. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1766. return added;
  1767. }
  1768. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1769. struct ieee80211_rate *rates)
  1770. {
  1771. int i;
  1772. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1773. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1774. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1775. rates[i].hw_value_short = i;
  1776. rates[i].flags = 0;
  1777. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1778. /*
  1779. * If CCK != 1M then set short preamble rate flag.
  1780. */
  1781. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1782. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1783. }
  1784. }
  1785. }
  1786. /******************************************************************************
  1787. *
  1788. * uCode download functions
  1789. *
  1790. ******************************************************************************/
  1791. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1792. {
  1793. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1794. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1795. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1796. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1797. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1798. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1799. }
  1800. /**
  1801. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1802. * looking at all data.
  1803. */
  1804. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1805. {
  1806. u32 val;
  1807. u32 save_len = len;
  1808. int rc = 0;
  1809. u32 errcnt;
  1810. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1811. rc = iwl_grab_nic_access(priv);
  1812. if (rc)
  1813. return rc;
  1814. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1815. IWL39_RTC_INST_LOWER_BOUND);
  1816. errcnt = 0;
  1817. for (; len > 0; len -= sizeof(u32), image++) {
  1818. /* read data comes through single port, auto-incr addr */
  1819. /* NOTE: Use the debugless read so we don't flood kernel log
  1820. * if IWL_DL_IO is set */
  1821. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1822. if (val != le32_to_cpu(*image)) {
  1823. IWL_ERR(priv, "uCode INST section is invalid at "
  1824. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1825. save_len - len, val, le32_to_cpu(*image));
  1826. rc = -EIO;
  1827. errcnt++;
  1828. if (errcnt >= 20)
  1829. break;
  1830. }
  1831. }
  1832. iwl_release_nic_access(priv);
  1833. if (!errcnt)
  1834. IWL_DEBUG_INFO(priv,
  1835. "ucode image in INSTRUCTION memory is good\n");
  1836. return rc;
  1837. }
  1838. /**
  1839. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1840. * using sample data 100 bytes apart. If these sample points are good,
  1841. * it's a pretty good bet that everything between them is good, too.
  1842. */
  1843. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1844. {
  1845. u32 val;
  1846. int rc = 0;
  1847. u32 errcnt = 0;
  1848. u32 i;
  1849. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1850. rc = iwl_grab_nic_access(priv);
  1851. if (rc)
  1852. return rc;
  1853. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1854. /* read data comes through single port, auto-incr addr */
  1855. /* NOTE: Use the debugless read so we don't flood kernel log
  1856. * if IWL_DL_IO is set */
  1857. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1858. i + IWL39_RTC_INST_LOWER_BOUND);
  1859. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1860. if (val != le32_to_cpu(*image)) {
  1861. #if 0 /* Enable this if you want to see details */
  1862. IWL_ERR(priv, "uCode INST section is invalid at "
  1863. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1864. i, val, *image);
  1865. #endif
  1866. rc = -EIO;
  1867. errcnt++;
  1868. if (errcnt >= 3)
  1869. break;
  1870. }
  1871. }
  1872. iwl_release_nic_access(priv);
  1873. return rc;
  1874. }
  1875. /**
  1876. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1877. * and verify its contents
  1878. */
  1879. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1880. {
  1881. __le32 *image;
  1882. u32 len;
  1883. int rc = 0;
  1884. /* Try bootstrap */
  1885. image = (__le32 *)priv->ucode_boot.v_addr;
  1886. len = priv->ucode_boot.len;
  1887. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1888. if (rc == 0) {
  1889. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1890. return 0;
  1891. }
  1892. /* Try initialize */
  1893. image = (__le32 *)priv->ucode_init.v_addr;
  1894. len = priv->ucode_init.len;
  1895. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1896. if (rc == 0) {
  1897. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1898. return 0;
  1899. }
  1900. /* Try runtime/protocol */
  1901. image = (__le32 *)priv->ucode_code.v_addr;
  1902. len = priv->ucode_code.len;
  1903. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1904. if (rc == 0) {
  1905. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1906. return 0;
  1907. }
  1908. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1909. /* Since nothing seems to match, show first several data entries in
  1910. * instruction SRAM, so maybe visual inspection will give a clue.
  1911. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1912. image = (__le32 *)priv->ucode_boot.v_addr;
  1913. len = priv->ucode_boot.len;
  1914. rc = iwl3945_verify_inst_full(priv, image, len);
  1915. return rc;
  1916. }
  1917. static void iwl3945_nic_start(struct iwl_priv *priv)
  1918. {
  1919. /* Remove all resets to allow NIC to operate */
  1920. iwl_write32(priv, CSR_RESET, 0);
  1921. }
  1922. /**
  1923. * iwl3945_read_ucode - Read uCode images from disk file.
  1924. *
  1925. * Copy into buffers for card to fetch via bus-mastering
  1926. */
  1927. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1928. {
  1929. struct iwl_ucode *ucode;
  1930. int ret = -EINVAL, index;
  1931. const struct firmware *ucode_raw;
  1932. /* firmware file name contains uCode/driver compatibility version */
  1933. const char *name_pre = priv->cfg->fw_name_pre;
  1934. const unsigned int api_max = priv->cfg->ucode_api_max;
  1935. const unsigned int api_min = priv->cfg->ucode_api_min;
  1936. char buf[25];
  1937. u8 *src;
  1938. size_t len;
  1939. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1940. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1941. * request_firmware() is synchronous, file is in memory on return. */
  1942. for (index = api_max; index >= api_min; index--) {
  1943. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1944. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1945. if (ret < 0) {
  1946. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1947. buf, ret);
  1948. if (ret == -ENOENT)
  1949. continue;
  1950. else
  1951. goto error;
  1952. } else {
  1953. if (index < api_max)
  1954. IWL_ERR(priv, "Loaded firmware %s, "
  1955. "which is deprecated. "
  1956. " Please use API v%u instead.\n",
  1957. buf, api_max);
  1958. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1959. "(%zd bytes) from disk\n",
  1960. buf, ucode_raw->size);
  1961. break;
  1962. }
  1963. }
  1964. if (ret < 0)
  1965. goto error;
  1966. /* Make sure that we got at least our header! */
  1967. if (ucode_raw->size < sizeof(*ucode)) {
  1968. IWL_ERR(priv, "File size way too small!\n");
  1969. ret = -EINVAL;
  1970. goto err_release;
  1971. }
  1972. /* Data from ucode file: header followed by uCode images */
  1973. ucode = (void *)ucode_raw->data;
  1974. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1975. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1976. inst_size = le32_to_cpu(ucode->inst_size);
  1977. data_size = le32_to_cpu(ucode->data_size);
  1978. init_size = le32_to_cpu(ucode->init_size);
  1979. init_data_size = le32_to_cpu(ucode->init_data_size);
  1980. boot_size = le32_to_cpu(ucode->boot_size);
  1981. /* api_ver should match the api version forming part of the
  1982. * firmware filename ... but we don't check for that and only rely
  1983. * on the API version read from firmware header from here on forward */
  1984. if (api_ver < api_min || api_ver > api_max) {
  1985. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1986. "Driver supports v%u, firmware is v%u.\n",
  1987. api_max, api_ver);
  1988. priv->ucode_ver = 0;
  1989. ret = -EINVAL;
  1990. goto err_release;
  1991. }
  1992. if (api_ver != api_max)
  1993. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1994. "got %u. New firmware can be obtained "
  1995. "from http://www.intellinuxwireless.org.\n",
  1996. api_max, api_ver);
  1997. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1998. IWL_UCODE_MAJOR(priv->ucode_ver),
  1999. IWL_UCODE_MINOR(priv->ucode_ver),
  2000. IWL_UCODE_API(priv->ucode_ver),
  2001. IWL_UCODE_SERIAL(priv->ucode_ver));
  2002. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  2003. priv->ucode_ver);
  2004. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  2005. inst_size);
  2006. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  2007. data_size);
  2008. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  2009. init_size);
  2010. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  2011. init_data_size);
  2012. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  2013. boot_size);
  2014. /* Verify size of file vs. image size info in file's header */
  2015. if (ucode_raw->size < sizeof(*ucode) +
  2016. inst_size + data_size + init_size +
  2017. init_data_size + boot_size) {
  2018. IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
  2019. ucode_raw->size);
  2020. ret = -EINVAL;
  2021. goto err_release;
  2022. }
  2023. /* Verify that uCode images will fit in card's SRAM */
  2024. if (inst_size > IWL39_MAX_INST_SIZE) {
  2025. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  2026. inst_size);
  2027. ret = -EINVAL;
  2028. goto err_release;
  2029. }
  2030. if (data_size > IWL39_MAX_DATA_SIZE) {
  2031. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  2032. data_size);
  2033. ret = -EINVAL;
  2034. goto err_release;
  2035. }
  2036. if (init_size > IWL39_MAX_INST_SIZE) {
  2037. IWL_DEBUG_INFO(priv,
  2038. "uCode init instr len %d too large to fit in\n",
  2039. init_size);
  2040. ret = -EINVAL;
  2041. goto err_release;
  2042. }
  2043. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  2044. IWL_DEBUG_INFO(priv,
  2045. "uCode init data len %d too large to fit in\n",
  2046. init_data_size);
  2047. ret = -EINVAL;
  2048. goto err_release;
  2049. }
  2050. if (boot_size > IWL39_MAX_BSM_SIZE) {
  2051. IWL_DEBUG_INFO(priv,
  2052. "uCode boot instr len %d too large to fit in\n",
  2053. boot_size);
  2054. ret = -EINVAL;
  2055. goto err_release;
  2056. }
  2057. /* Allocate ucode buffers for card's bus-master loading ... */
  2058. /* Runtime instructions and 2 copies of data:
  2059. * 1) unmodified from disk
  2060. * 2) backup cache for save/restore during power-downs */
  2061. priv->ucode_code.len = inst_size;
  2062. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  2063. priv->ucode_data.len = data_size;
  2064. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  2065. priv->ucode_data_backup.len = data_size;
  2066. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  2067. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  2068. !priv->ucode_data_backup.v_addr)
  2069. goto err_pci_alloc;
  2070. /* Initialization instructions and data */
  2071. if (init_size && init_data_size) {
  2072. priv->ucode_init.len = init_size;
  2073. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  2074. priv->ucode_init_data.len = init_data_size;
  2075. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  2076. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  2077. goto err_pci_alloc;
  2078. }
  2079. /* Bootstrap (instructions only, no data) */
  2080. if (boot_size) {
  2081. priv->ucode_boot.len = boot_size;
  2082. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  2083. if (!priv->ucode_boot.v_addr)
  2084. goto err_pci_alloc;
  2085. }
  2086. /* Copy images into buffers for card's bus-master reads ... */
  2087. /* Runtime instructions (first block of data in file) */
  2088. src = &ucode->data[0];
  2089. len = priv->ucode_code.len;
  2090. IWL_DEBUG_INFO(priv,
  2091. "Copying (but not loading) uCode instr len %zd\n", len);
  2092. memcpy(priv->ucode_code.v_addr, src, len);
  2093. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  2094. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  2095. /* Runtime data (2nd block)
  2096. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  2097. src = &ucode->data[inst_size];
  2098. len = priv->ucode_data.len;
  2099. IWL_DEBUG_INFO(priv,
  2100. "Copying (but not loading) uCode data len %zd\n", len);
  2101. memcpy(priv->ucode_data.v_addr, src, len);
  2102. memcpy(priv->ucode_data_backup.v_addr, src, len);
  2103. /* Initialization instructions (3rd block) */
  2104. if (init_size) {
  2105. src = &ucode->data[inst_size + data_size];
  2106. len = priv->ucode_init.len;
  2107. IWL_DEBUG_INFO(priv,
  2108. "Copying (but not loading) init instr len %zd\n", len);
  2109. memcpy(priv->ucode_init.v_addr, src, len);
  2110. }
  2111. /* Initialization data (4th block) */
  2112. if (init_data_size) {
  2113. src = &ucode->data[inst_size + data_size + init_size];
  2114. len = priv->ucode_init_data.len;
  2115. IWL_DEBUG_INFO(priv,
  2116. "Copying (but not loading) init data len %zd\n", len);
  2117. memcpy(priv->ucode_init_data.v_addr, src, len);
  2118. }
  2119. /* Bootstrap instructions (5th block) */
  2120. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  2121. len = priv->ucode_boot.len;
  2122. IWL_DEBUG_INFO(priv,
  2123. "Copying (but not loading) boot instr len %zd\n", len);
  2124. memcpy(priv->ucode_boot.v_addr, src, len);
  2125. /* We have our copies now, allow OS release its copies */
  2126. release_firmware(ucode_raw);
  2127. return 0;
  2128. err_pci_alloc:
  2129. IWL_ERR(priv, "failed to allocate pci memory\n");
  2130. ret = -ENOMEM;
  2131. iwl3945_dealloc_ucode_pci(priv);
  2132. err_release:
  2133. release_firmware(ucode_raw);
  2134. error:
  2135. return ret;
  2136. }
  2137. /**
  2138. * iwl3945_set_ucode_ptrs - Set uCode address location
  2139. *
  2140. * Tell initialization uCode where to find runtime uCode.
  2141. *
  2142. * BSM registers initially contain pointers to initialization uCode.
  2143. * We need to replace them to load runtime uCode inst and data,
  2144. * and to save runtime data when powering down.
  2145. */
  2146. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2147. {
  2148. dma_addr_t pinst;
  2149. dma_addr_t pdata;
  2150. int rc = 0;
  2151. unsigned long flags;
  2152. /* bits 31:0 for 3945 */
  2153. pinst = priv->ucode_code.p_addr;
  2154. pdata = priv->ucode_data_backup.p_addr;
  2155. spin_lock_irqsave(&priv->lock, flags);
  2156. rc = iwl_grab_nic_access(priv);
  2157. if (rc) {
  2158. spin_unlock_irqrestore(&priv->lock, flags);
  2159. return rc;
  2160. }
  2161. /* Tell bootstrap uCode where to find image to load */
  2162. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2163. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2164. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2165. priv->ucode_data.len);
  2166. /* Inst byte count must be last to set up, bit 31 signals uCode
  2167. * that all new ptr/size info is in place */
  2168. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2169. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2170. iwl_release_nic_access(priv);
  2171. spin_unlock_irqrestore(&priv->lock, flags);
  2172. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2173. return rc;
  2174. }
  2175. /**
  2176. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2177. *
  2178. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2179. *
  2180. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2181. */
  2182. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2183. {
  2184. /* Check alive response for "valid" sign from uCode */
  2185. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2186. /* We had an error bringing up the hardware, so take it
  2187. * all the way back down so we can try again */
  2188. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2189. goto restart;
  2190. }
  2191. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2192. * This is a paranoid check, because we would not have gotten the
  2193. * "initialize" alive if code weren't properly loaded. */
  2194. if (iwl3945_verify_ucode(priv)) {
  2195. /* Runtime instruction load was bad;
  2196. * take it all the way back down so we can try again */
  2197. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2198. goto restart;
  2199. }
  2200. /* Send pointers to protocol/runtime uCode image ... init code will
  2201. * load and launch runtime uCode, which will send us another "Alive"
  2202. * notification. */
  2203. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2204. if (iwl3945_set_ucode_ptrs(priv)) {
  2205. /* Runtime instruction load won't happen;
  2206. * take it all the way back down so we can try again */
  2207. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2208. goto restart;
  2209. }
  2210. return;
  2211. restart:
  2212. queue_work(priv->workqueue, &priv->restart);
  2213. }
  2214. /**
  2215. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2216. * from protocol/runtime uCode (initialization uCode's
  2217. * Alive gets handled by iwl3945_init_alive_start()).
  2218. */
  2219. static void iwl3945_alive_start(struct iwl_priv *priv)
  2220. {
  2221. int rc = 0;
  2222. int thermal_spin = 0;
  2223. u32 rfkill;
  2224. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2225. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2226. /* We had an error bringing up the hardware, so take it
  2227. * all the way back down so we can try again */
  2228. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2229. goto restart;
  2230. }
  2231. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2232. * This is a paranoid check, because we would not have gotten the
  2233. * "runtime" alive if code weren't properly loaded. */
  2234. if (iwl3945_verify_ucode(priv)) {
  2235. /* Runtime instruction load was bad;
  2236. * take it all the way back down so we can try again */
  2237. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2238. goto restart;
  2239. }
  2240. priv->cfg->ops->smgmt->clear_station_table(priv);
  2241. rc = iwl_grab_nic_access(priv);
  2242. if (rc) {
  2243. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  2244. return;
  2245. }
  2246. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2247. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2248. iwl_release_nic_access(priv);
  2249. if (rfkill & 0x1) {
  2250. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2251. /* if RFKILL is not on, then wait for thermal
  2252. * sensor in adapter to kick in */
  2253. while (iwl3945_hw_get_temperature(priv) == 0) {
  2254. thermal_spin++;
  2255. udelay(10);
  2256. }
  2257. if (thermal_spin)
  2258. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2259. thermal_spin * 10);
  2260. } else
  2261. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2262. /* After the ALIVE response, we can send commands to 3945 uCode */
  2263. set_bit(STATUS_ALIVE, &priv->status);
  2264. /* Clear out the uCode error bit if it is set */
  2265. clear_bit(STATUS_FW_ERROR, &priv->status);
  2266. if (iwl_is_rfkill(priv))
  2267. return;
  2268. ieee80211_wake_queues(priv->hw);
  2269. priv->active_rate = priv->rates_mask;
  2270. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2271. iwl_power_update_mode(priv, false);
  2272. if (iwl_is_associated(priv)) {
  2273. struct iwl3945_rxon_cmd *active_rxon =
  2274. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2275. memcpy(&priv->staging_rxon, &priv->active_rxon,
  2276. sizeof(priv->staging_rxon));
  2277. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2278. } else {
  2279. /* Initialize our rx_config data */
  2280. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2281. }
  2282. /* Configure Bluetooth device coexistence support */
  2283. iwl_send_bt_config(priv);
  2284. /* Configure the adapter for unassociated operation */
  2285. iwlcore_commit_rxon(priv);
  2286. iwl3945_reg_txpower_periodic(priv);
  2287. iwl3945_led_register(priv);
  2288. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2289. set_bit(STATUS_READY, &priv->status);
  2290. wake_up_interruptible(&priv->wait_command_queue);
  2291. if (priv->error_recovering)
  2292. iwl3945_error_recovery(priv);
  2293. /* reassociate for ADHOC mode */
  2294. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2295. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2296. priv->vif);
  2297. if (beacon)
  2298. iwl_mac_beacon_update(priv->hw, beacon);
  2299. }
  2300. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2301. iwl_set_mode(priv, priv->iw_mode);
  2302. return;
  2303. restart:
  2304. queue_work(priv->workqueue, &priv->restart);
  2305. }
  2306. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2307. static void __iwl3945_down(struct iwl_priv *priv)
  2308. {
  2309. unsigned long flags;
  2310. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2311. struct ieee80211_conf *conf = NULL;
  2312. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2313. conf = ieee80211_get_hw_conf(priv->hw);
  2314. if (!exit_pending)
  2315. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2316. iwl3945_led_unregister(priv);
  2317. priv->cfg->ops->smgmt->clear_station_table(priv);
  2318. /* Unblock any waiting calls */
  2319. wake_up_interruptible_all(&priv->wait_command_queue);
  2320. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2321. * exiting the module */
  2322. if (!exit_pending)
  2323. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2324. /* stop and reset the on-board processor */
  2325. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2326. /* tell the device to stop sending interrupts */
  2327. spin_lock_irqsave(&priv->lock, flags);
  2328. iwl_disable_interrupts(priv);
  2329. spin_unlock_irqrestore(&priv->lock, flags);
  2330. iwl_synchronize_irq(priv);
  2331. if (priv->mac80211_registered)
  2332. ieee80211_stop_queues(priv->hw);
  2333. /* If we have not previously called iwl3945_init() then
  2334. * clear all bits but the RF Kill bits and return */
  2335. if (!iwl_is_init(priv)) {
  2336. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2337. STATUS_RF_KILL_HW |
  2338. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2339. STATUS_RF_KILL_SW |
  2340. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2341. STATUS_GEO_CONFIGURED |
  2342. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2343. STATUS_EXIT_PENDING;
  2344. goto exit;
  2345. }
  2346. /* ...otherwise clear out all the status bits but the RF Kill
  2347. * bits and continue taking the NIC down. */
  2348. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2349. STATUS_RF_KILL_HW |
  2350. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2351. STATUS_RF_KILL_SW |
  2352. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2353. STATUS_GEO_CONFIGURED |
  2354. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2355. STATUS_FW_ERROR |
  2356. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2357. STATUS_EXIT_PENDING;
  2358. priv->cfg->ops->lib->apm_ops.reset(priv);
  2359. spin_lock_irqsave(&priv->lock, flags);
  2360. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2361. spin_unlock_irqrestore(&priv->lock, flags);
  2362. iwl3945_hw_txq_ctx_stop(priv);
  2363. iwl3945_hw_rxq_stop(priv);
  2364. spin_lock_irqsave(&priv->lock, flags);
  2365. if (!iwl_grab_nic_access(priv)) {
  2366. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2367. APMG_CLK_VAL_DMA_CLK_RQT);
  2368. iwl_release_nic_access(priv);
  2369. }
  2370. spin_unlock_irqrestore(&priv->lock, flags);
  2371. udelay(5);
  2372. if (exit_pending)
  2373. priv->cfg->ops->lib->apm_ops.stop(priv);
  2374. else
  2375. priv->cfg->ops->lib->apm_ops.reset(priv);
  2376. exit:
  2377. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2378. if (priv->ibss_beacon)
  2379. dev_kfree_skb(priv->ibss_beacon);
  2380. priv->ibss_beacon = NULL;
  2381. /* clear out any free frames */
  2382. iwl3945_clear_free_frames(priv);
  2383. }
  2384. static void iwl3945_down(struct iwl_priv *priv)
  2385. {
  2386. mutex_lock(&priv->mutex);
  2387. __iwl3945_down(priv);
  2388. mutex_unlock(&priv->mutex);
  2389. iwl3945_cancel_deferred_work(priv);
  2390. }
  2391. #define MAX_HW_RESTARTS 5
  2392. static int __iwl3945_up(struct iwl_priv *priv)
  2393. {
  2394. int rc, i;
  2395. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2396. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2397. return -EIO;
  2398. }
  2399. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  2400. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  2401. "parameter)\n");
  2402. return -ENODEV;
  2403. }
  2404. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2405. IWL_ERR(priv, "ucode not available for device bring up\n");
  2406. return -EIO;
  2407. }
  2408. /* If platform's RF_KILL switch is NOT set to KILL */
  2409. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2410. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2411. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2412. else {
  2413. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2414. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2415. return -ENODEV;
  2416. }
  2417. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2418. rc = iwl3945_hw_nic_init(priv);
  2419. if (rc) {
  2420. IWL_ERR(priv, "Unable to int nic\n");
  2421. return rc;
  2422. }
  2423. /* make sure rfkill handshake bits are cleared */
  2424. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2425. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2426. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2427. /* clear (again), then enable host interrupts */
  2428. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2429. iwl_enable_interrupts(priv);
  2430. /* really make sure rfkill handshake bits are cleared */
  2431. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2432. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2433. /* Copy original ucode data image from disk into backup cache.
  2434. * This will be used to initialize the on-board processor's
  2435. * data SRAM for a clean start when the runtime program first loads. */
  2436. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2437. priv->ucode_data.len);
  2438. /* We return success when we resume from suspend and rf_kill is on. */
  2439. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2440. return 0;
  2441. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2442. priv->cfg->ops->smgmt->clear_station_table(priv);
  2443. /* load bootstrap state machine,
  2444. * load bootstrap program into processor's memory,
  2445. * prepare to load the "initialize" uCode */
  2446. priv->cfg->ops->lib->load_ucode(priv);
  2447. if (rc) {
  2448. IWL_ERR(priv,
  2449. "Unable to set up bootstrap uCode: %d\n", rc);
  2450. continue;
  2451. }
  2452. /* start card; "initialize" will load runtime ucode */
  2453. iwl3945_nic_start(priv);
  2454. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2455. return 0;
  2456. }
  2457. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2458. __iwl3945_down(priv);
  2459. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2460. /* tried to restart and config the device for as long as our
  2461. * patience could withstand */
  2462. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2463. return -EIO;
  2464. }
  2465. /*****************************************************************************
  2466. *
  2467. * Workqueue callbacks
  2468. *
  2469. *****************************************************************************/
  2470. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2471. {
  2472. struct iwl_priv *priv =
  2473. container_of(data, struct iwl_priv, init_alive_start.work);
  2474. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2475. return;
  2476. mutex_lock(&priv->mutex);
  2477. iwl3945_init_alive_start(priv);
  2478. mutex_unlock(&priv->mutex);
  2479. }
  2480. static void iwl3945_bg_alive_start(struct work_struct *data)
  2481. {
  2482. struct iwl_priv *priv =
  2483. container_of(data, struct iwl_priv, alive_start.work);
  2484. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2485. return;
  2486. mutex_lock(&priv->mutex);
  2487. iwl3945_alive_start(priv);
  2488. mutex_unlock(&priv->mutex);
  2489. }
  2490. static void iwl3945_rfkill_poll(struct work_struct *data)
  2491. {
  2492. struct iwl_priv *priv =
  2493. container_of(data, struct iwl_priv, rfkill_poll.work);
  2494. unsigned long status = priv->status;
  2495. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2496. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2497. else
  2498. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2499. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  2500. queue_work(priv->workqueue, &priv->rf_kill);
  2501. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2502. round_jiffies_relative(2 * HZ));
  2503. }
  2504. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2505. static void iwl3945_bg_request_scan(struct work_struct *data)
  2506. {
  2507. struct iwl_priv *priv =
  2508. container_of(data, struct iwl_priv, request_scan);
  2509. struct iwl_host_cmd cmd = {
  2510. .id = REPLY_SCAN_CMD,
  2511. .len = sizeof(struct iwl3945_scan_cmd),
  2512. .meta.flags = CMD_SIZE_HUGE,
  2513. };
  2514. int rc = 0;
  2515. struct iwl3945_scan_cmd *scan;
  2516. struct ieee80211_conf *conf = NULL;
  2517. u8 n_probes = 0;
  2518. enum ieee80211_band band;
  2519. bool is_active = false;
  2520. conf = ieee80211_get_hw_conf(priv->hw);
  2521. mutex_lock(&priv->mutex);
  2522. if (!iwl_is_ready(priv)) {
  2523. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2524. goto done;
  2525. }
  2526. /* Make sure the scan wasn't canceled before this queued work
  2527. * was given the chance to run... */
  2528. if (!test_bit(STATUS_SCANNING, &priv->status))
  2529. goto done;
  2530. /* This should never be called or scheduled if there is currently
  2531. * a scan active in the hardware. */
  2532. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2533. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2534. "Ignoring second request.\n");
  2535. rc = -EIO;
  2536. goto done;
  2537. }
  2538. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2539. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2540. goto done;
  2541. }
  2542. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2543. IWL_DEBUG_HC(priv,
  2544. "Scan request while abort pending. Queuing.\n");
  2545. goto done;
  2546. }
  2547. if (iwl_is_rfkill(priv)) {
  2548. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2549. goto done;
  2550. }
  2551. if (!test_bit(STATUS_READY, &priv->status)) {
  2552. IWL_DEBUG_HC(priv,
  2553. "Scan request while uninitialized. Queuing.\n");
  2554. goto done;
  2555. }
  2556. if (!priv->scan_bands) {
  2557. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2558. goto done;
  2559. }
  2560. if (!priv->scan) {
  2561. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2562. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2563. if (!priv->scan) {
  2564. rc = -ENOMEM;
  2565. goto done;
  2566. }
  2567. }
  2568. scan = priv->scan;
  2569. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2570. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2571. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2572. if (iwl_is_associated(priv)) {
  2573. u16 interval = 0;
  2574. u32 extra;
  2575. u32 suspend_time = 100;
  2576. u32 scan_suspend_time = 100;
  2577. unsigned long flags;
  2578. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2579. spin_lock_irqsave(&priv->lock, flags);
  2580. interval = priv->beacon_int;
  2581. spin_unlock_irqrestore(&priv->lock, flags);
  2582. scan->suspend_time = 0;
  2583. scan->max_out_time = cpu_to_le32(200 * 1024);
  2584. if (!interval)
  2585. interval = suspend_time;
  2586. /*
  2587. * suspend time format:
  2588. * 0-19: beacon interval in usec (time before exec.)
  2589. * 20-23: 0
  2590. * 24-31: number of beacons (suspend between channels)
  2591. */
  2592. extra = (suspend_time / interval) << 24;
  2593. scan_suspend_time = 0xFF0FFFFF &
  2594. (extra | ((suspend_time % interval) * 1024));
  2595. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2596. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2597. scan_suspend_time, interval);
  2598. }
  2599. if (priv->scan_request->n_ssids) {
  2600. int i, p = 0;
  2601. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2602. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2603. /* always does wildcard anyway */
  2604. if (!priv->scan_request->ssids[i].ssid_len)
  2605. continue;
  2606. scan->direct_scan[p].id = WLAN_EID_SSID;
  2607. scan->direct_scan[p].len =
  2608. priv->scan_request->ssids[i].ssid_len;
  2609. memcpy(scan->direct_scan[p].ssid,
  2610. priv->scan_request->ssids[i].ssid,
  2611. priv->scan_request->ssids[i].ssid_len);
  2612. n_probes++;
  2613. p++;
  2614. }
  2615. is_active = true;
  2616. } else
  2617. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2618. /* We don't build a direct scan probe request; the uCode will do
  2619. * that based on the direct_mask added to each channel entry */
  2620. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2621. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2622. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2623. /* flags + rate selection */
  2624. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2625. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2626. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2627. scan->good_CRC_th = 0;
  2628. band = IEEE80211_BAND_2GHZ;
  2629. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2630. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2631. /*
  2632. * If active scaning is requested but a certain channel
  2633. * is marked passive, we can do active scanning if we
  2634. * detect transmissions.
  2635. */
  2636. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2637. band = IEEE80211_BAND_5GHZ;
  2638. } else {
  2639. IWL_WARN(priv, "Invalid scan band count\n");
  2640. goto done;
  2641. }
  2642. scan->tx_cmd.len = cpu_to_le16(
  2643. iwl_fill_probe_req(priv,
  2644. (struct ieee80211_mgmt *)scan->data,
  2645. priv->scan_request->ie,
  2646. priv->scan_request->ie_len,
  2647. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2648. /* select Rx antennas */
  2649. scan->flags |= iwl3945_get_antenna_flags(priv);
  2650. if (iwl_is_monitor_mode(priv))
  2651. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2652. scan->channel_count =
  2653. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2654. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2655. if (scan->channel_count == 0) {
  2656. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2657. goto done;
  2658. }
  2659. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2660. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2661. cmd.data = scan;
  2662. scan->len = cpu_to_le16(cmd.len);
  2663. set_bit(STATUS_SCAN_HW, &priv->status);
  2664. rc = iwl_send_cmd_sync(priv, &cmd);
  2665. if (rc)
  2666. goto done;
  2667. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2668. IWL_SCAN_CHECK_WATCHDOG);
  2669. mutex_unlock(&priv->mutex);
  2670. return;
  2671. done:
  2672. /* can not perform scan make sure we clear scanning
  2673. * bits from status so next scan request can be performed.
  2674. * if we dont clear scanning status bit here all next scan
  2675. * will fail
  2676. */
  2677. clear_bit(STATUS_SCAN_HW, &priv->status);
  2678. clear_bit(STATUS_SCANNING, &priv->status);
  2679. /* inform mac80211 scan aborted */
  2680. queue_work(priv->workqueue, &priv->scan_completed);
  2681. mutex_unlock(&priv->mutex);
  2682. }
  2683. static void iwl3945_bg_up(struct work_struct *data)
  2684. {
  2685. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2686. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2687. return;
  2688. mutex_lock(&priv->mutex);
  2689. __iwl3945_up(priv);
  2690. mutex_unlock(&priv->mutex);
  2691. iwl_rfkill_set_hw_state(priv);
  2692. }
  2693. static void iwl3945_bg_restart(struct work_struct *data)
  2694. {
  2695. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2696. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2697. return;
  2698. iwl3945_down(priv);
  2699. queue_work(priv->workqueue, &priv->up);
  2700. }
  2701. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2702. {
  2703. struct iwl_priv *priv =
  2704. container_of(data, struct iwl_priv, rx_replenish);
  2705. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2706. return;
  2707. mutex_lock(&priv->mutex);
  2708. iwl3945_rx_replenish(priv);
  2709. mutex_unlock(&priv->mutex);
  2710. }
  2711. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2712. void iwl3945_post_associate(struct iwl_priv *priv)
  2713. {
  2714. int rc = 0;
  2715. struct ieee80211_conf *conf = NULL;
  2716. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2717. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2718. return;
  2719. }
  2720. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2721. priv->assoc_id, priv->active_rxon.bssid_addr);
  2722. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2723. return;
  2724. if (!priv->vif || !priv->is_open)
  2725. return;
  2726. iwl_scan_cancel_timeout(priv, 200);
  2727. conf = ieee80211_get_hw_conf(priv->hw);
  2728. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2729. iwlcore_commit_rxon(priv);
  2730. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2731. iwl3945_setup_rxon_timing(priv);
  2732. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2733. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2734. if (rc)
  2735. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2736. "Attempting to continue.\n");
  2737. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2738. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2739. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2740. priv->assoc_id, priv->beacon_int);
  2741. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2742. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2743. else
  2744. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2745. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2746. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2747. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2748. else
  2749. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2750. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2751. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2752. }
  2753. iwlcore_commit_rxon(priv);
  2754. switch (priv->iw_mode) {
  2755. case NL80211_IFTYPE_STATION:
  2756. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2757. break;
  2758. case NL80211_IFTYPE_ADHOC:
  2759. priv->assoc_id = 1;
  2760. priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 0, 0, NULL);
  2761. iwl3945_sync_sta(priv, IWL_STA_ID,
  2762. (priv->band == IEEE80211_BAND_5GHZ) ?
  2763. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2764. CMD_ASYNC);
  2765. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2766. iwl3945_send_beacon_cmd(priv);
  2767. break;
  2768. default:
  2769. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2770. __func__, priv->iw_mode);
  2771. break;
  2772. }
  2773. iwl_activate_qos(priv, 0);
  2774. /* we have just associated, don't start scan too early */
  2775. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2776. }
  2777. /*****************************************************************************
  2778. *
  2779. * mac80211 entry point functions
  2780. *
  2781. *****************************************************************************/
  2782. #define UCODE_READY_TIMEOUT (2 * HZ)
  2783. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2784. {
  2785. struct iwl_priv *priv = hw->priv;
  2786. int ret;
  2787. IWL_DEBUG_MAC80211(priv, "enter\n");
  2788. /* we should be verifying the device is ready to be opened */
  2789. mutex_lock(&priv->mutex);
  2790. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2791. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2792. * ucode filename and max sizes are card-specific. */
  2793. if (!priv->ucode_code.len) {
  2794. ret = iwl3945_read_ucode(priv);
  2795. if (ret) {
  2796. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2797. mutex_unlock(&priv->mutex);
  2798. goto out_release_irq;
  2799. }
  2800. }
  2801. ret = __iwl3945_up(priv);
  2802. mutex_unlock(&priv->mutex);
  2803. iwl_rfkill_set_hw_state(priv);
  2804. if (ret)
  2805. goto out_release_irq;
  2806. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2807. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2808. * mac80211 will not be run successfully. */
  2809. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2810. test_bit(STATUS_READY, &priv->status),
  2811. UCODE_READY_TIMEOUT);
  2812. if (!ret) {
  2813. if (!test_bit(STATUS_READY, &priv->status)) {
  2814. IWL_ERR(priv,
  2815. "Wait for START_ALIVE timeout after %dms.\n",
  2816. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2817. ret = -ETIMEDOUT;
  2818. goto out_release_irq;
  2819. }
  2820. }
  2821. /* ucode is running and will send rfkill notifications,
  2822. * no need to poll the killswitch state anymore */
  2823. cancel_delayed_work(&priv->rfkill_poll);
  2824. priv->is_open = 1;
  2825. IWL_DEBUG_MAC80211(priv, "leave\n");
  2826. return 0;
  2827. out_release_irq:
  2828. priv->is_open = 0;
  2829. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2830. return ret;
  2831. }
  2832. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2833. {
  2834. struct iwl_priv *priv = hw->priv;
  2835. IWL_DEBUG_MAC80211(priv, "enter\n");
  2836. if (!priv->is_open) {
  2837. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2838. return;
  2839. }
  2840. priv->is_open = 0;
  2841. if (iwl_is_ready_rf(priv)) {
  2842. /* stop mac, cancel any scan request and clear
  2843. * RXON_FILTER_ASSOC_MSK BIT
  2844. */
  2845. mutex_lock(&priv->mutex);
  2846. iwl_scan_cancel_timeout(priv, 100);
  2847. mutex_unlock(&priv->mutex);
  2848. }
  2849. iwl3945_down(priv);
  2850. flush_workqueue(priv->workqueue);
  2851. /* start polling the killswitch state again */
  2852. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2853. round_jiffies_relative(2 * HZ));
  2854. IWL_DEBUG_MAC80211(priv, "leave\n");
  2855. }
  2856. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2857. {
  2858. struct iwl_priv *priv = hw->priv;
  2859. IWL_DEBUG_MAC80211(priv, "enter\n");
  2860. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2861. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2862. if (iwl3945_tx_skb(priv, skb))
  2863. dev_kfree_skb_any(skb);
  2864. IWL_DEBUG_MAC80211(priv, "leave\n");
  2865. return NETDEV_TX_OK;
  2866. }
  2867. void iwl3945_config_ap(struct iwl_priv *priv)
  2868. {
  2869. int rc = 0;
  2870. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2871. return;
  2872. /* The following should be done only at AP bring up */
  2873. if (!(iwl_is_associated(priv))) {
  2874. /* RXON - unassoc (to set timing command) */
  2875. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2876. iwlcore_commit_rxon(priv);
  2877. /* RXON Timing */
  2878. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2879. iwl3945_setup_rxon_timing(priv);
  2880. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2881. sizeof(priv->rxon_timing),
  2882. &priv->rxon_timing);
  2883. if (rc)
  2884. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2885. "Attempting to continue.\n");
  2886. /* FIXME: what should be the assoc_id for AP? */
  2887. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2888. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2889. priv->staging_rxon.flags |=
  2890. RXON_FLG_SHORT_PREAMBLE_MSK;
  2891. else
  2892. priv->staging_rxon.flags &=
  2893. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2894. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2895. if (priv->assoc_capability &
  2896. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2897. priv->staging_rxon.flags |=
  2898. RXON_FLG_SHORT_SLOT_MSK;
  2899. else
  2900. priv->staging_rxon.flags &=
  2901. ~RXON_FLG_SHORT_SLOT_MSK;
  2902. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2903. priv->staging_rxon.flags &=
  2904. ~RXON_FLG_SHORT_SLOT_MSK;
  2905. }
  2906. /* restore RXON assoc */
  2907. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2908. iwlcore_commit_rxon(priv);
  2909. priv->cfg->ops->smgmt->add_station(priv, iwl_bcast_addr, 0, 0, NULL);
  2910. }
  2911. iwl3945_send_beacon_cmd(priv);
  2912. /* FIXME - we need to add code here to detect a totally new
  2913. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2914. * clear sta table, add BCAST sta... */
  2915. }
  2916. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2917. struct ieee80211_vif *vif,
  2918. struct ieee80211_sta *sta,
  2919. struct ieee80211_key_conf *key)
  2920. {
  2921. struct iwl_priv *priv = hw->priv;
  2922. const u8 *addr;
  2923. int ret = 0;
  2924. u8 sta_id = IWL_INVALID_STATION;
  2925. u8 static_key;
  2926. IWL_DEBUG_MAC80211(priv, "enter\n");
  2927. if (iwl3945_mod_params.sw_crypto) {
  2928. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2929. return -EOPNOTSUPP;
  2930. }
  2931. addr = sta ? sta->addr : iwl_bcast_addr;
  2932. static_key = !iwl_is_associated(priv);
  2933. if (!static_key) {
  2934. sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
  2935. if (sta_id == IWL_INVALID_STATION) {
  2936. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2937. addr);
  2938. return -EINVAL;
  2939. }
  2940. }
  2941. mutex_lock(&priv->mutex);
  2942. iwl_scan_cancel_timeout(priv, 100);
  2943. mutex_unlock(&priv->mutex);
  2944. switch (cmd) {
  2945. case SET_KEY:
  2946. if (static_key)
  2947. ret = iwl3945_set_static_key(priv, key);
  2948. else
  2949. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2950. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2951. break;
  2952. case DISABLE_KEY:
  2953. if (static_key)
  2954. ret = iwl3945_remove_static_key(priv);
  2955. else
  2956. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2957. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2958. break;
  2959. default:
  2960. ret = -EINVAL;
  2961. }
  2962. IWL_DEBUG_MAC80211(priv, "leave\n");
  2963. return ret;
  2964. }
  2965. /*****************************************************************************
  2966. *
  2967. * sysfs attributes
  2968. *
  2969. *****************************************************************************/
  2970. #ifdef CONFIG_IWLWIFI_DEBUG
  2971. /*
  2972. * The following adds a new attribute to the sysfs representation
  2973. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2974. * used for controlling the debug level.
  2975. *
  2976. * See the level definitions in iwl for details.
  2977. */
  2978. static ssize_t show_debug_level(struct device *d,
  2979. struct device_attribute *attr, char *buf)
  2980. {
  2981. struct iwl_priv *priv = d->driver_data;
  2982. return sprintf(buf, "0x%08X\n", priv->debug_level);
  2983. }
  2984. static ssize_t store_debug_level(struct device *d,
  2985. struct device_attribute *attr,
  2986. const char *buf, size_t count)
  2987. {
  2988. struct iwl_priv *priv = d->driver_data;
  2989. unsigned long val;
  2990. int ret;
  2991. ret = strict_strtoul(buf, 0, &val);
  2992. if (ret)
  2993. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2994. else
  2995. priv->debug_level = val;
  2996. return strnlen(buf, count);
  2997. }
  2998. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2999. show_debug_level, store_debug_level);
  3000. #endif /* CONFIG_IWLWIFI_DEBUG */
  3001. static ssize_t show_temperature(struct device *d,
  3002. struct device_attribute *attr, char *buf)
  3003. {
  3004. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3005. if (!iwl_is_alive(priv))
  3006. return -EAGAIN;
  3007. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  3008. }
  3009. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  3010. static ssize_t show_tx_power(struct device *d,
  3011. struct device_attribute *attr, char *buf)
  3012. {
  3013. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3014. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  3015. }
  3016. static ssize_t store_tx_power(struct device *d,
  3017. struct device_attribute *attr,
  3018. const char *buf, size_t count)
  3019. {
  3020. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3021. char *p = (char *)buf;
  3022. u32 val;
  3023. val = simple_strtoul(p, &p, 10);
  3024. if (p == buf)
  3025. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  3026. else
  3027. iwl3945_hw_reg_set_txpower(priv, val);
  3028. return count;
  3029. }
  3030. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  3031. static ssize_t show_flags(struct device *d,
  3032. struct device_attribute *attr, char *buf)
  3033. {
  3034. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3035. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  3036. }
  3037. static ssize_t store_flags(struct device *d,
  3038. struct device_attribute *attr,
  3039. const char *buf, size_t count)
  3040. {
  3041. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3042. u32 flags = simple_strtoul(buf, NULL, 0);
  3043. mutex_lock(&priv->mutex);
  3044. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  3045. /* Cancel any currently running scans... */
  3046. if (iwl_scan_cancel_timeout(priv, 100))
  3047. IWL_WARN(priv, "Could not cancel scan.\n");
  3048. else {
  3049. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  3050. flags);
  3051. priv->staging_rxon.flags = cpu_to_le32(flags);
  3052. iwlcore_commit_rxon(priv);
  3053. }
  3054. }
  3055. mutex_unlock(&priv->mutex);
  3056. return count;
  3057. }
  3058. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  3059. static ssize_t show_filter_flags(struct device *d,
  3060. struct device_attribute *attr, char *buf)
  3061. {
  3062. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3063. return sprintf(buf, "0x%04X\n",
  3064. le32_to_cpu(priv->active_rxon.filter_flags));
  3065. }
  3066. static ssize_t store_filter_flags(struct device *d,
  3067. struct device_attribute *attr,
  3068. const char *buf, size_t count)
  3069. {
  3070. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3071. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  3072. mutex_lock(&priv->mutex);
  3073. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  3074. /* Cancel any currently running scans... */
  3075. if (iwl_scan_cancel_timeout(priv, 100))
  3076. IWL_WARN(priv, "Could not cancel scan.\n");
  3077. else {
  3078. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  3079. "0x%04X\n", filter_flags);
  3080. priv->staging_rxon.filter_flags =
  3081. cpu_to_le32(filter_flags);
  3082. iwlcore_commit_rxon(priv);
  3083. }
  3084. }
  3085. mutex_unlock(&priv->mutex);
  3086. return count;
  3087. }
  3088. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  3089. store_filter_flags);
  3090. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3091. static ssize_t show_measurement(struct device *d,
  3092. struct device_attribute *attr, char *buf)
  3093. {
  3094. struct iwl_priv *priv = dev_get_drvdata(d);
  3095. struct iwl_spectrum_notification measure_report;
  3096. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  3097. u8 *data = (u8 *)&measure_report;
  3098. unsigned long flags;
  3099. spin_lock_irqsave(&priv->lock, flags);
  3100. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  3101. spin_unlock_irqrestore(&priv->lock, flags);
  3102. return 0;
  3103. }
  3104. memcpy(&measure_report, &priv->measure_report, size);
  3105. priv->measurement_status = 0;
  3106. spin_unlock_irqrestore(&priv->lock, flags);
  3107. while (size && (PAGE_SIZE - len)) {
  3108. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3109. PAGE_SIZE - len, 1);
  3110. len = strlen(buf);
  3111. if (PAGE_SIZE - len)
  3112. buf[len++] = '\n';
  3113. ofs += 16;
  3114. size -= min(size, 16U);
  3115. }
  3116. return len;
  3117. }
  3118. static ssize_t store_measurement(struct device *d,
  3119. struct device_attribute *attr,
  3120. const char *buf, size_t count)
  3121. {
  3122. struct iwl_priv *priv = dev_get_drvdata(d);
  3123. struct ieee80211_measurement_params params = {
  3124. .channel = le16_to_cpu(priv->active_rxon.channel),
  3125. .start_time = cpu_to_le64(priv->last_tsf),
  3126. .duration = cpu_to_le16(1),
  3127. };
  3128. u8 type = IWL_MEASURE_BASIC;
  3129. u8 buffer[32];
  3130. u8 channel;
  3131. if (count) {
  3132. char *p = buffer;
  3133. strncpy(buffer, buf, min(sizeof(buffer), count));
  3134. channel = simple_strtoul(p, NULL, 0);
  3135. if (channel)
  3136. params.channel = channel;
  3137. p = buffer;
  3138. while (*p && *p != ' ')
  3139. p++;
  3140. if (*p)
  3141. type = simple_strtoul(p + 1, NULL, 0);
  3142. }
  3143. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3144. "channel %d (for '%s')\n", type, params.channel, buf);
  3145. iwl3945_get_measurement(priv, &params, type);
  3146. return count;
  3147. }
  3148. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3149. show_measurement, store_measurement);
  3150. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  3151. static ssize_t store_retry_rate(struct device *d,
  3152. struct device_attribute *attr,
  3153. const char *buf, size_t count)
  3154. {
  3155. struct iwl_priv *priv = dev_get_drvdata(d);
  3156. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3157. if (priv->retry_rate <= 0)
  3158. priv->retry_rate = 1;
  3159. return count;
  3160. }
  3161. static ssize_t show_retry_rate(struct device *d,
  3162. struct device_attribute *attr, char *buf)
  3163. {
  3164. struct iwl_priv *priv = dev_get_drvdata(d);
  3165. return sprintf(buf, "%d", priv->retry_rate);
  3166. }
  3167. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3168. store_retry_rate);
  3169. static ssize_t store_power_level(struct device *d,
  3170. struct device_attribute *attr,
  3171. const char *buf, size_t count)
  3172. {
  3173. struct iwl_priv *priv = dev_get_drvdata(d);
  3174. int ret;
  3175. unsigned long mode;
  3176. mutex_lock(&priv->mutex);
  3177. ret = strict_strtoul(buf, 10, &mode);
  3178. if (ret)
  3179. goto out;
  3180. ret = iwl_power_set_user_mode(priv, mode);
  3181. if (ret) {
  3182. IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
  3183. goto out;
  3184. }
  3185. ret = count;
  3186. out:
  3187. mutex_unlock(&priv->mutex);
  3188. return ret;
  3189. }
  3190. static ssize_t show_power_level(struct device *d,
  3191. struct device_attribute *attr, char *buf)
  3192. {
  3193. struct iwl_priv *priv = dev_get_drvdata(d);
  3194. int mode = priv->power_data.user_power_setting;
  3195. int system = priv->power_data.system_power_setting;
  3196. int level = priv->power_data.power_mode;
  3197. char *p = buf;
  3198. switch (system) {
  3199. case IWL_POWER_SYS_AUTO:
  3200. p += sprintf(p, "SYSTEM:auto");
  3201. break;
  3202. case IWL_POWER_SYS_AC:
  3203. p += sprintf(p, "SYSTEM:ac");
  3204. break;
  3205. case IWL_POWER_SYS_BATTERY:
  3206. p += sprintf(p, "SYSTEM:battery");
  3207. break;
  3208. }
  3209. p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
  3210. "fixed" : "auto");
  3211. p += sprintf(p, "\tINDEX:%d", level);
  3212. p += sprintf(p, "\n");
  3213. return p - buf + 1;
  3214. }
  3215. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
  3216. show_power_level, store_power_level);
  3217. #define MAX_WX_STRING 80
  3218. /* Values are in microsecond */
  3219. static const s32 timeout_duration[] = {
  3220. 350000,
  3221. 250000,
  3222. 75000,
  3223. 37000,
  3224. 25000,
  3225. };
  3226. static const s32 period_duration[] = {
  3227. 400000,
  3228. 700000,
  3229. 1000000,
  3230. 1000000,
  3231. 1000000
  3232. };
  3233. static ssize_t show_channels(struct device *d,
  3234. struct device_attribute *attr, char *buf)
  3235. {
  3236. /* all this shit doesn't belong into sysfs anyway */
  3237. return 0;
  3238. }
  3239. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3240. static ssize_t show_statistics(struct device *d,
  3241. struct device_attribute *attr, char *buf)
  3242. {
  3243. struct iwl_priv *priv = dev_get_drvdata(d);
  3244. u32 size = sizeof(struct iwl3945_notif_statistics);
  3245. u32 len = 0, ofs = 0;
  3246. u8 *data = (u8 *)&priv->statistics_39;
  3247. int rc = 0;
  3248. if (!iwl_is_alive(priv))
  3249. return -EAGAIN;
  3250. mutex_lock(&priv->mutex);
  3251. rc = iwl_send_statistics_request(priv, 0);
  3252. mutex_unlock(&priv->mutex);
  3253. if (rc) {
  3254. len = sprintf(buf,
  3255. "Error sending statistics request: 0x%08X\n", rc);
  3256. return len;
  3257. }
  3258. while (size && (PAGE_SIZE - len)) {
  3259. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3260. PAGE_SIZE - len, 1);
  3261. len = strlen(buf);
  3262. if (PAGE_SIZE - len)
  3263. buf[len++] = '\n';
  3264. ofs += 16;
  3265. size -= min(size, 16U);
  3266. }
  3267. return len;
  3268. }
  3269. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3270. static ssize_t show_antenna(struct device *d,
  3271. struct device_attribute *attr, char *buf)
  3272. {
  3273. struct iwl_priv *priv = dev_get_drvdata(d);
  3274. if (!iwl_is_alive(priv))
  3275. return -EAGAIN;
  3276. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3277. }
  3278. static ssize_t store_antenna(struct device *d,
  3279. struct device_attribute *attr,
  3280. const char *buf, size_t count)
  3281. {
  3282. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3283. int ant;
  3284. if (count == 0)
  3285. return 0;
  3286. if (sscanf(buf, "%1i", &ant) != 1) {
  3287. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3288. return count;
  3289. }
  3290. if ((ant >= 0) && (ant <= 2)) {
  3291. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3292. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3293. } else
  3294. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3295. return count;
  3296. }
  3297. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3298. static ssize_t show_status(struct device *d,
  3299. struct device_attribute *attr, char *buf)
  3300. {
  3301. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3302. if (!iwl_is_alive(priv))
  3303. return -EAGAIN;
  3304. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3305. }
  3306. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3307. static ssize_t dump_error_log(struct device *d,
  3308. struct device_attribute *attr,
  3309. const char *buf, size_t count)
  3310. {
  3311. char *p = (char *)buf;
  3312. if (p[0] == '1')
  3313. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  3314. return strnlen(buf, count);
  3315. }
  3316. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3317. static ssize_t dump_event_log(struct device *d,
  3318. struct device_attribute *attr,
  3319. const char *buf, size_t count)
  3320. {
  3321. char *p = (char *)buf;
  3322. if (p[0] == '1')
  3323. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  3324. return strnlen(buf, count);
  3325. }
  3326. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  3327. /*****************************************************************************
  3328. *
  3329. * driver setup and tear down
  3330. *
  3331. *****************************************************************************/
  3332. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3333. {
  3334. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3335. init_waitqueue_head(&priv->wait_command_queue);
  3336. INIT_WORK(&priv->up, iwl3945_bg_up);
  3337. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3338. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3339. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  3340. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3341. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3342. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3343. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3344. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3345. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3346. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3347. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3348. iwl3945_hw_setup_deferred_work(priv);
  3349. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3350. iwl3945_irq_tasklet, (unsigned long)priv);
  3351. }
  3352. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3353. {
  3354. iwl3945_hw_cancel_deferred_work(priv);
  3355. cancel_delayed_work_sync(&priv->init_alive_start);
  3356. cancel_delayed_work(&priv->scan_check);
  3357. cancel_delayed_work(&priv->alive_start);
  3358. cancel_work_sync(&priv->beacon_update);
  3359. }
  3360. static struct attribute *iwl3945_sysfs_entries[] = {
  3361. &dev_attr_antenna.attr,
  3362. &dev_attr_channels.attr,
  3363. &dev_attr_dump_errors.attr,
  3364. &dev_attr_dump_events.attr,
  3365. &dev_attr_flags.attr,
  3366. &dev_attr_filter_flags.attr,
  3367. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3368. &dev_attr_measurement.attr,
  3369. #endif
  3370. &dev_attr_power_level.attr,
  3371. &dev_attr_retry_rate.attr,
  3372. &dev_attr_statistics.attr,
  3373. &dev_attr_status.attr,
  3374. &dev_attr_temperature.attr,
  3375. &dev_attr_tx_power.attr,
  3376. #ifdef CONFIG_IWLWIFI_DEBUG
  3377. &dev_attr_debug_level.attr,
  3378. #endif
  3379. NULL
  3380. };
  3381. static struct attribute_group iwl3945_attribute_group = {
  3382. .name = NULL, /* put in device directory */
  3383. .attrs = iwl3945_sysfs_entries,
  3384. };
  3385. static struct ieee80211_ops iwl3945_hw_ops = {
  3386. .tx = iwl3945_mac_tx,
  3387. .start = iwl3945_mac_start,
  3388. .stop = iwl3945_mac_stop,
  3389. .add_interface = iwl_mac_add_interface,
  3390. .remove_interface = iwl_mac_remove_interface,
  3391. .config = iwl_mac_config,
  3392. .config_interface = iwl_mac_config_interface,
  3393. .configure_filter = iwl_configure_filter,
  3394. .set_key = iwl3945_mac_set_key,
  3395. .get_tx_stats = iwl_mac_get_tx_stats,
  3396. .conf_tx = iwl_mac_conf_tx,
  3397. .reset_tsf = iwl_mac_reset_tsf,
  3398. .bss_info_changed = iwl_bss_info_changed,
  3399. .hw_scan = iwl_mac_hw_scan
  3400. };
  3401. static int iwl3945_init_drv(struct iwl_priv *priv)
  3402. {
  3403. int ret;
  3404. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3405. priv->retry_rate = 1;
  3406. priv->ibss_beacon = NULL;
  3407. spin_lock_init(&priv->lock);
  3408. spin_lock_init(&priv->power_data.lock);
  3409. spin_lock_init(&priv->sta_lock);
  3410. spin_lock_init(&priv->hcmd_lock);
  3411. INIT_LIST_HEAD(&priv->free_frames);
  3412. mutex_init(&priv->mutex);
  3413. /* Clear the driver's (not device's) station table */
  3414. priv->cfg->ops->smgmt->clear_station_table(priv);
  3415. priv->data_retry_limit = -1;
  3416. priv->ieee_channels = NULL;
  3417. priv->ieee_rates = NULL;
  3418. priv->band = IEEE80211_BAND_2GHZ;
  3419. priv->iw_mode = NL80211_IFTYPE_STATION;
  3420. iwl_reset_qos(priv);
  3421. priv->qos_data.qos_active = 0;
  3422. priv->qos_data.qos_cap.val = 0;
  3423. priv->rates_mask = IWL_RATES_MASK;
  3424. /* If power management is turned on, default to CAM mode */
  3425. priv->power_mode = IWL_POWER_MODE_CAM;
  3426. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3427. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3428. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3429. eeprom->version);
  3430. ret = -EINVAL;
  3431. goto err;
  3432. }
  3433. ret = iwl_init_channel_map(priv);
  3434. if (ret) {
  3435. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3436. goto err;
  3437. }
  3438. /* Set up txpower settings in driver for all channels */
  3439. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3440. ret = -EIO;
  3441. goto err_free_channel_map;
  3442. }
  3443. ret = iwlcore_init_geos(priv);
  3444. if (ret) {
  3445. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3446. goto err_free_channel_map;
  3447. }
  3448. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3449. return 0;
  3450. err_free_channel_map:
  3451. iwl_free_channel_map(priv);
  3452. err:
  3453. return ret;
  3454. }
  3455. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3456. {
  3457. int ret;
  3458. struct ieee80211_hw *hw = priv->hw;
  3459. hw->rate_control_algorithm = "iwl-3945-rs";
  3460. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3461. /* Tell mac80211 our characteristics */
  3462. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3463. IEEE80211_HW_NOISE_DBM |
  3464. IEEE80211_HW_SPECTRUM_MGMT;
  3465. hw->wiphy->interface_modes =
  3466. BIT(NL80211_IFTYPE_STATION) |
  3467. BIT(NL80211_IFTYPE_ADHOC);
  3468. hw->wiphy->custom_regulatory = true;
  3469. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3470. /* we create the 802.11 header and a zero-length SSID element */
  3471. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3472. /* Default value; 4 EDCA QOS priorities */
  3473. hw->queues = 4;
  3474. hw->conf.beacon_int = 100;
  3475. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3476. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3477. &priv->bands[IEEE80211_BAND_2GHZ];
  3478. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3479. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3480. &priv->bands[IEEE80211_BAND_5GHZ];
  3481. ret = ieee80211_register_hw(priv->hw);
  3482. if (ret) {
  3483. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3484. return ret;
  3485. }
  3486. priv->mac80211_registered = 1;
  3487. return 0;
  3488. }
  3489. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3490. {
  3491. int err = 0;
  3492. struct iwl_priv *priv;
  3493. struct ieee80211_hw *hw;
  3494. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3495. struct iwl3945_eeprom *eeprom;
  3496. unsigned long flags;
  3497. /***********************
  3498. * 1. Allocating HW data
  3499. * ********************/
  3500. /* mac80211 allocates memory for this device instance, including
  3501. * space for this driver's private structure */
  3502. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3503. if (hw == NULL) {
  3504. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3505. err = -ENOMEM;
  3506. goto out;
  3507. }
  3508. priv = hw->priv;
  3509. SET_IEEE80211_DEV(hw, &pdev->dev);
  3510. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  3511. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  3512. IWL_ERR(priv,
  3513. "invalid queues_num, should be between %d and %d\n",
  3514. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  3515. err = -EINVAL;
  3516. goto out_ieee80211_free_hw;
  3517. }
  3518. /*
  3519. * Disabling hardware scan means that mac80211 will perform scans
  3520. * "the hard way", rather than using device's scan.
  3521. */
  3522. if (iwl3945_mod_params.disable_hw_scan) {
  3523. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3524. iwl3945_hw_ops.hw_scan = NULL;
  3525. }
  3526. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3527. priv->cfg = cfg;
  3528. priv->pci_dev = pdev;
  3529. #ifdef CONFIG_IWLWIFI_DEBUG
  3530. priv->debug_level = iwl3945_mod_params.debug;
  3531. atomic_set(&priv->restrict_refcnt, 0);
  3532. #endif
  3533. /***************************
  3534. * 2. Initializing PCI bus
  3535. * *************************/
  3536. if (pci_enable_device(pdev)) {
  3537. err = -ENODEV;
  3538. goto out_ieee80211_free_hw;
  3539. }
  3540. pci_set_master(pdev);
  3541. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3542. if (!err)
  3543. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3544. if (err) {
  3545. IWL_WARN(priv, "No suitable DMA available.\n");
  3546. goto out_pci_disable_device;
  3547. }
  3548. pci_set_drvdata(pdev, priv);
  3549. err = pci_request_regions(pdev, DRV_NAME);
  3550. if (err)
  3551. goto out_pci_disable_device;
  3552. /***********************
  3553. * 3. Read REV Register
  3554. * ********************/
  3555. priv->hw_base = pci_iomap(pdev, 0, 0);
  3556. if (!priv->hw_base) {
  3557. err = -ENODEV;
  3558. goto out_pci_release_regions;
  3559. }
  3560. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3561. (unsigned long long) pci_resource_len(pdev, 0));
  3562. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3563. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3564. * PCI Tx retries from interfering with C3 CPU state */
  3565. pci_write_config_byte(pdev, 0x41, 0x00);
  3566. /* amp init */
  3567. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3568. if (err < 0) {
  3569. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3570. goto out_iounmap;
  3571. }
  3572. /***********************
  3573. * 4. Read EEPROM
  3574. * ********************/
  3575. /* Read the EEPROM */
  3576. err = iwl_eeprom_init(priv);
  3577. if (err) {
  3578. IWL_ERR(priv, "Unable to init EEPROM\n");
  3579. goto out_iounmap;
  3580. }
  3581. /* MAC Address location in EEPROM same for 3945/4965 */
  3582. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3583. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3584. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3585. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3586. /***********************
  3587. * 5. Setup HW Constants
  3588. * ********************/
  3589. /* Device-specific setup */
  3590. if (iwl3945_hw_set_hw_params(priv)) {
  3591. IWL_ERR(priv, "failed to set hw settings\n");
  3592. goto out_eeprom_free;
  3593. }
  3594. /***********************
  3595. * 6. Setup priv
  3596. * ********************/
  3597. err = iwl3945_init_drv(priv);
  3598. if (err) {
  3599. IWL_ERR(priv, "initializing driver failed\n");
  3600. goto out_unset_hw_params;
  3601. }
  3602. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3603. priv->cfg->name);
  3604. /***********************
  3605. * 7. Setup Services
  3606. * ********************/
  3607. spin_lock_irqsave(&priv->lock, flags);
  3608. iwl_disable_interrupts(priv);
  3609. spin_unlock_irqrestore(&priv->lock, flags);
  3610. pci_enable_msi(priv->pci_dev);
  3611. err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
  3612. DRV_NAME, priv);
  3613. if (err) {
  3614. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3615. goto out_disable_msi;
  3616. }
  3617. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3618. if (err) {
  3619. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3620. goto out_release_irq;
  3621. }
  3622. iwl_set_rxon_channel(priv,
  3623. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3624. iwl3945_setup_deferred_work(priv);
  3625. iwl3945_setup_rx_handlers(priv);
  3626. /*********************************
  3627. * 8. Setup and Register mac80211
  3628. * *******************************/
  3629. iwl_enable_interrupts(priv);
  3630. err = iwl3945_setup_mac(priv);
  3631. if (err)
  3632. goto out_remove_sysfs;
  3633. err = iwl_dbgfs_register(priv, DRV_NAME);
  3634. if (err)
  3635. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3636. err = iwl_rfkill_init(priv);
  3637. if (err)
  3638. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  3639. "Ignoring error: %d\n", err);
  3640. else
  3641. iwl_rfkill_set_hw_state(priv);
  3642. /* Start monitoring the killswitch */
  3643. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3644. 2 * HZ);
  3645. return 0;
  3646. out_remove_sysfs:
  3647. destroy_workqueue(priv->workqueue);
  3648. priv->workqueue = NULL;
  3649. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3650. out_release_irq:
  3651. free_irq(priv->pci_dev->irq, priv);
  3652. out_disable_msi:
  3653. pci_disable_msi(priv->pci_dev);
  3654. iwlcore_free_geos(priv);
  3655. iwl_free_channel_map(priv);
  3656. out_unset_hw_params:
  3657. iwl3945_unset_hw_params(priv);
  3658. out_eeprom_free:
  3659. iwl_eeprom_free(priv);
  3660. out_iounmap:
  3661. pci_iounmap(pdev, priv->hw_base);
  3662. out_pci_release_regions:
  3663. pci_release_regions(pdev);
  3664. out_pci_disable_device:
  3665. pci_set_drvdata(pdev, NULL);
  3666. pci_disable_device(pdev);
  3667. out_ieee80211_free_hw:
  3668. ieee80211_free_hw(priv->hw);
  3669. out:
  3670. return err;
  3671. }
  3672. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3673. {
  3674. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3675. unsigned long flags;
  3676. if (!priv)
  3677. return;
  3678. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3679. iwl_dbgfs_unregister(priv);
  3680. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3681. if (priv->mac80211_registered) {
  3682. ieee80211_unregister_hw(priv->hw);
  3683. priv->mac80211_registered = 0;
  3684. } else {
  3685. iwl3945_down(priv);
  3686. }
  3687. /* make sure we flush any pending irq or
  3688. * tasklet for the driver
  3689. */
  3690. spin_lock_irqsave(&priv->lock, flags);
  3691. iwl_disable_interrupts(priv);
  3692. spin_unlock_irqrestore(&priv->lock, flags);
  3693. iwl_synchronize_irq(priv);
  3694. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3695. iwl_rfkill_unregister(priv);
  3696. cancel_delayed_work_sync(&priv->rfkill_poll);
  3697. iwl3945_dealloc_ucode_pci(priv);
  3698. if (priv->rxq.bd)
  3699. iwl3945_rx_queue_free(priv, &priv->rxq);
  3700. iwl3945_hw_txq_ctx_free(priv);
  3701. iwl3945_unset_hw_params(priv);
  3702. priv->cfg->ops->smgmt->clear_station_table(priv);
  3703. /*netif_stop_queue(dev); */
  3704. flush_workqueue(priv->workqueue);
  3705. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3706. * priv->workqueue... so we can't take down the workqueue
  3707. * until now... */
  3708. destroy_workqueue(priv->workqueue);
  3709. priv->workqueue = NULL;
  3710. free_irq(pdev->irq, priv);
  3711. pci_disable_msi(pdev);
  3712. pci_iounmap(pdev, priv->hw_base);
  3713. pci_release_regions(pdev);
  3714. pci_disable_device(pdev);
  3715. pci_set_drvdata(pdev, NULL);
  3716. iwl_free_channel_map(priv);
  3717. iwlcore_free_geos(priv);
  3718. kfree(priv->scan);
  3719. if (priv->ibss_beacon)
  3720. dev_kfree_skb(priv->ibss_beacon);
  3721. ieee80211_free_hw(priv->hw);
  3722. }
  3723. /*****************************************************************************
  3724. *
  3725. * driver and module entry point
  3726. *
  3727. *****************************************************************************/
  3728. static struct pci_driver iwl3945_driver = {
  3729. .name = DRV_NAME,
  3730. .id_table = iwl3945_hw_card_ids,
  3731. .probe = iwl3945_pci_probe,
  3732. .remove = __devexit_p(iwl3945_pci_remove),
  3733. #ifdef CONFIG_PM
  3734. .suspend = iwl_pci_suspend,
  3735. .resume = iwl_pci_resume,
  3736. #endif
  3737. };
  3738. static int __init iwl3945_init(void)
  3739. {
  3740. int ret;
  3741. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3742. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3743. ret = iwl3945_rate_control_register();
  3744. if (ret) {
  3745. printk(KERN_ERR DRV_NAME
  3746. "Unable to register rate control algorithm: %d\n", ret);
  3747. return ret;
  3748. }
  3749. ret = pci_register_driver(&iwl3945_driver);
  3750. if (ret) {
  3751. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3752. goto error_register;
  3753. }
  3754. return ret;
  3755. error_register:
  3756. iwl3945_rate_control_unregister();
  3757. return ret;
  3758. }
  3759. static void __exit iwl3945_exit(void)
  3760. {
  3761. pci_unregister_driver(&iwl3945_driver);
  3762. iwl3945_rate_control_unregister();
  3763. }
  3764. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3765. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  3766. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3767. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  3768. MODULE_PARM_DESC(swcrypto,
  3769. "using software crypto (default 1 [software])\n");
  3770. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  3771. MODULE_PARM_DESC(debug, "debug output mask");
  3772. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  3773. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3774. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  3775. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  3776. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  3777. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3778. module_exit(iwl3945_exit);
  3779. module_init(iwl3945_init);