atl1c_main.c 76 KB

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  1. /*
  2. * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
  3. *
  4. * Derived from Intel e1000 driver
  5. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 2 of the License, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc., 59
  19. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. #include "atl1c.h"
  22. #define ATL1C_DRV_VERSION "1.0.0.1-NAPI"
  23. char atl1c_driver_name[] = "atl1c";
  24. char atl1c_driver_version[] = ATL1C_DRV_VERSION;
  25. #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
  26. #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
  27. /*
  28. * atl1c_pci_tbl - PCI Device ID Table
  29. *
  30. * Wildcard entries (PCI_ANY_ID) should come last
  31. * Last entry must be all 0s
  32. *
  33. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  34. * Class, Class Mask, private data (not used) }
  35. */
  36. static struct pci_device_id atl1c_pci_tbl[] = {
  37. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
  38. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
  39. /* required last entry */
  40. { 0 }
  41. };
  42. MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
  43. MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
  44. MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
  45. MODULE_LICENSE("GPL");
  46. MODULE_VERSION(ATL1C_DRV_VERSION);
  47. static int atl1c_stop_mac(struct atl1c_hw *hw);
  48. static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
  49. static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
  50. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
  51. static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
  52. static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
  53. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
  54. int *work_done, int work_to_do);
  55. static const u16 atl1c_pay_load_size[] = {
  56. 128, 256, 512, 1024, 2048, 4096,
  57. };
  58. static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
  59. {
  60. REG_MB_RFD0_PROD_IDX,
  61. REG_MB_RFD1_PROD_IDX,
  62. REG_MB_RFD2_PROD_IDX,
  63. REG_MB_RFD3_PROD_IDX
  64. };
  65. static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
  66. {
  67. REG_RFD0_HEAD_ADDR_LO,
  68. REG_RFD1_HEAD_ADDR_LO,
  69. REG_RFD2_HEAD_ADDR_LO,
  70. REG_RFD3_HEAD_ADDR_LO
  71. };
  72. static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
  73. {
  74. REG_RRD0_HEAD_ADDR_LO,
  75. REG_RRD1_HEAD_ADDR_LO,
  76. REG_RRD2_HEAD_ADDR_LO,
  77. REG_RRD3_HEAD_ADDR_LO
  78. };
  79. static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  80. NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
  81. /*
  82. * atl1c_init_pcie - init PCIE module
  83. */
  84. static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
  85. {
  86. u32 data;
  87. u32 pci_cmd;
  88. struct pci_dev *pdev = hw->adapter->pdev;
  89. AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
  90. pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
  91. pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
  92. PCI_COMMAND_IO);
  93. AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
  94. /*
  95. * Clear any PowerSaveing Settings
  96. */
  97. pci_enable_wake(pdev, PCI_D3hot, 0);
  98. pci_enable_wake(pdev, PCI_D3cold, 0);
  99. /*
  100. * Mask some pcie error bits
  101. */
  102. AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
  103. data &= ~PCIE_UC_SERVRITY_DLP;
  104. data &= ~PCIE_UC_SERVRITY_FCP;
  105. AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
  106. if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
  107. atl1c_disable_l0s_l1(hw);
  108. if (flag & ATL1C_PCIE_PHY_RESET)
  109. AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
  110. else
  111. AT_WRITE_REG(hw, REG_GPHY_CTRL,
  112. GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
  113. msleep(1);
  114. }
  115. /*
  116. * atl1c_irq_enable - Enable default interrupt generation settings
  117. * @adapter: board private structure
  118. */
  119. static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
  120. {
  121. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  122. AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
  123. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  124. AT_WRITE_FLUSH(&adapter->hw);
  125. }
  126. }
  127. /*
  128. * atl1c_irq_disable - Mask off interrupt generation on the NIC
  129. * @adapter: board private structure
  130. */
  131. static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
  132. {
  133. atomic_inc(&adapter->irq_sem);
  134. AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
  135. AT_WRITE_FLUSH(&adapter->hw);
  136. synchronize_irq(adapter->pdev->irq);
  137. }
  138. /*
  139. * atl1c_irq_reset - reset interrupt confiure on the NIC
  140. * @adapter: board private structure
  141. */
  142. static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
  143. {
  144. atomic_set(&adapter->irq_sem, 1);
  145. atl1c_irq_enable(adapter);
  146. }
  147. /*
  148. * atl1c_phy_config - Timer Call-back
  149. * @data: pointer to netdev cast into an unsigned long
  150. */
  151. static void atl1c_phy_config(unsigned long data)
  152. {
  153. struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
  154. struct atl1c_hw *hw = &adapter->hw;
  155. unsigned long flags;
  156. spin_lock_irqsave(&adapter->mdio_lock, flags);
  157. atl1c_restart_autoneg(hw);
  158. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  159. }
  160. void atl1c_reinit_locked(struct atl1c_adapter *adapter)
  161. {
  162. WARN_ON(in_interrupt());
  163. atl1c_down(adapter);
  164. atl1c_up(adapter);
  165. clear_bit(__AT_RESETTING, &adapter->flags);
  166. }
  167. static void atl1c_reset_task(struct work_struct *work)
  168. {
  169. struct atl1c_adapter *adapter;
  170. struct net_device *netdev;
  171. adapter = container_of(work, struct atl1c_adapter, reset_task);
  172. netdev = adapter->netdev;
  173. netif_device_detach(netdev);
  174. atl1c_down(adapter);
  175. atl1c_up(adapter);
  176. netif_device_attach(netdev);
  177. }
  178. static void atl1c_check_link_status(struct atl1c_adapter *adapter)
  179. {
  180. struct atl1c_hw *hw = &adapter->hw;
  181. struct net_device *netdev = adapter->netdev;
  182. struct pci_dev *pdev = adapter->pdev;
  183. int err;
  184. unsigned long flags;
  185. u16 speed, duplex, phy_data;
  186. spin_lock_irqsave(&adapter->mdio_lock, flags);
  187. /* MII_BMSR must read twise */
  188. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  189. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  190. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  191. if ((phy_data & BMSR_LSTATUS) == 0) {
  192. /* link down */
  193. if (netif_carrier_ok(netdev)) {
  194. hw->hibernate = true;
  195. if (atl1c_stop_mac(hw) != 0)
  196. if (netif_msg_hw(adapter))
  197. dev_warn(&pdev->dev,
  198. "stop mac failed\n");
  199. atl1c_set_aspm(hw, false);
  200. }
  201. netif_carrier_off(netdev);
  202. } else {
  203. /* Link Up */
  204. hw->hibernate = false;
  205. spin_lock_irqsave(&adapter->mdio_lock, flags);
  206. err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
  207. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  208. if (unlikely(err))
  209. return;
  210. /* link result is our setting */
  211. if (adapter->link_speed != speed ||
  212. adapter->link_duplex != duplex) {
  213. adapter->link_speed = speed;
  214. adapter->link_duplex = duplex;
  215. atl1c_set_aspm(hw, true);
  216. atl1c_enable_tx_ctrl(hw);
  217. atl1c_enable_rx_ctrl(hw);
  218. atl1c_setup_mac_ctrl(adapter);
  219. if (netif_msg_link(adapter))
  220. dev_info(&pdev->dev,
  221. "%s: %s NIC Link is Up<%d Mbps %s>\n",
  222. atl1c_driver_name, netdev->name,
  223. adapter->link_speed,
  224. adapter->link_duplex == FULL_DUPLEX ?
  225. "Full Duplex" : "Half Duplex");
  226. }
  227. if (!netif_carrier_ok(netdev))
  228. netif_carrier_on(netdev);
  229. }
  230. }
  231. /*
  232. * atl1c_link_chg_task - deal with link change event Out of interrupt context
  233. * @netdev: network interface device structure
  234. */
  235. static void atl1c_link_chg_task(struct work_struct *work)
  236. {
  237. struct atl1c_adapter *adapter;
  238. adapter = container_of(work, struct atl1c_adapter, link_chg_task);
  239. atl1c_check_link_status(adapter);
  240. }
  241. static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
  242. {
  243. struct net_device *netdev = adapter->netdev;
  244. struct pci_dev *pdev = adapter->pdev;
  245. u16 phy_data;
  246. u16 link_up;
  247. spin_lock(&adapter->mdio_lock);
  248. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  249. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  250. spin_unlock(&adapter->mdio_lock);
  251. link_up = phy_data & BMSR_LSTATUS;
  252. /* notify upper layer link down ASAP */
  253. if (!link_up) {
  254. if (netif_carrier_ok(netdev)) {
  255. /* old link state: Up */
  256. netif_carrier_off(netdev);
  257. if (netif_msg_link(adapter))
  258. dev_info(&pdev->dev,
  259. "%s: %s NIC Link is Down\n",
  260. atl1c_driver_name, netdev->name);
  261. adapter->link_speed = SPEED_0;
  262. }
  263. }
  264. schedule_work(&adapter->link_chg_task);
  265. }
  266. static void atl1c_del_timer(struct atl1c_adapter *adapter)
  267. {
  268. del_timer_sync(&adapter->phy_config_timer);
  269. }
  270. static void atl1c_cancel_work(struct atl1c_adapter *adapter)
  271. {
  272. cancel_work_sync(&adapter->reset_task);
  273. cancel_work_sync(&adapter->link_chg_task);
  274. }
  275. /*
  276. * atl1c_tx_timeout - Respond to a Tx Hang
  277. * @netdev: network interface device structure
  278. */
  279. static void atl1c_tx_timeout(struct net_device *netdev)
  280. {
  281. struct atl1c_adapter *adapter = netdev_priv(netdev);
  282. /* Do the reset outside of interrupt context */
  283. schedule_work(&adapter->reset_task);
  284. }
  285. /*
  286. * atl1c_set_multi - Multicast and Promiscuous mode set
  287. * @netdev: network interface device structure
  288. *
  289. * The set_multi entry point is called whenever the multicast address
  290. * list or the network interface flags are updated. This routine is
  291. * responsible for configuring the hardware for proper multicast,
  292. * promiscuous mode, and all-multi behavior.
  293. */
  294. static void atl1c_set_multi(struct net_device *netdev)
  295. {
  296. struct atl1c_adapter *adapter = netdev_priv(netdev);
  297. struct atl1c_hw *hw = &adapter->hw;
  298. struct dev_mc_list *mc_ptr;
  299. u32 mac_ctrl_data;
  300. u32 hash_value;
  301. /* Check for Promiscuous and All Multicast modes */
  302. AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
  303. if (netdev->flags & IFF_PROMISC) {
  304. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  305. } else if (netdev->flags & IFF_ALLMULTI) {
  306. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  307. mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
  308. } else {
  309. mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  310. }
  311. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  312. /* clear the old settings from the multicast hash table */
  313. AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
  314. AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
  315. /* comoute mc addresses' hash value ,and put it into hash table */
  316. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  317. hash_value = atl1c_hash_mc_addr(hw, mc_ptr->dmi_addr);
  318. atl1c_hash_set(hw, hash_value);
  319. }
  320. }
  321. static void atl1c_vlan_rx_register(struct net_device *netdev,
  322. struct vlan_group *grp)
  323. {
  324. struct atl1c_adapter *adapter = netdev_priv(netdev);
  325. struct pci_dev *pdev = adapter->pdev;
  326. u32 mac_ctrl_data = 0;
  327. if (netif_msg_pktdata(adapter))
  328. dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
  329. atl1c_irq_disable(adapter);
  330. adapter->vlgrp = grp;
  331. AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
  332. if (grp) {
  333. /* enable VLAN tag insert/strip */
  334. mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  335. } else {
  336. /* disable VLAN tag insert/strip */
  337. mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
  338. }
  339. AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
  340. atl1c_irq_enable(adapter);
  341. }
  342. static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
  343. {
  344. struct pci_dev *pdev = adapter->pdev;
  345. if (netif_msg_pktdata(adapter))
  346. dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
  347. atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  348. }
  349. /*
  350. * atl1c_set_mac - Change the Ethernet Address of the NIC
  351. * @netdev: network interface device structure
  352. * @p: pointer to an address structure
  353. *
  354. * Returns 0 on success, negative on failure
  355. */
  356. static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
  357. {
  358. struct atl1c_adapter *adapter = netdev_priv(netdev);
  359. struct sockaddr *addr = p;
  360. if (!is_valid_ether_addr(addr->sa_data))
  361. return -EADDRNOTAVAIL;
  362. if (netif_running(netdev))
  363. return -EBUSY;
  364. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  365. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  366. atl1c_hw_set_mac_addr(&adapter->hw);
  367. return 0;
  368. }
  369. static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
  370. struct net_device *dev)
  371. {
  372. int mtu = dev->mtu;
  373. adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
  374. roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
  375. }
  376. /*
  377. * atl1c_change_mtu - Change the Maximum Transfer Unit
  378. * @netdev: network interface device structure
  379. * @new_mtu: new value for maximum frame size
  380. *
  381. * Returns 0 on success, negative on failure
  382. */
  383. static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
  384. {
  385. struct atl1c_adapter *adapter = netdev_priv(netdev);
  386. int old_mtu = netdev->mtu;
  387. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  388. if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
  389. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  390. if (netif_msg_link(adapter))
  391. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  392. return -EINVAL;
  393. }
  394. /* set MTU */
  395. if (old_mtu != new_mtu && netif_running(netdev)) {
  396. while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
  397. msleep(1);
  398. netdev->mtu = new_mtu;
  399. adapter->hw.max_frame_size = new_mtu;
  400. atl1c_set_rxbufsize(adapter, netdev);
  401. atl1c_down(adapter);
  402. atl1c_up(adapter);
  403. clear_bit(__AT_RESETTING, &adapter->flags);
  404. if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
  405. u32 phy_data;
  406. AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
  407. phy_data |= 0x10000000;
  408. AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
  409. }
  410. }
  411. return 0;
  412. }
  413. /*
  414. * caller should hold mdio_lock
  415. */
  416. static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  417. {
  418. struct atl1c_adapter *adapter = netdev_priv(netdev);
  419. u16 result;
  420. atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
  421. return result;
  422. }
  423. static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
  424. int reg_num, int val)
  425. {
  426. struct atl1c_adapter *adapter = netdev_priv(netdev);
  427. atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
  428. }
  429. /*
  430. * atl1c_mii_ioctl -
  431. * @netdev:
  432. * @ifreq:
  433. * @cmd:
  434. */
  435. static int atl1c_mii_ioctl(struct net_device *netdev,
  436. struct ifreq *ifr, int cmd)
  437. {
  438. struct atl1c_adapter *adapter = netdev_priv(netdev);
  439. struct pci_dev *pdev = adapter->pdev;
  440. struct mii_ioctl_data *data = if_mii(ifr);
  441. unsigned long flags;
  442. int retval = 0;
  443. if (!netif_running(netdev))
  444. return -EINVAL;
  445. spin_lock_irqsave(&adapter->mdio_lock, flags);
  446. switch (cmd) {
  447. case SIOCGMIIPHY:
  448. data->phy_id = 0;
  449. break;
  450. case SIOCGMIIREG:
  451. if (!capable(CAP_NET_ADMIN)) {
  452. retval = -EPERM;
  453. goto out;
  454. }
  455. if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  456. &data->val_out)) {
  457. retval = -EIO;
  458. goto out;
  459. }
  460. break;
  461. case SIOCSMIIREG:
  462. if (!capable(CAP_NET_ADMIN)) {
  463. retval = -EPERM;
  464. goto out;
  465. }
  466. if (data->reg_num & ~(0x1F)) {
  467. retval = -EFAULT;
  468. goto out;
  469. }
  470. dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
  471. data->reg_num, data->val_in);
  472. if (atl1c_write_phy_reg(&adapter->hw,
  473. data->reg_num, data->val_in)) {
  474. retval = -EIO;
  475. goto out;
  476. }
  477. break;
  478. default:
  479. retval = -EOPNOTSUPP;
  480. break;
  481. }
  482. out:
  483. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  484. return retval;
  485. }
  486. /*
  487. * atl1c_ioctl -
  488. * @netdev:
  489. * @ifreq:
  490. * @cmd:
  491. */
  492. static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  493. {
  494. switch (cmd) {
  495. case SIOCGMIIPHY:
  496. case SIOCGMIIREG:
  497. case SIOCSMIIREG:
  498. return atl1c_mii_ioctl(netdev, ifr, cmd);
  499. default:
  500. return -EOPNOTSUPP;
  501. }
  502. }
  503. /*
  504. * atl1c_alloc_queues - Allocate memory for all rings
  505. * @adapter: board private structure to initialize
  506. *
  507. */
  508. static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
  509. {
  510. return 0;
  511. }
  512. static void atl1c_set_mac_type(struct atl1c_hw *hw)
  513. {
  514. switch (hw->device_id) {
  515. case PCI_DEVICE_ID_ATTANSIC_L2C:
  516. hw->nic_type = athr_l2c;
  517. break;
  518. case PCI_DEVICE_ID_ATTANSIC_L1C:
  519. hw->nic_type = athr_l1c;
  520. break;
  521. default:
  522. break;
  523. }
  524. }
  525. static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
  526. {
  527. u32 phy_status_data;
  528. u32 link_ctrl_data;
  529. atl1c_set_mac_type(hw);
  530. AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
  531. AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
  532. hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ |
  533. ATL1C_INTR_MODRT_ENABLE |
  534. ATL1C_RX_IPV6_CHKSUM |
  535. ATL1C_TXQ_MODE_ENHANCE;
  536. if (link_ctrl_data & LINK_CTRL_L0S_EN)
  537. hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
  538. if (link_ctrl_data & LINK_CTRL_L1_EN)
  539. hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
  540. if (hw->nic_type == athr_l1c) {
  541. hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
  542. hw->ctrl_flags |= ATL1C_LINK_CAP_1000M;
  543. }
  544. return 0;
  545. }
  546. /*
  547. * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
  548. * @adapter: board private structure to initialize
  549. *
  550. * atl1c_sw_init initializes the Adapter private data structure.
  551. * Fields are initialized based on PCI device information and
  552. * OS network device settings (MTU size).
  553. */
  554. static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
  555. {
  556. struct atl1c_hw *hw = &adapter->hw;
  557. struct pci_dev *pdev = adapter->pdev;
  558. adapter->wol = 0;
  559. adapter->link_speed = SPEED_0;
  560. adapter->link_duplex = FULL_DUPLEX;
  561. adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
  562. adapter->tpd_ring[0].count = 1024;
  563. adapter->rfd_ring[0].count = 512;
  564. hw->vendor_id = pdev->vendor;
  565. hw->device_id = pdev->device;
  566. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  567. hw->subsystem_id = pdev->subsystem_device;
  568. /* before link up, we assume hibernate is true */
  569. hw->hibernate = true;
  570. hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
  571. if (atl1c_setup_mac_funcs(hw) != 0) {
  572. dev_err(&pdev->dev, "set mac function pointers failed\n");
  573. return -1;
  574. }
  575. hw->intr_mask = IMR_NORMAL_MASK;
  576. hw->phy_configured = false;
  577. hw->preamble_len = 7;
  578. hw->max_frame_size = adapter->netdev->mtu;
  579. if (adapter->num_rx_queues < 2) {
  580. hw->rss_type = atl1c_rss_disable;
  581. hw->rss_mode = atl1c_rss_mode_disable;
  582. } else {
  583. hw->rss_type = atl1c_rss_ipv4;
  584. hw->rss_mode = atl1c_rss_mul_que_mul_int;
  585. hw->rss_hash_bits = 16;
  586. }
  587. hw->autoneg_advertised = ADVERTISED_Autoneg;
  588. hw->indirect_tab = 0xE4E4E4E4;
  589. hw->base_cpu = 0;
  590. hw->ict = 50000; /* 100ms */
  591. hw->smb_timer = 200000; /* 400ms */
  592. hw->cmb_tpd = 4;
  593. hw->cmb_tx_timer = 1; /* 2 us */
  594. hw->rx_imt = 200;
  595. hw->tx_imt = 1000;
  596. hw->tpd_burst = 5;
  597. hw->rfd_burst = 8;
  598. hw->dma_order = atl1c_dma_ord_out;
  599. hw->dmar_block = atl1c_dma_req_1024;
  600. hw->dmaw_block = atl1c_dma_req_1024;
  601. hw->dmar_dly_cnt = 15;
  602. hw->dmaw_dly_cnt = 4;
  603. if (atl1c_alloc_queues(adapter)) {
  604. dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
  605. return -ENOMEM;
  606. }
  607. /* TODO */
  608. atl1c_set_rxbufsize(adapter, adapter->netdev);
  609. atomic_set(&adapter->irq_sem, 1);
  610. spin_lock_init(&adapter->mdio_lock);
  611. spin_lock_init(&adapter->tx_lock);
  612. set_bit(__AT_DOWN, &adapter->flags);
  613. return 0;
  614. }
  615. /*
  616. * atl1c_clean_tx_ring - Free Tx-skb
  617. * @adapter: board private structure
  618. */
  619. static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
  620. enum atl1c_trans_queue type)
  621. {
  622. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  623. struct atl1c_buffer *buffer_info;
  624. struct pci_dev *pdev = adapter->pdev;
  625. u16 index, ring_count;
  626. ring_count = tpd_ring->count;
  627. for (index = 0; index < ring_count; index++) {
  628. buffer_info = &tpd_ring->buffer_info[index];
  629. if (buffer_info->state == ATL1_BUFFER_FREE)
  630. continue;
  631. if (buffer_info->dma)
  632. pci_unmap_single(pdev, buffer_info->dma,
  633. buffer_info->length,
  634. PCI_DMA_TODEVICE);
  635. if (buffer_info->skb)
  636. dev_kfree_skb(buffer_info->skb);
  637. buffer_info->dma = 0;
  638. buffer_info->skb = NULL;
  639. buffer_info->state = ATL1_BUFFER_FREE;
  640. }
  641. /* Zero out Tx-buffers */
  642. memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
  643. ring_count);
  644. atomic_set(&tpd_ring->next_to_clean, 0);
  645. tpd_ring->next_to_use = 0;
  646. }
  647. /*
  648. * atl1c_clean_rx_ring - Free rx-reservation skbs
  649. * @adapter: board private structure
  650. */
  651. static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
  652. {
  653. struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
  654. struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
  655. struct atl1c_buffer *buffer_info;
  656. struct pci_dev *pdev = adapter->pdev;
  657. int i, j;
  658. for (i = 0; i < adapter->num_rx_queues; i++) {
  659. for (j = 0; j < rfd_ring[i].count; j++) {
  660. buffer_info = &rfd_ring[i].buffer_info[j];
  661. if (buffer_info->state == ATL1_BUFFER_FREE)
  662. continue;
  663. if (buffer_info->dma)
  664. pci_unmap_single(pdev, buffer_info->dma,
  665. buffer_info->length,
  666. PCI_DMA_FROMDEVICE);
  667. if (buffer_info->skb)
  668. dev_kfree_skb(buffer_info->skb);
  669. buffer_info->state = ATL1_BUFFER_FREE;
  670. buffer_info->skb = NULL;
  671. }
  672. /* zero out the descriptor ring */
  673. memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
  674. rfd_ring[i].next_to_clean = 0;
  675. rfd_ring[i].next_to_use = 0;
  676. rrd_ring[i].next_to_use = 0;
  677. rrd_ring[i].next_to_clean = 0;
  678. }
  679. }
  680. /*
  681. * Read / Write Ptr Initialize:
  682. */
  683. static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
  684. {
  685. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  686. struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
  687. struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
  688. struct atl1c_buffer *buffer_info;
  689. int i, j;
  690. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  691. tpd_ring[i].next_to_use = 0;
  692. atomic_set(&tpd_ring[i].next_to_clean, 0);
  693. buffer_info = tpd_ring[i].buffer_info;
  694. for (j = 0; j < tpd_ring->count; j++)
  695. buffer_info[i].state = ATL1_BUFFER_FREE;
  696. }
  697. for (i = 0; i < adapter->num_rx_queues; i++) {
  698. rfd_ring[i].next_to_use = 0;
  699. rfd_ring[i].next_to_clean = 0;
  700. rrd_ring[i].next_to_use = 0;
  701. rrd_ring[i].next_to_clean = 0;
  702. for (j = 0; j < rfd_ring[i].count; j++) {
  703. buffer_info = &rfd_ring[i].buffer_info[j];
  704. buffer_info->state = ATL1_BUFFER_FREE;
  705. }
  706. }
  707. }
  708. /*
  709. * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
  710. * @adapter: board private structure
  711. *
  712. * Free all transmit software resources
  713. */
  714. static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
  715. {
  716. struct pci_dev *pdev = adapter->pdev;
  717. pci_free_consistent(pdev, adapter->ring_header.size,
  718. adapter->ring_header.desc,
  719. adapter->ring_header.dma);
  720. adapter->ring_header.desc = NULL;
  721. /* Note: just free tdp_ring.buffer_info,
  722. * it contain rfd_ring.buffer_info, do not double free */
  723. if (adapter->tpd_ring[0].buffer_info) {
  724. kfree(adapter->tpd_ring[0].buffer_info);
  725. adapter->tpd_ring[0].buffer_info = NULL;
  726. }
  727. }
  728. /*
  729. * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
  730. * @adapter: board private structure
  731. *
  732. * Return 0 on success, negative on failure
  733. */
  734. static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
  735. {
  736. struct pci_dev *pdev = adapter->pdev;
  737. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  738. struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
  739. struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
  740. struct atl1c_ring_header *ring_header = &adapter->ring_header;
  741. int num_rx_queues = adapter->num_rx_queues;
  742. int size;
  743. int i;
  744. int count = 0;
  745. int rx_desc_count = 0;
  746. u32 offset = 0;
  747. rrd_ring[0].count = rfd_ring[0].count;
  748. for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
  749. tpd_ring[i].count = tpd_ring[0].count;
  750. for (i = 1; i < adapter->num_rx_queues; i++)
  751. rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
  752. /* 2 tpd queue, one high priority queue,
  753. * another normal priority queue */
  754. size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
  755. rfd_ring->count * num_rx_queues);
  756. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  757. if (unlikely(!tpd_ring->buffer_info)) {
  758. dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
  759. size);
  760. goto err_nomem;
  761. }
  762. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  763. tpd_ring[i].buffer_info =
  764. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  765. count += tpd_ring[i].count;
  766. }
  767. for (i = 0; i < num_rx_queues; i++) {
  768. rfd_ring[i].buffer_info =
  769. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  770. count += rfd_ring[i].count;
  771. rx_desc_count += rfd_ring[i].count;
  772. }
  773. /*
  774. * real ring DMA buffer
  775. * each ring/block may need up to 8 bytes for alignment, hence the
  776. * additional bytes tacked onto the end.
  777. */
  778. ring_header->size = size =
  779. sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
  780. sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
  781. sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
  782. sizeof(struct atl1c_hw_stats) +
  783. 8 * 4 + 8 * 2 * num_rx_queues;
  784. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  785. &ring_header->dma);
  786. if (unlikely(!ring_header->desc)) {
  787. dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
  788. goto err_nomem;
  789. }
  790. memset(ring_header->desc, 0, ring_header->size);
  791. /* init TPD ring */
  792. tpd_ring[0].dma = roundup(ring_header->dma, 8);
  793. offset = tpd_ring[0].dma - ring_header->dma;
  794. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  795. tpd_ring[i].dma = ring_header->dma + offset;
  796. tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
  797. tpd_ring[i].size =
  798. sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
  799. offset += roundup(tpd_ring[i].size, 8);
  800. }
  801. /* init RFD ring */
  802. for (i = 0; i < num_rx_queues; i++) {
  803. rfd_ring[i].dma = ring_header->dma + offset;
  804. rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
  805. rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
  806. rfd_ring[i].count;
  807. offset += roundup(rfd_ring[i].size, 8);
  808. }
  809. /* init RRD ring */
  810. for (i = 0; i < num_rx_queues; i++) {
  811. rrd_ring[i].dma = ring_header->dma + offset;
  812. rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
  813. rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
  814. rrd_ring[i].count;
  815. offset += roundup(rrd_ring[i].size, 8);
  816. }
  817. adapter->smb.dma = ring_header->dma + offset;
  818. adapter->smb.smb = (u8 *)ring_header->desc + offset;
  819. return 0;
  820. err_nomem:
  821. kfree(tpd_ring->buffer_info);
  822. return -ENOMEM;
  823. }
  824. static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
  825. {
  826. struct atl1c_hw *hw = &adapter->hw;
  827. struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
  828. adapter->rfd_ring;
  829. struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
  830. adapter->rrd_ring;
  831. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  832. adapter->tpd_ring;
  833. struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
  834. struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
  835. int i;
  836. /* TPD */
  837. AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
  838. (u32)((tpd_ring[atl1c_trans_normal].dma &
  839. AT_DMA_HI_ADDR_MASK) >> 32));
  840. /* just enable normal priority TX queue */
  841. AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
  842. (u32)(tpd_ring[atl1c_trans_normal].dma &
  843. AT_DMA_LO_ADDR_MASK));
  844. AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
  845. (u32)(tpd_ring[atl1c_trans_high].dma &
  846. AT_DMA_LO_ADDR_MASK));
  847. AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
  848. (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
  849. /* RFD */
  850. AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
  851. (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
  852. for (i = 0; i < adapter->num_rx_queues; i++)
  853. AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
  854. (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
  855. AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
  856. rfd_ring[0].count & RFD_RING_SIZE_MASK);
  857. AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
  858. adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
  859. /* RRD */
  860. for (i = 0; i < adapter->num_rx_queues; i++)
  861. AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
  862. (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
  863. AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
  864. (rrd_ring[0].count & RRD_RING_SIZE_MASK));
  865. /* CMB */
  866. AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
  867. /* SMB */
  868. AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
  869. (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
  870. AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
  871. (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
  872. /* Load all of base address above */
  873. AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
  874. }
  875. static void atl1c_configure_tx(struct atl1c_adapter *adapter)
  876. {
  877. struct atl1c_hw *hw = &adapter->hw;
  878. u32 dev_ctrl_data;
  879. u32 max_pay_load;
  880. u16 tx_offload_thresh;
  881. u32 txq_ctrl_data;
  882. u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
  883. extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
  884. tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
  885. AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
  886. (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
  887. AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
  888. max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
  889. DEVICE_CTRL_MAX_PAYLOAD_MASK;
  890. hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
  891. max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
  892. DEVICE_CTRL_MAX_RREQ_SZ_MASK;
  893. hw->dmar_block = min(max_pay_load, hw->dmar_block);
  894. txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
  895. TXQ_NUM_TPD_BURST_SHIFT;
  896. if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
  897. txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
  898. txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] &
  899. TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
  900. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
  901. }
  902. static void atl1c_configure_rx(struct atl1c_adapter *adapter)
  903. {
  904. struct atl1c_hw *hw = &adapter->hw;
  905. u32 rxq_ctrl_data;
  906. rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
  907. RXQ_RFD_BURST_NUM_SHIFT;
  908. if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
  909. rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
  910. if (hw->rss_type == atl1c_rss_ipv4)
  911. rxq_ctrl_data |= RSS_HASH_IPV4;
  912. if (hw->rss_type == atl1c_rss_ipv4_tcp)
  913. rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
  914. if (hw->rss_type == atl1c_rss_ipv6)
  915. rxq_ctrl_data |= RSS_HASH_IPV6;
  916. if (hw->rss_type == atl1c_rss_ipv6_tcp)
  917. rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
  918. if (hw->rss_type != atl1c_rss_disable)
  919. rxq_ctrl_data |= RRS_HASH_CTRL_EN;
  920. rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
  921. RSS_MODE_SHIFT;
  922. rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
  923. RSS_HASH_BITS_SHIFT;
  924. if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
  925. rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M &
  926. ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
  927. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
  928. }
  929. static void atl1c_configure_rss(struct atl1c_adapter *adapter)
  930. {
  931. struct atl1c_hw *hw = &adapter->hw;
  932. AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
  933. AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
  934. }
  935. static void atl1c_configure_dma(struct atl1c_adapter *adapter)
  936. {
  937. struct atl1c_hw *hw = &adapter->hw;
  938. u32 dma_ctrl_data;
  939. dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
  940. if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
  941. dma_ctrl_data |= DMA_CTRL_CMB_EN;
  942. if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
  943. dma_ctrl_data |= DMA_CTRL_SMB_EN;
  944. else
  945. dma_ctrl_data |= MAC_CTRL_SMB_DIS;
  946. switch (hw->dma_order) {
  947. case atl1c_dma_ord_in:
  948. dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
  949. break;
  950. case atl1c_dma_ord_enh:
  951. dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
  952. break;
  953. case atl1c_dma_ord_out:
  954. dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
  955. break;
  956. default:
  957. break;
  958. }
  959. dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  960. << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
  961. dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
  962. << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
  963. dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
  964. << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
  965. dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
  966. << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
  967. AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
  968. }
  969. /*
  970. * Stop the mac, transmit and receive units
  971. * hw - Struct containing variables accessed by shared code
  972. * return : 0 or idle status (if error)
  973. */
  974. static int atl1c_stop_mac(struct atl1c_hw *hw)
  975. {
  976. u32 data;
  977. int timeout;
  978. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  979. data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
  980. RXQ3_CTRL_EN | RXQ_CTRL_EN);
  981. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  982. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  983. data &= ~TXQ_CTRL_EN;
  984. AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
  985. for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
  986. AT_READ_REG(hw, REG_IDLE_STATUS, &data);
  987. if ((data & (IDLE_STATUS_RXQ_NO_IDLE |
  988. IDLE_STATUS_TXQ_NO_IDLE)) == 0)
  989. break;
  990. msleep(1);
  991. }
  992. AT_READ_REG(hw, REG_MAC_CTRL, &data);
  993. data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
  994. AT_WRITE_REG(hw, REG_MAC_CTRL, data);
  995. for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
  996. AT_READ_REG(hw, REG_IDLE_STATUS, &data);
  997. if ((data & IDLE_STATUS_MASK) == 0)
  998. return 0;
  999. msleep(1);
  1000. }
  1001. return data;
  1002. }
  1003. static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
  1004. {
  1005. u32 data;
  1006. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  1007. switch (hw->adapter->num_rx_queues) {
  1008. case 4:
  1009. data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
  1010. break;
  1011. case 3:
  1012. data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
  1013. break;
  1014. case 2:
  1015. data |= RXQ1_CTRL_EN;
  1016. break;
  1017. default:
  1018. break;
  1019. }
  1020. data |= RXQ_CTRL_EN;
  1021. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  1022. }
  1023. static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
  1024. {
  1025. u32 data;
  1026. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  1027. data |= TXQ_CTRL_EN;
  1028. AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
  1029. }
  1030. /*
  1031. * Reset the transmit and receive units; mask and clear all interrupts.
  1032. * hw - Struct containing variables accessed by shared code
  1033. * return : 0 or idle status (if error)
  1034. */
  1035. static int atl1c_reset_mac(struct atl1c_hw *hw)
  1036. {
  1037. struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
  1038. struct pci_dev *pdev = adapter->pdev;
  1039. u32 idle_status_data = 0;
  1040. int timeout = 0;
  1041. int ret;
  1042. AT_WRITE_REG(hw, REG_IMR, 0);
  1043. AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
  1044. ret = atl1c_stop_mac(hw);
  1045. if (ret)
  1046. return ret;
  1047. /*
  1048. * Issue Soft Reset to the MAC. This will reset the chip's
  1049. * transmit, receive, DMA. It will not effect
  1050. * the current PCI configuration. The global reset bit is self-
  1051. * clearing, and should clear within a microsecond.
  1052. */
  1053. AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
  1054. AT_WRITE_FLUSH(hw);
  1055. msleep(10);
  1056. /* Wait at least 10ms for All module to be Idle */
  1057. for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
  1058. AT_READ_REG(hw, REG_IDLE_STATUS, &idle_status_data);
  1059. if ((idle_status_data & IDLE_STATUS_MASK) == 0)
  1060. break;
  1061. msleep(1);
  1062. }
  1063. if (timeout >= AT_HW_MAX_IDLE_DELAY) {
  1064. dev_err(&pdev->dev,
  1065. "MAC state machine cann't be idle since"
  1066. " disabled for 10ms second\n");
  1067. return -1;
  1068. }
  1069. return 0;
  1070. }
  1071. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
  1072. {
  1073. u32 pm_ctrl_data;
  1074. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1075. pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
  1076. PM_CTRL_L1_ENTRY_TIMER_SHIFT);
  1077. pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
  1078. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1079. pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
  1080. pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
  1081. pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
  1082. pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
  1083. pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
  1084. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
  1085. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1086. }
  1087. /*
  1088. * Set ASPM state.
  1089. * Enable/disable L0s/L1 depend on link state.
  1090. */
  1091. static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
  1092. {
  1093. u32 pm_ctrl_data;
  1094. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1095. pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
  1096. pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
  1097. PM_CTRL_L1_ENTRY_TIMER_SHIFT);
  1098. pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
  1099. if (linkup) {
  1100. pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
  1101. pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
  1102. pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
  1103. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
  1104. } else {
  1105. pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
  1106. pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
  1107. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1108. pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
  1109. pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
  1110. if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
  1111. pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
  1112. else
  1113. pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
  1114. }
  1115. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1116. }
  1117. static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
  1118. {
  1119. struct atl1c_hw *hw = &adapter->hw;
  1120. struct net_device *netdev = adapter->netdev;
  1121. u32 mac_ctrl_data;
  1122. mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
  1123. mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
  1124. if (adapter->link_duplex == FULL_DUPLEX) {
  1125. hw->mac_duplex = true;
  1126. mac_ctrl_data |= MAC_CTRL_DUPLX;
  1127. }
  1128. if (adapter->link_speed == SPEED_1000)
  1129. hw->mac_speed = atl1c_mac_speed_1000;
  1130. else
  1131. hw->mac_speed = atl1c_mac_speed_10_100;
  1132. mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
  1133. MAC_CTRL_SPEED_SHIFT;
  1134. mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
  1135. mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
  1136. MAC_CTRL_PRMLEN_SHIFT);
  1137. if (adapter->vlgrp)
  1138. mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  1139. mac_ctrl_data |= MAC_CTRL_BC_EN;
  1140. if (netdev->flags & IFF_PROMISC)
  1141. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  1142. if (netdev->flags & IFF_ALLMULTI)
  1143. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  1144. mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
  1145. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  1146. }
  1147. /*
  1148. * atl1c_configure - Configure Transmit&Receive Unit after Reset
  1149. * @adapter: board private structure
  1150. *
  1151. * Configure the Tx /Rx unit of the MAC after a reset.
  1152. */
  1153. static int atl1c_configure(struct atl1c_adapter *adapter)
  1154. {
  1155. struct atl1c_hw *hw = &adapter->hw;
  1156. u32 master_ctrl_data = 0;
  1157. u32 intr_modrt_data;
  1158. /* clear interrupt status */
  1159. AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
  1160. /* Clear any WOL status */
  1161. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  1162. /* set Interrupt Clear Timer
  1163. * HW will enable self to assert interrupt event to system after
  1164. * waiting x-time for software to notify it accept interrupt.
  1165. */
  1166. AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
  1167. hw->ict & INT_RETRIG_TIMER_MASK);
  1168. atl1c_configure_des_ring(adapter);
  1169. if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
  1170. intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
  1171. IRQ_MODRT_TX_TIMER_SHIFT;
  1172. intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
  1173. IRQ_MODRT_RX_TIMER_SHIFT;
  1174. AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
  1175. master_ctrl_data |=
  1176. MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
  1177. }
  1178. if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
  1179. master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
  1180. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  1181. if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
  1182. AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
  1183. hw->cmb_tpd & CMB_TPD_THRESH_MASK);
  1184. AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
  1185. hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
  1186. }
  1187. if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
  1188. AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
  1189. hw->smb_timer & SMB_STAT_TIMER_MASK);
  1190. /* set MTU */
  1191. AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
  1192. VLAN_HLEN + ETH_FCS_LEN);
  1193. /* HDS, disable */
  1194. AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
  1195. atl1c_configure_tx(adapter);
  1196. atl1c_configure_rx(adapter);
  1197. atl1c_configure_rss(adapter);
  1198. atl1c_configure_dma(adapter);
  1199. return 0;
  1200. }
  1201. static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
  1202. {
  1203. u16 hw_reg_addr = 0;
  1204. unsigned long *stats_item = NULL;
  1205. u32 data;
  1206. /* update rx status */
  1207. hw_reg_addr = REG_MAC_RX_STATUS_BIN;
  1208. stats_item = &adapter->hw_stats.rx_ok;
  1209. while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
  1210. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1211. *stats_item += data;
  1212. stats_item++;
  1213. hw_reg_addr += 4;
  1214. }
  1215. /* update tx status */
  1216. hw_reg_addr = REG_MAC_TX_STATUS_BIN;
  1217. stats_item = &adapter->hw_stats.tx_ok;
  1218. while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
  1219. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1220. *stats_item += data;
  1221. stats_item++;
  1222. hw_reg_addr += 4;
  1223. }
  1224. }
  1225. /*
  1226. * atl1c_get_stats - Get System Network Statistics
  1227. * @netdev: network interface device structure
  1228. *
  1229. * Returns the address of the device statistics structure.
  1230. * The statistics are actually updated from the timer callback.
  1231. */
  1232. static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
  1233. {
  1234. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1235. struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
  1236. struct net_device_stats *net_stats = &adapter->net_stats;
  1237. atl1c_update_hw_stats(adapter);
  1238. net_stats->rx_packets = hw_stats->rx_ok;
  1239. net_stats->tx_packets = hw_stats->tx_ok;
  1240. net_stats->rx_bytes = hw_stats->rx_byte_cnt;
  1241. net_stats->tx_bytes = hw_stats->tx_byte_cnt;
  1242. net_stats->multicast = hw_stats->rx_mcast;
  1243. net_stats->collisions = hw_stats->tx_1_col +
  1244. hw_stats->tx_2_col * 2 +
  1245. hw_stats->tx_late_col + hw_stats->tx_abort_col;
  1246. net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
  1247. hw_stats->rx_len_err + hw_stats->rx_sz_ov +
  1248. hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
  1249. net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
  1250. net_stats->rx_length_errors = hw_stats->rx_len_err;
  1251. net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
  1252. net_stats->rx_frame_errors = hw_stats->rx_align_err;
  1253. net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1254. net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1255. net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
  1256. hw_stats->tx_underrun + hw_stats->tx_trunc;
  1257. net_stats->tx_fifo_errors = hw_stats->tx_underrun;
  1258. net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
  1259. net_stats->tx_window_errors = hw_stats->tx_late_col;
  1260. return &adapter->net_stats;
  1261. }
  1262. static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
  1263. {
  1264. u16 phy_data;
  1265. spin_lock(&adapter->mdio_lock);
  1266. atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
  1267. spin_unlock(&adapter->mdio_lock);
  1268. }
  1269. static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
  1270. enum atl1c_trans_queue type)
  1271. {
  1272. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  1273. &adapter->tpd_ring[type];
  1274. struct atl1c_buffer *buffer_info;
  1275. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1276. u16 hw_next_to_clean;
  1277. u16 shift;
  1278. u32 data;
  1279. if (type == atl1c_trans_high)
  1280. shift = MB_HTPD_CONS_IDX_SHIFT;
  1281. else
  1282. shift = MB_NTPD_CONS_IDX_SHIFT;
  1283. AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
  1284. hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
  1285. while (next_to_clean != hw_next_to_clean) {
  1286. buffer_info = &tpd_ring->buffer_info[next_to_clean];
  1287. if (buffer_info->state == ATL1_BUFFER_BUSY) {
  1288. pci_unmap_page(adapter->pdev, buffer_info->dma,
  1289. buffer_info->length, PCI_DMA_TODEVICE);
  1290. buffer_info->dma = 0;
  1291. if (buffer_info->skb) {
  1292. dev_kfree_skb_irq(buffer_info->skb);
  1293. buffer_info->skb = NULL;
  1294. }
  1295. buffer_info->state = ATL1_BUFFER_FREE;
  1296. }
  1297. if (++next_to_clean == tpd_ring->count)
  1298. next_to_clean = 0;
  1299. atomic_set(&tpd_ring->next_to_clean, next_to_clean);
  1300. }
  1301. if (netif_queue_stopped(adapter->netdev) &&
  1302. netif_carrier_ok(adapter->netdev)) {
  1303. netif_wake_queue(adapter->netdev);
  1304. }
  1305. return true;
  1306. }
  1307. /*
  1308. * atl1c_intr - Interrupt Handler
  1309. * @irq: interrupt number
  1310. * @data: pointer to a network interface device structure
  1311. * @pt_regs: CPU registers structure
  1312. */
  1313. static irqreturn_t atl1c_intr(int irq, void *data)
  1314. {
  1315. struct net_device *netdev = data;
  1316. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1317. struct pci_dev *pdev = adapter->pdev;
  1318. struct atl1c_hw *hw = &adapter->hw;
  1319. int max_ints = AT_MAX_INT_WORK;
  1320. int handled = IRQ_NONE;
  1321. u32 status;
  1322. u32 reg_data;
  1323. do {
  1324. AT_READ_REG(hw, REG_ISR, &reg_data);
  1325. status = reg_data & hw->intr_mask;
  1326. if (status == 0 || (status & ISR_DIS_INT) != 0) {
  1327. if (max_ints != AT_MAX_INT_WORK)
  1328. handled = IRQ_HANDLED;
  1329. break;
  1330. }
  1331. /* link event */
  1332. if (status & ISR_GPHY)
  1333. atl1c_clear_phy_int(adapter);
  1334. /* Ack ISR */
  1335. AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
  1336. if (status & ISR_RX_PKT) {
  1337. if (likely(napi_schedule_prep(&adapter->napi))) {
  1338. hw->intr_mask &= ~ISR_RX_PKT;
  1339. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1340. __napi_schedule(&adapter->napi);
  1341. }
  1342. }
  1343. if (status & ISR_TX_PKT)
  1344. atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
  1345. handled = IRQ_HANDLED;
  1346. /* check if PCIE PHY Link down */
  1347. if (status & ISR_ERROR) {
  1348. if (netif_msg_hw(adapter))
  1349. dev_err(&pdev->dev,
  1350. "atl1c hardware error (status = 0x%x)\n",
  1351. status & ISR_ERROR);
  1352. /* reset MAC */
  1353. hw->intr_mask &= ~ISR_ERROR;
  1354. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1355. schedule_work(&adapter->reset_task);
  1356. break;
  1357. }
  1358. if (status & ISR_OVER)
  1359. if (netif_msg_intr(adapter))
  1360. dev_warn(&pdev->dev,
  1361. "TX/RX over flow (status = 0x%x)\n",
  1362. status & ISR_OVER);
  1363. /* link event */
  1364. if (status & (ISR_GPHY | ISR_MANUAL)) {
  1365. adapter->net_stats.tx_carrier_errors++;
  1366. atl1c_link_chg_event(adapter);
  1367. break;
  1368. }
  1369. } while (--max_ints > 0);
  1370. /* re-enable Interrupt*/
  1371. AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
  1372. return handled;
  1373. }
  1374. static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
  1375. struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
  1376. {
  1377. /*
  1378. * The pid field in RRS in not correct sometimes, so we
  1379. * cannot figure out if the packet is fragmented or not,
  1380. * so we tell the KERNEL CHECKSUM_NONE
  1381. */
  1382. skb->ip_summed = CHECKSUM_NONE;
  1383. }
  1384. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
  1385. {
  1386. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
  1387. struct pci_dev *pdev = adapter->pdev;
  1388. struct atl1c_buffer *buffer_info, *next_info;
  1389. struct sk_buff *skb;
  1390. void *vir_addr = NULL;
  1391. u16 num_alloc = 0;
  1392. u16 rfd_next_to_use, next_next;
  1393. struct atl1c_rx_free_desc *rfd_desc;
  1394. next_next = rfd_next_to_use = rfd_ring->next_to_use;
  1395. if (++next_next == rfd_ring->count)
  1396. next_next = 0;
  1397. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1398. next_info = &rfd_ring->buffer_info[next_next];
  1399. while (next_info->state == ATL1_BUFFER_FREE) {
  1400. rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
  1401. skb = dev_alloc_skb(adapter->rx_buffer_len);
  1402. if (unlikely(!skb)) {
  1403. if (netif_msg_rx_err(adapter))
  1404. dev_warn(&pdev->dev, "alloc rx buffer failed\n");
  1405. break;
  1406. }
  1407. /*
  1408. * Make buffer alignment 2 beyond a 16 byte boundary
  1409. * this will result in a 16 byte aligned IP header after
  1410. * the 14 byte MAC header is removed
  1411. */
  1412. vir_addr = skb->data;
  1413. buffer_info->state = ATL1_BUFFER_BUSY;
  1414. buffer_info->skb = skb;
  1415. buffer_info->length = adapter->rx_buffer_len;
  1416. buffer_info->dma = pci_map_single(pdev, vir_addr,
  1417. buffer_info->length,
  1418. PCI_DMA_FROMDEVICE);
  1419. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1420. rfd_next_to_use = next_next;
  1421. if (++next_next == rfd_ring->count)
  1422. next_next = 0;
  1423. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1424. next_info = &rfd_ring->buffer_info[next_next];
  1425. num_alloc++;
  1426. }
  1427. if (num_alloc) {
  1428. /* TODO: update mailbox here */
  1429. wmb();
  1430. rfd_ring->next_to_use = rfd_next_to_use;
  1431. AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
  1432. rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
  1433. }
  1434. return num_alloc;
  1435. }
  1436. static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
  1437. struct atl1c_recv_ret_status *rrs, u16 num)
  1438. {
  1439. u16 i;
  1440. /* the relationship between rrd and rfd is one map one */
  1441. for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
  1442. rrd_ring->next_to_clean)) {
  1443. rrs->word3 &= ~RRS_RXD_UPDATED;
  1444. if (++rrd_ring->next_to_clean == rrd_ring->count)
  1445. rrd_ring->next_to_clean = 0;
  1446. }
  1447. }
  1448. static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
  1449. struct atl1c_recv_ret_status *rrs, u16 num)
  1450. {
  1451. u16 i;
  1452. u16 rfd_index;
  1453. struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
  1454. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1455. RRS_RX_RFD_INDEX_MASK;
  1456. for (i = 0; i < num; i++) {
  1457. buffer_info[rfd_index].skb = NULL;
  1458. buffer_info[rfd_index].state = ATL1_BUFFER_FREE;
  1459. if (++rfd_index == rfd_ring->count)
  1460. rfd_index = 0;
  1461. }
  1462. rfd_ring->next_to_clean = rfd_index;
  1463. }
  1464. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
  1465. int *work_done, int work_to_do)
  1466. {
  1467. u16 rfd_num, rfd_index;
  1468. u16 count = 0;
  1469. u16 length;
  1470. struct pci_dev *pdev = adapter->pdev;
  1471. struct net_device *netdev = adapter->netdev;
  1472. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
  1473. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
  1474. struct sk_buff *skb;
  1475. struct atl1c_recv_ret_status *rrs;
  1476. struct atl1c_buffer *buffer_info;
  1477. while (1) {
  1478. if (*work_done >= work_to_do)
  1479. break;
  1480. rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
  1481. if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
  1482. rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
  1483. RRS_RX_RFD_CNT_MASK;
  1484. if (unlikely(rfd_num) != 1)
  1485. /* TODO support mul rfd*/
  1486. if (netif_msg_rx_err(adapter))
  1487. dev_warn(&pdev->dev,
  1488. "Multi rfd not support yet!\n");
  1489. goto rrs_checked;
  1490. } else {
  1491. break;
  1492. }
  1493. rrs_checked:
  1494. atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
  1495. if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
  1496. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1497. if (netif_msg_rx_err(adapter))
  1498. dev_warn(&pdev->dev,
  1499. "wrong packet! rrs word3 is %x\n",
  1500. rrs->word3);
  1501. continue;
  1502. }
  1503. length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
  1504. RRS_PKT_SIZE_MASK);
  1505. /* Good Receive */
  1506. if (likely(rfd_num == 1)) {
  1507. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1508. RRS_RX_RFD_INDEX_MASK;
  1509. buffer_info = &rfd_ring->buffer_info[rfd_index];
  1510. pci_unmap_single(pdev, buffer_info->dma,
  1511. buffer_info->length, PCI_DMA_FROMDEVICE);
  1512. skb = buffer_info->skb;
  1513. } else {
  1514. /* TODO */
  1515. if (netif_msg_rx_err(adapter))
  1516. dev_warn(&pdev->dev,
  1517. "Multi rfd not support yet!\n");
  1518. break;
  1519. }
  1520. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1521. skb_put(skb, length - ETH_FCS_LEN);
  1522. skb->protocol = eth_type_trans(skb, netdev);
  1523. skb->dev = netdev;
  1524. atl1c_rx_checksum(adapter, skb, rrs);
  1525. if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
  1526. u16 vlan;
  1527. AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
  1528. vlan = le16_to_cpu(vlan);
  1529. vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
  1530. } else
  1531. netif_receive_skb(skb);
  1532. netdev->last_rx = jiffies;
  1533. (*work_done)++;
  1534. count++;
  1535. }
  1536. if (count)
  1537. atl1c_alloc_rx_buffer(adapter, que);
  1538. }
  1539. /*
  1540. * atl1c_clean - NAPI Rx polling callback
  1541. * @adapter: board private structure
  1542. */
  1543. static int atl1c_clean(struct napi_struct *napi, int budget)
  1544. {
  1545. struct atl1c_adapter *adapter =
  1546. container_of(napi, struct atl1c_adapter, napi);
  1547. int work_done = 0;
  1548. /* Keep link state information with original netdev */
  1549. if (!netif_carrier_ok(adapter->netdev))
  1550. goto quit_polling;
  1551. /* just enable one RXQ */
  1552. atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
  1553. if (work_done < budget) {
  1554. quit_polling:
  1555. napi_complete(napi);
  1556. adapter->hw.intr_mask |= ISR_RX_PKT;
  1557. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  1558. }
  1559. return work_done;
  1560. }
  1561. #ifdef CONFIG_NET_POLL_CONTROLLER
  1562. /*
  1563. * Polling 'interrupt' - used by things like netconsole to send skbs
  1564. * without having to re-enable interrupts. It's not called while
  1565. * the interrupt routine is executing.
  1566. */
  1567. static void atl1c_netpoll(struct net_device *netdev)
  1568. {
  1569. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1570. disable_irq(adapter->pdev->irq);
  1571. atl1c_intr(adapter->pdev->irq, netdev);
  1572. enable_irq(adapter->pdev->irq);
  1573. }
  1574. #endif
  1575. static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
  1576. {
  1577. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1578. u16 next_to_use = 0;
  1579. u16 next_to_clean = 0;
  1580. next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1581. next_to_use = tpd_ring->next_to_use;
  1582. return (u16)(next_to_clean > next_to_use) ?
  1583. (next_to_clean - next_to_use - 1) :
  1584. (tpd_ring->count + next_to_clean - next_to_use - 1);
  1585. }
  1586. /*
  1587. * get next usable tpd
  1588. * Note: should call atl1c_tdp_avail to make sure
  1589. * there is enough tpd to use
  1590. */
  1591. static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
  1592. enum atl1c_trans_queue type)
  1593. {
  1594. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1595. struct atl1c_tpd_desc *tpd_desc;
  1596. u16 next_to_use = 0;
  1597. next_to_use = tpd_ring->next_to_use;
  1598. if (++tpd_ring->next_to_use == tpd_ring->count)
  1599. tpd_ring->next_to_use = 0;
  1600. tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
  1601. memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
  1602. return tpd_desc;
  1603. }
  1604. static struct atl1c_buffer *
  1605. atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
  1606. {
  1607. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  1608. return &tpd_ring->buffer_info[tpd -
  1609. (struct atl1c_tpd_desc *)tpd_ring->desc];
  1610. }
  1611. /* Calculate the transmit packet descript needed*/
  1612. static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
  1613. {
  1614. u16 tpd_req;
  1615. u16 proto_hdr_len = 0;
  1616. tpd_req = skb_shinfo(skb)->nr_frags + 1;
  1617. if (skb_is_gso(skb)) {
  1618. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1619. if (proto_hdr_len < skb_headlen(skb))
  1620. tpd_req++;
  1621. if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
  1622. tpd_req++;
  1623. }
  1624. return tpd_req;
  1625. }
  1626. static int atl1c_tso_csum(struct atl1c_adapter *adapter,
  1627. struct sk_buff *skb,
  1628. struct atl1c_tpd_desc **tpd,
  1629. enum atl1c_trans_queue type)
  1630. {
  1631. struct pci_dev *pdev = adapter->pdev;
  1632. u8 hdr_len;
  1633. u32 real_len;
  1634. unsigned short offload_type;
  1635. int err;
  1636. if (skb_is_gso(skb)) {
  1637. if (skb_header_cloned(skb)) {
  1638. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1639. if (unlikely(err))
  1640. return -1;
  1641. }
  1642. offload_type = skb_shinfo(skb)->gso_type;
  1643. if (offload_type & SKB_GSO_TCPV4) {
  1644. real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
  1645. + ntohs(ip_hdr(skb)->tot_len));
  1646. if (real_len < skb->len)
  1647. pskb_trim(skb, real_len);
  1648. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1649. if (unlikely(skb->len == hdr_len)) {
  1650. /* only xsum need */
  1651. if (netif_msg_tx_queued(adapter))
  1652. dev_warn(&pdev->dev,
  1653. "IPV4 tso with zero data??\n");
  1654. goto check_sum;
  1655. } else {
  1656. ip_hdr(skb)->check = 0;
  1657. tcp_hdr(skb)->check = ~csum_tcpudp_magic(
  1658. ip_hdr(skb)->saddr,
  1659. ip_hdr(skb)->daddr,
  1660. 0, IPPROTO_TCP, 0);
  1661. (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
  1662. }
  1663. }
  1664. if (offload_type & SKB_GSO_TCPV6) {
  1665. struct atl1c_tpd_ext_desc *etpd =
  1666. *(struct atl1c_tpd_ext_desc **)(tpd);
  1667. memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
  1668. *tpd = atl1c_get_tpd(adapter, type);
  1669. ipv6_hdr(skb)->payload_len = 0;
  1670. /* check payload == 0 byte ? */
  1671. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1672. if (unlikely(skb->len == hdr_len)) {
  1673. /* only xsum need */
  1674. if (netif_msg_tx_queued(adapter))
  1675. dev_warn(&pdev->dev,
  1676. "IPV6 tso with zero data??\n");
  1677. goto check_sum;
  1678. } else
  1679. tcp_hdr(skb)->check = ~csum_ipv6_magic(
  1680. &ipv6_hdr(skb)->saddr,
  1681. &ipv6_hdr(skb)->daddr,
  1682. 0, IPPROTO_TCP, 0);
  1683. etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1684. etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1685. etpd->pkt_len = cpu_to_le32(skb->len);
  1686. (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1687. }
  1688. (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1689. (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
  1690. TPD_TCPHDR_OFFSET_SHIFT;
  1691. (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
  1692. TPD_MSS_SHIFT;
  1693. return 0;
  1694. }
  1695. check_sum:
  1696. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1697. u8 css, cso;
  1698. cso = skb_transport_offset(skb);
  1699. if (unlikely(cso & 0x1)) {
  1700. if (netif_msg_tx_err(adapter))
  1701. dev_err(&adapter->pdev->dev,
  1702. "payload offset should not an event number\n");
  1703. return -1;
  1704. } else {
  1705. css = cso + skb->csum_offset;
  1706. (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
  1707. TPD_PLOADOFFSET_SHIFT;
  1708. (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
  1709. TPD_CCSUM_OFFSET_SHIFT;
  1710. (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
  1711. }
  1712. }
  1713. return 0;
  1714. }
  1715. static void atl1c_tx_map(struct atl1c_adapter *adapter,
  1716. struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
  1717. enum atl1c_trans_queue type)
  1718. {
  1719. struct atl1c_tpd_desc *use_tpd = NULL;
  1720. struct atl1c_buffer *buffer_info = NULL;
  1721. u16 buf_len = skb_headlen(skb);
  1722. u16 map_len = 0;
  1723. u16 mapped_len = 0;
  1724. u16 hdr_len = 0;
  1725. u16 nr_frags;
  1726. u16 f;
  1727. int tso;
  1728. nr_frags = skb_shinfo(skb)->nr_frags;
  1729. tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
  1730. if (tso) {
  1731. /* TSO */
  1732. map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1733. use_tpd = tpd;
  1734. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1735. buffer_info->length = map_len;
  1736. buffer_info->dma = pci_map_single(adapter->pdev,
  1737. skb->data, hdr_len, PCI_DMA_TODEVICE);
  1738. buffer_info->state = ATL1_BUFFER_BUSY;
  1739. mapped_len += map_len;
  1740. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1741. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1742. }
  1743. if (mapped_len < buf_len) {
  1744. /* mapped_len == 0, means we should use the first tpd,
  1745. which is given by caller */
  1746. if (mapped_len == 0)
  1747. use_tpd = tpd;
  1748. else {
  1749. use_tpd = atl1c_get_tpd(adapter, type);
  1750. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1751. use_tpd = atl1c_get_tpd(adapter, type);
  1752. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1753. }
  1754. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1755. buffer_info->length = buf_len - mapped_len;
  1756. buffer_info->dma =
  1757. pci_map_single(adapter->pdev, skb->data + mapped_len,
  1758. buffer_info->length, PCI_DMA_TODEVICE);
  1759. buffer_info->state = ATL1_BUFFER_BUSY;
  1760. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1761. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1762. }
  1763. for (f = 0; f < nr_frags; f++) {
  1764. struct skb_frag_struct *frag;
  1765. frag = &skb_shinfo(skb)->frags[f];
  1766. use_tpd = atl1c_get_tpd(adapter, type);
  1767. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1768. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1769. buffer_info->length = frag->size;
  1770. buffer_info->dma =
  1771. pci_map_page(adapter->pdev, frag->page,
  1772. frag->page_offset,
  1773. buffer_info->length,
  1774. PCI_DMA_TODEVICE);
  1775. buffer_info->state = ATL1_BUFFER_BUSY;
  1776. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1777. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1778. }
  1779. /* The last tpd */
  1780. use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
  1781. /* The last buffer info contain the skb address,
  1782. so it will be free after unmap */
  1783. buffer_info->skb = skb;
  1784. }
  1785. static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
  1786. struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
  1787. {
  1788. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1789. u32 prod_data;
  1790. AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
  1791. switch (type) {
  1792. case atl1c_trans_high:
  1793. prod_data &= 0xFFFF0000;
  1794. prod_data |= tpd_ring->next_to_use & 0xFFFF;
  1795. break;
  1796. case atl1c_trans_normal:
  1797. prod_data &= 0x0000FFFF;
  1798. prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
  1799. break;
  1800. default:
  1801. break;
  1802. }
  1803. wmb();
  1804. AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
  1805. }
  1806. static int atl1c_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1807. {
  1808. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1809. unsigned long flags;
  1810. u16 tpd_req = 1;
  1811. struct atl1c_tpd_desc *tpd;
  1812. enum atl1c_trans_queue type = atl1c_trans_normal;
  1813. if (test_bit(__AT_DOWN, &adapter->flags)) {
  1814. dev_kfree_skb_any(skb);
  1815. return NETDEV_TX_OK;
  1816. }
  1817. tpd_req = atl1c_cal_tpd_req(skb);
  1818. if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
  1819. if (netif_msg_pktdata(adapter))
  1820. dev_info(&adapter->pdev->dev, "tx locked\n");
  1821. return NETDEV_TX_LOCKED;
  1822. }
  1823. if (skb->mark == 0x01)
  1824. type = atl1c_trans_high;
  1825. else
  1826. type = atl1c_trans_normal;
  1827. if (atl1c_tpd_avail(adapter, type) < tpd_req) {
  1828. /* no enough descriptor, just stop queue */
  1829. netif_stop_queue(netdev);
  1830. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1831. return NETDEV_TX_BUSY;
  1832. }
  1833. tpd = atl1c_get_tpd(adapter, type);
  1834. /* do TSO and check sum */
  1835. if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
  1836. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1837. dev_kfree_skb_any(skb);
  1838. return NETDEV_TX_OK;
  1839. }
  1840. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  1841. u16 vlan = vlan_tx_tag_get(skb);
  1842. __le16 tag;
  1843. vlan = cpu_to_le16(vlan);
  1844. AT_VLAN_TO_TAG(vlan, tag);
  1845. tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
  1846. tpd->vlan_tag = tag;
  1847. }
  1848. if (skb_network_offset(skb) != ETH_HLEN)
  1849. tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
  1850. atl1c_tx_map(adapter, skb, tpd, type);
  1851. atl1c_tx_queue(adapter, skb, tpd, type);
  1852. netdev->trans_start = jiffies;
  1853. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1854. return NETDEV_TX_OK;
  1855. }
  1856. static void atl1c_free_irq(struct atl1c_adapter *adapter)
  1857. {
  1858. struct net_device *netdev = adapter->netdev;
  1859. free_irq(adapter->pdev->irq, netdev);
  1860. if (adapter->have_msi)
  1861. pci_disable_msi(adapter->pdev);
  1862. }
  1863. static int atl1c_request_irq(struct atl1c_adapter *adapter)
  1864. {
  1865. struct pci_dev *pdev = adapter->pdev;
  1866. struct net_device *netdev = adapter->netdev;
  1867. int flags = 0;
  1868. int err = 0;
  1869. adapter->have_msi = true;
  1870. err = pci_enable_msi(adapter->pdev);
  1871. if (err) {
  1872. if (netif_msg_ifup(adapter))
  1873. dev_err(&pdev->dev,
  1874. "Unable to allocate MSI interrupt Error: %d\n",
  1875. err);
  1876. adapter->have_msi = false;
  1877. } else
  1878. netdev->irq = pdev->irq;
  1879. if (!adapter->have_msi)
  1880. flags |= IRQF_SHARED;
  1881. err = request_irq(adapter->pdev->irq, &atl1c_intr, flags,
  1882. netdev->name, netdev);
  1883. if (err) {
  1884. if (netif_msg_ifup(adapter))
  1885. dev_err(&pdev->dev,
  1886. "Unable to allocate interrupt Error: %d\n",
  1887. err);
  1888. if (adapter->have_msi)
  1889. pci_disable_msi(adapter->pdev);
  1890. return err;
  1891. }
  1892. if (netif_msg_ifup(adapter))
  1893. dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
  1894. return err;
  1895. }
  1896. int atl1c_up(struct atl1c_adapter *adapter)
  1897. {
  1898. struct net_device *netdev = adapter->netdev;
  1899. int num;
  1900. int err;
  1901. int i;
  1902. netif_carrier_off(netdev);
  1903. atl1c_init_ring_ptrs(adapter);
  1904. atl1c_set_multi(netdev);
  1905. atl1c_restore_vlan(adapter);
  1906. for (i = 0; i < adapter->num_rx_queues; i++) {
  1907. num = atl1c_alloc_rx_buffer(adapter, i);
  1908. if (unlikely(num == 0)) {
  1909. err = -ENOMEM;
  1910. goto err_alloc_rx;
  1911. }
  1912. }
  1913. if (atl1c_configure(adapter)) {
  1914. err = -EIO;
  1915. goto err_up;
  1916. }
  1917. err = atl1c_request_irq(adapter);
  1918. if (unlikely(err))
  1919. goto err_up;
  1920. clear_bit(__AT_DOWN, &adapter->flags);
  1921. napi_enable(&adapter->napi);
  1922. atl1c_irq_enable(adapter);
  1923. atl1c_check_link_status(adapter);
  1924. netif_start_queue(netdev);
  1925. return err;
  1926. err_up:
  1927. err_alloc_rx:
  1928. atl1c_clean_rx_ring(adapter);
  1929. return err;
  1930. }
  1931. void atl1c_down(struct atl1c_adapter *adapter)
  1932. {
  1933. struct net_device *netdev = adapter->netdev;
  1934. atl1c_del_timer(adapter);
  1935. atl1c_cancel_work(adapter);
  1936. /* signal that we're down so the interrupt handler does not
  1937. * reschedule our watchdog timer */
  1938. set_bit(__AT_DOWN, &adapter->flags);
  1939. netif_carrier_off(netdev);
  1940. napi_disable(&adapter->napi);
  1941. atl1c_irq_disable(adapter);
  1942. atl1c_free_irq(adapter);
  1943. AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
  1944. /* reset MAC to disable all RX/TX */
  1945. atl1c_reset_mac(&adapter->hw);
  1946. msleep(1);
  1947. adapter->link_speed = SPEED_0;
  1948. adapter->link_duplex = -1;
  1949. atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
  1950. atl1c_clean_tx_ring(adapter, atl1c_trans_high);
  1951. atl1c_clean_rx_ring(adapter);
  1952. }
  1953. /*
  1954. * atl1c_open - Called when a network interface is made active
  1955. * @netdev: network interface device structure
  1956. *
  1957. * Returns 0 on success, negative value on failure
  1958. *
  1959. * The open entry point is called when a network interface is made
  1960. * active by the system (IFF_UP). At this point all resources needed
  1961. * for transmit and receive operations are allocated, the interrupt
  1962. * handler is registered with the OS, the watchdog timer is started,
  1963. * and the stack is notified that the interface is ready.
  1964. */
  1965. static int atl1c_open(struct net_device *netdev)
  1966. {
  1967. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1968. int err;
  1969. /* disallow open during test */
  1970. if (test_bit(__AT_TESTING, &adapter->flags))
  1971. return -EBUSY;
  1972. /* allocate rx/tx dma buffer & descriptors */
  1973. err = atl1c_setup_ring_resources(adapter);
  1974. if (unlikely(err))
  1975. return err;
  1976. err = atl1c_up(adapter);
  1977. if (unlikely(err))
  1978. goto err_up;
  1979. if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
  1980. u32 phy_data;
  1981. AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
  1982. phy_data |= MDIO_AP_EN;
  1983. AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
  1984. }
  1985. return 0;
  1986. err_up:
  1987. atl1c_free_irq(adapter);
  1988. atl1c_free_ring_resources(adapter);
  1989. atl1c_reset_mac(&adapter->hw);
  1990. return err;
  1991. }
  1992. /*
  1993. * atl1c_close - Disables a network interface
  1994. * @netdev: network interface device structure
  1995. *
  1996. * Returns 0, this is not allowed to fail
  1997. *
  1998. * The close entry point is called when an interface is de-activated
  1999. * by the OS. The hardware is still under the drivers control, but
  2000. * needs to be disabled. A global MAC reset is issued to stop the
  2001. * hardware, and all transmit and receive resources are freed.
  2002. */
  2003. static int atl1c_close(struct net_device *netdev)
  2004. {
  2005. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2006. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2007. atl1c_down(adapter);
  2008. atl1c_free_ring_resources(adapter);
  2009. return 0;
  2010. }
  2011. static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state)
  2012. {
  2013. struct net_device *netdev = pci_get_drvdata(pdev);
  2014. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2015. struct atl1c_hw *hw = &adapter->hw;
  2016. u32 ctrl;
  2017. u32 mac_ctrl_data;
  2018. u32 master_ctrl_data;
  2019. u32 wol_ctrl_data;
  2020. u16 mii_bmsr_data;
  2021. u16 save_autoneg_advertised;
  2022. u16 mii_intr_status_data;
  2023. u32 wufc = adapter->wol;
  2024. u32 i;
  2025. int retval = 0;
  2026. if (netif_running(netdev)) {
  2027. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2028. atl1c_down(adapter);
  2029. }
  2030. netif_device_detach(netdev);
  2031. atl1c_disable_l0s_l1(hw);
  2032. retval = pci_save_state(pdev);
  2033. if (retval)
  2034. return retval;
  2035. if (wufc) {
  2036. AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
  2037. master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
  2038. /* get link status */
  2039. atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
  2040. atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
  2041. save_autoneg_advertised = hw->autoneg_advertised;
  2042. hw->autoneg_advertised = ADVERTISED_10baseT_Half;
  2043. if (atl1c_restart_autoneg(hw) != 0)
  2044. if (netif_msg_link(adapter))
  2045. dev_warn(&pdev->dev, "phy autoneg failed\n");
  2046. hw->phy_configured = false; /* re-init PHY when resume */
  2047. hw->autoneg_advertised = save_autoneg_advertised;
  2048. /* turn on magic packet wol */
  2049. if (wufc & AT_WUFC_MAG)
  2050. wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
  2051. if (wufc & AT_WUFC_LNKC) {
  2052. for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
  2053. msleep(100);
  2054. atl1c_read_phy_reg(hw, MII_BMSR,
  2055. (u16 *)&mii_bmsr_data);
  2056. if (mii_bmsr_data & BMSR_LSTATUS)
  2057. break;
  2058. }
  2059. if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
  2060. if (netif_msg_link(adapter))
  2061. dev_warn(&pdev->dev,
  2062. "%s: Link may change"
  2063. "when suspend\n",
  2064. atl1c_driver_name);
  2065. wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
  2066. /* only link up can wake up */
  2067. if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
  2068. if (netif_msg_link(adapter))
  2069. dev_err(&pdev->dev,
  2070. "%s: read write phy "
  2071. "register failed.\n",
  2072. atl1c_driver_name);
  2073. goto wol_dis;
  2074. }
  2075. }
  2076. /* clear phy interrupt */
  2077. atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
  2078. /* Config MAC Ctrl register */
  2079. mac_ctrl_data = MAC_CTRL_RX_EN;
  2080. /* set to 10/100M halt duplex */
  2081. mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
  2082. mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
  2083. MAC_CTRL_PRMLEN_MASK) <<
  2084. MAC_CTRL_PRMLEN_SHIFT);
  2085. if (adapter->vlgrp)
  2086. mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  2087. /* magic packet maybe Broadcast&multicast&Unicast frame */
  2088. if (wufc & AT_WUFC_MAG)
  2089. mac_ctrl_data |= MAC_CTRL_BC_EN;
  2090. if (netif_msg_hw(adapter))
  2091. dev_dbg(&pdev->dev,
  2092. "%s: suspend MAC=0x%x\n",
  2093. atl1c_driver_name, mac_ctrl_data);
  2094. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  2095. AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
  2096. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  2097. /* pcie patch */
  2098. AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
  2099. ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
  2100. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
  2101. pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
  2102. goto suspend_exit;
  2103. }
  2104. wol_dis:
  2105. /* WOL disabled */
  2106. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  2107. /* pcie patch */
  2108. AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
  2109. ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
  2110. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
  2111. atl1c_phy_disable(hw);
  2112. hw->phy_configured = false; /* re-init PHY when resume */
  2113. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  2114. suspend_exit:
  2115. pci_disable_device(pdev);
  2116. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2117. return 0;
  2118. }
  2119. static int atl1c_resume(struct pci_dev *pdev)
  2120. {
  2121. struct net_device *netdev = pci_get_drvdata(pdev);
  2122. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2123. pci_set_power_state(pdev, PCI_D0);
  2124. pci_restore_state(pdev);
  2125. pci_enable_wake(pdev, PCI_D3hot, 0);
  2126. pci_enable_wake(pdev, PCI_D3cold, 0);
  2127. AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
  2128. atl1c_phy_reset(&adapter->hw);
  2129. atl1c_reset_mac(&adapter->hw);
  2130. netif_device_attach(netdev);
  2131. if (netif_running(netdev))
  2132. atl1c_up(adapter);
  2133. return 0;
  2134. }
  2135. static void atl1c_shutdown(struct pci_dev *pdev)
  2136. {
  2137. atl1c_suspend(pdev, PMSG_SUSPEND);
  2138. }
  2139. static const struct net_device_ops atl1c_netdev_ops = {
  2140. .ndo_open = atl1c_open,
  2141. .ndo_stop = atl1c_close,
  2142. .ndo_validate_addr = eth_validate_addr,
  2143. .ndo_start_xmit = atl1c_xmit_frame,
  2144. .ndo_set_mac_address = atl1c_set_mac_addr,
  2145. .ndo_set_multicast_list = atl1c_set_multi,
  2146. .ndo_change_mtu = atl1c_change_mtu,
  2147. .ndo_do_ioctl = atl1c_ioctl,
  2148. .ndo_tx_timeout = atl1c_tx_timeout,
  2149. .ndo_get_stats = atl1c_get_stats,
  2150. .ndo_vlan_rx_register = atl1c_vlan_rx_register,
  2151. #ifdef CONFIG_NET_POLL_CONTROLLER
  2152. .ndo_poll_controller = atl1c_netpoll,
  2153. #endif
  2154. };
  2155. static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
  2156. {
  2157. SET_NETDEV_DEV(netdev, &pdev->dev);
  2158. pci_set_drvdata(pdev, netdev);
  2159. netdev->irq = pdev->irq;
  2160. netdev->netdev_ops = &atl1c_netdev_ops;
  2161. netdev->watchdog_timeo = AT_TX_WATCHDOG;
  2162. atl1c_set_ethtool_ops(netdev);
  2163. /* TODO: add when ready */
  2164. netdev->features = NETIF_F_SG |
  2165. NETIF_F_HW_CSUM |
  2166. NETIF_F_HW_VLAN_TX |
  2167. NETIF_F_HW_VLAN_RX |
  2168. NETIF_F_TSO |
  2169. NETIF_F_TSO6;
  2170. return 0;
  2171. }
  2172. /*
  2173. * atl1c_probe - Device Initialization Routine
  2174. * @pdev: PCI device information struct
  2175. * @ent: entry in atl1c_pci_tbl
  2176. *
  2177. * Returns 0 on success, negative on failure
  2178. *
  2179. * atl1c_probe initializes an adapter identified by a pci_dev structure.
  2180. * The OS initialization, configuring of the adapter private structure,
  2181. * and a hardware reset occur.
  2182. */
  2183. static int __devinit atl1c_probe(struct pci_dev *pdev,
  2184. const struct pci_device_id *ent)
  2185. {
  2186. struct net_device *netdev;
  2187. struct atl1c_adapter *adapter;
  2188. static int cards_found;
  2189. int err = 0;
  2190. /* enable device (incl. PCI PM wakeup and hotplug setup) */
  2191. err = pci_enable_device_mem(pdev);
  2192. if (err) {
  2193. dev_err(&pdev->dev, "cannot enable PCI device\n");
  2194. return err;
  2195. }
  2196. /*
  2197. * The atl1c chip can DMA to 64-bit addresses, but it uses a single
  2198. * shared register for the high 32 bits, so only a single, aligned,
  2199. * 4 GB physical address range can be used at a time.
  2200. *
  2201. * Supporting 64-bit DMA on this hardware is more trouble than it's
  2202. * worth. It is far easier to limit to 32-bit DMA than update
  2203. * various kernel subsystems to support the mechanics required by a
  2204. * fixed-high-32-bit system.
  2205. */
  2206. if ((pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0) ||
  2207. (pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK) != 0)) {
  2208. dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
  2209. goto err_dma;
  2210. }
  2211. err = pci_request_regions(pdev, atl1c_driver_name);
  2212. if (err) {
  2213. dev_err(&pdev->dev, "cannot obtain PCI resources\n");
  2214. goto err_pci_reg;
  2215. }
  2216. pci_set_master(pdev);
  2217. netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
  2218. if (netdev == NULL) {
  2219. err = -ENOMEM;
  2220. dev_err(&pdev->dev, "etherdev alloc failed\n");
  2221. goto err_alloc_etherdev;
  2222. }
  2223. err = atl1c_init_netdev(netdev, pdev);
  2224. if (err) {
  2225. dev_err(&pdev->dev, "init netdevice failed\n");
  2226. goto err_init_netdev;
  2227. }
  2228. adapter = netdev_priv(netdev);
  2229. adapter->bd_number = cards_found;
  2230. adapter->netdev = netdev;
  2231. adapter->pdev = pdev;
  2232. adapter->hw.adapter = adapter;
  2233. adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
  2234. adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  2235. if (!adapter->hw.hw_addr) {
  2236. err = -EIO;
  2237. dev_err(&pdev->dev, "cannot map device registers\n");
  2238. goto err_ioremap;
  2239. }
  2240. netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
  2241. /* init mii data */
  2242. adapter->mii.dev = netdev;
  2243. adapter->mii.mdio_read = atl1c_mdio_read;
  2244. adapter->mii.mdio_write = atl1c_mdio_write;
  2245. adapter->mii.phy_id_mask = 0x1f;
  2246. adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
  2247. netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
  2248. setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
  2249. (unsigned long)adapter);
  2250. /* setup the private structure */
  2251. err = atl1c_sw_init(adapter);
  2252. if (err) {
  2253. dev_err(&pdev->dev, "net device private data init failed\n");
  2254. goto err_sw_init;
  2255. }
  2256. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
  2257. ATL1C_PCIE_PHY_RESET);
  2258. /* Init GPHY as early as possible due to power saving issue */
  2259. atl1c_phy_reset(&adapter->hw);
  2260. err = atl1c_reset_mac(&adapter->hw);
  2261. if (err) {
  2262. err = -EIO;
  2263. goto err_reset;
  2264. }
  2265. device_init_wakeup(&pdev->dev, 1);
  2266. /* reset the controller to
  2267. * put the device in a known good starting state */
  2268. err = atl1c_phy_init(&adapter->hw);
  2269. if (err) {
  2270. err = -EIO;
  2271. goto err_reset;
  2272. }
  2273. if (atl1c_read_mac_addr(&adapter->hw) != 0) {
  2274. err = -EIO;
  2275. dev_err(&pdev->dev, "get mac address failed\n");
  2276. goto err_eeprom;
  2277. }
  2278. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  2279. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  2280. if (netif_msg_probe(adapter))
  2281. dev_dbg(&pdev->dev,
  2282. "mac address : %02x-%02x-%02x-%02x-%02x-%02x\n",
  2283. adapter->hw.mac_addr[0], adapter->hw.mac_addr[1],
  2284. adapter->hw.mac_addr[2], adapter->hw.mac_addr[3],
  2285. adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]);
  2286. atl1c_hw_set_mac_addr(&adapter->hw);
  2287. INIT_WORK(&adapter->reset_task, atl1c_reset_task);
  2288. INIT_WORK(&adapter->link_chg_task, atl1c_link_chg_task);
  2289. err = register_netdev(netdev);
  2290. if (err) {
  2291. dev_err(&pdev->dev, "register netdevice failed\n");
  2292. goto err_register;
  2293. }
  2294. if (netif_msg_probe(adapter))
  2295. dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
  2296. cards_found++;
  2297. return 0;
  2298. err_reset:
  2299. err_register:
  2300. err_sw_init:
  2301. err_eeprom:
  2302. iounmap(adapter->hw.hw_addr);
  2303. err_init_netdev:
  2304. err_ioremap:
  2305. free_netdev(netdev);
  2306. err_alloc_etherdev:
  2307. pci_release_regions(pdev);
  2308. err_pci_reg:
  2309. err_dma:
  2310. pci_disable_device(pdev);
  2311. return err;
  2312. }
  2313. /*
  2314. * atl1c_remove - Device Removal Routine
  2315. * @pdev: PCI device information struct
  2316. *
  2317. * atl1c_remove is called by the PCI subsystem to alert the driver
  2318. * that it should release a PCI device. The could be caused by a
  2319. * Hot-Plug event, or because the driver is going to be removed from
  2320. * memory.
  2321. */
  2322. static void __devexit atl1c_remove(struct pci_dev *pdev)
  2323. {
  2324. struct net_device *netdev = pci_get_drvdata(pdev);
  2325. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2326. unregister_netdev(netdev);
  2327. atl1c_phy_disable(&adapter->hw);
  2328. iounmap(adapter->hw.hw_addr);
  2329. pci_release_regions(pdev);
  2330. pci_disable_device(pdev);
  2331. free_netdev(netdev);
  2332. }
  2333. /*
  2334. * atl1c_io_error_detected - called when PCI error is detected
  2335. * @pdev: Pointer to PCI device
  2336. * @state: The current pci connection state
  2337. *
  2338. * This function is called after a PCI bus error affecting
  2339. * this device has been detected.
  2340. */
  2341. static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
  2342. pci_channel_state_t state)
  2343. {
  2344. struct net_device *netdev = pci_get_drvdata(pdev);
  2345. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2346. netif_device_detach(netdev);
  2347. if (netif_running(netdev))
  2348. atl1c_down(adapter);
  2349. pci_disable_device(pdev);
  2350. /* Request a slot slot reset. */
  2351. return PCI_ERS_RESULT_NEED_RESET;
  2352. }
  2353. /*
  2354. * atl1c_io_slot_reset - called after the pci bus has been reset.
  2355. * @pdev: Pointer to PCI device
  2356. *
  2357. * Restart the card from scratch, as if from a cold-boot. Implementation
  2358. * resembles the first-half of the e1000_resume routine.
  2359. */
  2360. static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
  2361. {
  2362. struct net_device *netdev = pci_get_drvdata(pdev);
  2363. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2364. if (pci_enable_device(pdev)) {
  2365. if (netif_msg_hw(adapter))
  2366. dev_err(&pdev->dev,
  2367. "Cannot re-enable PCI device after reset\n");
  2368. return PCI_ERS_RESULT_DISCONNECT;
  2369. }
  2370. pci_set_master(pdev);
  2371. pci_enable_wake(pdev, PCI_D3hot, 0);
  2372. pci_enable_wake(pdev, PCI_D3cold, 0);
  2373. atl1c_reset_mac(&adapter->hw);
  2374. return PCI_ERS_RESULT_RECOVERED;
  2375. }
  2376. /*
  2377. * atl1c_io_resume - called when traffic can start flowing again.
  2378. * @pdev: Pointer to PCI device
  2379. *
  2380. * This callback is called when the error recovery driver tells us that
  2381. * its OK to resume normal operation. Implementation resembles the
  2382. * second-half of the atl1c_resume routine.
  2383. */
  2384. static void atl1c_io_resume(struct pci_dev *pdev)
  2385. {
  2386. struct net_device *netdev = pci_get_drvdata(pdev);
  2387. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2388. if (netif_running(netdev)) {
  2389. if (atl1c_up(adapter)) {
  2390. if (netif_msg_hw(adapter))
  2391. dev_err(&pdev->dev,
  2392. "Cannot bring device back up after reset\n");
  2393. return;
  2394. }
  2395. }
  2396. netif_device_attach(netdev);
  2397. }
  2398. static struct pci_error_handlers atl1c_err_handler = {
  2399. .error_detected = atl1c_io_error_detected,
  2400. .slot_reset = atl1c_io_slot_reset,
  2401. .resume = atl1c_io_resume,
  2402. };
  2403. static struct pci_driver atl1c_driver = {
  2404. .name = atl1c_driver_name,
  2405. .id_table = atl1c_pci_tbl,
  2406. .probe = atl1c_probe,
  2407. .remove = __devexit_p(atl1c_remove),
  2408. /* Power Managment Hooks */
  2409. .suspend = atl1c_suspend,
  2410. .resume = atl1c_resume,
  2411. .shutdown = atl1c_shutdown,
  2412. .err_handler = &atl1c_err_handler
  2413. };
  2414. /*
  2415. * atl1c_init_module - Driver Registration Routine
  2416. *
  2417. * atl1c_init_module is the first routine called when the driver is
  2418. * loaded. All it does is register with the PCI subsystem.
  2419. */
  2420. static int __init atl1c_init_module(void)
  2421. {
  2422. return pci_register_driver(&atl1c_driver);
  2423. }
  2424. /*
  2425. * atl1c_exit_module - Driver Exit Cleanup Routine
  2426. *
  2427. * atl1c_exit_module is called just before the driver is removed
  2428. * from memory.
  2429. */
  2430. static void __exit atl1c_exit_module(void)
  2431. {
  2432. pci_unregister_driver(&atl1c_driver);
  2433. }
  2434. module_init(atl1c_init_module);
  2435. module_exit(atl1c_exit_module);