x86.c 57 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. *
  8. * Authors:
  9. * Avi Kivity <avi@qumranet.com>
  10. * Yaniv Kamay <yaniv@qumranet.com>
  11. *
  12. * This work is licensed under the terms of the GNU GPL, version 2. See
  13. * the COPYING file in the top-level directory.
  14. *
  15. */
  16. #include "kvm.h"
  17. #include "x86.h"
  18. #include "x86_emulate.h"
  19. #include "segment_descriptor.h"
  20. #include "irq.h"
  21. #include <linux/kvm.h>
  22. #include <linux/fs.h>
  23. #include <linux/vmalloc.h>
  24. #include <linux/module.h>
  25. #include <asm/uaccess.h>
  26. #include <asm/msr.h>
  27. #define MAX_IO_MSRS 256
  28. #define CR0_RESERVED_BITS \
  29. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  30. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  31. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  32. #define CR4_RESERVED_BITS \
  33. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  34. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  35. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  36. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  37. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  38. #define EFER_RESERVED_BITS 0xfffffffffffff2fe
  39. #define STAT_OFFSET(x) offsetof(struct kvm_vcpu, stat.x)
  40. struct kvm_x86_ops *kvm_x86_ops;
  41. struct kvm_stats_debugfs_item debugfs_entries[] = {
  42. { "pf_fixed", STAT_OFFSET(pf_fixed) },
  43. { "pf_guest", STAT_OFFSET(pf_guest) },
  44. { "tlb_flush", STAT_OFFSET(tlb_flush) },
  45. { "invlpg", STAT_OFFSET(invlpg) },
  46. { "exits", STAT_OFFSET(exits) },
  47. { "io_exits", STAT_OFFSET(io_exits) },
  48. { "mmio_exits", STAT_OFFSET(mmio_exits) },
  49. { "signal_exits", STAT_OFFSET(signal_exits) },
  50. { "irq_window", STAT_OFFSET(irq_window_exits) },
  51. { "halt_exits", STAT_OFFSET(halt_exits) },
  52. { "halt_wakeup", STAT_OFFSET(halt_wakeup) },
  53. { "request_irq", STAT_OFFSET(request_irq_exits) },
  54. { "irq_exits", STAT_OFFSET(irq_exits) },
  55. { "host_state_reload", STAT_OFFSET(host_state_reload) },
  56. { "efer_reload", STAT_OFFSET(efer_reload) },
  57. { "fpu_reload", STAT_OFFSET(fpu_reload) },
  58. { NULL }
  59. };
  60. unsigned long segment_base(u16 selector)
  61. {
  62. struct descriptor_table gdt;
  63. struct segment_descriptor *d;
  64. unsigned long table_base;
  65. unsigned long v;
  66. if (selector == 0)
  67. return 0;
  68. asm("sgdt %0" : "=m"(gdt));
  69. table_base = gdt.base;
  70. if (selector & 4) { /* from ldt */
  71. u16 ldt_selector;
  72. asm("sldt %0" : "=g"(ldt_selector));
  73. table_base = segment_base(ldt_selector);
  74. }
  75. d = (struct segment_descriptor *)(table_base + (selector & ~7));
  76. v = d->base_low | ((unsigned long)d->base_mid << 16) |
  77. ((unsigned long)d->base_high << 24);
  78. #ifdef CONFIG_X86_64
  79. if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  80. v |= ((unsigned long) \
  81. ((struct segment_descriptor_64 *)d)->base_higher) << 32;
  82. #endif
  83. return v;
  84. }
  85. EXPORT_SYMBOL_GPL(segment_base);
  86. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  87. {
  88. if (irqchip_in_kernel(vcpu->kvm))
  89. return vcpu->apic_base;
  90. else
  91. return vcpu->apic_base;
  92. }
  93. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  94. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  95. {
  96. /* TODO: reserve bits check */
  97. if (irqchip_in_kernel(vcpu->kvm))
  98. kvm_lapic_set_base(vcpu, data);
  99. else
  100. vcpu->apic_base = data;
  101. }
  102. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  103. static void inject_gp(struct kvm_vcpu *vcpu)
  104. {
  105. kvm_x86_ops->inject_gp(vcpu, 0);
  106. }
  107. /*
  108. * Load the pae pdptrs. Return true is they are all valid.
  109. */
  110. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  111. {
  112. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  113. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  114. int i;
  115. int ret;
  116. u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)];
  117. mutex_lock(&vcpu->kvm->lock);
  118. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  119. offset * sizeof(u64), sizeof(pdpte));
  120. if (ret < 0) {
  121. ret = 0;
  122. goto out;
  123. }
  124. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  125. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  126. ret = 0;
  127. goto out;
  128. }
  129. }
  130. ret = 1;
  131. memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs));
  132. out:
  133. mutex_unlock(&vcpu->kvm->lock);
  134. return ret;
  135. }
  136. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  137. {
  138. if (cr0 & CR0_RESERVED_BITS) {
  139. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  140. cr0, vcpu->cr0);
  141. inject_gp(vcpu);
  142. return;
  143. }
  144. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  145. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  146. inject_gp(vcpu);
  147. return;
  148. }
  149. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  150. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  151. "and a clear PE flag\n");
  152. inject_gp(vcpu);
  153. return;
  154. }
  155. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  156. #ifdef CONFIG_X86_64
  157. if ((vcpu->shadow_efer & EFER_LME)) {
  158. int cs_db, cs_l;
  159. if (!is_pae(vcpu)) {
  160. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  161. "in long mode while PAE is disabled\n");
  162. inject_gp(vcpu);
  163. return;
  164. }
  165. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  166. if (cs_l) {
  167. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  168. "in long mode while CS.L == 1\n");
  169. inject_gp(vcpu);
  170. return;
  171. }
  172. } else
  173. #endif
  174. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) {
  175. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  176. "reserved bits\n");
  177. inject_gp(vcpu);
  178. return;
  179. }
  180. }
  181. kvm_x86_ops->set_cr0(vcpu, cr0);
  182. vcpu->cr0 = cr0;
  183. mutex_lock(&vcpu->kvm->lock);
  184. kvm_mmu_reset_context(vcpu);
  185. mutex_unlock(&vcpu->kvm->lock);
  186. return;
  187. }
  188. EXPORT_SYMBOL_GPL(set_cr0);
  189. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  190. {
  191. set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f));
  192. }
  193. EXPORT_SYMBOL_GPL(lmsw);
  194. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  195. {
  196. if (cr4 & CR4_RESERVED_BITS) {
  197. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  198. inject_gp(vcpu);
  199. return;
  200. }
  201. if (is_long_mode(vcpu)) {
  202. if (!(cr4 & X86_CR4_PAE)) {
  203. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  204. "in long mode\n");
  205. inject_gp(vcpu);
  206. return;
  207. }
  208. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  209. && !load_pdptrs(vcpu, vcpu->cr3)) {
  210. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  211. inject_gp(vcpu);
  212. return;
  213. }
  214. if (cr4 & X86_CR4_VMXE) {
  215. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  216. inject_gp(vcpu);
  217. return;
  218. }
  219. kvm_x86_ops->set_cr4(vcpu, cr4);
  220. vcpu->cr4 = cr4;
  221. mutex_lock(&vcpu->kvm->lock);
  222. kvm_mmu_reset_context(vcpu);
  223. mutex_unlock(&vcpu->kvm->lock);
  224. }
  225. EXPORT_SYMBOL_GPL(set_cr4);
  226. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  227. {
  228. if (is_long_mode(vcpu)) {
  229. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  230. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  231. inject_gp(vcpu);
  232. return;
  233. }
  234. } else {
  235. if (is_pae(vcpu)) {
  236. if (cr3 & CR3_PAE_RESERVED_BITS) {
  237. printk(KERN_DEBUG
  238. "set_cr3: #GP, reserved bits\n");
  239. inject_gp(vcpu);
  240. return;
  241. }
  242. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  243. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  244. "reserved bits\n");
  245. inject_gp(vcpu);
  246. return;
  247. }
  248. }
  249. /*
  250. * We don't check reserved bits in nonpae mode, because
  251. * this isn't enforced, and VMware depends on this.
  252. */
  253. }
  254. mutex_lock(&vcpu->kvm->lock);
  255. /*
  256. * Does the new cr3 value map to physical memory? (Note, we
  257. * catch an invalid cr3 even in real-mode, because it would
  258. * cause trouble later on when we turn on paging anyway.)
  259. *
  260. * A real CPU would silently accept an invalid cr3 and would
  261. * attempt to use it - with largely undefined (and often hard
  262. * to debug) behavior on the guest side.
  263. */
  264. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  265. inject_gp(vcpu);
  266. else {
  267. vcpu->cr3 = cr3;
  268. vcpu->mmu.new_cr3(vcpu);
  269. }
  270. mutex_unlock(&vcpu->kvm->lock);
  271. }
  272. EXPORT_SYMBOL_GPL(set_cr3);
  273. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  274. {
  275. if (cr8 & CR8_RESERVED_BITS) {
  276. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  277. inject_gp(vcpu);
  278. return;
  279. }
  280. if (irqchip_in_kernel(vcpu->kvm))
  281. kvm_lapic_set_tpr(vcpu, cr8);
  282. else
  283. vcpu->cr8 = cr8;
  284. }
  285. EXPORT_SYMBOL_GPL(set_cr8);
  286. unsigned long get_cr8(struct kvm_vcpu *vcpu)
  287. {
  288. if (irqchip_in_kernel(vcpu->kvm))
  289. return kvm_lapic_get_cr8(vcpu);
  290. else
  291. return vcpu->cr8;
  292. }
  293. EXPORT_SYMBOL_GPL(get_cr8);
  294. /*
  295. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  296. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  297. *
  298. * This list is modified at module load time to reflect the
  299. * capabilities of the host cpu.
  300. */
  301. static u32 msrs_to_save[] = {
  302. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  303. MSR_K6_STAR,
  304. #ifdef CONFIG_X86_64
  305. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  306. #endif
  307. MSR_IA32_TIME_STAMP_COUNTER,
  308. };
  309. static unsigned num_msrs_to_save;
  310. static u32 emulated_msrs[] = {
  311. MSR_IA32_MISC_ENABLE,
  312. };
  313. #ifdef CONFIG_X86_64
  314. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  315. {
  316. if (efer & EFER_RESERVED_BITS) {
  317. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  318. efer);
  319. inject_gp(vcpu);
  320. return;
  321. }
  322. if (is_paging(vcpu)
  323. && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  324. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  325. inject_gp(vcpu);
  326. return;
  327. }
  328. kvm_x86_ops->set_efer(vcpu, efer);
  329. efer &= ~EFER_LMA;
  330. efer |= vcpu->shadow_efer & EFER_LMA;
  331. vcpu->shadow_efer = efer;
  332. }
  333. #endif
  334. /*
  335. * Writes msr value into into the appropriate "register".
  336. * Returns 0 on success, non-0 otherwise.
  337. * Assumes vcpu_load() was already called.
  338. */
  339. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  340. {
  341. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  342. }
  343. /*
  344. * Adapt set_msr() to msr_io()'s calling convention
  345. */
  346. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  347. {
  348. return kvm_set_msr(vcpu, index, *data);
  349. }
  350. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  351. {
  352. switch (msr) {
  353. #ifdef CONFIG_X86_64
  354. case MSR_EFER:
  355. set_efer(vcpu, data);
  356. break;
  357. #endif
  358. case MSR_IA32_MC0_STATUS:
  359. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  360. __FUNCTION__, data);
  361. break;
  362. case MSR_IA32_MCG_STATUS:
  363. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  364. __FUNCTION__, data);
  365. break;
  366. case MSR_IA32_UCODE_REV:
  367. case MSR_IA32_UCODE_WRITE:
  368. case 0x200 ... 0x2ff: /* MTRRs */
  369. break;
  370. case MSR_IA32_APICBASE:
  371. kvm_set_apic_base(vcpu, data);
  372. break;
  373. case MSR_IA32_MISC_ENABLE:
  374. vcpu->ia32_misc_enable_msr = data;
  375. break;
  376. default:
  377. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr);
  378. return 1;
  379. }
  380. return 0;
  381. }
  382. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  383. /*
  384. * Reads an msr value (of 'msr_index') into 'pdata'.
  385. * Returns 0 on success, non-0 otherwise.
  386. * Assumes vcpu_load() was already called.
  387. */
  388. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  389. {
  390. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  391. }
  392. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  393. {
  394. u64 data;
  395. switch (msr) {
  396. case 0xc0010010: /* SYSCFG */
  397. case 0xc0010015: /* HWCR */
  398. case MSR_IA32_PLATFORM_ID:
  399. case MSR_IA32_P5_MC_ADDR:
  400. case MSR_IA32_P5_MC_TYPE:
  401. case MSR_IA32_MC0_CTL:
  402. case MSR_IA32_MCG_STATUS:
  403. case MSR_IA32_MCG_CAP:
  404. case MSR_IA32_MC0_MISC:
  405. case MSR_IA32_MC0_MISC+4:
  406. case MSR_IA32_MC0_MISC+8:
  407. case MSR_IA32_MC0_MISC+12:
  408. case MSR_IA32_MC0_MISC+16:
  409. case MSR_IA32_UCODE_REV:
  410. case MSR_IA32_PERF_STATUS:
  411. case MSR_IA32_EBL_CR_POWERON:
  412. /* MTRR registers */
  413. case 0xfe:
  414. case 0x200 ... 0x2ff:
  415. data = 0;
  416. break;
  417. case 0xcd: /* fsb frequency */
  418. data = 3;
  419. break;
  420. case MSR_IA32_APICBASE:
  421. data = kvm_get_apic_base(vcpu);
  422. break;
  423. case MSR_IA32_MISC_ENABLE:
  424. data = vcpu->ia32_misc_enable_msr;
  425. break;
  426. #ifdef CONFIG_X86_64
  427. case MSR_EFER:
  428. data = vcpu->shadow_efer;
  429. break;
  430. #endif
  431. default:
  432. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  433. return 1;
  434. }
  435. *pdata = data;
  436. return 0;
  437. }
  438. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  439. /*
  440. * Read or write a bunch of msrs. All parameters are kernel addresses.
  441. *
  442. * @return number of msrs set successfully.
  443. */
  444. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  445. struct kvm_msr_entry *entries,
  446. int (*do_msr)(struct kvm_vcpu *vcpu,
  447. unsigned index, u64 *data))
  448. {
  449. int i;
  450. vcpu_load(vcpu);
  451. for (i = 0; i < msrs->nmsrs; ++i)
  452. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  453. break;
  454. vcpu_put(vcpu);
  455. return i;
  456. }
  457. /*
  458. * Read or write a bunch of msrs. Parameters are user addresses.
  459. *
  460. * @return number of msrs set successfully.
  461. */
  462. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  463. int (*do_msr)(struct kvm_vcpu *vcpu,
  464. unsigned index, u64 *data),
  465. int writeback)
  466. {
  467. struct kvm_msrs msrs;
  468. struct kvm_msr_entry *entries;
  469. int r, n;
  470. unsigned size;
  471. r = -EFAULT;
  472. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  473. goto out;
  474. r = -E2BIG;
  475. if (msrs.nmsrs >= MAX_IO_MSRS)
  476. goto out;
  477. r = -ENOMEM;
  478. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  479. entries = vmalloc(size);
  480. if (!entries)
  481. goto out;
  482. r = -EFAULT;
  483. if (copy_from_user(entries, user_msrs->entries, size))
  484. goto out_free;
  485. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  486. if (r < 0)
  487. goto out_free;
  488. r = -EFAULT;
  489. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  490. goto out_free;
  491. r = n;
  492. out_free:
  493. vfree(entries);
  494. out:
  495. return r;
  496. }
  497. /*
  498. * Make sure that a cpu that is being hot-unplugged does not have any vcpus
  499. * cached on it.
  500. */
  501. void decache_vcpus_on_cpu(int cpu)
  502. {
  503. struct kvm *vm;
  504. struct kvm_vcpu *vcpu;
  505. int i;
  506. spin_lock(&kvm_lock);
  507. list_for_each_entry(vm, &vm_list, vm_list)
  508. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  509. vcpu = vm->vcpus[i];
  510. if (!vcpu)
  511. continue;
  512. /*
  513. * If the vcpu is locked, then it is running on some
  514. * other cpu and therefore it is not cached on the
  515. * cpu in question.
  516. *
  517. * If it's not locked, check the last cpu it executed
  518. * on.
  519. */
  520. if (mutex_trylock(&vcpu->mutex)) {
  521. if (vcpu->cpu == cpu) {
  522. kvm_x86_ops->vcpu_decache(vcpu);
  523. vcpu->cpu = -1;
  524. }
  525. mutex_unlock(&vcpu->mutex);
  526. }
  527. }
  528. spin_unlock(&kvm_lock);
  529. }
  530. int kvm_dev_ioctl_check_extension(long ext)
  531. {
  532. int r;
  533. switch (ext) {
  534. case KVM_CAP_IRQCHIP:
  535. case KVM_CAP_HLT:
  536. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  537. case KVM_CAP_USER_MEMORY:
  538. case KVM_CAP_SET_TSS_ADDR:
  539. r = 1;
  540. break;
  541. default:
  542. r = 0;
  543. break;
  544. }
  545. return r;
  546. }
  547. long kvm_arch_dev_ioctl(struct file *filp,
  548. unsigned int ioctl, unsigned long arg)
  549. {
  550. void __user *argp = (void __user *)arg;
  551. long r;
  552. switch (ioctl) {
  553. case KVM_GET_MSR_INDEX_LIST: {
  554. struct kvm_msr_list __user *user_msr_list = argp;
  555. struct kvm_msr_list msr_list;
  556. unsigned n;
  557. r = -EFAULT;
  558. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  559. goto out;
  560. n = msr_list.nmsrs;
  561. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  562. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  563. goto out;
  564. r = -E2BIG;
  565. if (n < num_msrs_to_save)
  566. goto out;
  567. r = -EFAULT;
  568. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  569. num_msrs_to_save * sizeof(u32)))
  570. goto out;
  571. if (copy_to_user(user_msr_list->indices
  572. + num_msrs_to_save * sizeof(u32),
  573. &emulated_msrs,
  574. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  575. goto out;
  576. r = 0;
  577. break;
  578. }
  579. default:
  580. r = -EINVAL;
  581. }
  582. out:
  583. return r;
  584. }
  585. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  586. {
  587. kvm_x86_ops->vcpu_load(vcpu, cpu);
  588. }
  589. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  590. {
  591. kvm_x86_ops->vcpu_put(vcpu);
  592. }
  593. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  594. {
  595. u64 efer;
  596. int i;
  597. struct kvm_cpuid_entry *e, *entry;
  598. rdmsrl(MSR_EFER, efer);
  599. entry = NULL;
  600. for (i = 0; i < vcpu->cpuid_nent; ++i) {
  601. e = &vcpu->cpuid_entries[i];
  602. if (e->function == 0x80000001) {
  603. entry = e;
  604. break;
  605. }
  606. }
  607. if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) {
  608. entry->edx &= ~(1 << 20);
  609. printk(KERN_INFO "kvm: guest NX capability removed\n");
  610. }
  611. }
  612. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  613. struct kvm_cpuid *cpuid,
  614. struct kvm_cpuid_entry __user *entries)
  615. {
  616. int r;
  617. r = -E2BIG;
  618. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  619. goto out;
  620. r = -EFAULT;
  621. if (copy_from_user(&vcpu->cpuid_entries, entries,
  622. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  623. goto out;
  624. vcpu->cpuid_nent = cpuid->nent;
  625. cpuid_fix_nx_cap(vcpu);
  626. return 0;
  627. out:
  628. return r;
  629. }
  630. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  631. struct kvm_lapic_state *s)
  632. {
  633. vcpu_load(vcpu);
  634. memcpy(s->regs, vcpu->apic->regs, sizeof *s);
  635. vcpu_put(vcpu);
  636. return 0;
  637. }
  638. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  639. struct kvm_lapic_state *s)
  640. {
  641. vcpu_load(vcpu);
  642. memcpy(vcpu->apic->regs, s->regs, sizeof *s);
  643. kvm_apic_post_state_restore(vcpu);
  644. vcpu_put(vcpu);
  645. return 0;
  646. }
  647. long kvm_arch_vcpu_ioctl(struct file *filp,
  648. unsigned int ioctl, unsigned long arg)
  649. {
  650. struct kvm_vcpu *vcpu = filp->private_data;
  651. void __user *argp = (void __user *)arg;
  652. int r;
  653. switch (ioctl) {
  654. case KVM_GET_LAPIC: {
  655. struct kvm_lapic_state lapic;
  656. memset(&lapic, 0, sizeof lapic);
  657. r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
  658. if (r)
  659. goto out;
  660. r = -EFAULT;
  661. if (copy_to_user(argp, &lapic, sizeof lapic))
  662. goto out;
  663. r = 0;
  664. break;
  665. }
  666. case KVM_SET_LAPIC: {
  667. struct kvm_lapic_state lapic;
  668. r = -EFAULT;
  669. if (copy_from_user(&lapic, argp, sizeof lapic))
  670. goto out;
  671. r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
  672. if (r)
  673. goto out;
  674. r = 0;
  675. break;
  676. }
  677. case KVM_SET_CPUID: {
  678. struct kvm_cpuid __user *cpuid_arg = argp;
  679. struct kvm_cpuid cpuid;
  680. r = -EFAULT;
  681. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  682. goto out;
  683. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  684. if (r)
  685. goto out;
  686. break;
  687. }
  688. case KVM_GET_MSRS:
  689. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  690. break;
  691. case KVM_SET_MSRS:
  692. r = msr_io(vcpu, argp, do_set_msr, 0);
  693. break;
  694. default:
  695. r = -EINVAL;
  696. }
  697. out:
  698. return r;
  699. }
  700. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  701. {
  702. int ret;
  703. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  704. return -1;
  705. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  706. return ret;
  707. }
  708. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  709. u32 kvm_nr_mmu_pages)
  710. {
  711. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  712. return -EINVAL;
  713. mutex_lock(&kvm->lock);
  714. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  715. kvm->n_requested_mmu_pages = kvm_nr_mmu_pages;
  716. mutex_unlock(&kvm->lock);
  717. return 0;
  718. }
  719. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  720. {
  721. return kvm->n_alloc_mmu_pages;
  722. }
  723. /*
  724. * Set a new alias region. Aliases map a portion of physical memory into
  725. * another portion. This is useful for memory windows, for example the PC
  726. * VGA region.
  727. */
  728. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  729. struct kvm_memory_alias *alias)
  730. {
  731. int r, n;
  732. struct kvm_mem_alias *p;
  733. r = -EINVAL;
  734. /* General sanity checks */
  735. if (alias->memory_size & (PAGE_SIZE - 1))
  736. goto out;
  737. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  738. goto out;
  739. if (alias->slot >= KVM_ALIAS_SLOTS)
  740. goto out;
  741. if (alias->guest_phys_addr + alias->memory_size
  742. < alias->guest_phys_addr)
  743. goto out;
  744. if (alias->target_phys_addr + alias->memory_size
  745. < alias->target_phys_addr)
  746. goto out;
  747. mutex_lock(&kvm->lock);
  748. p = &kvm->aliases[alias->slot];
  749. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  750. p->npages = alias->memory_size >> PAGE_SHIFT;
  751. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  752. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  753. if (kvm->aliases[n - 1].npages)
  754. break;
  755. kvm->naliases = n;
  756. kvm_mmu_zap_all(kvm);
  757. mutex_unlock(&kvm->lock);
  758. return 0;
  759. out:
  760. return r;
  761. }
  762. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  763. {
  764. int r;
  765. r = 0;
  766. switch (chip->chip_id) {
  767. case KVM_IRQCHIP_PIC_MASTER:
  768. memcpy(&chip->chip.pic,
  769. &pic_irqchip(kvm)->pics[0],
  770. sizeof(struct kvm_pic_state));
  771. break;
  772. case KVM_IRQCHIP_PIC_SLAVE:
  773. memcpy(&chip->chip.pic,
  774. &pic_irqchip(kvm)->pics[1],
  775. sizeof(struct kvm_pic_state));
  776. break;
  777. case KVM_IRQCHIP_IOAPIC:
  778. memcpy(&chip->chip.ioapic,
  779. ioapic_irqchip(kvm),
  780. sizeof(struct kvm_ioapic_state));
  781. break;
  782. default:
  783. r = -EINVAL;
  784. break;
  785. }
  786. return r;
  787. }
  788. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  789. {
  790. int r;
  791. r = 0;
  792. switch (chip->chip_id) {
  793. case KVM_IRQCHIP_PIC_MASTER:
  794. memcpy(&pic_irqchip(kvm)->pics[0],
  795. &chip->chip.pic,
  796. sizeof(struct kvm_pic_state));
  797. break;
  798. case KVM_IRQCHIP_PIC_SLAVE:
  799. memcpy(&pic_irqchip(kvm)->pics[1],
  800. &chip->chip.pic,
  801. sizeof(struct kvm_pic_state));
  802. break;
  803. case KVM_IRQCHIP_IOAPIC:
  804. memcpy(ioapic_irqchip(kvm),
  805. &chip->chip.ioapic,
  806. sizeof(struct kvm_ioapic_state));
  807. break;
  808. default:
  809. r = -EINVAL;
  810. break;
  811. }
  812. kvm_pic_update_irq(pic_irqchip(kvm));
  813. return r;
  814. }
  815. long kvm_arch_vm_ioctl(struct file *filp,
  816. unsigned int ioctl, unsigned long arg)
  817. {
  818. struct kvm *kvm = filp->private_data;
  819. void __user *argp = (void __user *)arg;
  820. int r = -EINVAL;
  821. switch (ioctl) {
  822. case KVM_SET_TSS_ADDR:
  823. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  824. if (r < 0)
  825. goto out;
  826. break;
  827. case KVM_SET_MEMORY_REGION: {
  828. struct kvm_memory_region kvm_mem;
  829. struct kvm_userspace_memory_region kvm_userspace_mem;
  830. r = -EFAULT;
  831. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  832. goto out;
  833. kvm_userspace_mem.slot = kvm_mem.slot;
  834. kvm_userspace_mem.flags = kvm_mem.flags;
  835. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  836. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  837. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  838. if (r)
  839. goto out;
  840. break;
  841. }
  842. case KVM_SET_NR_MMU_PAGES:
  843. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  844. if (r)
  845. goto out;
  846. break;
  847. case KVM_GET_NR_MMU_PAGES:
  848. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  849. break;
  850. case KVM_SET_MEMORY_ALIAS: {
  851. struct kvm_memory_alias alias;
  852. r = -EFAULT;
  853. if (copy_from_user(&alias, argp, sizeof alias))
  854. goto out;
  855. r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
  856. if (r)
  857. goto out;
  858. break;
  859. }
  860. case KVM_CREATE_IRQCHIP:
  861. r = -ENOMEM;
  862. kvm->vpic = kvm_create_pic(kvm);
  863. if (kvm->vpic) {
  864. r = kvm_ioapic_init(kvm);
  865. if (r) {
  866. kfree(kvm->vpic);
  867. kvm->vpic = NULL;
  868. goto out;
  869. }
  870. } else
  871. goto out;
  872. break;
  873. case KVM_IRQ_LINE: {
  874. struct kvm_irq_level irq_event;
  875. r = -EFAULT;
  876. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  877. goto out;
  878. if (irqchip_in_kernel(kvm)) {
  879. mutex_lock(&kvm->lock);
  880. if (irq_event.irq < 16)
  881. kvm_pic_set_irq(pic_irqchip(kvm),
  882. irq_event.irq,
  883. irq_event.level);
  884. kvm_ioapic_set_irq(kvm->vioapic,
  885. irq_event.irq,
  886. irq_event.level);
  887. mutex_unlock(&kvm->lock);
  888. r = 0;
  889. }
  890. break;
  891. }
  892. case KVM_GET_IRQCHIP: {
  893. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  894. struct kvm_irqchip chip;
  895. r = -EFAULT;
  896. if (copy_from_user(&chip, argp, sizeof chip))
  897. goto out;
  898. r = -ENXIO;
  899. if (!irqchip_in_kernel(kvm))
  900. goto out;
  901. r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
  902. if (r)
  903. goto out;
  904. r = -EFAULT;
  905. if (copy_to_user(argp, &chip, sizeof chip))
  906. goto out;
  907. r = 0;
  908. break;
  909. }
  910. case KVM_SET_IRQCHIP: {
  911. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  912. struct kvm_irqchip chip;
  913. r = -EFAULT;
  914. if (copy_from_user(&chip, argp, sizeof chip))
  915. goto out;
  916. r = -ENXIO;
  917. if (!irqchip_in_kernel(kvm))
  918. goto out;
  919. r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
  920. if (r)
  921. goto out;
  922. r = 0;
  923. break;
  924. }
  925. default:
  926. ;
  927. }
  928. out:
  929. return r;
  930. }
  931. static void kvm_init_msr_list(void)
  932. {
  933. u32 dummy[2];
  934. unsigned i, j;
  935. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  936. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  937. continue;
  938. if (j < i)
  939. msrs_to_save[j] = msrs_to_save[i];
  940. j++;
  941. }
  942. num_msrs_to_save = j;
  943. }
  944. /*
  945. * Only apic need an MMIO device hook, so shortcut now..
  946. */
  947. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  948. gpa_t addr)
  949. {
  950. struct kvm_io_device *dev;
  951. if (vcpu->apic) {
  952. dev = &vcpu->apic->dev;
  953. if (dev->in_range(dev, addr))
  954. return dev;
  955. }
  956. return NULL;
  957. }
  958. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  959. gpa_t addr)
  960. {
  961. struct kvm_io_device *dev;
  962. dev = vcpu_find_pervcpu_dev(vcpu, addr);
  963. if (dev == NULL)
  964. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
  965. return dev;
  966. }
  967. int emulator_read_std(unsigned long addr,
  968. void *val,
  969. unsigned int bytes,
  970. struct kvm_vcpu *vcpu)
  971. {
  972. void *data = val;
  973. while (bytes) {
  974. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  975. unsigned offset = addr & (PAGE_SIZE-1);
  976. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  977. int ret;
  978. if (gpa == UNMAPPED_GVA)
  979. return X86EMUL_PROPAGATE_FAULT;
  980. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  981. if (ret < 0)
  982. return X86EMUL_UNHANDLEABLE;
  983. bytes -= tocopy;
  984. data += tocopy;
  985. addr += tocopy;
  986. }
  987. return X86EMUL_CONTINUE;
  988. }
  989. EXPORT_SYMBOL_GPL(emulator_read_std);
  990. static int emulator_write_std(unsigned long addr,
  991. const void *val,
  992. unsigned int bytes,
  993. struct kvm_vcpu *vcpu)
  994. {
  995. pr_unimpl(vcpu, "emulator_write_std: addr %lx n %d\n", addr, bytes);
  996. return X86EMUL_UNHANDLEABLE;
  997. }
  998. static int emulator_read_emulated(unsigned long addr,
  999. void *val,
  1000. unsigned int bytes,
  1001. struct kvm_vcpu *vcpu)
  1002. {
  1003. struct kvm_io_device *mmio_dev;
  1004. gpa_t gpa;
  1005. if (vcpu->mmio_read_completed) {
  1006. memcpy(val, vcpu->mmio_data, bytes);
  1007. vcpu->mmio_read_completed = 0;
  1008. return X86EMUL_CONTINUE;
  1009. }
  1010. gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  1011. /* For APIC access vmexit */
  1012. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1013. goto mmio;
  1014. if (emulator_read_std(addr, val, bytes, vcpu)
  1015. == X86EMUL_CONTINUE)
  1016. return X86EMUL_CONTINUE;
  1017. if (gpa == UNMAPPED_GVA)
  1018. return X86EMUL_PROPAGATE_FAULT;
  1019. mmio:
  1020. /*
  1021. * Is this MMIO handled locally?
  1022. */
  1023. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1024. if (mmio_dev) {
  1025. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1026. return X86EMUL_CONTINUE;
  1027. }
  1028. vcpu->mmio_needed = 1;
  1029. vcpu->mmio_phys_addr = gpa;
  1030. vcpu->mmio_size = bytes;
  1031. vcpu->mmio_is_write = 0;
  1032. return X86EMUL_UNHANDLEABLE;
  1033. }
  1034. static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1035. const void *val, int bytes)
  1036. {
  1037. int ret;
  1038. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1039. if (ret < 0)
  1040. return 0;
  1041. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1042. return 1;
  1043. }
  1044. static int emulator_write_emulated_onepage(unsigned long addr,
  1045. const void *val,
  1046. unsigned int bytes,
  1047. struct kvm_vcpu *vcpu)
  1048. {
  1049. struct kvm_io_device *mmio_dev;
  1050. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr);
  1051. if (gpa == UNMAPPED_GVA) {
  1052. kvm_x86_ops->inject_page_fault(vcpu, addr, 2);
  1053. return X86EMUL_PROPAGATE_FAULT;
  1054. }
  1055. /* For APIC access vmexit */
  1056. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1057. goto mmio;
  1058. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1059. return X86EMUL_CONTINUE;
  1060. mmio:
  1061. /*
  1062. * Is this MMIO handled locally?
  1063. */
  1064. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1065. if (mmio_dev) {
  1066. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1067. return X86EMUL_CONTINUE;
  1068. }
  1069. vcpu->mmio_needed = 1;
  1070. vcpu->mmio_phys_addr = gpa;
  1071. vcpu->mmio_size = bytes;
  1072. vcpu->mmio_is_write = 1;
  1073. memcpy(vcpu->mmio_data, val, bytes);
  1074. return X86EMUL_CONTINUE;
  1075. }
  1076. int emulator_write_emulated(unsigned long addr,
  1077. const void *val,
  1078. unsigned int bytes,
  1079. struct kvm_vcpu *vcpu)
  1080. {
  1081. /* Crossing a page boundary? */
  1082. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1083. int rc, now;
  1084. now = -addr & ~PAGE_MASK;
  1085. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1086. if (rc != X86EMUL_CONTINUE)
  1087. return rc;
  1088. addr += now;
  1089. val += now;
  1090. bytes -= now;
  1091. }
  1092. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  1093. }
  1094. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  1095. static int emulator_cmpxchg_emulated(unsigned long addr,
  1096. const void *old,
  1097. const void *new,
  1098. unsigned int bytes,
  1099. struct kvm_vcpu *vcpu)
  1100. {
  1101. static int reported;
  1102. if (!reported) {
  1103. reported = 1;
  1104. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  1105. }
  1106. return emulator_write_emulated(addr, new, bytes, vcpu);
  1107. }
  1108. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  1109. {
  1110. return kvm_x86_ops->get_segment_base(vcpu, seg);
  1111. }
  1112. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  1113. {
  1114. return X86EMUL_CONTINUE;
  1115. }
  1116. int emulate_clts(struct kvm_vcpu *vcpu)
  1117. {
  1118. kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS);
  1119. return X86EMUL_CONTINUE;
  1120. }
  1121. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  1122. {
  1123. struct kvm_vcpu *vcpu = ctxt->vcpu;
  1124. switch (dr) {
  1125. case 0 ... 3:
  1126. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  1127. return X86EMUL_CONTINUE;
  1128. default:
  1129. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
  1130. return X86EMUL_UNHANDLEABLE;
  1131. }
  1132. }
  1133. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  1134. {
  1135. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  1136. int exception;
  1137. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  1138. if (exception) {
  1139. /* FIXME: better handling */
  1140. return X86EMUL_UNHANDLEABLE;
  1141. }
  1142. return X86EMUL_CONTINUE;
  1143. }
  1144. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  1145. {
  1146. static int reported;
  1147. u8 opcodes[4];
  1148. unsigned long rip = vcpu->rip;
  1149. unsigned long rip_linear;
  1150. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  1151. if (reported)
  1152. return;
  1153. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  1154. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  1155. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  1156. reported = 1;
  1157. }
  1158. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  1159. struct x86_emulate_ops emulate_ops = {
  1160. .read_std = emulator_read_std,
  1161. .write_std = emulator_write_std,
  1162. .read_emulated = emulator_read_emulated,
  1163. .write_emulated = emulator_write_emulated,
  1164. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  1165. };
  1166. int emulate_instruction(struct kvm_vcpu *vcpu,
  1167. struct kvm_run *run,
  1168. unsigned long cr2,
  1169. u16 error_code,
  1170. int no_decode)
  1171. {
  1172. int r;
  1173. vcpu->mmio_fault_cr2 = cr2;
  1174. kvm_x86_ops->cache_regs(vcpu);
  1175. vcpu->mmio_is_write = 0;
  1176. vcpu->pio.string = 0;
  1177. if (!no_decode) {
  1178. int cs_db, cs_l;
  1179. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  1180. vcpu->emulate_ctxt.vcpu = vcpu;
  1181. vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  1182. vcpu->emulate_ctxt.cr2 = cr2;
  1183. vcpu->emulate_ctxt.mode =
  1184. (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM)
  1185. ? X86EMUL_MODE_REAL : cs_l
  1186. ? X86EMUL_MODE_PROT64 : cs_db
  1187. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  1188. if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
  1189. vcpu->emulate_ctxt.cs_base = 0;
  1190. vcpu->emulate_ctxt.ds_base = 0;
  1191. vcpu->emulate_ctxt.es_base = 0;
  1192. vcpu->emulate_ctxt.ss_base = 0;
  1193. } else {
  1194. vcpu->emulate_ctxt.cs_base =
  1195. get_segment_base(vcpu, VCPU_SREG_CS);
  1196. vcpu->emulate_ctxt.ds_base =
  1197. get_segment_base(vcpu, VCPU_SREG_DS);
  1198. vcpu->emulate_ctxt.es_base =
  1199. get_segment_base(vcpu, VCPU_SREG_ES);
  1200. vcpu->emulate_ctxt.ss_base =
  1201. get_segment_base(vcpu, VCPU_SREG_SS);
  1202. }
  1203. vcpu->emulate_ctxt.gs_base =
  1204. get_segment_base(vcpu, VCPU_SREG_GS);
  1205. vcpu->emulate_ctxt.fs_base =
  1206. get_segment_base(vcpu, VCPU_SREG_FS);
  1207. r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops);
  1208. if (r) {
  1209. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1210. return EMULATE_DONE;
  1211. return EMULATE_FAIL;
  1212. }
  1213. }
  1214. r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops);
  1215. if (vcpu->pio.string)
  1216. return EMULATE_DO_MMIO;
  1217. if ((r || vcpu->mmio_is_write) && run) {
  1218. run->exit_reason = KVM_EXIT_MMIO;
  1219. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  1220. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  1221. run->mmio.len = vcpu->mmio_size;
  1222. run->mmio.is_write = vcpu->mmio_is_write;
  1223. }
  1224. if (r) {
  1225. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1226. return EMULATE_DONE;
  1227. if (!vcpu->mmio_needed) {
  1228. kvm_report_emulation_failure(vcpu, "mmio");
  1229. return EMULATE_FAIL;
  1230. }
  1231. return EMULATE_DO_MMIO;
  1232. }
  1233. kvm_x86_ops->decache_regs(vcpu);
  1234. kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags);
  1235. if (vcpu->mmio_is_write) {
  1236. vcpu->mmio_needed = 0;
  1237. return EMULATE_DO_MMIO;
  1238. }
  1239. return EMULATE_DONE;
  1240. }
  1241. EXPORT_SYMBOL_GPL(emulate_instruction);
  1242. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  1243. {
  1244. int i;
  1245. for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i)
  1246. if (vcpu->pio.guest_pages[i]) {
  1247. kvm_release_page(vcpu->pio.guest_pages[i]);
  1248. vcpu->pio.guest_pages[i] = NULL;
  1249. }
  1250. }
  1251. static int pio_copy_data(struct kvm_vcpu *vcpu)
  1252. {
  1253. void *p = vcpu->pio_data;
  1254. void *q;
  1255. unsigned bytes;
  1256. int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1;
  1257. q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  1258. PAGE_KERNEL);
  1259. if (!q) {
  1260. free_pio_guest_pages(vcpu);
  1261. return -ENOMEM;
  1262. }
  1263. q += vcpu->pio.guest_page_offset;
  1264. bytes = vcpu->pio.size * vcpu->pio.cur_count;
  1265. if (vcpu->pio.in)
  1266. memcpy(q, p, bytes);
  1267. else
  1268. memcpy(p, q, bytes);
  1269. q -= vcpu->pio.guest_page_offset;
  1270. vunmap(q);
  1271. free_pio_guest_pages(vcpu);
  1272. return 0;
  1273. }
  1274. int complete_pio(struct kvm_vcpu *vcpu)
  1275. {
  1276. struct kvm_pio_request *io = &vcpu->pio;
  1277. long delta;
  1278. int r;
  1279. kvm_x86_ops->cache_regs(vcpu);
  1280. if (!io->string) {
  1281. if (io->in)
  1282. memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data,
  1283. io->size);
  1284. } else {
  1285. if (io->in) {
  1286. r = pio_copy_data(vcpu);
  1287. if (r) {
  1288. kvm_x86_ops->cache_regs(vcpu);
  1289. return r;
  1290. }
  1291. }
  1292. delta = 1;
  1293. if (io->rep) {
  1294. delta *= io->cur_count;
  1295. /*
  1296. * The size of the register should really depend on
  1297. * current address size.
  1298. */
  1299. vcpu->regs[VCPU_REGS_RCX] -= delta;
  1300. }
  1301. if (io->down)
  1302. delta = -delta;
  1303. delta *= io->size;
  1304. if (io->in)
  1305. vcpu->regs[VCPU_REGS_RDI] += delta;
  1306. else
  1307. vcpu->regs[VCPU_REGS_RSI] += delta;
  1308. }
  1309. kvm_x86_ops->decache_regs(vcpu);
  1310. io->count -= io->cur_count;
  1311. io->cur_count = 0;
  1312. return 0;
  1313. }
  1314. static void kernel_pio(struct kvm_io_device *pio_dev,
  1315. struct kvm_vcpu *vcpu,
  1316. void *pd)
  1317. {
  1318. /* TODO: String I/O for in kernel device */
  1319. mutex_lock(&vcpu->kvm->lock);
  1320. if (vcpu->pio.in)
  1321. kvm_iodevice_read(pio_dev, vcpu->pio.port,
  1322. vcpu->pio.size,
  1323. pd);
  1324. else
  1325. kvm_iodevice_write(pio_dev, vcpu->pio.port,
  1326. vcpu->pio.size,
  1327. pd);
  1328. mutex_unlock(&vcpu->kvm->lock);
  1329. }
  1330. static void pio_string_write(struct kvm_io_device *pio_dev,
  1331. struct kvm_vcpu *vcpu)
  1332. {
  1333. struct kvm_pio_request *io = &vcpu->pio;
  1334. void *pd = vcpu->pio_data;
  1335. int i;
  1336. mutex_lock(&vcpu->kvm->lock);
  1337. for (i = 0; i < io->cur_count; i++) {
  1338. kvm_iodevice_write(pio_dev, io->port,
  1339. io->size,
  1340. pd);
  1341. pd += io->size;
  1342. }
  1343. mutex_unlock(&vcpu->kvm->lock);
  1344. }
  1345. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  1346. gpa_t addr)
  1347. {
  1348. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
  1349. }
  1350. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1351. int size, unsigned port)
  1352. {
  1353. struct kvm_io_device *pio_dev;
  1354. vcpu->run->exit_reason = KVM_EXIT_IO;
  1355. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1356. vcpu->run->io.size = vcpu->pio.size = size;
  1357. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1358. vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1;
  1359. vcpu->run->io.port = vcpu->pio.port = port;
  1360. vcpu->pio.in = in;
  1361. vcpu->pio.string = 0;
  1362. vcpu->pio.down = 0;
  1363. vcpu->pio.guest_page_offset = 0;
  1364. vcpu->pio.rep = 0;
  1365. kvm_x86_ops->cache_regs(vcpu);
  1366. memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4);
  1367. kvm_x86_ops->decache_regs(vcpu);
  1368. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1369. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1370. if (pio_dev) {
  1371. kernel_pio(pio_dev, vcpu, vcpu->pio_data);
  1372. complete_pio(vcpu);
  1373. return 1;
  1374. }
  1375. return 0;
  1376. }
  1377. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  1378. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1379. int size, unsigned long count, int down,
  1380. gva_t address, int rep, unsigned port)
  1381. {
  1382. unsigned now, in_page;
  1383. int i, ret = 0;
  1384. int nr_pages = 1;
  1385. struct page *page;
  1386. struct kvm_io_device *pio_dev;
  1387. vcpu->run->exit_reason = KVM_EXIT_IO;
  1388. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1389. vcpu->run->io.size = vcpu->pio.size = size;
  1390. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1391. vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count;
  1392. vcpu->run->io.port = vcpu->pio.port = port;
  1393. vcpu->pio.in = in;
  1394. vcpu->pio.string = 1;
  1395. vcpu->pio.down = down;
  1396. vcpu->pio.guest_page_offset = offset_in_page(address);
  1397. vcpu->pio.rep = rep;
  1398. if (!count) {
  1399. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1400. return 1;
  1401. }
  1402. if (!down)
  1403. in_page = PAGE_SIZE - offset_in_page(address);
  1404. else
  1405. in_page = offset_in_page(address) + size;
  1406. now = min(count, (unsigned long)in_page / size);
  1407. if (!now) {
  1408. /*
  1409. * String I/O straddles page boundary. Pin two guest pages
  1410. * so that we satisfy atomicity constraints. Do just one
  1411. * transaction to avoid complexity.
  1412. */
  1413. nr_pages = 2;
  1414. now = 1;
  1415. }
  1416. if (down) {
  1417. /*
  1418. * String I/O in reverse. Yuck. Kill the guest, fix later.
  1419. */
  1420. pr_unimpl(vcpu, "guest string pio down\n");
  1421. inject_gp(vcpu);
  1422. return 1;
  1423. }
  1424. vcpu->run->io.count = now;
  1425. vcpu->pio.cur_count = now;
  1426. if (vcpu->pio.cur_count == vcpu->pio.count)
  1427. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1428. for (i = 0; i < nr_pages; ++i) {
  1429. mutex_lock(&vcpu->kvm->lock);
  1430. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  1431. vcpu->pio.guest_pages[i] = page;
  1432. mutex_unlock(&vcpu->kvm->lock);
  1433. if (!page) {
  1434. inject_gp(vcpu);
  1435. free_pio_guest_pages(vcpu);
  1436. return 1;
  1437. }
  1438. }
  1439. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1440. if (!vcpu->pio.in) {
  1441. /* string PIO write */
  1442. ret = pio_copy_data(vcpu);
  1443. if (ret >= 0 && pio_dev) {
  1444. pio_string_write(pio_dev, vcpu);
  1445. complete_pio(vcpu);
  1446. if (vcpu->pio.count == 0)
  1447. ret = 1;
  1448. }
  1449. } else if (pio_dev)
  1450. pr_unimpl(vcpu, "no string pio read support yet, "
  1451. "port %x size %d count %ld\n",
  1452. port, size, count);
  1453. return ret;
  1454. }
  1455. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  1456. int kvm_arch_init(void *opaque)
  1457. {
  1458. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  1459. kvm_init_msr_list();
  1460. if (kvm_x86_ops) {
  1461. printk(KERN_ERR "kvm: already loaded the other module\n");
  1462. return -EEXIST;
  1463. }
  1464. if (!ops->cpu_has_kvm_support()) {
  1465. printk(KERN_ERR "kvm: no hardware support\n");
  1466. return -EOPNOTSUPP;
  1467. }
  1468. if (ops->disabled_by_bios()) {
  1469. printk(KERN_ERR "kvm: disabled by bios\n");
  1470. return -EOPNOTSUPP;
  1471. }
  1472. kvm_x86_ops = ops;
  1473. return 0;
  1474. }
  1475. void kvm_arch_exit(void)
  1476. {
  1477. kvm_x86_ops = NULL;
  1478. }
  1479. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  1480. {
  1481. ++vcpu->stat.halt_exits;
  1482. if (irqchip_in_kernel(vcpu->kvm)) {
  1483. vcpu->mp_state = VCPU_MP_STATE_HALTED;
  1484. kvm_vcpu_block(vcpu);
  1485. if (vcpu->mp_state != VCPU_MP_STATE_RUNNABLE)
  1486. return -EINTR;
  1487. return 1;
  1488. } else {
  1489. vcpu->run->exit_reason = KVM_EXIT_HLT;
  1490. return 0;
  1491. }
  1492. }
  1493. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  1494. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  1495. {
  1496. unsigned long nr, a0, a1, a2, a3, ret;
  1497. kvm_x86_ops->cache_regs(vcpu);
  1498. nr = vcpu->regs[VCPU_REGS_RAX];
  1499. a0 = vcpu->regs[VCPU_REGS_RBX];
  1500. a1 = vcpu->regs[VCPU_REGS_RCX];
  1501. a2 = vcpu->regs[VCPU_REGS_RDX];
  1502. a3 = vcpu->regs[VCPU_REGS_RSI];
  1503. if (!is_long_mode(vcpu)) {
  1504. nr &= 0xFFFFFFFF;
  1505. a0 &= 0xFFFFFFFF;
  1506. a1 &= 0xFFFFFFFF;
  1507. a2 &= 0xFFFFFFFF;
  1508. a3 &= 0xFFFFFFFF;
  1509. }
  1510. switch (nr) {
  1511. default:
  1512. ret = -KVM_ENOSYS;
  1513. break;
  1514. }
  1515. vcpu->regs[VCPU_REGS_RAX] = ret;
  1516. kvm_x86_ops->decache_regs(vcpu);
  1517. return 0;
  1518. }
  1519. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  1520. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  1521. {
  1522. char instruction[3];
  1523. int ret = 0;
  1524. mutex_lock(&vcpu->kvm->lock);
  1525. /*
  1526. * Blow out the MMU to ensure that no other VCPU has an active mapping
  1527. * to ensure that the updated hypercall appears atomically across all
  1528. * VCPUs.
  1529. */
  1530. kvm_mmu_zap_all(vcpu->kvm);
  1531. kvm_x86_ops->cache_regs(vcpu);
  1532. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  1533. if (emulator_write_emulated(vcpu->rip, instruction, 3, vcpu)
  1534. != X86EMUL_CONTINUE)
  1535. ret = -EFAULT;
  1536. mutex_unlock(&vcpu->kvm->lock);
  1537. return ret;
  1538. }
  1539. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  1540. {
  1541. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  1542. }
  1543. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  1544. {
  1545. struct descriptor_table dt = { limit, base };
  1546. kvm_x86_ops->set_gdt(vcpu, &dt);
  1547. }
  1548. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  1549. {
  1550. struct descriptor_table dt = { limit, base };
  1551. kvm_x86_ops->set_idt(vcpu, &dt);
  1552. }
  1553. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  1554. unsigned long *rflags)
  1555. {
  1556. lmsw(vcpu, msw);
  1557. *rflags = kvm_x86_ops->get_rflags(vcpu);
  1558. }
  1559. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  1560. {
  1561. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  1562. switch (cr) {
  1563. case 0:
  1564. return vcpu->cr0;
  1565. case 2:
  1566. return vcpu->cr2;
  1567. case 3:
  1568. return vcpu->cr3;
  1569. case 4:
  1570. return vcpu->cr4;
  1571. default:
  1572. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  1573. return 0;
  1574. }
  1575. }
  1576. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  1577. unsigned long *rflags)
  1578. {
  1579. switch (cr) {
  1580. case 0:
  1581. set_cr0(vcpu, mk_cr_64(vcpu->cr0, val));
  1582. *rflags = kvm_x86_ops->get_rflags(vcpu);
  1583. break;
  1584. case 2:
  1585. vcpu->cr2 = val;
  1586. break;
  1587. case 3:
  1588. set_cr3(vcpu, val);
  1589. break;
  1590. case 4:
  1591. set_cr4(vcpu, mk_cr_64(vcpu->cr4, val));
  1592. break;
  1593. default:
  1594. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  1595. }
  1596. }
  1597. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  1598. {
  1599. int i;
  1600. u32 function;
  1601. struct kvm_cpuid_entry *e, *best;
  1602. kvm_x86_ops->cache_regs(vcpu);
  1603. function = vcpu->regs[VCPU_REGS_RAX];
  1604. vcpu->regs[VCPU_REGS_RAX] = 0;
  1605. vcpu->regs[VCPU_REGS_RBX] = 0;
  1606. vcpu->regs[VCPU_REGS_RCX] = 0;
  1607. vcpu->regs[VCPU_REGS_RDX] = 0;
  1608. best = NULL;
  1609. for (i = 0; i < vcpu->cpuid_nent; ++i) {
  1610. e = &vcpu->cpuid_entries[i];
  1611. if (e->function == function) {
  1612. best = e;
  1613. break;
  1614. }
  1615. /*
  1616. * Both basic or both extended?
  1617. */
  1618. if (((e->function ^ function) & 0x80000000) == 0)
  1619. if (!best || e->function > best->function)
  1620. best = e;
  1621. }
  1622. if (best) {
  1623. vcpu->regs[VCPU_REGS_RAX] = best->eax;
  1624. vcpu->regs[VCPU_REGS_RBX] = best->ebx;
  1625. vcpu->regs[VCPU_REGS_RCX] = best->ecx;
  1626. vcpu->regs[VCPU_REGS_RDX] = best->edx;
  1627. }
  1628. kvm_x86_ops->decache_regs(vcpu);
  1629. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1630. }
  1631. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  1632. /*
  1633. * Check if userspace requested an interrupt window, and that the
  1634. * interrupt window is open.
  1635. *
  1636. * No need to exit to userspace if we already have an interrupt queued.
  1637. */
  1638. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  1639. struct kvm_run *kvm_run)
  1640. {
  1641. return (!vcpu->irq_summary &&
  1642. kvm_run->request_interrupt_window &&
  1643. vcpu->interrupt_window_open &&
  1644. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  1645. }
  1646. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  1647. struct kvm_run *kvm_run)
  1648. {
  1649. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  1650. kvm_run->cr8 = get_cr8(vcpu);
  1651. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  1652. if (irqchip_in_kernel(vcpu->kvm))
  1653. kvm_run->ready_for_interrupt_injection = 1;
  1654. else
  1655. kvm_run->ready_for_interrupt_injection =
  1656. (vcpu->interrupt_window_open &&
  1657. vcpu->irq_summary == 0);
  1658. }
  1659. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  1660. {
  1661. int r;
  1662. if (unlikely(vcpu->mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
  1663. pr_debug("vcpu %d received sipi with vector # %x\n",
  1664. vcpu->vcpu_id, vcpu->sipi_vector);
  1665. kvm_lapic_reset(vcpu);
  1666. r = kvm_x86_ops->vcpu_reset(vcpu);
  1667. if (r)
  1668. return r;
  1669. vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
  1670. }
  1671. preempted:
  1672. if (vcpu->guest_debug.enabled)
  1673. kvm_x86_ops->guest_debug_pre(vcpu);
  1674. again:
  1675. r = kvm_mmu_reload(vcpu);
  1676. if (unlikely(r))
  1677. goto out;
  1678. kvm_inject_pending_timer_irqs(vcpu);
  1679. preempt_disable();
  1680. kvm_x86_ops->prepare_guest_switch(vcpu);
  1681. kvm_load_guest_fpu(vcpu);
  1682. local_irq_disable();
  1683. if (signal_pending(current)) {
  1684. local_irq_enable();
  1685. preempt_enable();
  1686. r = -EINTR;
  1687. kvm_run->exit_reason = KVM_EXIT_INTR;
  1688. ++vcpu->stat.signal_exits;
  1689. goto out;
  1690. }
  1691. if (irqchip_in_kernel(vcpu->kvm))
  1692. kvm_x86_ops->inject_pending_irq(vcpu);
  1693. else if (!vcpu->mmio_read_completed)
  1694. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  1695. vcpu->guest_mode = 1;
  1696. kvm_guest_enter();
  1697. if (vcpu->requests)
  1698. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  1699. kvm_x86_ops->tlb_flush(vcpu);
  1700. kvm_x86_ops->run(vcpu, kvm_run);
  1701. vcpu->guest_mode = 0;
  1702. local_irq_enable();
  1703. ++vcpu->stat.exits;
  1704. /*
  1705. * We must have an instruction between local_irq_enable() and
  1706. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  1707. * the interrupt shadow. The stat.exits increment will do nicely.
  1708. * But we need to prevent reordering, hence this barrier():
  1709. */
  1710. barrier();
  1711. kvm_guest_exit();
  1712. preempt_enable();
  1713. /*
  1714. * Profile KVM exit RIPs:
  1715. */
  1716. if (unlikely(prof_on == KVM_PROFILING)) {
  1717. kvm_x86_ops->cache_regs(vcpu);
  1718. profile_hit(KVM_PROFILING, (void *)vcpu->rip);
  1719. }
  1720. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  1721. if (r > 0) {
  1722. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  1723. r = -EINTR;
  1724. kvm_run->exit_reason = KVM_EXIT_INTR;
  1725. ++vcpu->stat.request_irq_exits;
  1726. goto out;
  1727. }
  1728. if (!need_resched())
  1729. goto again;
  1730. }
  1731. out:
  1732. if (r > 0) {
  1733. kvm_resched(vcpu);
  1734. goto preempted;
  1735. }
  1736. post_kvm_run_save(vcpu, kvm_run);
  1737. return r;
  1738. }
  1739. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  1740. {
  1741. int r;
  1742. sigset_t sigsaved;
  1743. vcpu_load(vcpu);
  1744. if (unlikely(vcpu->mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
  1745. kvm_vcpu_block(vcpu);
  1746. vcpu_put(vcpu);
  1747. return -EAGAIN;
  1748. }
  1749. if (vcpu->sigset_active)
  1750. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  1751. /* re-sync apic's tpr */
  1752. if (!irqchip_in_kernel(vcpu->kvm))
  1753. set_cr8(vcpu, kvm_run->cr8);
  1754. if (vcpu->pio.cur_count) {
  1755. r = complete_pio(vcpu);
  1756. if (r)
  1757. goto out;
  1758. }
  1759. #if CONFIG_HAS_IOMEM
  1760. if (vcpu->mmio_needed) {
  1761. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  1762. vcpu->mmio_read_completed = 1;
  1763. vcpu->mmio_needed = 0;
  1764. r = emulate_instruction(vcpu, kvm_run,
  1765. vcpu->mmio_fault_cr2, 0, 1);
  1766. if (r == EMULATE_DO_MMIO) {
  1767. /*
  1768. * Read-modify-write. Back to userspace.
  1769. */
  1770. r = 0;
  1771. goto out;
  1772. }
  1773. }
  1774. #endif
  1775. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
  1776. kvm_x86_ops->cache_regs(vcpu);
  1777. vcpu->regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
  1778. kvm_x86_ops->decache_regs(vcpu);
  1779. }
  1780. r = __vcpu_run(vcpu, kvm_run);
  1781. out:
  1782. if (vcpu->sigset_active)
  1783. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  1784. vcpu_put(vcpu);
  1785. return r;
  1786. }
  1787. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  1788. {
  1789. vcpu_load(vcpu);
  1790. kvm_x86_ops->cache_regs(vcpu);
  1791. regs->rax = vcpu->regs[VCPU_REGS_RAX];
  1792. regs->rbx = vcpu->regs[VCPU_REGS_RBX];
  1793. regs->rcx = vcpu->regs[VCPU_REGS_RCX];
  1794. regs->rdx = vcpu->regs[VCPU_REGS_RDX];
  1795. regs->rsi = vcpu->regs[VCPU_REGS_RSI];
  1796. regs->rdi = vcpu->regs[VCPU_REGS_RDI];
  1797. regs->rsp = vcpu->regs[VCPU_REGS_RSP];
  1798. regs->rbp = vcpu->regs[VCPU_REGS_RBP];
  1799. #ifdef CONFIG_X86_64
  1800. regs->r8 = vcpu->regs[VCPU_REGS_R8];
  1801. regs->r9 = vcpu->regs[VCPU_REGS_R9];
  1802. regs->r10 = vcpu->regs[VCPU_REGS_R10];
  1803. regs->r11 = vcpu->regs[VCPU_REGS_R11];
  1804. regs->r12 = vcpu->regs[VCPU_REGS_R12];
  1805. regs->r13 = vcpu->regs[VCPU_REGS_R13];
  1806. regs->r14 = vcpu->regs[VCPU_REGS_R14];
  1807. regs->r15 = vcpu->regs[VCPU_REGS_R15];
  1808. #endif
  1809. regs->rip = vcpu->rip;
  1810. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  1811. /*
  1812. * Don't leak debug flags in case they were set for guest debugging
  1813. */
  1814. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  1815. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  1816. vcpu_put(vcpu);
  1817. return 0;
  1818. }
  1819. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  1820. {
  1821. vcpu_load(vcpu);
  1822. vcpu->regs[VCPU_REGS_RAX] = regs->rax;
  1823. vcpu->regs[VCPU_REGS_RBX] = regs->rbx;
  1824. vcpu->regs[VCPU_REGS_RCX] = regs->rcx;
  1825. vcpu->regs[VCPU_REGS_RDX] = regs->rdx;
  1826. vcpu->regs[VCPU_REGS_RSI] = regs->rsi;
  1827. vcpu->regs[VCPU_REGS_RDI] = regs->rdi;
  1828. vcpu->regs[VCPU_REGS_RSP] = regs->rsp;
  1829. vcpu->regs[VCPU_REGS_RBP] = regs->rbp;
  1830. #ifdef CONFIG_X86_64
  1831. vcpu->regs[VCPU_REGS_R8] = regs->r8;
  1832. vcpu->regs[VCPU_REGS_R9] = regs->r9;
  1833. vcpu->regs[VCPU_REGS_R10] = regs->r10;
  1834. vcpu->regs[VCPU_REGS_R11] = regs->r11;
  1835. vcpu->regs[VCPU_REGS_R12] = regs->r12;
  1836. vcpu->regs[VCPU_REGS_R13] = regs->r13;
  1837. vcpu->regs[VCPU_REGS_R14] = regs->r14;
  1838. vcpu->regs[VCPU_REGS_R15] = regs->r15;
  1839. #endif
  1840. vcpu->rip = regs->rip;
  1841. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  1842. kvm_x86_ops->decache_regs(vcpu);
  1843. vcpu_put(vcpu);
  1844. return 0;
  1845. }
  1846. static void get_segment(struct kvm_vcpu *vcpu,
  1847. struct kvm_segment *var, int seg)
  1848. {
  1849. return kvm_x86_ops->get_segment(vcpu, var, seg);
  1850. }
  1851. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  1852. {
  1853. struct kvm_segment cs;
  1854. get_segment(vcpu, &cs, VCPU_SREG_CS);
  1855. *db = cs.db;
  1856. *l = cs.l;
  1857. }
  1858. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  1859. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  1860. struct kvm_sregs *sregs)
  1861. {
  1862. struct descriptor_table dt;
  1863. int pending_vec;
  1864. vcpu_load(vcpu);
  1865. get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  1866. get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  1867. get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  1868. get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  1869. get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  1870. get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  1871. get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  1872. get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  1873. kvm_x86_ops->get_idt(vcpu, &dt);
  1874. sregs->idt.limit = dt.limit;
  1875. sregs->idt.base = dt.base;
  1876. kvm_x86_ops->get_gdt(vcpu, &dt);
  1877. sregs->gdt.limit = dt.limit;
  1878. sregs->gdt.base = dt.base;
  1879. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  1880. sregs->cr0 = vcpu->cr0;
  1881. sregs->cr2 = vcpu->cr2;
  1882. sregs->cr3 = vcpu->cr3;
  1883. sregs->cr4 = vcpu->cr4;
  1884. sregs->cr8 = get_cr8(vcpu);
  1885. sregs->efer = vcpu->shadow_efer;
  1886. sregs->apic_base = kvm_get_apic_base(vcpu);
  1887. if (irqchip_in_kernel(vcpu->kvm)) {
  1888. memset(sregs->interrupt_bitmap, 0,
  1889. sizeof sregs->interrupt_bitmap);
  1890. pending_vec = kvm_x86_ops->get_irq(vcpu);
  1891. if (pending_vec >= 0)
  1892. set_bit(pending_vec,
  1893. (unsigned long *)sregs->interrupt_bitmap);
  1894. } else
  1895. memcpy(sregs->interrupt_bitmap, vcpu->irq_pending,
  1896. sizeof sregs->interrupt_bitmap);
  1897. vcpu_put(vcpu);
  1898. return 0;
  1899. }
  1900. static void set_segment(struct kvm_vcpu *vcpu,
  1901. struct kvm_segment *var, int seg)
  1902. {
  1903. return kvm_x86_ops->set_segment(vcpu, var, seg);
  1904. }
  1905. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  1906. struct kvm_sregs *sregs)
  1907. {
  1908. int mmu_reset_needed = 0;
  1909. int i, pending_vec, max_bits;
  1910. struct descriptor_table dt;
  1911. vcpu_load(vcpu);
  1912. dt.limit = sregs->idt.limit;
  1913. dt.base = sregs->idt.base;
  1914. kvm_x86_ops->set_idt(vcpu, &dt);
  1915. dt.limit = sregs->gdt.limit;
  1916. dt.base = sregs->gdt.base;
  1917. kvm_x86_ops->set_gdt(vcpu, &dt);
  1918. vcpu->cr2 = sregs->cr2;
  1919. mmu_reset_needed |= vcpu->cr3 != sregs->cr3;
  1920. vcpu->cr3 = sregs->cr3;
  1921. set_cr8(vcpu, sregs->cr8);
  1922. mmu_reset_needed |= vcpu->shadow_efer != sregs->efer;
  1923. #ifdef CONFIG_X86_64
  1924. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  1925. #endif
  1926. kvm_set_apic_base(vcpu, sregs->apic_base);
  1927. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  1928. mmu_reset_needed |= vcpu->cr0 != sregs->cr0;
  1929. vcpu->cr0 = sregs->cr0;
  1930. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  1931. mmu_reset_needed |= vcpu->cr4 != sregs->cr4;
  1932. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  1933. if (!is_long_mode(vcpu) && is_pae(vcpu))
  1934. load_pdptrs(vcpu, vcpu->cr3);
  1935. if (mmu_reset_needed)
  1936. kvm_mmu_reset_context(vcpu);
  1937. if (!irqchip_in_kernel(vcpu->kvm)) {
  1938. memcpy(vcpu->irq_pending, sregs->interrupt_bitmap,
  1939. sizeof vcpu->irq_pending);
  1940. vcpu->irq_summary = 0;
  1941. for (i = 0; i < ARRAY_SIZE(vcpu->irq_pending); ++i)
  1942. if (vcpu->irq_pending[i])
  1943. __set_bit(i, &vcpu->irq_summary);
  1944. } else {
  1945. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  1946. pending_vec = find_first_bit(
  1947. (const unsigned long *)sregs->interrupt_bitmap,
  1948. max_bits);
  1949. /* Only pending external irq is handled here */
  1950. if (pending_vec < max_bits) {
  1951. kvm_x86_ops->set_irq(vcpu, pending_vec);
  1952. pr_debug("Set back pending irq %d\n",
  1953. pending_vec);
  1954. }
  1955. }
  1956. set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  1957. set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  1958. set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  1959. set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  1960. set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  1961. set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  1962. set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  1963. set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  1964. vcpu_put(vcpu);
  1965. return 0;
  1966. }
  1967. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  1968. struct kvm_debug_guest *dbg)
  1969. {
  1970. int r;
  1971. vcpu_load(vcpu);
  1972. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  1973. vcpu_put(vcpu);
  1974. return r;
  1975. }
  1976. /*
  1977. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  1978. * we have asm/x86/processor.h
  1979. */
  1980. struct fxsave {
  1981. u16 cwd;
  1982. u16 swd;
  1983. u16 twd;
  1984. u16 fop;
  1985. u64 rip;
  1986. u64 rdp;
  1987. u32 mxcsr;
  1988. u32 mxcsr_mask;
  1989. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  1990. #ifdef CONFIG_X86_64
  1991. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  1992. #else
  1993. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  1994. #endif
  1995. };
  1996. /*
  1997. * Translate a guest virtual address to a guest physical address.
  1998. */
  1999. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  2000. struct kvm_translation *tr)
  2001. {
  2002. unsigned long vaddr = tr->linear_address;
  2003. gpa_t gpa;
  2004. vcpu_load(vcpu);
  2005. mutex_lock(&vcpu->kvm->lock);
  2006. gpa = vcpu->mmu.gva_to_gpa(vcpu, vaddr);
  2007. tr->physical_address = gpa;
  2008. tr->valid = gpa != UNMAPPED_GVA;
  2009. tr->writeable = 1;
  2010. tr->usermode = 0;
  2011. mutex_unlock(&vcpu->kvm->lock);
  2012. vcpu_put(vcpu);
  2013. return 0;
  2014. }
  2015. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2016. {
  2017. struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
  2018. vcpu_load(vcpu);
  2019. memcpy(fpu->fpr, fxsave->st_space, 128);
  2020. fpu->fcw = fxsave->cwd;
  2021. fpu->fsw = fxsave->swd;
  2022. fpu->ftwx = fxsave->twd;
  2023. fpu->last_opcode = fxsave->fop;
  2024. fpu->last_ip = fxsave->rip;
  2025. fpu->last_dp = fxsave->rdp;
  2026. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  2027. vcpu_put(vcpu);
  2028. return 0;
  2029. }
  2030. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2031. {
  2032. struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image;
  2033. vcpu_load(vcpu);
  2034. memcpy(fxsave->st_space, fpu->fpr, 128);
  2035. fxsave->cwd = fpu->fcw;
  2036. fxsave->swd = fpu->fsw;
  2037. fxsave->twd = fpu->ftwx;
  2038. fxsave->fop = fpu->last_opcode;
  2039. fxsave->rip = fpu->last_ip;
  2040. fxsave->rdp = fpu->last_dp;
  2041. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  2042. vcpu_put(vcpu);
  2043. return 0;
  2044. }
  2045. void fx_init(struct kvm_vcpu *vcpu)
  2046. {
  2047. unsigned after_mxcsr_mask;
  2048. /* Initialize guest FPU by resetting ours and saving into guest's */
  2049. preempt_disable();
  2050. fx_save(&vcpu->host_fx_image);
  2051. fpu_init();
  2052. fx_save(&vcpu->guest_fx_image);
  2053. fx_restore(&vcpu->host_fx_image);
  2054. preempt_enable();
  2055. vcpu->cr0 |= X86_CR0_ET;
  2056. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  2057. vcpu->guest_fx_image.mxcsr = 0x1f80;
  2058. memset((void *)&vcpu->guest_fx_image + after_mxcsr_mask,
  2059. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  2060. }
  2061. EXPORT_SYMBOL_GPL(fx_init);
  2062. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  2063. {
  2064. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  2065. return;
  2066. vcpu->guest_fpu_loaded = 1;
  2067. fx_save(&vcpu->host_fx_image);
  2068. fx_restore(&vcpu->guest_fx_image);
  2069. }
  2070. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  2071. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  2072. {
  2073. if (!vcpu->guest_fpu_loaded)
  2074. return;
  2075. vcpu->guest_fpu_loaded = 0;
  2076. fx_save(&vcpu->guest_fx_image);
  2077. fx_restore(&vcpu->host_fx_image);
  2078. ++vcpu->stat.fpu_reload;
  2079. }
  2080. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  2081. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  2082. {
  2083. kvm_x86_ops->vcpu_free(vcpu);
  2084. }
  2085. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  2086. unsigned int id)
  2087. {
  2088. int r;
  2089. struct kvm_vcpu *vcpu = kvm_x86_ops->vcpu_create(kvm, id);
  2090. if (IS_ERR(vcpu)) {
  2091. r = -ENOMEM;
  2092. goto fail;
  2093. }
  2094. /* We do fxsave: this must be aligned. */
  2095. BUG_ON((unsigned long)&vcpu->host_fx_image & 0xF);
  2096. vcpu_load(vcpu);
  2097. r = kvm_arch_vcpu_reset(vcpu);
  2098. if (r == 0)
  2099. r = kvm_mmu_setup(vcpu);
  2100. vcpu_put(vcpu);
  2101. if (r < 0)
  2102. goto free_vcpu;
  2103. return vcpu;
  2104. free_vcpu:
  2105. kvm_x86_ops->vcpu_free(vcpu);
  2106. fail:
  2107. return ERR_PTR(r);
  2108. }
  2109. void kvm_arch_vcpu_destory(struct kvm_vcpu *vcpu)
  2110. {
  2111. vcpu_load(vcpu);
  2112. kvm_mmu_unload(vcpu);
  2113. vcpu_put(vcpu);
  2114. kvm_x86_ops->vcpu_free(vcpu);
  2115. }
  2116. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  2117. {
  2118. return kvm_x86_ops->vcpu_reset(vcpu);
  2119. }
  2120. void kvm_arch_hardware_enable(void *garbage)
  2121. {
  2122. kvm_x86_ops->hardware_enable(garbage);
  2123. }
  2124. void kvm_arch_hardware_disable(void *garbage)
  2125. {
  2126. kvm_x86_ops->hardware_disable(garbage);
  2127. }
  2128. int kvm_arch_hardware_setup(void)
  2129. {
  2130. return kvm_x86_ops->hardware_setup();
  2131. }
  2132. void kvm_arch_hardware_unsetup(void)
  2133. {
  2134. kvm_x86_ops->hardware_unsetup();
  2135. }
  2136. void kvm_arch_check_processor_compat(void *rtn)
  2137. {
  2138. kvm_x86_ops->check_processor_compatibility(rtn);
  2139. }
  2140. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  2141. {
  2142. struct page *page;
  2143. struct kvm *kvm;
  2144. int r;
  2145. BUG_ON(vcpu->kvm == NULL);
  2146. kvm = vcpu->kvm;
  2147. vcpu->mmu.root_hpa = INVALID_PAGE;
  2148. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  2149. vcpu->mp_state = VCPU_MP_STATE_RUNNABLE;
  2150. else
  2151. vcpu->mp_state = VCPU_MP_STATE_UNINITIALIZED;
  2152. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  2153. if (!page) {
  2154. r = -ENOMEM;
  2155. goto fail;
  2156. }
  2157. vcpu->pio_data = page_address(page);
  2158. r = kvm_mmu_create(vcpu);
  2159. if (r < 0)
  2160. goto fail_free_pio_data;
  2161. if (irqchip_in_kernel(kvm)) {
  2162. r = kvm_create_lapic(vcpu);
  2163. if (r < 0)
  2164. goto fail_mmu_destroy;
  2165. }
  2166. return 0;
  2167. fail_mmu_destroy:
  2168. kvm_mmu_destroy(vcpu);
  2169. fail_free_pio_data:
  2170. free_page((unsigned long)vcpu->pio_data);
  2171. fail:
  2172. return r;
  2173. }
  2174. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  2175. {
  2176. kvm_free_lapic(vcpu);
  2177. kvm_mmu_destroy(vcpu);
  2178. free_page((unsigned long)vcpu->pio_data);
  2179. }
  2180. struct kvm *kvm_arch_create_vm(void)
  2181. {
  2182. struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
  2183. if (!kvm)
  2184. return ERR_PTR(-ENOMEM);
  2185. INIT_LIST_HEAD(&kvm->active_mmu_pages);
  2186. return kvm;
  2187. }
  2188. static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
  2189. {
  2190. vcpu_load(vcpu);
  2191. kvm_mmu_unload(vcpu);
  2192. vcpu_put(vcpu);
  2193. }
  2194. static void kvm_free_vcpus(struct kvm *kvm)
  2195. {
  2196. unsigned int i;
  2197. /*
  2198. * Unpin any mmu pages first.
  2199. */
  2200. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  2201. if (kvm->vcpus[i])
  2202. kvm_unload_vcpu_mmu(kvm->vcpus[i]);
  2203. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  2204. if (kvm->vcpus[i]) {
  2205. kvm_arch_vcpu_free(kvm->vcpus[i]);
  2206. kvm->vcpus[i] = NULL;
  2207. }
  2208. }
  2209. }
  2210. void kvm_arch_destroy_vm(struct kvm *kvm)
  2211. {
  2212. kfree(kvm->vpic);
  2213. kfree(kvm->vioapic);
  2214. kvm_free_vcpus(kvm);
  2215. kvm_free_physmem(kvm);
  2216. kfree(kvm);
  2217. }