ux500_pcm.c 4.7 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2012
  3. *
  4. * Author: Ola Lilja <ola.o.lilja@stericsson.com>,
  5. * Roger Nilsson <roger.xr.nilsson@stericsson.com>
  6. * for ST-Ericsson.
  7. *
  8. * License terms:
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as published
  12. * by the Free Software Foundation.
  13. */
  14. #include <asm/page.h>
  15. #include <linux/module.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/dmaengine.h>
  18. #include <linux/slab.h>
  19. #include <linux/platform_data/dma-ste-dma40.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include <sound/dmaengine_pcm.h>
  24. #include "ux500_msp_i2s.h"
  25. #include "ux500_pcm.h"
  26. #define UX500_PLATFORM_MIN_RATE 8000
  27. #define UX500_PLATFORM_MAX_RATE 48000
  28. #define UX500_PLATFORM_MIN_CHANNELS 1
  29. #define UX500_PLATFORM_MAX_CHANNELS 8
  30. #define UX500_PLATFORM_PERIODS_BYTES_MIN 128
  31. #define UX500_PLATFORM_PERIODS_BYTES_MAX (64 * PAGE_SIZE)
  32. #define UX500_PLATFORM_PERIODS_MIN 2
  33. #define UX500_PLATFORM_PERIODS_MAX 48
  34. #define UX500_PLATFORM_BUFFER_BYTES_MAX (2048 * PAGE_SIZE)
  35. static const struct snd_pcm_hardware ux500_pcm_hw = {
  36. .info = SNDRV_PCM_INFO_INTERLEAVED |
  37. SNDRV_PCM_INFO_MMAP |
  38. SNDRV_PCM_INFO_RESUME |
  39. SNDRV_PCM_INFO_PAUSE,
  40. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  41. SNDRV_PCM_FMTBIT_U16_LE |
  42. SNDRV_PCM_FMTBIT_S16_BE |
  43. SNDRV_PCM_FMTBIT_U16_BE,
  44. .rates = SNDRV_PCM_RATE_KNOT,
  45. .rate_min = UX500_PLATFORM_MIN_RATE,
  46. .rate_max = UX500_PLATFORM_MAX_RATE,
  47. .channels_min = UX500_PLATFORM_MIN_CHANNELS,
  48. .channels_max = UX500_PLATFORM_MAX_CHANNELS,
  49. .buffer_bytes_max = UX500_PLATFORM_BUFFER_BYTES_MAX,
  50. .period_bytes_min = UX500_PLATFORM_PERIODS_BYTES_MIN,
  51. .period_bytes_max = UX500_PLATFORM_PERIODS_BYTES_MAX,
  52. .periods_min = UX500_PLATFORM_PERIODS_MIN,
  53. .periods_max = UX500_PLATFORM_PERIODS_MAX,
  54. };
  55. static struct dma_chan *ux500_pcm_request_chan(struct snd_soc_pcm_runtime *rtd,
  56. struct snd_pcm_substream *substream)
  57. {
  58. struct snd_soc_dai *dai = rtd->cpu_dai;
  59. struct device *dev = dai->dev;
  60. u16 per_data_width, mem_data_width;
  61. struct stedma40_chan_cfg *dma_cfg;
  62. struct ux500_msp_dma_params *dma_params;
  63. dev_dbg(dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
  64. snd_pcm_stream_str(substream));
  65. dma_params = snd_soc_dai_get_dma_data(dai, substream);
  66. dma_cfg = dma_params->dma_cfg;
  67. mem_data_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  68. switch (dma_params->data_size) {
  69. case 32:
  70. per_data_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  71. break;
  72. case 16:
  73. per_data_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  74. break;
  75. case 8:
  76. per_data_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  77. break;
  78. default:
  79. per_data_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  80. }
  81. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  82. dma_cfg->src_info.data_width = mem_data_width;
  83. dma_cfg->dst_info.data_width = per_data_width;
  84. } else {
  85. dma_cfg->src_info.data_width = per_data_width;
  86. dma_cfg->dst_info.data_width = mem_data_width;
  87. }
  88. return snd_dmaengine_pcm_request_channel(stedma40_filter, dma_cfg);
  89. }
  90. static int ux500_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
  91. struct snd_pcm_hw_params *params,
  92. struct dma_slave_config *slave_config)
  93. {
  94. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  95. struct ux500_msp_dma_params *dma_params;
  96. struct stedma40_chan_cfg *dma_cfg;
  97. int ret;
  98. dma_params = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  99. dma_cfg = dma_params->dma_cfg;
  100. ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config);
  101. if (ret)
  102. return ret;
  103. slave_config->dst_maxburst = 4;
  104. slave_config->dst_addr_width = dma_cfg->dst_info.data_width;
  105. slave_config->src_maxburst = 4;
  106. slave_config->src_addr_width = dma_cfg->src_info.data_width;
  107. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  108. slave_config->dst_addr = dma_params->tx_rx_addr;
  109. else
  110. slave_config->src_addr = dma_params->tx_rx_addr;
  111. return 0;
  112. }
  113. static const struct snd_dmaengine_pcm_config ux500_dmaengine_pcm_config = {
  114. .pcm_hardware = &ux500_pcm_hw,
  115. .compat_request_channel = ux500_pcm_request_chan,
  116. .prealloc_buffer_size = 128 * 1024,
  117. .prepare_slave_config = ux500_pcm_prepare_slave_config,
  118. };
  119. int ux500_pcm_register_platform(struct platform_device *pdev)
  120. {
  121. int ret;
  122. ret = snd_dmaengine_pcm_register(&pdev->dev,
  123. &ux500_dmaengine_pcm_config,
  124. SND_DMAENGINE_PCM_FLAG_NO_RESIDUE |
  125. SND_DMAENGINE_PCM_FLAG_COMPAT |
  126. SND_DMAENGINE_PCM_FLAG_NO_DT);
  127. if (ret < 0) {
  128. dev_err(&pdev->dev,
  129. "%s: ERROR: Failed to register platform '%s' (%d)!\n",
  130. __func__, pdev->name, ret);
  131. return ret;
  132. }
  133. return 0;
  134. }
  135. EXPORT_SYMBOL_GPL(ux500_pcm_register_platform);
  136. int ux500_pcm_unregister_platform(struct platform_device *pdev)
  137. {
  138. snd_dmaengine_pcm_unregister(&pdev->dev);
  139. return 0;
  140. }
  141. EXPORT_SYMBOL_GPL(ux500_pcm_unregister_platform);