ssi.c 16 KB

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  1. /*
  2. * Renesas R-Car SSIU/SSI support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * Based on fsi.c
  8. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/delay.h>
  15. #include "rsnd.h"
  16. #define RSND_SSI_NAME_SIZE 16
  17. /*
  18. * SSICR
  19. */
  20. #define FORCE (1 << 31) /* Fixed */
  21. #define DMEN (1 << 28) /* DMA Enable */
  22. #define UIEN (1 << 27) /* Underflow Interrupt Enable */
  23. #define OIEN (1 << 26) /* Overflow Interrupt Enable */
  24. #define IIEN (1 << 25) /* Idle Mode Interrupt Enable */
  25. #define DIEN (1 << 24) /* Data Interrupt Enable */
  26. #define DWL_8 (0 << 19) /* Data Word Length */
  27. #define DWL_16 (1 << 19) /* Data Word Length */
  28. #define DWL_18 (2 << 19) /* Data Word Length */
  29. #define DWL_20 (3 << 19) /* Data Word Length */
  30. #define DWL_22 (4 << 19) /* Data Word Length */
  31. #define DWL_24 (5 << 19) /* Data Word Length */
  32. #define DWL_32 (6 << 19) /* Data Word Length */
  33. #define SWL_32 (3 << 16) /* R/W System Word Length */
  34. #define SCKD (1 << 15) /* Serial Bit Clock Direction */
  35. #define SWSD (1 << 14) /* Serial WS Direction */
  36. #define SCKP (1 << 13) /* Serial Bit Clock Polarity */
  37. #define SWSP (1 << 12) /* Serial WS Polarity */
  38. #define SDTA (1 << 10) /* Serial Data Alignment */
  39. #define DEL (1 << 8) /* Serial Data Delay */
  40. #define CKDV(v) (v << 4) /* Serial Clock Division Ratio */
  41. #define TRMD (1 << 1) /* Transmit/Receive Mode Select */
  42. #define EN (1 << 0) /* SSI Module Enable */
  43. /*
  44. * SSISR
  45. */
  46. #define UIRQ (1 << 27) /* Underflow Error Interrupt Status */
  47. #define OIRQ (1 << 26) /* Overflow Error Interrupt Status */
  48. #define IIRQ (1 << 25) /* Idle Mode Interrupt Status */
  49. #define DIRQ (1 << 24) /* Data Interrupt Status Flag */
  50. /*
  51. * SSIWSR
  52. */
  53. #define CONT (1 << 8) /* WS Continue Function */
  54. struct rsnd_ssi {
  55. struct clk *clk;
  56. struct rsnd_ssi_platform_info *info; /* rcar_snd.h */
  57. struct rsnd_ssi *parent;
  58. struct rsnd_mod mod;
  59. struct rsnd_dai *rdai;
  60. struct rsnd_dai_stream *io;
  61. u32 cr_own;
  62. u32 cr_clk;
  63. u32 cr_etc;
  64. int err;
  65. int dma_offset;
  66. unsigned int usrcnt;
  67. unsigned int rate;
  68. };
  69. struct rsnd_ssiu {
  70. u32 ssi_mode0;
  71. u32 ssi_mode1;
  72. int ssi_nr;
  73. struct rsnd_ssi *ssi;
  74. };
  75. #define for_each_rsnd_ssi(pos, priv, i) \
  76. for (i = 0; \
  77. (i < rsnd_ssi_nr(priv)) && \
  78. ((pos) = ((struct rsnd_ssiu *)((priv)->ssiu))->ssi + i); \
  79. i++)
  80. #define rsnd_ssi_nr(priv) (((struct rsnd_ssiu *)((priv)->ssiu))->ssi_nr)
  81. #define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod)
  82. #define rsnd_dma_to_ssi(dma) rsnd_mod_to_ssi(rsnd_dma_to_mod(dma))
  83. #define rsnd_ssi_pio_available(ssi) ((ssi)->info->pio_irq > 0)
  84. #define rsnd_ssi_dma_available(ssi) \
  85. rsnd_dma_available(rsnd_mod_to_dma(&(ssi)->mod))
  86. #define rsnd_ssi_clk_from_parent(ssi) ((ssi)->parent)
  87. #define rsnd_rdai_is_clk_master(rdai) ((rdai)->clk_master)
  88. #define rsnd_ssi_mode_flags(p) ((p)->info->flags)
  89. #define rsnd_ssi_dai_id(ssi) ((ssi)->info->dai_id)
  90. #define rsnd_ssi_to_ssiu(ssi)\
  91. (((struct rsnd_ssiu *)((ssi) - rsnd_mod_id(&(ssi)->mod))) - 1)
  92. static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
  93. struct rsnd_ssiu *ssiu)
  94. {
  95. struct device *dev = rsnd_priv_to_dev(priv);
  96. struct rsnd_ssi *ssi;
  97. u32 flags;
  98. u32 val;
  99. int i;
  100. /*
  101. * SSI_MODE0
  102. */
  103. ssiu->ssi_mode0 = 0;
  104. for_each_rsnd_ssi(ssi, priv, i) {
  105. flags = rsnd_ssi_mode_flags(ssi);
  106. /* see also BUSIF_MODE */
  107. if (!(flags & RSND_SSI_DEPENDENT)) {
  108. ssiu->ssi_mode0 |= (1 << i);
  109. dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", i);
  110. } else {
  111. dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", i);
  112. }
  113. }
  114. /*
  115. * SSI_MODE1
  116. */
  117. #define ssi_parent_set(p, sync, adg, ext) \
  118. do { \
  119. ssi->parent = ssiu->ssi + p; \
  120. if (flags & RSND_SSI_CLK_FROM_ADG) \
  121. val = adg; \
  122. else \
  123. val = ext; \
  124. if (flags & RSND_SSI_SYNC) \
  125. val |= sync; \
  126. } while (0)
  127. ssiu->ssi_mode1 = 0;
  128. for_each_rsnd_ssi(ssi, priv, i) {
  129. flags = rsnd_ssi_mode_flags(ssi);
  130. if (!(flags & RSND_SSI_CLK_PIN_SHARE))
  131. continue;
  132. val = 0;
  133. switch (i) {
  134. case 1:
  135. ssi_parent_set(0, (1 << 4), (0x2 << 0), (0x1 << 0));
  136. break;
  137. case 2:
  138. ssi_parent_set(0, (1 << 4), (0x2 << 2), (0x1 << 2));
  139. break;
  140. case 4:
  141. ssi_parent_set(3, (1 << 20), (0x2 << 16), (0x1 << 16));
  142. break;
  143. case 8:
  144. ssi_parent_set(7, 0, 0, 0);
  145. break;
  146. }
  147. ssiu->ssi_mode1 |= val;
  148. }
  149. }
  150. static void rsnd_ssi_mode_set(struct rsnd_ssi *ssi)
  151. {
  152. struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi);
  153. rsnd_mod_write(&ssi->mod, SSI_MODE0, ssiu->ssi_mode0);
  154. rsnd_mod_write(&ssi->mod, SSI_MODE1, ssiu->ssi_mode1);
  155. }
  156. static void rsnd_ssi_status_check(struct rsnd_mod *mod,
  157. u32 bit)
  158. {
  159. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  160. struct device *dev = rsnd_priv_to_dev(priv);
  161. u32 status;
  162. int i;
  163. for (i = 0; i < 1024; i++) {
  164. status = rsnd_mod_read(mod, SSISR);
  165. if (status & bit)
  166. return;
  167. udelay(50);
  168. }
  169. dev_warn(dev, "status check failed\n");
  170. }
  171. static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi,
  172. unsigned int rate)
  173. {
  174. struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
  175. struct device *dev = rsnd_priv_to_dev(priv);
  176. int i, j, ret;
  177. int adg_clk_div_table[] = {
  178. 1, 6, /* see adg.c */
  179. };
  180. int ssi_clk_mul_table[] = {
  181. 1, 2, 4, 8, 16, 6, 12,
  182. };
  183. unsigned int main_rate;
  184. /*
  185. * Find best clock, and try to start ADG
  186. */
  187. for (i = 0; i < ARRAY_SIZE(adg_clk_div_table); i++) {
  188. for (j = 0; j < ARRAY_SIZE(ssi_clk_mul_table); j++) {
  189. /*
  190. * this driver is assuming that
  191. * system word is 64fs (= 2 x 32bit)
  192. * see rsnd_ssi_start()
  193. */
  194. main_rate = rate / adg_clk_div_table[i]
  195. * 32 * 2 * ssi_clk_mul_table[j];
  196. ret = rsnd_adg_ssi_clk_try_start(&ssi->mod, main_rate);
  197. if (0 == ret) {
  198. ssi->rate = rate;
  199. ssi->cr_clk = FORCE | SWL_32 |
  200. SCKD | SWSD | CKDV(j);
  201. dev_dbg(dev, "ssi%d outputs %u Hz\n",
  202. rsnd_mod_id(&ssi->mod), rate);
  203. return 0;
  204. }
  205. }
  206. }
  207. dev_err(dev, "unsupported clock rate\n");
  208. return -EIO;
  209. }
  210. static void rsnd_ssi_master_clk_stop(struct rsnd_ssi *ssi)
  211. {
  212. ssi->rate = 0;
  213. ssi->cr_clk = 0;
  214. rsnd_adg_ssi_clk_stop(&ssi->mod);
  215. }
  216. static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi,
  217. struct rsnd_dai *rdai,
  218. struct rsnd_dai_stream *io)
  219. {
  220. struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
  221. struct device *dev = rsnd_priv_to_dev(priv);
  222. u32 cr;
  223. if (0 == ssi->usrcnt) {
  224. clk_enable(ssi->clk);
  225. if (rsnd_rdai_is_clk_master(rdai)) {
  226. struct snd_pcm_runtime *runtime;
  227. runtime = rsnd_io_to_runtime(io);
  228. if (rsnd_ssi_clk_from_parent(ssi))
  229. rsnd_ssi_hw_start(ssi->parent, rdai, io);
  230. else
  231. rsnd_ssi_master_clk_start(ssi, runtime->rate);
  232. }
  233. }
  234. cr = ssi->cr_own |
  235. ssi->cr_clk |
  236. ssi->cr_etc |
  237. EN;
  238. rsnd_mod_write(&ssi->mod, SSICR, cr);
  239. ssi->usrcnt++;
  240. dev_dbg(dev, "ssi%d hw started\n", rsnd_mod_id(&ssi->mod));
  241. }
  242. static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
  243. struct rsnd_dai *rdai)
  244. {
  245. struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
  246. struct device *dev = rsnd_priv_to_dev(priv);
  247. u32 cr;
  248. if (0 == ssi->usrcnt) /* stop might be called without start */
  249. return;
  250. ssi->usrcnt--;
  251. if (0 == ssi->usrcnt) {
  252. /*
  253. * disable all IRQ,
  254. * and, wait all data was sent
  255. */
  256. cr = ssi->cr_own |
  257. ssi->cr_clk;
  258. rsnd_mod_write(&ssi->mod, SSICR, cr | EN);
  259. rsnd_ssi_status_check(&ssi->mod, DIRQ);
  260. /*
  261. * disable SSI,
  262. * and, wait idle state
  263. */
  264. rsnd_mod_write(&ssi->mod, SSICR, cr); /* disabled all */
  265. rsnd_ssi_status_check(&ssi->mod, IIRQ);
  266. if (rsnd_rdai_is_clk_master(rdai)) {
  267. if (rsnd_ssi_clk_from_parent(ssi))
  268. rsnd_ssi_hw_stop(ssi->parent, rdai);
  269. else
  270. rsnd_ssi_master_clk_stop(ssi);
  271. }
  272. clk_disable(ssi->clk);
  273. }
  274. dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod));
  275. }
  276. /*
  277. * SSI mod common functions
  278. */
  279. static int rsnd_ssi_init(struct rsnd_mod *mod,
  280. struct rsnd_dai *rdai,
  281. struct rsnd_dai_stream *io)
  282. {
  283. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  284. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  285. struct device *dev = rsnd_priv_to_dev(priv);
  286. struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
  287. u32 cr;
  288. cr = FORCE;
  289. /*
  290. * always use 32bit system word for easy clock calculation.
  291. * see also rsnd_ssi_master_clk_enable()
  292. */
  293. cr |= SWL_32;
  294. /*
  295. * init clock settings for SSICR
  296. */
  297. switch (runtime->sample_bits) {
  298. case 16:
  299. cr |= DWL_16;
  300. break;
  301. case 32:
  302. cr |= DWL_24;
  303. break;
  304. default:
  305. return -EIO;
  306. }
  307. if (rdai->bit_clk_inv)
  308. cr |= SCKP;
  309. if (rdai->frm_clk_inv)
  310. cr |= SWSP;
  311. if (rdai->data_alignment)
  312. cr |= SDTA;
  313. if (rdai->sys_delay)
  314. cr |= DEL;
  315. if (rsnd_dai_is_play(rdai, io))
  316. cr |= TRMD;
  317. /*
  318. * set ssi parameter
  319. */
  320. ssi->rdai = rdai;
  321. ssi->io = io;
  322. ssi->cr_own = cr;
  323. ssi->err = -1; /* ignore 1st error */
  324. rsnd_ssi_mode_set(ssi);
  325. dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  326. return 0;
  327. }
  328. static int rsnd_ssi_quit(struct rsnd_mod *mod,
  329. struct rsnd_dai *rdai,
  330. struct rsnd_dai_stream *io)
  331. {
  332. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  333. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  334. struct device *dev = rsnd_priv_to_dev(priv);
  335. dev_dbg(dev, "%s.%d quit\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  336. if (ssi->err > 0)
  337. dev_warn(dev, "ssi under/over flow err = %d\n", ssi->err);
  338. ssi->rdai = NULL;
  339. ssi->io = NULL;
  340. ssi->cr_own = 0;
  341. ssi->err = 0;
  342. return 0;
  343. }
  344. static void rsnd_ssi_record_error(struct rsnd_ssi *ssi, u32 status)
  345. {
  346. /* under/over flow error */
  347. if (status & (UIRQ | OIRQ)) {
  348. ssi->err++;
  349. /* clear error status */
  350. rsnd_mod_write(&ssi->mod, SSISR, 0);
  351. }
  352. }
  353. /*
  354. * SSI PIO
  355. */
  356. static irqreturn_t rsnd_ssi_pio_interrupt(int irq, void *data)
  357. {
  358. struct rsnd_ssi *ssi = data;
  359. struct rsnd_dai_stream *io = ssi->io;
  360. u32 status = rsnd_mod_read(&ssi->mod, SSISR);
  361. irqreturn_t ret = IRQ_NONE;
  362. if (io && (status & DIRQ)) {
  363. struct rsnd_dai *rdai = ssi->rdai;
  364. struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
  365. u32 *buf = (u32 *)(runtime->dma_area +
  366. rsnd_dai_pointer_offset(io, 0));
  367. rsnd_ssi_record_error(ssi, status);
  368. /*
  369. * 8/16/32 data can be assesse to TDR/RDR register
  370. * directly as 32bit data
  371. * see rsnd_ssi_init()
  372. */
  373. if (rsnd_dai_is_play(rdai, io))
  374. rsnd_mod_write(&ssi->mod, SSITDR, *buf);
  375. else
  376. *buf = rsnd_mod_read(&ssi->mod, SSIRDR);
  377. rsnd_dai_pointer_update(io, sizeof(*buf));
  378. ret = IRQ_HANDLED;
  379. }
  380. return ret;
  381. }
  382. static int rsnd_ssi_pio_start(struct rsnd_mod *mod,
  383. struct rsnd_dai *rdai,
  384. struct rsnd_dai_stream *io)
  385. {
  386. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  387. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  388. struct device *dev = rsnd_priv_to_dev(priv);
  389. /* enable PIO IRQ */
  390. ssi->cr_etc = UIEN | OIEN | DIEN;
  391. rsnd_ssi_hw_start(ssi, rdai, io);
  392. dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  393. return 0;
  394. }
  395. static int rsnd_ssi_pio_stop(struct rsnd_mod *mod,
  396. struct rsnd_dai *rdai,
  397. struct rsnd_dai_stream *io)
  398. {
  399. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  400. struct device *dev = rsnd_priv_to_dev(priv);
  401. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  402. dev_dbg(dev, "%s.%d stop\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
  403. ssi->cr_etc = 0;
  404. rsnd_ssi_hw_stop(ssi, rdai);
  405. return 0;
  406. }
  407. static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
  408. .name = "ssi (pio)",
  409. .init = rsnd_ssi_init,
  410. .quit = rsnd_ssi_quit,
  411. .start = rsnd_ssi_pio_start,
  412. .stop = rsnd_ssi_pio_stop,
  413. };
  414. static int rsnd_ssi_dma_inquiry(struct rsnd_dma *dma, dma_addr_t *buf, int *len)
  415. {
  416. struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma);
  417. struct rsnd_dai_stream *io = ssi->io;
  418. struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
  419. *len = io->byte_per_period;
  420. *buf = runtime->dma_addr +
  421. rsnd_dai_pointer_offset(io, ssi->dma_offset + *len);
  422. ssi->dma_offset = *len; /* it cares A/B plane */
  423. return 0;
  424. }
  425. static int rsnd_ssi_dma_complete(struct rsnd_dma *dma)
  426. {
  427. struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma);
  428. struct rsnd_dai_stream *io = ssi->io;
  429. u32 status = rsnd_mod_read(&ssi->mod, SSISR);
  430. rsnd_ssi_record_error(ssi, status);
  431. rsnd_dai_pointer_update(ssi->io, io->byte_per_period);
  432. return 0;
  433. }
  434. static int rsnd_ssi_dma_start(struct rsnd_mod *mod,
  435. struct rsnd_dai *rdai,
  436. struct rsnd_dai_stream *io)
  437. {
  438. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  439. struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
  440. /* enable DMA transfer */
  441. ssi->cr_etc = DMEN;
  442. ssi->dma_offset = 0;
  443. rsnd_dma_start(dma);
  444. rsnd_ssi_hw_start(ssi, ssi->rdai, io);
  445. /* enable WS continue */
  446. if (rsnd_rdai_is_clk_master(rdai))
  447. rsnd_mod_write(&ssi->mod, SSIWSR, CONT);
  448. return 0;
  449. }
  450. static int rsnd_ssi_dma_stop(struct rsnd_mod *mod,
  451. struct rsnd_dai *rdai,
  452. struct rsnd_dai_stream *io)
  453. {
  454. struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
  455. struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
  456. ssi->cr_etc = 0;
  457. rsnd_ssi_hw_stop(ssi, rdai);
  458. rsnd_dma_stop(dma);
  459. return 0;
  460. }
  461. static struct rsnd_mod_ops rsnd_ssi_dma_ops = {
  462. .name = "ssi (dma)",
  463. .init = rsnd_ssi_init,
  464. .quit = rsnd_ssi_quit,
  465. .start = rsnd_ssi_dma_start,
  466. .stop = rsnd_ssi_dma_stop,
  467. };
  468. /*
  469. * Non SSI
  470. */
  471. static int rsnd_ssi_non(struct rsnd_mod *mod,
  472. struct rsnd_dai *rdai,
  473. struct rsnd_dai_stream *io)
  474. {
  475. struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
  476. struct device *dev = rsnd_priv_to_dev(priv);
  477. dev_dbg(dev, "%s\n", __func__);
  478. return 0;
  479. }
  480. static struct rsnd_mod_ops rsnd_ssi_non_ops = {
  481. .name = "ssi (non)",
  482. .init = rsnd_ssi_non,
  483. .quit = rsnd_ssi_non,
  484. .start = rsnd_ssi_non,
  485. .stop = rsnd_ssi_non,
  486. };
  487. /*
  488. * ssi mod function
  489. */
  490. struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
  491. int dai_id, int is_play)
  492. {
  493. struct rsnd_ssi *ssi;
  494. int i, has_play;
  495. is_play = !!is_play;
  496. for_each_rsnd_ssi(ssi, priv, i) {
  497. if (rsnd_ssi_dai_id(ssi) != dai_id)
  498. continue;
  499. has_play = !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY);
  500. if (is_play == has_play)
  501. return &ssi->mod;
  502. }
  503. return NULL;
  504. }
  505. struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
  506. {
  507. BUG_ON(id < 0 || id >= rsnd_ssi_nr(priv));
  508. return &(((struct rsnd_ssiu *)(priv->ssiu))->ssi + id)->mod;
  509. }
  510. int rsnd_ssi_probe(struct platform_device *pdev,
  511. struct rcar_snd_info *info,
  512. struct rsnd_priv *priv)
  513. {
  514. struct rsnd_ssi_platform_info *pinfo;
  515. struct device *dev = rsnd_priv_to_dev(priv);
  516. struct rsnd_mod_ops *ops;
  517. struct clk *clk;
  518. struct rsnd_ssiu *ssiu;
  519. struct rsnd_ssi *ssi;
  520. char name[RSND_SSI_NAME_SIZE];
  521. int i, nr, ret;
  522. /*
  523. * init SSI
  524. */
  525. nr = info->ssi_info_nr;
  526. ssiu = devm_kzalloc(dev, sizeof(*ssiu) + (sizeof(*ssi) * nr),
  527. GFP_KERNEL);
  528. if (!ssiu) {
  529. dev_err(dev, "SSI allocate failed\n");
  530. return -ENOMEM;
  531. }
  532. priv->ssiu = ssiu;
  533. ssiu->ssi = (struct rsnd_ssi *)(ssiu + 1);
  534. ssiu->ssi_nr = nr;
  535. for_each_rsnd_ssi(ssi, priv, i) {
  536. pinfo = &info->ssi_info[i];
  537. snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i);
  538. clk = clk_get(dev, name);
  539. if (IS_ERR(clk))
  540. return PTR_ERR(clk);
  541. ssi->info = pinfo;
  542. ssi->clk = clk;
  543. ops = &rsnd_ssi_non_ops;
  544. /*
  545. * SSI DMA case
  546. */
  547. if (pinfo->dma_id > 0) {
  548. ret = rsnd_dma_init(
  549. priv, rsnd_mod_to_dma(&ssi->mod),
  550. (rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY),
  551. pinfo->dma_id,
  552. rsnd_ssi_dma_inquiry,
  553. rsnd_ssi_dma_complete);
  554. if (ret < 0)
  555. dev_info(dev, "SSI DMA failed. try PIO transter\n");
  556. else
  557. ops = &rsnd_ssi_dma_ops;
  558. dev_dbg(dev, "SSI%d use DMA transfer\n", i);
  559. }
  560. /*
  561. * SSI PIO case
  562. */
  563. if (!rsnd_ssi_dma_available(ssi) &&
  564. rsnd_ssi_pio_available(ssi)) {
  565. ret = devm_request_irq(dev, pinfo->pio_irq,
  566. &rsnd_ssi_pio_interrupt,
  567. IRQF_SHARED,
  568. dev_name(dev), ssi);
  569. if (ret) {
  570. dev_err(dev, "SSI request interrupt failed\n");
  571. return ret;
  572. }
  573. ops = &rsnd_ssi_pio_ops;
  574. dev_dbg(dev, "SSI%d use PIO transfer\n", i);
  575. }
  576. rsnd_mod_init(priv, &ssi->mod, ops, i);
  577. }
  578. rsnd_ssi_mode_init(priv, ssiu);
  579. dev_dbg(dev, "ssi probed\n");
  580. return 0;
  581. }
  582. void rsnd_ssi_remove(struct platform_device *pdev,
  583. struct rsnd_priv *priv)
  584. {
  585. struct rsnd_ssi *ssi;
  586. int i;
  587. for_each_rsnd_ssi(ssi, priv, i) {
  588. clk_put(ssi->clk);
  589. if (rsnd_ssi_dma_available(ssi))
  590. rsnd_dma_quit(priv, rsnd_mod_to_dma(&ssi->mod));
  591. }
  592. }