imx-pcm-fiq.c 9.7 KB

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  1. /*
  2. * imx-pcm-fiq.c -- ALSA Soc Audio Layer
  3. *
  4. * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
  5. *
  6. * This code is based on code copyrighted by Freescale,
  7. * Liam Girdwood, Javier Martin and probably others.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/delay.h>
  16. #include <linux/device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/init.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <sound/core.h>
  24. #include <sound/dmaengine_pcm.h>
  25. #include <sound/initval.h>
  26. #include <sound/pcm.h>
  27. #include <sound/pcm_params.h>
  28. #include <sound/soc.h>
  29. #include <asm/fiq.h>
  30. #include <linux/platform_data/asoc-imx-ssi.h>
  31. #include "imx-ssi.h"
  32. #include "imx-pcm.h"
  33. struct imx_pcm_runtime_data {
  34. unsigned int period;
  35. int periods;
  36. unsigned long offset;
  37. unsigned long last_offset;
  38. unsigned long size;
  39. struct hrtimer hrt;
  40. int poll_time_ns;
  41. struct snd_pcm_substream *substream;
  42. atomic_t running;
  43. };
  44. static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt)
  45. {
  46. struct imx_pcm_runtime_data *iprtd =
  47. container_of(hrt, struct imx_pcm_runtime_data, hrt);
  48. struct snd_pcm_substream *substream = iprtd->substream;
  49. struct snd_pcm_runtime *runtime = substream->runtime;
  50. struct pt_regs regs;
  51. unsigned long delta;
  52. if (!atomic_read(&iprtd->running))
  53. return HRTIMER_NORESTART;
  54. get_fiq_regs(&regs);
  55. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  56. iprtd->offset = regs.ARM_r8 & 0xffff;
  57. else
  58. iprtd->offset = regs.ARM_r9 & 0xffff;
  59. /* How much data have we transferred since the last period report? */
  60. if (iprtd->offset >= iprtd->last_offset)
  61. delta = iprtd->offset - iprtd->last_offset;
  62. else
  63. delta = runtime->buffer_size + iprtd->offset
  64. - iprtd->last_offset;
  65. /* If we've transferred at least a period then report it and
  66. * reset our poll time */
  67. if (delta >= iprtd->period) {
  68. snd_pcm_period_elapsed(substream);
  69. iprtd->last_offset = iprtd->offset;
  70. }
  71. hrtimer_forward_now(hrt, ns_to_ktime(iprtd->poll_time_ns));
  72. return HRTIMER_RESTART;
  73. }
  74. static struct fiq_handler fh = {
  75. .name = DRV_NAME,
  76. };
  77. static int snd_imx_pcm_hw_params(struct snd_pcm_substream *substream,
  78. struct snd_pcm_hw_params *params)
  79. {
  80. struct snd_pcm_runtime *runtime = substream->runtime;
  81. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  82. iprtd->size = params_buffer_bytes(params);
  83. iprtd->periods = params_periods(params);
  84. iprtd->period = params_period_bytes(params) ;
  85. iprtd->offset = 0;
  86. iprtd->last_offset = 0;
  87. iprtd->poll_time_ns = 1000000000 / params_rate(params) *
  88. params_period_size(params);
  89. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  90. return 0;
  91. }
  92. static int snd_imx_pcm_prepare(struct snd_pcm_substream *substream)
  93. {
  94. struct snd_pcm_runtime *runtime = substream->runtime;
  95. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  96. struct pt_regs regs;
  97. get_fiq_regs(&regs);
  98. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  99. regs.ARM_r8 = (iprtd->period * iprtd->periods - 1) << 16;
  100. else
  101. regs.ARM_r9 = (iprtd->period * iprtd->periods - 1) << 16;
  102. set_fiq_regs(&regs);
  103. return 0;
  104. }
  105. static int fiq_enable;
  106. static int imx_pcm_fiq;
  107. static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  108. {
  109. struct snd_pcm_runtime *runtime = substream->runtime;
  110. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  111. switch (cmd) {
  112. case SNDRV_PCM_TRIGGER_START:
  113. case SNDRV_PCM_TRIGGER_RESUME:
  114. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  115. atomic_set(&iprtd->running, 1);
  116. hrtimer_start(&iprtd->hrt, ns_to_ktime(iprtd->poll_time_ns),
  117. HRTIMER_MODE_REL);
  118. if (++fiq_enable == 1)
  119. enable_fiq(imx_pcm_fiq);
  120. break;
  121. case SNDRV_PCM_TRIGGER_STOP:
  122. case SNDRV_PCM_TRIGGER_SUSPEND:
  123. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  124. atomic_set(&iprtd->running, 0);
  125. if (--fiq_enable == 0)
  126. disable_fiq(imx_pcm_fiq);
  127. break;
  128. default:
  129. return -EINVAL;
  130. }
  131. return 0;
  132. }
  133. static snd_pcm_uframes_t snd_imx_pcm_pointer(struct snd_pcm_substream *substream)
  134. {
  135. struct snd_pcm_runtime *runtime = substream->runtime;
  136. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  137. return bytes_to_frames(substream->runtime, iprtd->offset);
  138. }
  139. static struct snd_pcm_hardware snd_imx_hardware = {
  140. .info = SNDRV_PCM_INFO_INTERLEAVED |
  141. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  142. SNDRV_PCM_INFO_MMAP |
  143. SNDRV_PCM_INFO_MMAP_VALID |
  144. SNDRV_PCM_INFO_PAUSE |
  145. SNDRV_PCM_INFO_RESUME,
  146. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  147. .rate_min = 8000,
  148. .channels_min = 2,
  149. .channels_max = 2,
  150. .buffer_bytes_max = IMX_SSI_DMABUF_SIZE,
  151. .period_bytes_min = 128,
  152. .period_bytes_max = 16 * 1024,
  153. .periods_min = 4,
  154. .periods_max = 255,
  155. .fifo_size = 0,
  156. };
  157. static int snd_imx_open(struct snd_pcm_substream *substream)
  158. {
  159. struct snd_pcm_runtime *runtime = substream->runtime;
  160. struct imx_pcm_runtime_data *iprtd;
  161. int ret;
  162. iprtd = kzalloc(sizeof(*iprtd), GFP_KERNEL);
  163. if (iprtd == NULL)
  164. return -ENOMEM;
  165. runtime->private_data = iprtd;
  166. iprtd->substream = substream;
  167. atomic_set(&iprtd->running, 0);
  168. hrtimer_init(&iprtd->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  169. iprtd->hrt.function = snd_hrtimer_callback;
  170. ret = snd_pcm_hw_constraint_integer(substream->runtime,
  171. SNDRV_PCM_HW_PARAM_PERIODS);
  172. if (ret < 0) {
  173. kfree(iprtd);
  174. return ret;
  175. }
  176. snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
  177. return 0;
  178. }
  179. static int snd_imx_close(struct snd_pcm_substream *substream)
  180. {
  181. struct snd_pcm_runtime *runtime = substream->runtime;
  182. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  183. hrtimer_cancel(&iprtd->hrt);
  184. kfree(iprtd);
  185. return 0;
  186. }
  187. static int snd_imx_pcm_mmap(struct snd_pcm_substream *substream,
  188. struct vm_area_struct *vma)
  189. {
  190. struct snd_pcm_runtime *runtime = substream->runtime;
  191. int ret;
  192. ret = dma_mmap_writecombine(substream->pcm->card->dev, vma,
  193. runtime->dma_area, runtime->dma_addr, runtime->dma_bytes);
  194. pr_debug("%s: ret: %d %p 0x%08x 0x%08x\n", __func__, ret,
  195. runtime->dma_area,
  196. runtime->dma_addr,
  197. runtime->dma_bytes);
  198. return ret;
  199. }
  200. static struct snd_pcm_ops imx_pcm_ops = {
  201. .open = snd_imx_open,
  202. .close = snd_imx_close,
  203. .ioctl = snd_pcm_lib_ioctl,
  204. .hw_params = snd_imx_pcm_hw_params,
  205. .prepare = snd_imx_pcm_prepare,
  206. .trigger = snd_imx_pcm_trigger,
  207. .pointer = snd_imx_pcm_pointer,
  208. .mmap = snd_imx_pcm_mmap,
  209. };
  210. static int imx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
  211. {
  212. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  213. struct snd_dma_buffer *buf = &substream->dma_buffer;
  214. size_t size = IMX_SSI_DMABUF_SIZE;
  215. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  216. buf->dev.dev = pcm->card->dev;
  217. buf->private_data = NULL;
  218. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  219. &buf->addr, GFP_KERNEL);
  220. if (!buf->area)
  221. return -ENOMEM;
  222. buf->bytes = size;
  223. return 0;
  224. }
  225. static u64 imx_pcm_dmamask = DMA_BIT_MASK(32);
  226. static int imx_pcm_new(struct snd_soc_pcm_runtime *rtd)
  227. {
  228. struct snd_card *card = rtd->card->snd_card;
  229. struct snd_pcm *pcm = rtd->pcm;
  230. int ret = 0;
  231. if (!card->dev->dma_mask)
  232. card->dev->dma_mask = &imx_pcm_dmamask;
  233. if (!card->dev->coherent_dma_mask)
  234. card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  235. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  236. ret = imx_pcm_preallocate_dma_buffer(pcm,
  237. SNDRV_PCM_STREAM_PLAYBACK);
  238. if (ret)
  239. goto out;
  240. }
  241. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  242. ret = imx_pcm_preallocate_dma_buffer(pcm,
  243. SNDRV_PCM_STREAM_CAPTURE);
  244. if (ret)
  245. goto out;
  246. }
  247. out:
  248. return ret;
  249. }
  250. static int ssi_irq = 0;
  251. static int imx_pcm_fiq_new(struct snd_soc_pcm_runtime *rtd)
  252. {
  253. struct snd_pcm *pcm = rtd->pcm;
  254. struct snd_pcm_substream *substream;
  255. int ret;
  256. ret = imx_pcm_new(rtd);
  257. if (ret)
  258. return ret;
  259. substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  260. if (substream) {
  261. struct snd_dma_buffer *buf = &substream->dma_buffer;
  262. imx_ssi_fiq_tx_buffer = (unsigned long)buf->area;
  263. }
  264. substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
  265. if (substream) {
  266. struct snd_dma_buffer *buf = &substream->dma_buffer;
  267. imx_ssi_fiq_rx_buffer = (unsigned long)buf->area;
  268. }
  269. set_fiq_handler(&imx_ssi_fiq_start,
  270. &imx_ssi_fiq_end - &imx_ssi_fiq_start);
  271. return 0;
  272. }
  273. static void imx_pcm_free(struct snd_pcm *pcm)
  274. {
  275. struct snd_pcm_substream *substream;
  276. struct snd_dma_buffer *buf;
  277. int stream;
  278. for (stream = 0; stream < 2; stream++) {
  279. substream = pcm->streams[stream].substream;
  280. if (!substream)
  281. continue;
  282. buf = &substream->dma_buffer;
  283. if (!buf->area)
  284. continue;
  285. dma_free_writecombine(pcm->card->dev, buf->bytes,
  286. buf->area, buf->addr);
  287. buf->area = NULL;
  288. }
  289. }
  290. static void imx_pcm_fiq_free(struct snd_pcm *pcm)
  291. {
  292. mxc_set_irq_fiq(ssi_irq, 0);
  293. release_fiq(&fh);
  294. imx_pcm_free(pcm);
  295. }
  296. static struct snd_soc_platform_driver imx_soc_platform_fiq = {
  297. .ops = &imx_pcm_ops,
  298. .pcm_new = imx_pcm_fiq_new,
  299. .pcm_free = imx_pcm_fiq_free,
  300. };
  301. int imx_pcm_fiq_init(struct platform_device *pdev,
  302. struct imx_pcm_fiq_params *params)
  303. {
  304. int ret;
  305. ret = claim_fiq(&fh);
  306. if (ret) {
  307. dev_err(&pdev->dev, "failed to claim fiq: %d", ret);
  308. return ret;
  309. }
  310. mxc_set_irq_fiq(params->irq, 1);
  311. ssi_irq = params->irq;
  312. imx_pcm_fiq = params->irq;
  313. imx_ssi_fiq_base = (unsigned long)params->base;
  314. params->dma_params_tx->maxburst = 4;
  315. params->dma_params_rx->maxburst = 6;
  316. ret = snd_soc_register_platform(&pdev->dev, &imx_soc_platform_fiq);
  317. if (ret)
  318. goto failed_register;
  319. return 0;
  320. failed_register:
  321. mxc_set_irq_fiq(ssi_irq, 0);
  322. release_fiq(&fh);
  323. return ret;
  324. }
  325. EXPORT_SYMBOL_GPL(imx_pcm_fiq_init);
  326. void imx_pcm_fiq_exit(struct platform_device *pdev)
  327. {
  328. snd_soc_unregister_platform(&pdev->dev);
  329. }
  330. EXPORT_SYMBOL_GPL(imx_pcm_fiq_exit);
  331. MODULE_LICENSE("GPL");