davinci-pcm.c 26 KB

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  1. /*
  2. * ALSA PCM interface for the TI DAVINCI processor
  3. *
  4. * Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
  5. * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
  6. * added SRAM ping/pong (C) 2008 Troy Kisky <troy.kisky@boundarydevices.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/kernel.h>
  18. #include <linux/genalloc.h>
  19. #include <linux/platform_data/edma.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/pcm_params.h>
  23. #include <sound/soc.h>
  24. #include <asm/dma.h>
  25. #include "davinci-pcm.h"
  26. #ifdef DEBUG
  27. static void print_buf_info(int slot, char *name)
  28. {
  29. struct edmacc_param p;
  30. if (slot < 0)
  31. return;
  32. edma_read_slot(slot, &p);
  33. printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
  34. name, slot, p.opt, p.src, p.a_b_cnt, p.dst);
  35. printk(KERN_DEBUG " src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x ccnt=%x\n",
  36. p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
  37. }
  38. #else
  39. static void print_buf_info(int slot, char *name)
  40. {
  41. }
  42. #endif
  43. #define DAVINCI_PCM_FMTBITS (\
  44. SNDRV_PCM_FMTBIT_S8 |\
  45. SNDRV_PCM_FMTBIT_U8 |\
  46. SNDRV_PCM_FMTBIT_S16_LE |\
  47. SNDRV_PCM_FMTBIT_S16_BE |\
  48. SNDRV_PCM_FMTBIT_U16_LE |\
  49. SNDRV_PCM_FMTBIT_U16_BE |\
  50. SNDRV_PCM_FMTBIT_S24_LE |\
  51. SNDRV_PCM_FMTBIT_S24_BE |\
  52. SNDRV_PCM_FMTBIT_U24_LE |\
  53. SNDRV_PCM_FMTBIT_U24_BE |\
  54. SNDRV_PCM_FMTBIT_S32_LE |\
  55. SNDRV_PCM_FMTBIT_S32_BE |\
  56. SNDRV_PCM_FMTBIT_U32_LE |\
  57. SNDRV_PCM_FMTBIT_U32_BE)
  58. static struct snd_pcm_hardware pcm_hardware_playback = {
  59. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  60. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  61. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME|
  62. SNDRV_PCM_INFO_BATCH),
  63. .formats = DAVINCI_PCM_FMTBITS,
  64. .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT,
  65. .rate_min = 8000,
  66. .rate_max = 192000,
  67. .channels_min = 2,
  68. .channels_max = 384,
  69. .buffer_bytes_max = 128 * 1024,
  70. .period_bytes_min = 32,
  71. .period_bytes_max = 8 * 1024,
  72. .periods_min = 16,
  73. .periods_max = 255,
  74. .fifo_size = 0,
  75. };
  76. static struct snd_pcm_hardware pcm_hardware_capture = {
  77. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  78. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  79. SNDRV_PCM_INFO_PAUSE |
  80. SNDRV_PCM_INFO_BATCH),
  81. .formats = DAVINCI_PCM_FMTBITS,
  82. .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT,
  83. .rate_min = 8000,
  84. .rate_max = 192000,
  85. .channels_min = 2,
  86. .channels_max = 384,
  87. .buffer_bytes_max = 128 * 1024,
  88. .period_bytes_min = 32,
  89. .period_bytes_max = 8 * 1024,
  90. .periods_min = 16,
  91. .periods_max = 255,
  92. .fifo_size = 0,
  93. };
  94. /*
  95. * How ping/pong works....
  96. *
  97. * Playback:
  98. * ram_params - copys 2*ping_size from start of SDRAM to iram,
  99. * links to ram_link2
  100. * ram_link2 - copys rest of SDRAM to iram in ping_size units,
  101. * links to ram_link
  102. * ram_link - copys entire SDRAM to iram in ping_size uints,
  103. * links to self
  104. *
  105. * asp_params - same as asp_link[0]
  106. * asp_link[0] - copys from lower half of iram to asp port
  107. * links to asp_link[1], triggers iram copy event on completion
  108. * asp_link[1] - copys from upper half of iram to asp port
  109. * links to asp_link[0], triggers iram copy event on completion
  110. * triggers interrupt only needed to let upper SOC levels update position
  111. * in stream on completion
  112. *
  113. * When playback is started:
  114. * ram_params started
  115. * asp_params started
  116. *
  117. * Capture:
  118. * ram_params - same as ram_link,
  119. * links to ram_link
  120. * ram_link - same as playback
  121. * links to self
  122. *
  123. * asp_params - same as playback
  124. * asp_link[0] - same as playback
  125. * asp_link[1] - same as playback
  126. *
  127. * When capture is started:
  128. * asp_params started
  129. */
  130. struct davinci_runtime_data {
  131. spinlock_t lock;
  132. int period; /* current DMA period */
  133. int asp_channel; /* Master DMA channel */
  134. int asp_link[2]; /* asp parameter link channel, ping/pong */
  135. struct davinci_pcm_dma_params *params; /* DMA params */
  136. int ram_channel;
  137. int ram_link;
  138. int ram_link2;
  139. struct edmacc_param asp_params;
  140. struct edmacc_param ram_params;
  141. };
  142. static void davinci_pcm_period_elapsed(struct snd_pcm_substream *substream)
  143. {
  144. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  145. struct snd_pcm_runtime *runtime = substream->runtime;
  146. prtd->period++;
  147. if (unlikely(prtd->period >= runtime->periods))
  148. prtd->period = 0;
  149. }
  150. static void davinci_pcm_period_reset(struct snd_pcm_substream *substream)
  151. {
  152. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  153. prtd->period = 0;
  154. }
  155. /*
  156. * Not used with ping/pong
  157. */
  158. static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
  159. {
  160. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  161. struct snd_pcm_runtime *runtime = substream->runtime;
  162. unsigned int period_size;
  163. unsigned int dma_offset;
  164. dma_addr_t dma_pos;
  165. dma_addr_t src, dst;
  166. unsigned short src_bidx, dst_bidx;
  167. unsigned short src_cidx, dst_cidx;
  168. unsigned int data_type;
  169. unsigned short acnt;
  170. unsigned int count;
  171. unsigned int fifo_level;
  172. period_size = snd_pcm_lib_period_bytes(substream);
  173. dma_offset = prtd->period * period_size;
  174. dma_pos = runtime->dma_addr + dma_offset;
  175. fifo_level = prtd->params->fifo_level;
  176. pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d "
  177. "dma_ptr = %x period_size=%x\n", prtd->asp_link[0], dma_pos,
  178. period_size);
  179. data_type = prtd->params->data_type;
  180. count = period_size / data_type;
  181. if (fifo_level)
  182. count /= fifo_level;
  183. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  184. src = dma_pos;
  185. dst = prtd->params->dma_addr;
  186. src_bidx = data_type;
  187. dst_bidx = 4;
  188. src_cidx = data_type * fifo_level;
  189. dst_cidx = 0;
  190. } else {
  191. src = prtd->params->dma_addr;
  192. dst = dma_pos;
  193. src_bidx = 0;
  194. dst_bidx = data_type;
  195. src_cidx = 0;
  196. dst_cidx = data_type * fifo_level;
  197. }
  198. acnt = prtd->params->acnt;
  199. edma_set_src(prtd->asp_link[0], src, INCR, W8BIT);
  200. edma_set_dest(prtd->asp_link[0], dst, INCR, W8BIT);
  201. edma_set_src_index(prtd->asp_link[0], src_bidx, src_cidx);
  202. edma_set_dest_index(prtd->asp_link[0], dst_bidx, dst_cidx);
  203. if (!fifo_level)
  204. edma_set_transfer_params(prtd->asp_link[0], acnt, count, 1, 0,
  205. ASYNC);
  206. else
  207. edma_set_transfer_params(prtd->asp_link[0], acnt,
  208. fifo_level,
  209. count, fifo_level,
  210. ABSYNC);
  211. }
  212. static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
  213. {
  214. struct snd_pcm_substream *substream = data;
  215. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  216. print_buf_info(prtd->ram_channel, "i ram_channel");
  217. pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
  218. if (unlikely(ch_status != DMA_COMPLETE))
  219. return;
  220. if (snd_pcm_running(substream)) {
  221. spin_lock(&prtd->lock);
  222. if (prtd->ram_channel < 0) {
  223. /* No ping/pong must fix up link dma data*/
  224. davinci_pcm_enqueue_dma(substream);
  225. }
  226. davinci_pcm_period_elapsed(substream);
  227. spin_unlock(&prtd->lock);
  228. snd_pcm_period_elapsed(substream);
  229. }
  230. }
  231. #ifdef CONFIG_GENERIC_ALLOCATOR
  232. static int allocate_sram(struct snd_pcm_substream *substream,
  233. struct gen_pool *sram_pool, unsigned size,
  234. struct snd_pcm_hardware *ppcm)
  235. {
  236. struct snd_dma_buffer *buf = &substream->dma_buffer;
  237. struct snd_dma_buffer *iram_dma = NULL;
  238. dma_addr_t iram_phys = 0;
  239. void *iram_virt = NULL;
  240. if (buf->private_data || !size)
  241. return 0;
  242. ppcm->period_bytes_max = size;
  243. iram_virt = (void *)gen_pool_alloc(sram_pool, size);
  244. if (!iram_virt)
  245. goto exit1;
  246. iram_phys = gen_pool_virt_to_phys(sram_pool, (unsigned)iram_virt);
  247. iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
  248. if (!iram_dma)
  249. goto exit2;
  250. iram_dma->area = iram_virt;
  251. iram_dma->addr = iram_phys;
  252. memset(iram_dma->area, 0, size);
  253. iram_dma->bytes = size;
  254. buf->private_data = iram_dma;
  255. return 0;
  256. exit2:
  257. if (iram_virt)
  258. gen_pool_free(sram_pool, (unsigned)iram_virt, size);
  259. exit1:
  260. return -ENOMEM;
  261. }
  262. static void davinci_free_sram(struct snd_pcm_substream *substream,
  263. struct snd_dma_buffer *iram_dma)
  264. {
  265. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  266. struct gen_pool *sram_pool = prtd->params->sram_pool;
  267. gen_pool_free(sram_pool, (unsigned) iram_dma->area, iram_dma->bytes);
  268. }
  269. #else
  270. static int allocate_sram(struct snd_pcm_substream *substream,
  271. struct gen_pool *sram_pool, unsigned size,
  272. struct snd_pcm_hardware *ppcm)
  273. {
  274. return 0;
  275. }
  276. static void davinci_free_sram(struct snd_pcm_substream *substream,
  277. struct snd_dma_buffer *iram_dma)
  278. {
  279. }
  280. #endif
  281. /*
  282. * Only used with ping/pong.
  283. * This is called after runtime->dma_addr, period_bytes and data_type are valid
  284. */
  285. static int ping_pong_dma_setup(struct snd_pcm_substream *substream)
  286. {
  287. unsigned short ram_src_cidx, ram_dst_cidx;
  288. struct snd_pcm_runtime *runtime = substream->runtime;
  289. struct davinci_runtime_data *prtd = runtime->private_data;
  290. struct snd_dma_buffer *iram_dma =
  291. (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  292. struct davinci_pcm_dma_params *params = prtd->params;
  293. unsigned int data_type = params->data_type;
  294. unsigned int acnt = params->acnt;
  295. /* divide by 2 for ping/pong */
  296. unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
  297. unsigned int fifo_level = prtd->params->fifo_level;
  298. unsigned int count;
  299. if ((data_type == 0) || (data_type > 4)) {
  300. printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
  301. return -EINVAL;
  302. }
  303. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  304. dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
  305. ram_src_cidx = ping_size;
  306. ram_dst_cidx = -ping_size;
  307. edma_set_src(prtd->asp_link[1], asp_src_pong, INCR, W8BIT);
  308. edma_set_src_index(prtd->asp_link[0], data_type,
  309. data_type * fifo_level);
  310. edma_set_src_index(prtd->asp_link[1], data_type,
  311. data_type * fifo_level);
  312. edma_set_src(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  313. } else {
  314. dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
  315. ram_src_cidx = -ping_size;
  316. ram_dst_cidx = ping_size;
  317. edma_set_dest(prtd->asp_link[1], asp_dst_pong, INCR, W8BIT);
  318. edma_set_dest_index(prtd->asp_link[0], data_type,
  319. data_type * fifo_level);
  320. edma_set_dest_index(prtd->asp_link[1], data_type,
  321. data_type * fifo_level);
  322. edma_set_dest(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  323. }
  324. if (!fifo_level) {
  325. count = ping_size / data_type;
  326. edma_set_transfer_params(prtd->asp_link[0], acnt, count,
  327. 1, 0, ASYNC);
  328. edma_set_transfer_params(prtd->asp_link[1], acnt, count,
  329. 1, 0, ASYNC);
  330. } else {
  331. count = ping_size / (data_type * fifo_level);
  332. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  333. count, fifo_level, ABSYNC);
  334. edma_set_transfer_params(prtd->asp_link[1], acnt, fifo_level,
  335. count, fifo_level, ABSYNC);
  336. }
  337. edma_set_src_index(prtd->ram_link, ping_size, ram_src_cidx);
  338. edma_set_dest_index(prtd->ram_link, ping_size, ram_dst_cidx);
  339. edma_set_transfer_params(prtd->ram_link, ping_size, 2,
  340. runtime->periods, 2, ASYNC);
  341. /* init master params */
  342. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  343. edma_read_slot(prtd->ram_link, &prtd->ram_params);
  344. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  345. struct edmacc_param p_ram;
  346. /* Copy entire iram buffer before playback started */
  347. prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
  348. /* 0 dst_bidx */
  349. prtd->ram_params.src_dst_bidx = (ping_size << 1);
  350. /* 0 dst_cidx */
  351. prtd->ram_params.src_dst_cidx = (ping_size << 1);
  352. prtd->ram_params.ccnt = 1;
  353. /* Skip 1st period */
  354. edma_read_slot(prtd->ram_link, &p_ram);
  355. p_ram.src += (ping_size << 1);
  356. p_ram.ccnt -= 1;
  357. edma_write_slot(prtd->ram_link2, &p_ram);
  358. /*
  359. * When 1st started, ram -> iram dma channel will fill the
  360. * entire iram. Then, whenever a ping/pong asp buffer finishes,
  361. * 1/2 iram will be filled.
  362. */
  363. prtd->ram_params.link_bcntrld =
  364. EDMA_CHAN_SLOT(prtd->ram_link2) << 5;
  365. }
  366. return 0;
  367. }
  368. /* 1 asp tx or rx channel using 2 parameter channels
  369. * 1 ram to/from iram channel using 1 parameter channel
  370. *
  371. * Playback
  372. * ram copy channel kicks off first,
  373. * 1st ram copy of entire iram buffer completion kicks off asp channel
  374. * asp tcc always kicks off ram copy of 1/2 iram buffer
  375. *
  376. * Record
  377. * asp channel starts, tcc kicks off ram copy
  378. */
  379. static int request_ping_pong(struct snd_pcm_substream *substream,
  380. struct davinci_runtime_data *prtd,
  381. struct snd_dma_buffer *iram_dma)
  382. {
  383. dma_addr_t asp_src_ping;
  384. dma_addr_t asp_dst_ping;
  385. int ret;
  386. struct davinci_pcm_dma_params *params = prtd->params;
  387. /* Request ram master channel */
  388. ret = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
  389. davinci_pcm_dma_irq, substream,
  390. prtd->params->ram_chan_q);
  391. if (ret < 0)
  392. goto exit1;
  393. /* Request ram link channel */
  394. ret = prtd->ram_link = edma_alloc_slot(
  395. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  396. if (ret < 0)
  397. goto exit2;
  398. ret = prtd->asp_link[1] = edma_alloc_slot(
  399. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  400. if (ret < 0)
  401. goto exit3;
  402. prtd->ram_link2 = -1;
  403. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  404. ret = prtd->ram_link2 = edma_alloc_slot(
  405. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  406. if (ret < 0)
  407. goto exit4;
  408. }
  409. /* circle ping-pong buffers */
  410. edma_link(prtd->asp_link[0], prtd->asp_link[1]);
  411. edma_link(prtd->asp_link[1], prtd->asp_link[0]);
  412. /* circle ram buffers */
  413. edma_link(prtd->ram_link, prtd->ram_link);
  414. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  415. asp_src_ping = iram_dma->addr;
  416. asp_dst_ping = params->dma_addr; /* fifo */
  417. } else {
  418. asp_src_ping = params->dma_addr; /* fifo */
  419. asp_dst_ping = iram_dma->addr;
  420. }
  421. /* ping */
  422. edma_set_src(prtd->asp_link[0], asp_src_ping, INCR, W16BIT);
  423. edma_set_dest(prtd->asp_link[0], asp_dst_ping, INCR, W16BIT);
  424. edma_set_src_index(prtd->asp_link[0], 0, 0);
  425. edma_set_dest_index(prtd->asp_link[0], 0, 0);
  426. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  427. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f) | TCINTEN);
  428. prtd->asp_params.opt |= TCCHEN |
  429. EDMA_TCC(prtd->ram_channel & 0x3f);
  430. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  431. /* pong */
  432. edma_set_src(prtd->asp_link[1], asp_src_ping, INCR, W16BIT);
  433. edma_set_dest(prtd->asp_link[1], asp_dst_ping, INCR, W16BIT);
  434. edma_set_src_index(prtd->asp_link[1], 0, 0);
  435. edma_set_dest_index(prtd->asp_link[1], 0, 0);
  436. edma_read_slot(prtd->asp_link[1], &prtd->asp_params);
  437. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f));
  438. /* interrupt after every pong completion */
  439. prtd->asp_params.opt |= TCINTEN | TCCHEN |
  440. EDMA_TCC(prtd->ram_channel & 0x3f);
  441. edma_write_slot(prtd->asp_link[1], &prtd->asp_params);
  442. /* ram */
  443. edma_set_src(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  444. edma_set_dest(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  445. pr_debug("%s: audio dma channels/slots in use for ram:%u %u %u,"
  446. "for asp:%u %u %u\n", __func__,
  447. prtd->ram_channel, prtd->ram_link, prtd->ram_link2,
  448. prtd->asp_channel, prtd->asp_link[0],
  449. prtd->asp_link[1]);
  450. return 0;
  451. exit4:
  452. edma_free_channel(prtd->asp_link[1]);
  453. prtd->asp_link[1] = -1;
  454. exit3:
  455. edma_free_channel(prtd->ram_link);
  456. prtd->ram_link = -1;
  457. exit2:
  458. edma_free_channel(prtd->ram_channel);
  459. prtd->ram_channel = -1;
  460. exit1:
  461. return ret;
  462. }
  463. static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
  464. {
  465. struct snd_dma_buffer *iram_dma;
  466. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  467. struct davinci_pcm_dma_params *params = prtd->params;
  468. int ret;
  469. if (!params)
  470. return -ENODEV;
  471. /* Request asp master DMA channel */
  472. ret = prtd->asp_channel = edma_alloc_channel(params->channel,
  473. davinci_pcm_dma_irq, substream,
  474. prtd->params->asp_chan_q);
  475. if (ret < 0)
  476. goto exit1;
  477. /* Request asp link channels */
  478. ret = prtd->asp_link[0] = edma_alloc_slot(
  479. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  480. if (ret < 0)
  481. goto exit2;
  482. iram_dma = (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  483. if (iram_dma) {
  484. if (request_ping_pong(substream, prtd, iram_dma) == 0)
  485. return 0;
  486. printk(KERN_WARNING "%s: dma channel allocation failed,"
  487. "not using sram\n", __func__);
  488. }
  489. /* Issue transfer completion IRQ when the channel completes a
  490. * transfer, then always reload from the same slot (by a kind
  491. * of loopback link). The completion IRQ handler will update
  492. * the reload slot with a new buffer.
  493. *
  494. * REVISIT save p_ram here after setting up everything except
  495. * the buffer and its length (ccnt) ... use it as a template
  496. * so davinci_pcm_enqueue_dma() takes less time in IRQ.
  497. */
  498. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  499. prtd->asp_params.opt |= TCINTEN |
  500. EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel));
  501. prtd->asp_params.link_bcntrld = EDMA_CHAN_SLOT(prtd->asp_link[0]) << 5;
  502. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  503. return 0;
  504. exit2:
  505. edma_free_channel(prtd->asp_channel);
  506. prtd->asp_channel = -1;
  507. exit1:
  508. return ret;
  509. }
  510. static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  511. {
  512. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  513. int ret = 0;
  514. spin_lock(&prtd->lock);
  515. switch (cmd) {
  516. case SNDRV_PCM_TRIGGER_START:
  517. edma_start(prtd->asp_channel);
  518. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  519. prtd->ram_channel >= 0) {
  520. /* copy 1st iram buffer */
  521. edma_start(prtd->ram_channel);
  522. }
  523. break;
  524. case SNDRV_PCM_TRIGGER_RESUME:
  525. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  526. edma_resume(prtd->asp_channel);
  527. break;
  528. case SNDRV_PCM_TRIGGER_STOP:
  529. case SNDRV_PCM_TRIGGER_SUSPEND:
  530. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  531. edma_pause(prtd->asp_channel);
  532. break;
  533. default:
  534. ret = -EINVAL;
  535. break;
  536. }
  537. spin_unlock(&prtd->lock);
  538. return ret;
  539. }
  540. static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
  541. {
  542. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  543. davinci_pcm_period_reset(substream);
  544. if (prtd->ram_channel >= 0) {
  545. int ret = ping_pong_dma_setup(substream);
  546. if (ret < 0)
  547. return ret;
  548. edma_write_slot(prtd->ram_channel, &prtd->ram_params);
  549. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  550. print_buf_info(prtd->ram_channel, "ram_channel");
  551. print_buf_info(prtd->ram_link, "ram_link");
  552. print_buf_info(prtd->ram_link2, "ram_link2");
  553. print_buf_info(prtd->asp_channel, "asp_channel");
  554. print_buf_info(prtd->asp_link[0], "asp_link[0]");
  555. print_buf_info(prtd->asp_link[1], "asp_link[1]");
  556. /*
  557. * There is a phase offset of 2 periods between the position
  558. * used by dma setup and the position reported in the pointer
  559. * function.
  560. *
  561. * The phase offset, when not using ping-pong buffers, is due to
  562. * the two consecutive calls to davinci_pcm_enqueue_dma() below.
  563. *
  564. * Whereas here, with ping-pong buffers, the phase is due to
  565. * there being an entire buffer transfer complete before the
  566. * first dma completion event triggers davinci_pcm_dma_irq().
  567. */
  568. davinci_pcm_period_elapsed(substream);
  569. davinci_pcm_period_elapsed(substream);
  570. return 0;
  571. }
  572. davinci_pcm_enqueue_dma(substream);
  573. davinci_pcm_period_elapsed(substream);
  574. /* Copy self-linked parameter RAM entry into master channel */
  575. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  576. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  577. davinci_pcm_enqueue_dma(substream);
  578. davinci_pcm_period_elapsed(substream);
  579. return 0;
  580. }
  581. static snd_pcm_uframes_t
  582. davinci_pcm_pointer(struct snd_pcm_substream *substream)
  583. {
  584. struct snd_pcm_runtime *runtime = substream->runtime;
  585. struct davinci_runtime_data *prtd = runtime->private_data;
  586. unsigned int offset;
  587. int asp_count;
  588. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  589. /*
  590. * There is a phase offset of 2 periods between the position used by dma
  591. * setup and the position reported in the pointer function. Either +2 in
  592. * the dma setup or -2 here in the pointer function (with wrapping,
  593. * both) accounts for this offset -- choose the latter since it makes
  594. * the first-time setup clearer.
  595. */
  596. spin_lock(&prtd->lock);
  597. asp_count = prtd->period - 2;
  598. spin_unlock(&prtd->lock);
  599. if (asp_count < 0)
  600. asp_count += runtime->periods;
  601. asp_count *= period_size;
  602. offset = bytes_to_frames(runtime, asp_count);
  603. if (offset >= runtime->buffer_size)
  604. offset = 0;
  605. return offset;
  606. }
  607. static int davinci_pcm_open(struct snd_pcm_substream *substream)
  608. {
  609. struct snd_pcm_runtime *runtime = substream->runtime;
  610. struct davinci_runtime_data *prtd;
  611. struct snd_pcm_hardware *ppcm;
  612. int ret = 0;
  613. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  614. struct davinci_pcm_dma_params *pa;
  615. struct davinci_pcm_dma_params *params;
  616. pa = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  617. if (!pa)
  618. return -ENODEV;
  619. params = &pa[substream->stream];
  620. ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
  621. &pcm_hardware_playback : &pcm_hardware_capture;
  622. allocate_sram(substream, params->sram_pool, params->sram_size, ppcm);
  623. snd_soc_set_runtime_hwparams(substream, ppcm);
  624. /* ensure that buffer size is a multiple of period size */
  625. ret = snd_pcm_hw_constraint_integer(runtime,
  626. SNDRV_PCM_HW_PARAM_PERIODS);
  627. if (ret < 0)
  628. return ret;
  629. prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL);
  630. if (prtd == NULL)
  631. return -ENOMEM;
  632. spin_lock_init(&prtd->lock);
  633. prtd->params = params;
  634. prtd->asp_channel = -1;
  635. prtd->asp_link[0] = prtd->asp_link[1] = -1;
  636. prtd->ram_channel = -1;
  637. prtd->ram_link = -1;
  638. prtd->ram_link2 = -1;
  639. runtime->private_data = prtd;
  640. ret = davinci_pcm_dma_request(substream);
  641. if (ret) {
  642. printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n");
  643. kfree(prtd);
  644. }
  645. return ret;
  646. }
  647. static int davinci_pcm_close(struct snd_pcm_substream *substream)
  648. {
  649. struct snd_pcm_runtime *runtime = substream->runtime;
  650. struct davinci_runtime_data *prtd = runtime->private_data;
  651. if (prtd->ram_channel >= 0)
  652. edma_stop(prtd->ram_channel);
  653. if (prtd->asp_channel >= 0)
  654. edma_stop(prtd->asp_channel);
  655. if (prtd->asp_link[0] >= 0)
  656. edma_unlink(prtd->asp_link[0]);
  657. if (prtd->asp_link[1] >= 0)
  658. edma_unlink(prtd->asp_link[1]);
  659. if (prtd->ram_link >= 0)
  660. edma_unlink(prtd->ram_link);
  661. if (prtd->asp_link[0] >= 0)
  662. edma_free_slot(prtd->asp_link[0]);
  663. if (prtd->asp_link[1] >= 0)
  664. edma_free_slot(prtd->asp_link[1]);
  665. if (prtd->asp_channel >= 0)
  666. edma_free_channel(prtd->asp_channel);
  667. if (prtd->ram_link >= 0)
  668. edma_free_slot(prtd->ram_link);
  669. if (prtd->ram_link2 >= 0)
  670. edma_free_slot(prtd->ram_link2);
  671. if (prtd->ram_channel >= 0)
  672. edma_free_channel(prtd->ram_channel);
  673. kfree(prtd);
  674. return 0;
  675. }
  676. static int davinci_pcm_hw_params(struct snd_pcm_substream *substream,
  677. struct snd_pcm_hw_params *hw_params)
  678. {
  679. return snd_pcm_lib_malloc_pages(substream,
  680. params_buffer_bytes(hw_params));
  681. }
  682. static int davinci_pcm_hw_free(struct snd_pcm_substream *substream)
  683. {
  684. return snd_pcm_lib_free_pages(substream);
  685. }
  686. static int davinci_pcm_mmap(struct snd_pcm_substream *substream,
  687. struct vm_area_struct *vma)
  688. {
  689. struct snd_pcm_runtime *runtime = substream->runtime;
  690. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  691. runtime->dma_area,
  692. runtime->dma_addr,
  693. runtime->dma_bytes);
  694. }
  695. static struct snd_pcm_ops davinci_pcm_ops = {
  696. .open = davinci_pcm_open,
  697. .close = davinci_pcm_close,
  698. .ioctl = snd_pcm_lib_ioctl,
  699. .hw_params = davinci_pcm_hw_params,
  700. .hw_free = davinci_pcm_hw_free,
  701. .prepare = davinci_pcm_prepare,
  702. .trigger = davinci_pcm_trigger,
  703. .pointer = davinci_pcm_pointer,
  704. .mmap = davinci_pcm_mmap,
  705. };
  706. static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
  707. size_t size)
  708. {
  709. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  710. struct snd_dma_buffer *buf = &substream->dma_buffer;
  711. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  712. buf->dev.dev = pcm->card->dev;
  713. buf->private_data = NULL;
  714. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  715. &buf->addr, GFP_KERNEL);
  716. pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, "
  717. "size=%d\n", (void *) buf->area, (void *) buf->addr, size);
  718. if (!buf->area)
  719. return -ENOMEM;
  720. buf->bytes = size;
  721. return 0;
  722. }
  723. static void davinci_pcm_free(struct snd_pcm *pcm)
  724. {
  725. struct snd_pcm_substream *substream;
  726. struct snd_dma_buffer *buf;
  727. int stream;
  728. for (stream = 0; stream < 2; stream++) {
  729. struct snd_dma_buffer *iram_dma;
  730. substream = pcm->streams[stream].substream;
  731. if (!substream)
  732. continue;
  733. buf = &substream->dma_buffer;
  734. if (!buf->area)
  735. continue;
  736. dma_free_writecombine(pcm->card->dev, buf->bytes,
  737. buf->area, buf->addr);
  738. buf->area = NULL;
  739. iram_dma = buf->private_data;
  740. if (iram_dma) {
  741. davinci_free_sram(substream, iram_dma);
  742. kfree(iram_dma);
  743. }
  744. }
  745. }
  746. static u64 davinci_pcm_dmamask = DMA_BIT_MASK(32);
  747. static int davinci_pcm_new(struct snd_soc_pcm_runtime *rtd)
  748. {
  749. struct snd_card *card = rtd->card->snd_card;
  750. struct snd_pcm *pcm = rtd->pcm;
  751. int ret;
  752. if (!card->dev->dma_mask)
  753. card->dev->dma_mask = &davinci_pcm_dmamask;
  754. if (!card->dev->coherent_dma_mask)
  755. card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  756. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  757. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  758. SNDRV_PCM_STREAM_PLAYBACK,
  759. pcm_hardware_playback.buffer_bytes_max);
  760. if (ret)
  761. return ret;
  762. }
  763. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  764. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  765. SNDRV_PCM_STREAM_CAPTURE,
  766. pcm_hardware_capture.buffer_bytes_max);
  767. if (ret)
  768. return ret;
  769. }
  770. return 0;
  771. }
  772. static struct snd_soc_platform_driver davinci_soc_platform = {
  773. .ops = &davinci_pcm_ops,
  774. .pcm_new = davinci_pcm_new,
  775. .pcm_free = davinci_pcm_free,
  776. };
  777. int davinci_soc_platform_register(struct device *dev)
  778. {
  779. return snd_soc_register_platform(dev, &davinci_soc_platform);
  780. }
  781. EXPORT_SYMBOL_GPL(davinci_soc_platform_register);
  782. void davinci_soc_platform_unregister(struct device *dev)
  783. {
  784. snd_soc_unregister_platform(dev);
  785. }
  786. EXPORT_SYMBOL_GPL(davinci_soc_platform_unregister);
  787. MODULE_AUTHOR("Vladimir Barinov");
  788. MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
  789. MODULE_LICENSE("GPL");