patch_hdmi.c 76 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
  45. struct hdmi_spec_per_cvt {
  46. hda_nid_t cvt_nid;
  47. int assigned;
  48. unsigned int channels_min;
  49. unsigned int channels_max;
  50. u32 rates;
  51. u64 formats;
  52. unsigned int maxbps;
  53. };
  54. /* max. connections to a widget */
  55. #define HDA_MAX_CONNECTIONS 32
  56. struct hdmi_spec_per_pin {
  57. hda_nid_t pin_nid;
  58. int num_mux_nids;
  59. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  60. struct hda_codec *codec;
  61. struct hdmi_eld sink_eld;
  62. struct delayed_work work;
  63. struct snd_kcontrol *eld_ctl;
  64. int repoll_count;
  65. bool setup; /* the stream has been set up by prepare callback */
  66. int channels; /* current number of channels */
  67. bool non_pcm;
  68. bool chmap_set; /* channel-map override by ALSA API? */
  69. unsigned char chmap[8]; /* ALSA API channel-map */
  70. char pcm_name[8]; /* filled in build_pcm callbacks */
  71. };
  72. struct hdmi_spec {
  73. int num_cvts;
  74. struct snd_array cvts; /* struct hdmi_spec_per_cvt */
  75. hda_nid_t cvt_nids[4]; /* only for haswell fix */
  76. int num_pins;
  77. struct snd_array pins; /* struct hdmi_spec_per_pin */
  78. struct snd_array pcm_rec; /* struct hda_pcm */
  79. unsigned int channels_max; /* max over all cvts */
  80. struct hdmi_eld temp_eld;
  81. /*
  82. * Non-generic ATI/NVIDIA specific
  83. */
  84. struct hda_multi_out multiout;
  85. struct hda_pcm_stream pcm_playback;
  86. };
  87. struct hdmi_audio_infoframe {
  88. u8 type; /* 0x84 */
  89. u8 ver; /* 0x01 */
  90. u8 len; /* 0x0a */
  91. u8 checksum;
  92. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  93. u8 SS01_SF24;
  94. u8 CXT04;
  95. u8 CA;
  96. u8 LFEPBL01_LSV36_DM_INH7;
  97. };
  98. struct dp_audio_infoframe {
  99. u8 type; /* 0x84 */
  100. u8 len; /* 0x1b */
  101. u8 ver; /* 0x11 << 2 */
  102. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  103. u8 SS01_SF24;
  104. u8 CXT04;
  105. u8 CA;
  106. u8 LFEPBL01_LSV36_DM_INH7;
  107. };
  108. union audio_infoframe {
  109. struct hdmi_audio_infoframe hdmi;
  110. struct dp_audio_infoframe dp;
  111. u8 bytes[0];
  112. };
  113. /*
  114. * CEA speaker placement:
  115. *
  116. * FLH FCH FRH
  117. * FLW FL FLC FC FRC FR FRW
  118. *
  119. * LFE
  120. * TC
  121. *
  122. * RL RLC RC RRC RR
  123. *
  124. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  125. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  126. */
  127. enum cea_speaker_placement {
  128. FL = (1 << 0), /* Front Left */
  129. FC = (1 << 1), /* Front Center */
  130. FR = (1 << 2), /* Front Right */
  131. FLC = (1 << 3), /* Front Left Center */
  132. FRC = (1 << 4), /* Front Right Center */
  133. RL = (1 << 5), /* Rear Left */
  134. RC = (1 << 6), /* Rear Center */
  135. RR = (1 << 7), /* Rear Right */
  136. RLC = (1 << 8), /* Rear Left Center */
  137. RRC = (1 << 9), /* Rear Right Center */
  138. LFE = (1 << 10), /* Low Frequency Effect */
  139. FLW = (1 << 11), /* Front Left Wide */
  140. FRW = (1 << 12), /* Front Right Wide */
  141. FLH = (1 << 13), /* Front Left High */
  142. FCH = (1 << 14), /* Front Center High */
  143. FRH = (1 << 15), /* Front Right High */
  144. TC = (1 << 16), /* Top Center */
  145. };
  146. /*
  147. * ELD SA bits in the CEA Speaker Allocation data block
  148. */
  149. static int eld_speaker_allocation_bits[] = {
  150. [0] = FL | FR,
  151. [1] = LFE,
  152. [2] = FC,
  153. [3] = RL | RR,
  154. [4] = RC,
  155. [5] = FLC | FRC,
  156. [6] = RLC | RRC,
  157. /* the following are not defined in ELD yet */
  158. [7] = FLW | FRW,
  159. [8] = FLH | FRH,
  160. [9] = TC,
  161. [10] = FCH,
  162. };
  163. struct cea_channel_speaker_allocation {
  164. int ca_index;
  165. int speakers[8];
  166. /* derived values, just for convenience */
  167. int channels;
  168. int spk_mask;
  169. };
  170. /*
  171. * ALSA sequence is:
  172. *
  173. * surround40 surround41 surround50 surround51 surround71
  174. * ch0 front left = = = =
  175. * ch1 front right = = = =
  176. * ch2 rear left = = = =
  177. * ch3 rear right = = = =
  178. * ch4 LFE center center center
  179. * ch5 LFE LFE
  180. * ch6 side left
  181. * ch7 side right
  182. *
  183. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  184. */
  185. static int hdmi_channel_mapping[0x32][8] = {
  186. /* stereo */
  187. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  188. /* 2.1 */
  189. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  190. /* Dolby Surround */
  191. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  192. /* surround40 */
  193. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  194. /* 4ch */
  195. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  196. /* surround41 */
  197. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  198. /* surround50 */
  199. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  200. /* surround51 */
  201. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  202. /* 7.1 */
  203. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  204. };
  205. /*
  206. * This is an ordered list!
  207. *
  208. * The preceding ones have better chances to be selected by
  209. * hdmi_channel_allocation().
  210. */
  211. static struct cea_channel_speaker_allocation channel_allocations[] = {
  212. /* channel: 7 6 5 4 3 2 1 0 */
  213. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  214. /* 2.1 */
  215. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  216. /* Dolby Surround */
  217. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  218. /* surround40 */
  219. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  220. /* surround41 */
  221. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  222. /* surround50 */
  223. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  224. /* surround51 */
  225. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  226. /* 6.1 */
  227. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  228. /* surround71 */
  229. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  230. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  231. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  232. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  233. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  234. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  235. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  236. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  237. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  238. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  239. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  240. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  241. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  242. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  243. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  244. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  245. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  246. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  247. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  248. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  249. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  250. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  251. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  252. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  253. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  254. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  255. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  256. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  257. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  258. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  259. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  260. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  261. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  262. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  263. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  264. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  265. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  266. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  267. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  268. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  269. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  270. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  271. };
  272. /*
  273. * HDMI routines
  274. */
  275. #define get_pin(spec, idx) \
  276. ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
  277. #define get_cvt(spec, idx) \
  278. ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
  279. #define get_pcm_rec(spec, idx) \
  280. ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
  281. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  282. {
  283. int pin_idx;
  284. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  285. if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
  286. return pin_idx;
  287. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  288. return -EINVAL;
  289. }
  290. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  291. struct hda_pcm_stream *hinfo)
  292. {
  293. int pin_idx;
  294. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  295. if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
  296. return pin_idx;
  297. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  298. return -EINVAL;
  299. }
  300. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  301. {
  302. int cvt_idx;
  303. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  304. if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
  305. return cvt_idx;
  306. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  307. return -EINVAL;
  308. }
  309. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  310. struct snd_ctl_elem_info *uinfo)
  311. {
  312. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  313. struct hdmi_spec *spec = codec->spec;
  314. struct hdmi_eld *eld;
  315. int pin_idx;
  316. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  317. pin_idx = kcontrol->private_value;
  318. eld = &get_pin(spec, pin_idx)->sink_eld;
  319. mutex_lock(&eld->lock);
  320. uinfo->count = eld->eld_valid ? eld->eld_size : 0;
  321. mutex_unlock(&eld->lock);
  322. return 0;
  323. }
  324. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  325. struct snd_ctl_elem_value *ucontrol)
  326. {
  327. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  328. struct hdmi_spec *spec = codec->spec;
  329. struct hdmi_eld *eld;
  330. int pin_idx;
  331. pin_idx = kcontrol->private_value;
  332. eld = &get_pin(spec, pin_idx)->sink_eld;
  333. mutex_lock(&eld->lock);
  334. if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
  335. mutex_unlock(&eld->lock);
  336. snd_BUG();
  337. return -EINVAL;
  338. }
  339. memset(ucontrol->value.bytes.data, 0,
  340. ARRAY_SIZE(ucontrol->value.bytes.data));
  341. if (eld->eld_valid)
  342. memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
  343. eld->eld_size);
  344. mutex_unlock(&eld->lock);
  345. return 0;
  346. }
  347. static struct snd_kcontrol_new eld_bytes_ctl = {
  348. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  349. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  350. .name = "ELD",
  351. .info = hdmi_eld_ctl_info,
  352. .get = hdmi_eld_ctl_get,
  353. };
  354. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  355. int device)
  356. {
  357. struct snd_kcontrol *kctl;
  358. struct hdmi_spec *spec = codec->spec;
  359. int err;
  360. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  361. if (!kctl)
  362. return -ENOMEM;
  363. kctl->private_value = pin_idx;
  364. kctl->id.device = device;
  365. err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
  366. if (err < 0)
  367. return err;
  368. get_pin(spec, pin_idx)->eld_ctl = kctl;
  369. return 0;
  370. }
  371. #ifdef BE_PARANOID
  372. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  373. int *packet_index, int *byte_index)
  374. {
  375. int val;
  376. val = snd_hda_codec_read(codec, pin_nid, 0,
  377. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  378. *packet_index = val >> 5;
  379. *byte_index = val & 0x1f;
  380. }
  381. #endif
  382. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  383. int packet_index, int byte_index)
  384. {
  385. int val;
  386. val = (packet_index << 5) | (byte_index & 0x1f);
  387. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  388. }
  389. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  390. unsigned char val)
  391. {
  392. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  393. }
  394. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  395. {
  396. /* Unmute */
  397. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  398. snd_hda_codec_write(codec, pin_nid, 0,
  399. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  400. /* Enable pin out: some machines with GM965 gets broken output when
  401. * the pin is disabled or changed while using with HDMI
  402. */
  403. snd_hda_codec_write(codec, pin_nid, 0,
  404. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  405. }
  406. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  407. {
  408. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  409. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  410. }
  411. static void hdmi_set_channel_count(struct hda_codec *codec,
  412. hda_nid_t cvt_nid, int chs)
  413. {
  414. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  415. snd_hda_codec_write(codec, cvt_nid, 0,
  416. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  417. }
  418. /*
  419. * Channel mapping routines
  420. */
  421. /*
  422. * Compute derived values in channel_allocations[].
  423. */
  424. static void init_channel_allocations(void)
  425. {
  426. int i, j;
  427. struct cea_channel_speaker_allocation *p;
  428. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  429. p = channel_allocations + i;
  430. p->channels = 0;
  431. p->spk_mask = 0;
  432. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  433. if (p->speakers[j]) {
  434. p->channels++;
  435. p->spk_mask |= p->speakers[j];
  436. }
  437. }
  438. }
  439. static int get_channel_allocation_order(int ca)
  440. {
  441. int i;
  442. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  443. if (channel_allocations[i].ca_index == ca)
  444. break;
  445. }
  446. return i;
  447. }
  448. /*
  449. * The transformation takes two steps:
  450. *
  451. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  452. * spk_mask => (channel_allocations[]) => ai->CA
  453. *
  454. * TODO: it could select the wrong CA from multiple candidates.
  455. */
  456. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  457. {
  458. int i;
  459. int ca = 0;
  460. int spk_mask = 0;
  461. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  462. /*
  463. * CA defaults to 0 for basic stereo audio
  464. */
  465. if (channels <= 2)
  466. return 0;
  467. /*
  468. * expand ELD's speaker allocation mask
  469. *
  470. * ELD tells the speaker mask in a compact(paired) form,
  471. * expand ELD's notions to match the ones used by Audio InfoFrame.
  472. */
  473. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  474. if (eld->info.spk_alloc & (1 << i))
  475. spk_mask |= eld_speaker_allocation_bits[i];
  476. }
  477. /* search for the first working match in the CA table */
  478. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  479. if (channels == channel_allocations[i].channels &&
  480. (spk_mask & channel_allocations[i].spk_mask) ==
  481. channel_allocations[i].spk_mask) {
  482. ca = channel_allocations[i].ca_index;
  483. break;
  484. }
  485. }
  486. if (!ca) {
  487. /* if there was no match, select the regular ALSA channel
  488. * allocation with the matching number of channels */
  489. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  490. if (channels == channel_allocations[i].channels) {
  491. ca = channel_allocations[i].ca_index;
  492. break;
  493. }
  494. }
  495. }
  496. snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
  497. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  498. ca, channels, buf);
  499. return ca;
  500. }
  501. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  502. hda_nid_t pin_nid)
  503. {
  504. #ifdef CONFIG_SND_DEBUG_VERBOSE
  505. int i;
  506. int slot;
  507. for (i = 0; i < 8; i++) {
  508. slot = snd_hda_codec_read(codec, pin_nid, 0,
  509. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  510. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  511. slot >> 4, slot & 0xf);
  512. }
  513. #endif
  514. }
  515. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  516. hda_nid_t pin_nid,
  517. bool non_pcm,
  518. int ca)
  519. {
  520. int i;
  521. int err;
  522. int order;
  523. int non_pcm_mapping[8];
  524. order = get_channel_allocation_order(ca);
  525. if (hdmi_channel_mapping[ca][1] == 0) {
  526. for (i = 0; i < channel_allocations[order].channels; i++)
  527. hdmi_channel_mapping[ca][i] = i | (i << 4);
  528. for (; i < 8; i++)
  529. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  530. }
  531. if (non_pcm) {
  532. for (i = 0; i < channel_allocations[order].channels; i++)
  533. non_pcm_mapping[i] = i | (i << 4);
  534. for (; i < 8; i++)
  535. non_pcm_mapping[i] = 0xf | (i << 4);
  536. }
  537. for (i = 0; i < 8; i++) {
  538. err = snd_hda_codec_write(codec, pin_nid, 0,
  539. AC_VERB_SET_HDMI_CHAN_SLOT,
  540. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  541. if (err) {
  542. snd_printdd(KERN_NOTICE
  543. "HDMI: channel mapping failed\n");
  544. break;
  545. }
  546. }
  547. hdmi_debug_channel_mapping(codec, pin_nid);
  548. }
  549. struct channel_map_table {
  550. unsigned char map; /* ALSA API channel map position */
  551. unsigned char cea_slot; /* CEA slot value */
  552. int spk_mask; /* speaker position bit mask */
  553. };
  554. static struct channel_map_table map_tables[] = {
  555. { SNDRV_CHMAP_FL, 0x00, FL },
  556. { SNDRV_CHMAP_FR, 0x01, FR },
  557. { SNDRV_CHMAP_RL, 0x04, RL },
  558. { SNDRV_CHMAP_RR, 0x05, RR },
  559. { SNDRV_CHMAP_LFE, 0x02, LFE },
  560. { SNDRV_CHMAP_FC, 0x03, FC },
  561. { SNDRV_CHMAP_RLC, 0x06, RLC },
  562. { SNDRV_CHMAP_RRC, 0x07, RRC },
  563. {} /* terminator */
  564. };
  565. /* from ALSA API channel position to speaker bit mask */
  566. static int to_spk_mask(unsigned char c)
  567. {
  568. struct channel_map_table *t = map_tables;
  569. for (; t->map; t++) {
  570. if (t->map == c)
  571. return t->spk_mask;
  572. }
  573. return 0;
  574. }
  575. /* from ALSA API channel position to CEA slot */
  576. static int to_cea_slot(unsigned char c)
  577. {
  578. struct channel_map_table *t = map_tables;
  579. for (; t->map; t++) {
  580. if (t->map == c)
  581. return t->cea_slot;
  582. }
  583. return 0x0f;
  584. }
  585. /* from CEA slot to ALSA API channel position */
  586. static int from_cea_slot(unsigned char c)
  587. {
  588. struct channel_map_table *t = map_tables;
  589. for (; t->map; t++) {
  590. if (t->cea_slot == c)
  591. return t->map;
  592. }
  593. return 0;
  594. }
  595. /* from speaker bit mask to ALSA API channel position */
  596. static int spk_to_chmap(int spk)
  597. {
  598. struct channel_map_table *t = map_tables;
  599. for (; t->map; t++) {
  600. if (t->spk_mask == spk)
  601. return t->map;
  602. }
  603. return 0;
  604. }
  605. /* get the CA index corresponding to the given ALSA API channel map */
  606. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  607. {
  608. int i, spks = 0, spk_mask = 0;
  609. for (i = 0; i < chs; i++) {
  610. int mask = to_spk_mask(map[i]);
  611. if (mask) {
  612. spk_mask |= mask;
  613. spks++;
  614. }
  615. }
  616. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  617. if ((chs == channel_allocations[i].channels ||
  618. spks == channel_allocations[i].channels) &&
  619. (spk_mask & channel_allocations[i].spk_mask) ==
  620. channel_allocations[i].spk_mask)
  621. return channel_allocations[i].ca_index;
  622. }
  623. return -1;
  624. }
  625. /* set up the channel slots for the given ALSA API channel map */
  626. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  627. hda_nid_t pin_nid,
  628. int chs, unsigned char *map)
  629. {
  630. int i;
  631. for (i = 0; i < 8; i++) {
  632. int val, err;
  633. if (i < chs)
  634. val = to_cea_slot(map[i]);
  635. else
  636. val = 0xf;
  637. val |= (i << 4);
  638. err = snd_hda_codec_write(codec, pin_nid, 0,
  639. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  640. if (err)
  641. return -EINVAL;
  642. }
  643. return 0;
  644. }
  645. /* store ALSA API channel map from the current default map */
  646. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  647. {
  648. int i;
  649. for (i = 0; i < 8; i++) {
  650. if (i < channel_allocations[ca].channels)
  651. map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
  652. else
  653. map[i] = 0;
  654. }
  655. }
  656. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  657. hda_nid_t pin_nid, bool non_pcm, int ca,
  658. int channels, unsigned char *map,
  659. bool chmap_set)
  660. {
  661. if (!non_pcm && chmap_set) {
  662. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  663. channels, map);
  664. } else {
  665. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  666. hdmi_setup_fake_chmap(map, ca);
  667. }
  668. }
  669. /*
  670. * Audio InfoFrame routines
  671. */
  672. /*
  673. * Enable Audio InfoFrame Transmission
  674. */
  675. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  676. hda_nid_t pin_nid)
  677. {
  678. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  679. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  680. AC_DIPXMIT_BEST);
  681. }
  682. /*
  683. * Disable Audio InfoFrame Transmission
  684. */
  685. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  686. hda_nid_t pin_nid)
  687. {
  688. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  689. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  690. AC_DIPXMIT_DISABLE);
  691. }
  692. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  693. {
  694. #ifdef CONFIG_SND_DEBUG_VERBOSE
  695. int i;
  696. int size;
  697. size = snd_hdmi_get_eld_size(codec, pin_nid);
  698. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  699. for (i = 0; i < 8; i++) {
  700. size = snd_hda_codec_read(codec, pin_nid, 0,
  701. AC_VERB_GET_HDMI_DIP_SIZE, i);
  702. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  703. }
  704. #endif
  705. }
  706. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  707. {
  708. #ifdef BE_PARANOID
  709. int i, j;
  710. int size;
  711. int pi, bi;
  712. for (i = 0; i < 8; i++) {
  713. size = snd_hda_codec_read(codec, pin_nid, 0,
  714. AC_VERB_GET_HDMI_DIP_SIZE, i);
  715. if (size == 0)
  716. continue;
  717. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  718. for (j = 1; j < 1000; j++) {
  719. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  720. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  721. if (pi != i)
  722. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  723. bi, pi, i);
  724. if (bi == 0) /* byte index wrapped around */
  725. break;
  726. }
  727. snd_printd(KERN_INFO
  728. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  729. i, size, j);
  730. }
  731. #endif
  732. }
  733. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  734. {
  735. u8 *bytes = (u8 *)hdmi_ai;
  736. u8 sum = 0;
  737. int i;
  738. hdmi_ai->checksum = 0;
  739. for (i = 0; i < sizeof(*hdmi_ai); i++)
  740. sum += bytes[i];
  741. hdmi_ai->checksum = -sum;
  742. }
  743. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  744. hda_nid_t pin_nid,
  745. u8 *dip, int size)
  746. {
  747. int i;
  748. hdmi_debug_dip_size(codec, pin_nid);
  749. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  750. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  751. for (i = 0; i < size; i++)
  752. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  753. }
  754. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  755. u8 *dip, int size)
  756. {
  757. u8 val;
  758. int i;
  759. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  760. != AC_DIPXMIT_BEST)
  761. return false;
  762. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  763. for (i = 0; i < size; i++) {
  764. val = snd_hda_codec_read(codec, pin_nid, 0,
  765. AC_VERB_GET_HDMI_DIP_DATA, 0);
  766. if (val != dip[i])
  767. return false;
  768. }
  769. return true;
  770. }
  771. static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
  772. struct hdmi_spec_per_pin *per_pin,
  773. bool non_pcm)
  774. {
  775. hda_nid_t pin_nid = per_pin->pin_nid;
  776. int channels = per_pin->channels;
  777. struct hdmi_eld *eld;
  778. int ca;
  779. union audio_infoframe ai;
  780. if (!channels)
  781. return;
  782. if (is_haswell(codec))
  783. snd_hda_codec_write(codec, pin_nid, 0,
  784. AC_VERB_SET_AMP_GAIN_MUTE,
  785. AMP_OUT_UNMUTE);
  786. eld = &per_pin->sink_eld;
  787. if (!eld->monitor_present)
  788. return;
  789. if (!non_pcm && per_pin->chmap_set)
  790. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  791. else
  792. ca = hdmi_channel_allocation(eld, channels);
  793. if (ca < 0)
  794. ca = 0;
  795. memset(&ai, 0, sizeof(ai));
  796. if (eld->info.conn_type == 0) { /* HDMI */
  797. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  798. hdmi_ai->type = 0x84;
  799. hdmi_ai->ver = 0x01;
  800. hdmi_ai->len = 0x0a;
  801. hdmi_ai->CC02_CT47 = channels - 1;
  802. hdmi_ai->CA = ca;
  803. hdmi_checksum_audio_infoframe(hdmi_ai);
  804. } else if (eld->info.conn_type == 1) { /* DisplayPort */
  805. struct dp_audio_infoframe *dp_ai = &ai.dp;
  806. dp_ai->type = 0x84;
  807. dp_ai->len = 0x1b;
  808. dp_ai->ver = 0x11 << 2;
  809. dp_ai->CC02_CT47 = channels - 1;
  810. dp_ai->CA = ca;
  811. } else {
  812. snd_printd("HDMI: unknown connection type at pin %d\n",
  813. pin_nid);
  814. return;
  815. }
  816. /*
  817. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  818. * sizeof(*dp_ai) to avoid partial match/update problems when
  819. * the user switches between HDMI/DP monitors.
  820. */
  821. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  822. sizeof(ai))) {
  823. snd_printdd("hdmi_setup_audio_infoframe: "
  824. "pin=%d channels=%d\n",
  825. pin_nid,
  826. channels);
  827. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  828. channels, per_pin->chmap,
  829. per_pin->chmap_set);
  830. hdmi_stop_infoframe_trans(codec, pin_nid);
  831. hdmi_fill_audio_infoframe(codec, pin_nid,
  832. ai.bytes, sizeof(ai));
  833. hdmi_start_infoframe_trans(codec, pin_nid);
  834. } else {
  835. /* For non-pcm audio switch, setup new channel mapping
  836. * accordingly */
  837. if (per_pin->non_pcm != non_pcm)
  838. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  839. channels, per_pin->chmap,
  840. per_pin->chmap_set);
  841. }
  842. per_pin->non_pcm = non_pcm;
  843. }
  844. /*
  845. * Unsolicited events
  846. */
  847. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  848. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  849. {
  850. struct hdmi_spec *spec = codec->spec;
  851. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  852. int pin_nid;
  853. int pin_idx;
  854. struct hda_jack_tbl *jack;
  855. int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
  856. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  857. if (!jack)
  858. return;
  859. pin_nid = jack->nid;
  860. jack->jack_dirty = 1;
  861. _snd_printd(SND_PR_VERBOSE,
  862. "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
  863. codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
  864. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  865. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  866. if (pin_idx < 0)
  867. return;
  868. hdmi_present_sense(get_pin(spec, pin_idx), 1);
  869. snd_hda_jack_report_sync(codec);
  870. }
  871. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  872. {
  873. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  874. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  875. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  876. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  877. printk(KERN_INFO
  878. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  879. codec->addr,
  880. tag,
  881. subtag,
  882. cp_state,
  883. cp_ready);
  884. /* TODO */
  885. if (cp_state)
  886. ;
  887. if (cp_ready)
  888. ;
  889. }
  890. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  891. {
  892. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  893. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  894. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  895. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  896. return;
  897. }
  898. if (subtag == 0)
  899. hdmi_intrinsic_event(codec, res);
  900. else
  901. hdmi_non_intrinsic_event(codec, res);
  902. }
  903. static void haswell_verify_D0(struct hda_codec *codec,
  904. hda_nid_t cvt_nid, hda_nid_t nid)
  905. {
  906. int pwr;
  907. /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
  908. * thus pins could only choose converter 0 for use. Make sure the
  909. * converters are in correct power state */
  910. if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
  911. snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  912. if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
  913. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
  914. AC_PWRST_D0);
  915. msleep(40);
  916. pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
  917. pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
  918. snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
  919. }
  920. }
  921. /*
  922. * Callbacks
  923. */
  924. /* HBR should be Non-PCM, 8 channels */
  925. #define is_hbr_format(format) \
  926. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  927. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  928. hda_nid_t pin_nid, u32 stream_tag, int format)
  929. {
  930. int pinctl;
  931. int new_pinctl = 0;
  932. if (is_haswell(codec))
  933. haswell_verify_D0(codec, cvt_nid, pin_nid);
  934. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  935. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  936. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  937. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  938. if (is_hbr_format(format))
  939. new_pinctl |= AC_PINCTL_EPT_HBR;
  940. else
  941. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  942. snd_printdd("hdmi_setup_stream: "
  943. "NID=0x%x, %spinctl=0x%x\n",
  944. pin_nid,
  945. pinctl == new_pinctl ? "" : "new-",
  946. new_pinctl);
  947. if (pinctl != new_pinctl)
  948. snd_hda_codec_write(codec, pin_nid, 0,
  949. AC_VERB_SET_PIN_WIDGET_CONTROL,
  950. new_pinctl);
  951. }
  952. if (is_hbr_format(format) && !new_pinctl) {
  953. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  954. return -EINVAL;
  955. }
  956. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  957. return 0;
  958. }
  959. static int hdmi_choose_cvt(struct hda_codec *codec,
  960. int pin_idx, int *cvt_id, int *mux_id)
  961. {
  962. struct hdmi_spec *spec = codec->spec;
  963. struct hdmi_spec_per_pin *per_pin;
  964. struct hdmi_spec_per_cvt *per_cvt = NULL;
  965. int cvt_idx, mux_idx = 0;
  966. per_pin = get_pin(spec, pin_idx);
  967. /* Dynamically assign converter to stream */
  968. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  969. per_cvt = get_cvt(spec, cvt_idx);
  970. /* Must not already be assigned */
  971. if (per_cvt->assigned)
  972. continue;
  973. /* Must be in pin's mux's list of converters */
  974. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  975. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  976. break;
  977. /* Not in mux list */
  978. if (mux_idx == per_pin->num_mux_nids)
  979. continue;
  980. break;
  981. }
  982. /* No free converters */
  983. if (cvt_idx == spec->num_cvts)
  984. return -ENODEV;
  985. if (cvt_id)
  986. *cvt_id = cvt_idx;
  987. if (mux_id)
  988. *mux_id = mux_idx;
  989. return 0;
  990. }
  991. static void haswell_config_cvts(struct hda_codec *codec,
  992. int pin_id, int mux_id)
  993. {
  994. struct hdmi_spec *spec = codec->spec;
  995. struct hdmi_spec_per_pin *per_pin;
  996. int pin_idx, mux_idx;
  997. int curr;
  998. int err;
  999. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1000. per_pin = get_pin(spec, pin_idx);
  1001. if (pin_idx == pin_id)
  1002. continue;
  1003. curr = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
  1004. AC_VERB_GET_CONNECT_SEL, 0);
  1005. /* Choose another unused converter */
  1006. if (curr == mux_id) {
  1007. err = hdmi_choose_cvt(codec, pin_idx, NULL, &mux_idx);
  1008. if (err < 0)
  1009. return;
  1010. snd_printdd("HDMI: choose converter %d for pin %d\n", mux_idx, pin_idx);
  1011. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1012. AC_VERB_SET_CONNECT_SEL,
  1013. mux_idx);
  1014. }
  1015. }
  1016. }
  1017. /*
  1018. * HDA PCM callbacks
  1019. */
  1020. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  1021. struct hda_codec *codec,
  1022. struct snd_pcm_substream *substream)
  1023. {
  1024. struct hdmi_spec *spec = codec->spec;
  1025. struct snd_pcm_runtime *runtime = substream->runtime;
  1026. int pin_idx, cvt_idx, mux_idx = 0;
  1027. struct hdmi_spec_per_pin *per_pin;
  1028. struct hdmi_eld *eld;
  1029. struct hdmi_spec_per_cvt *per_cvt = NULL;
  1030. int err;
  1031. /* Validate hinfo */
  1032. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1033. if (snd_BUG_ON(pin_idx < 0))
  1034. return -EINVAL;
  1035. per_pin = get_pin(spec, pin_idx);
  1036. eld = &per_pin->sink_eld;
  1037. err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
  1038. if (err < 0)
  1039. return err;
  1040. per_cvt = get_cvt(spec, cvt_idx);
  1041. /* Claim converter */
  1042. per_cvt->assigned = 1;
  1043. hinfo->nid = per_cvt->cvt_nid;
  1044. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1045. AC_VERB_SET_CONNECT_SEL,
  1046. mux_idx);
  1047. /* configure unused pins to choose other converters */
  1048. if (is_haswell(codec))
  1049. haswell_config_cvts(codec, pin_idx, mux_idx);
  1050. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  1051. /* Initially set the converter's capabilities */
  1052. hinfo->channels_min = per_cvt->channels_min;
  1053. hinfo->channels_max = per_cvt->channels_max;
  1054. hinfo->rates = per_cvt->rates;
  1055. hinfo->formats = per_cvt->formats;
  1056. hinfo->maxbps = per_cvt->maxbps;
  1057. /* Restrict capabilities by ELD if this isn't disabled */
  1058. if (!static_hdmi_pcm && eld->eld_valid) {
  1059. snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
  1060. if (hinfo->channels_min > hinfo->channels_max ||
  1061. !hinfo->rates || !hinfo->formats) {
  1062. per_cvt->assigned = 0;
  1063. hinfo->nid = 0;
  1064. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1065. return -ENODEV;
  1066. }
  1067. }
  1068. /* Store the updated parameters */
  1069. runtime->hw.channels_min = hinfo->channels_min;
  1070. runtime->hw.channels_max = hinfo->channels_max;
  1071. runtime->hw.formats = hinfo->formats;
  1072. runtime->hw.rates = hinfo->rates;
  1073. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1074. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1075. return 0;
  1076. }
  1077. /*
  1078. * HDA/HDMI auto parsing
  1079. */
  1080. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  1081. {
  1082. struct hdmi_spec *spec = codec->spec;
  1083. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1084. hda_nid_t pin_nid = per_pin->pin_nid;
  1085. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  1086. snd_printk(KERN_WARNING
  1087. "HDMI: pin %d wcaps %#x "
  1088. "does not support connection list\n",
  1089. pin_nid, get_wcaps(codec, pin_nid));
  1090. return -EINVAL;
  1091. }
  1092. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  1093. per_pin->mux_nids,
  1094. HDA_MAX_CONNECTIONS);
  1095. return 0;
  1096. }
  1097. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  1098. {
  1099. struct hda_codec *codec = per_pin->codec;
  1100. struct hdmi_spec *spec = codec->spec;
  1101. struct hdmi_eld *eld = &spec->temp_eld;
  1102. struct hdmi_eld *pin_eld = &per_pin->sink_eld;
  1103. hda_nid_t pin_nid = per_pin->pin_nid;
  1104. /*
  1105. * Always execute a GetPinSense verb here, even when called from
  1106. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  1107. * response's PD bit is not the real PD value, but indicates that
  1108. * the real PD value changed. An older version of the HD-audio
  1109. * specification worked this way. Hence, we just ignore the data in
  1110. * the unsolicited response to avoid custom WARs.
  1111. */
  1112. int present = snd_hda_pin_sense(codec, pin_nid);
  1113. bool update_eld = false;
  1114. bool eld_changed = false;
  1115. pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1116. if (pin_eld->monitor_present)
  1117. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  1118. else
  1119. eld->eld_valid = false;
  1120. _snd_printd(SND_PR_VERBOSE,
  1121. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1122. codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
  1123. if (eld->eld_valid) {
  1124. if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
  1125. &eld->eld_size) < 0)
  1126. eld->eld_valid = false;
  1127. else {
  1128. memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
  1129. if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
  1130. eld->eld_size) < 0)
  1131. eld->eld_valid = false;
  1132. }
  1133. if (eld->eld_valid) {
  1134. snd_hdmi_show_eld(&eld->info);
  1135. update_eld = true;
  1136. }
  1137. else if (repoll) {
  1138. queue_delayed_work(codec->bus->workq,
  1139. &per_pin->work,
  1140. msecs_to_jiffies(300));
  1141. return;
  1142. }
  1143. }
  1144. mutex_lock(&pin_eld->lock);
  1145. if (pin_eld->eld_valid && !eld->eld_valid) {
  1146. update_eld = true;
  1147. eld_changed = true;
  1148. }
  1149. if (update_eld) {
  1150. bool old_eld_valid = pin_eld->eld_valid;
  1151. pin_eld->eld_valid = eld->eld_valid;
  1152. eld_changed = pin_eld->eld_size != eld->eld_size ||
  1153. memcmp(pin_eld->eld_buffer, eld->eld_buffer,
  1154. eld->eld_size) != 0;
  1155. if (eld_changed)
  1156. memcpy(pin_eld->eld_buffer, eld->eld_buffer,
  1157. eld->eld_size);
  1158. pin_eld->eld_size = eld->eld_size;
  1159. pin_eld->info = eld->info;
  1160. /* Haswell-specific workaround: re-setup when the transcoder is
  1161. * changed during the stream playback
  1162. */
  1163. if (is_haswell(codec) &&
  1164. eld->eld_valid && !old_eld_valid && per_pin->setup)
  1165. hdmi_setup_audio_infoframe(codec, per_pin,
  1166. per_pin->non_pcm);
  1167. }
  1168. mutex_unlock(&pin_eld->lock);
  1169. if (eld_changed)
  1170. snd_ctl_notify(codec->bus->card,
  1171. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  1172. &per_pin->eld_ctl->id);
  1173. }
  1174. static void hdmi_repoll_eld(struct work_struct *work)
  1175. {
  1176. struct hdmi_spec_per_pin *per_pin =
  1177. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1178. if (per_pin->repoll_count++ > 6)
  1179. per_pin->repoll_count = 0;
  1180. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1181. }
  1182. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1183. hda_nid_t nid);
  1184. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1185. {
  1186. struct hdmi_spec *spec = codec->spec;
  1187. unsigned int caps, config;
  1188. int pin_idx;
  1189. struct hdmi_spec_per_pin *per_pin;
  1190. int err;
  1191. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1192. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1193. return 0;
  1194. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1195. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1196. return 0;
  1197. if (is_haswell(codec))
  1198. intel_haswell_fixup_connect_list(codec, pin_nid);
  1199. pin_idx = spec->num_pins;
  1200. per_pin = snd_array_new(&spec->pins);
  1201. if (!per_pin)
  1202. return -ENOMEM;
  1203. per_pin->pin_nid = pin_nid;
  1204. per_pin->non_pcm = false;
  1205. err = hdmi_read_pin_conn(codec, pin_idx);
  1206. if (err < 0)
  1207. return err;
  1208. spec->num_pins++;
  1209. return 0;
  1210. }
  1211. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1212. {
  1213. struct hdmi_spec *spec = codec->spec;
  1214. struct hdmi_spec_per_cvt *per_cvt;
  1215. unsigned int chans;
  1216. int err;
  1217. chans = get_wcaps(codec, cvt_nid);
  1218. chans = get_wcaps_channels(chans);
  1219. per_cvt = snd_array_new(&spec->cvts);
  1220. if (!per_cvt)
  1221. return -ENOMEM;
  1222. per_cvt->cvt_nid = cvt_nid;
  1223. per_cvt->channels_min = 2;
  1224. if (chans <= 16) {
  1225. per_cvt->channels_max = chans;
  1226. if (chans > spec->channels_max)
  1227. spec->channels_max = chans;
  1228. }
  1229. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1230. &per_cvt->rates,
  1231. &per_cvt->formats,
  1232. &per_cvt->maxbps);
  1233. if (err < 0)
  1234. return err;
  1235. if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
  1236. spec->cvt_nids[spec->num_cvts] = cvt_nid;
  1237. spec->num_cvts++;
  1238. return 0;
  1239. }
  1240. static int hdmi_parse_codec(struct hda_codec *codec)
  1241. {
  1242. hda_nid_t nid;
  1243. int i, nodes;
  1244. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1245. if (!nid || nodes < 0) {
  1246. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1247. return -EINVAL;
  1248. }
  1249. for (i = 0; i < nodes; i++, nid++) {
  1250. unsigned int caps;
  1251. unsigned int type;
  1252. caps = get_wcaps(codec, nid);
  1253. type = get_wcaps_type(caps);
  1254. if (!(caps & AC_WCAP_DIGITAL))
  1255. continue;
  1256. switch (type) {
  1257. case AC_WID_AUD_OUT:
  1258. hdmi_add_cvt(codec, nid);
  1259. break;
  1260. case AC_WID_PIN:
  1261. hdmi_add_pin(codec, nid);
  1262. break;
  1263. }
  1264. }
  1265. #ifdef CONFIG_PM
  1266. /* We're seeing some problems with unsolicited hot plug events on
  1267. * PantherPoint after S3, if this is not enabled */
  1268. if (codec->vendor_id == 0x80862806)
  1269. codec->bus->power_keep_link_on = 1;
  1270. /*
  1271. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1272. * can be lost and presence sense verb will become inaccurate if the
  1273. * HDA link is powered off at hot plug or hw initialization time.
  1274. */
  1275. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1276. AC_PWRST_EPSS))
  1277. codec->bus->power_keep_link_on = 1;
  1278. #endif
  1279. return 0;
  1280. }
  1281. /*
  1282. */
  1283. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1284. {
  1285. struct hda_spdif_out *spdif;
  1286. bool non_pcm;
  1287. mutex_lock(&codec->spdif_mutex);
  1288. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1289. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1290. mutex_unlock(&codec->spdif_mutex);
  1291. return non_pcm;
  1292. }
  1293. /*
  1294. * HDMI callbacks
  1295. */
  1296. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1297. struct hda_codec *codec,
  1298. unsigned int stream_tag,
  1299. unsigned int format,
  1300. struct snd_pcm_substream *substream)
  1301. {
  1302. hda_nid_t cvt_nid = hinfo->nid;
  1303. struct hdmi_spec *spec = codec->spec;
  1304. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1305. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1306. hda_nid_t pin_nid = per_pin->pin_nid;
  1307. bool non_pcm;
  1308. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1309. per_pin->channels = substream->runtime->channels;
  1310. per_pin->setup = true;
  1311. hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
  1312. hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
  1313. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1314. }
  1315. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1316. struct hda_codec *codec,
  1317. struct snd_pcm_substream *substream)
  1318. {
  1319. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1320. return 0;
  1321. }
  1322. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1323. struct hda_codec *codec,
  1324. struct snd_pcm_substream *substream)
  1325. {
  1326. struct hdmi_spec *spec = codec->spec;
  1327. int cvt_idx, pin_idx;
  1328. struct hdmi_spec_per_cvt *per_cvt;
  1329. struct hdmi_spec_per_pin *per_pin;
  1330. if (hinfo->nid) {
  1331. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1332. if (snd_BUG_ON(cvt_idx < 0))
  1333. return -EINVAL;
  1334. per_cvt = get_cvt(spec, cvt_idx);
  1335. snd_BUG_ON(!per_cvt->assigned);
  1336. per_cvt->assigned = 0;
  1337. hinfo->nid = 0;
  1338. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1339. if (snd_BUG_ON(pin_idx < 0))
  1340. return -EINVAL;
  1341. per_pin = get_pin(spec, pin_idx);
  1342. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1343. per_pin->chmap_set = false;
  1344. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1345. per_pin->setup = false;
  1346. per_pin->channels = 0;
  1347. }
  1348. return 0;
  1349. }
  1350. static const struct hda_pcm_ops generic_ops = {
  1351. .open = hdmi_pcm_open,
  1352. .close = hdmi_pcm_close,
  1353. .prepare = generic_hdmi_playback_pcm_prepare,
  1354. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1355. };
  1356. /*
  1357. * ALSA API channel-map control callbacks
  1358. */
  1359. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1360. struct snd_ctl_elem_info *uinfo)
  1361. {
  1362. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1363. struct hda_codec *codec = info->private_data;
  1364. struct hdmi_spec *spec = codec->spec;
  1365. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1366. uinfo->count = spec->channels_max;
  1367. uinfo->value.integer.min = 0;
  1368. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1369. return 0;
  1370. }
  1371. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1372. unsigned int size, unsigned int __user *tlv)
  1373. {
  1374. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1375. struct hda_codec *codec = info->private_data;
  1376. struct hdmi_spec *spec = codec->spec;
  1377. const unsigned int valid_mask =
  1378. FL | FR | RL | RR | LFE | FC | RLC | RRC;
  1379. unsigned int __user *dst;
  1380. int chs, count = 0;
  1381. if (size < 8)
  1382. return -ENOMEM;
  1383. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1384. return -EFAULT;
  1385. size -= 8;
  1386. dst = tlv + 2;
  1387. for (chs = 2; chs <= spec->channels_max; chs++) {
  1388. int i, c;
  1389. struct cea_channel_speaker_allocation *cap;
  1390. cap = channel_allocations;
  1391. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1392. int chs_bytes = chs * 4;
  1393. if (cap->channels != chs)
  1394. continue;
  1395. if (cap->spk_mask & ~valid_mask)
  1396. continue;
  1397. if (size < 8)
  1398. return -ENOMEM;
  1399. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1400. put_user(chs_bytes, dst + 1))
  1401. return -EFAULT;
  1402. dst += 2;
  1403. size -= 8;
  1404. count += 8;
  1405. if (size < chs_bytes)
  1406. return -ENOMEM;
  1407. size -= chs_bytes;
  1408. count += chs_bytes;
  1409. for (c = 7; c >= 0; c--) {
  1410. int spk = cap->speakers[c];
  1411. if (!spk)
  1412. continue;
  1413. if (put_user(spk_to_chmap(spk), dst))
  1414. return -EFAULT;
  1415. dst++;
  1416. }
  1417. }
  1418. }
  1419. if (put_user(count, tlv + 1))
  1420. return -EFAULT;
  1421. return 0;
  1422. }
  1423. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1424. struct snd_ctl_elem_value *ucontrol)
  1425. {
  1426. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1427. struct hda_codec *codec = info->private_data;
  1428. struct hdmi_spec *spec = codec->spec;
  1429. int pin_idx = kcontrol->private_value;
  1430. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1431. int i;
  1432. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1433. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1434. return 0;
  1435. }
  1436. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1437. struct snd_ctl_elem_value *ucontrol)
  1438. {
  1439. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1440. struct hda_codec *codec = info->private_data;
  1441. struct hdmi_spec *spec = codec->spec;
  1442. int pin_idx = kcontrol->private_value;
  1443. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1444. unsigned int ctl_idx;
  1445. struct snd_pcm_substream *substream;
  1446. unsigned char chmap[8];
  1447. int i, ca, prepared = 0;
  1448. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1449. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1450. if (!substream || !substream->runtime)
  1451. return 0; /* just for avoiding error from alsactl restore */
  1452. switch (substream->runtime->status->state) {
  1453. case SNDRV_PCM_STATE_OPEN:
  1454. case SNDRV_PCM_STATE_SETUP:
  1455. break;
  1456. case SNDRV_PCM_STATE_PREPARED:
  1457. prepared = 1;
  1458. break;
  1459. default:
  1460. return -EBUSY;
  1461. }
  1462. memset(chmap, 0, sizeof(chmap));
  1463. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1464. chmap[i] = ucontrol->value.integer.value[i];
  1465. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1466. return 0;
  1467. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1468. if (ca < 0)
  1469. return -EINVAL;
  1470. per_pin->chmap_set = true;
  1471. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1472. if (prepared)
  1473. hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
  1474. return 0;
  1475. }
  1476. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1477. {
  1478. struct hdmi_spec *spec = codec->spec;
  1479. int pin_idx;
  1480. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1481. struct hda_pcm *info;
  1482. struct hda_pcm_stream *pstr;
  1483. struct hdmi_spec_per_pin *per_pin;
  1484. per_pin = get_pin(spec, pin_idx);
  1485. sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
  1486. info = snd_array_new(&spec->pcm_rec);
  1487. if (!info)
  1488. return -ENOMEM;
  1489. info->name = per_pin->pcm_name;
  1490. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1491. info->own_chmap = true;
  1492. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1493. pstr->substreams = 1;
  1494. pstr->ops = generic_ops;
  1495. /* other pstr fields are set in open */
  1496. }
  1497. codec->num_pcms = spec->num_pins;
  1498. codec->pcm_info = spec->pcm_rec.list;
  1499. return 0;
  1500. }
  1501. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1502. {
  1503. char hdmi_str[32] = "HDMI/DP";
  1504. struct hdmi_spec *spec = codec->spec;
  1505. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1506. int pcmdev = get_pcm_rec(spec, pin_idx)->device;
  1507. if (pcmdev > 0)
  1508. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1509. if (!is_jack_detectable(codec, per_pin->pin_nid))
  1510. strncat(hdmi_str, " Phantom",
  1511. sizeof(hdmi_str) - strlen(hdmi_str) - 1);
  1512. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1513. }
  1514. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1515. {
  1516. struct hdmi_spec *spec = codec->spec;
  1517. int err;
  1518. int pin_idx;
  1519. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1520. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1521. err = generic_hdmi_build_jack(codec, pin_idx);
  1522. if (err < 0)
  1523. return err;
  1524. err = snd_hda_create_dig_out_ctls(codec,
  1525. per_pin->pin_nid,
  1526. per_pin->mux_nids[0],
  1527. HDA_PCM_TYPE_HDMI);
  1528. if (err < 0)
  1529. return err;
  1530. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1531. /* add control for ELD Bytes */
  1532. err = hdmi_create_eld_ctl(codec, pin_idx,
  1533. get_pcm_rec(spec, pin_idx)->device);
  1534. if (err < 0)
  1535. return err;
  1536. hdmi_present_sense(per_pin, 0);
  1537. }
  1538. /* add channel maps */
  1539. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1540. struct snd_pcm_chmap *chmap;
  1541. struct snd_kcontrol *kctl;
  1542. int i;
  1543. if (!codec->pcm_info[pin_idx].pcm)
  1544. break;
  1545. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1546. SNDRV_PCM_STREAM_PLAYBACK,
  1547. NULL, 0, pin_idx, &chmap);
  1548. if (err < 0)
  1549. return err;
  1550. /* override handlers */
  1551. chmap->private_data = codec;
  1552. kctl = chmap->kctl;
  1553. for (i = 0; i < kctl->count; i++)
  1554. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1555. kctl->info = hdmi_chmap_ctl_info;
  1556. kctl->get = hdmi_chmap_ctl_get;
  1557. kctl->put = hdmi_chmap_ctl_put;
  1558. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1559. }
  1560. return 0;
  1561. }
  1562. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1563. {
  1564. struct hdmi_spec *spec = codec->spec;
  1565. int pin_idx;
  1566. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1567. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1568. struct hdmi_eld *eld = &per_pin->sink_eld;
  1569. per_pin->codec = codec;
  1570. mutex_init(&eld->lock);
  1571. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1572. snd_hda_eld_proc_new(codec, eld, pin_idx);
  1573. }
  1574. return 0;
  1575. }
  1576. static int generic_hdmi_init(struct hda_codec *codec)
  1577. {
  1578. struct hdmi_spec *spec = codec->spec;
  1579. int pin_idx;
  1580. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1581. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1582. hda_nid_t pin_nid = per_pin->pin_nid;
  1583. hdmi_init_pin(codec, pin_nid);
  1584. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1585. }
  1586. return 0;
  1587. }
  1588. static void hdmi_array_init(struct hdmi_spec *spec, int nums)
  1589. {
  1590. snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
  1591. snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
  1592. snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
  1593. }
  1594. static void hdmi_array_free(struct hdmi_spec *spec)
  1595. {
  1596. snd_array_free(&spec->pins);
  1597. snd_array_free(&spec->cvts);
  1598. snd_array_free(&spec->pcm_rec);
  1599. }
  1600. static void generic_hdmi_free(struct hda_codec *codec)
  1601. {
  1602. struct hdmi_spec *spec = codec->spec;
  1603. int pin_idx;
  1604. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1605. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1606. struct hdmi_eld *eld = &per_pin->sink_eld;
  1607. cancel_delayed_work(&per_pin->work);
  1608. snd_hda_eld_proc_free(codec, eld);
  1609. }
  1610. flush_workqueue(codec->bus->workq);
  1611. hdmi_array_free(spec);
  1612. kfree(spec);
  1613. }
  1614. #ifdef CONFIG_PM
  1615. static int generic_hdmi_resume(struct hda_codec *codec)
  1616. {
  1617. struct hdmi_spec *spec = codec->spec;
  1618. int pin_idx;
  1619. generic_hdmi_init(codec);
  1620. snd_hda_codec_resume_amp(codec);
  1621. snd_hda_codec_resume_cache(codec);
  1622. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1623. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1624. hdmi_present_sense(per_pin, 1);
  1625. }
  1626. return 0;
  1627. }
  1628. #endif
  1629. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1630. .init = generic_hdmi_init,
  1631. .free = generic_hdmi_free,
  1632. .build_pcms = generic_hdmi_build_pcms,
  1633. .build_controls = generic_hdmi_build_controls,
  1634. .unsol_event = hdmi_unsol_event,
  1635. #ifdef CONFIG_PM
  1636. .resume = generic_hdmi_resume,
  1637. #endif
  1638. };
  1639. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1640. hda_nid_t nid)
  1641. {
  1642. struct hdmi_spec *spec = codec->spec;
  1643. hda_nid_t conns[4];
  1644. int nconns;
  1645. nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
  1646. if (nconns == spec->num_cvts &&
  1647. !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
  1648. return;
  1649. /* override pins connection list */
  1650. snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
  1651. snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
  1652. }
  1653. #define INTEL_VENDOR_NID 0x08
  1654. #define INTEL_GET_VENDOR_VERB 0xf81
  1655. #define INTEL_SET_VENDOR_VERB 0x781
  1656. #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
  1657. #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
  1658. static void intel_haswell_enable_all_pins(struct hda_codec *codec,
  1659. bool update_tree)
  1660. {
  1661. unsigned int vendor_param;
  1662. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1663. INTEL_GET_VENDOR_VERB, 0);
  1664. if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
  1665. return;
  1666. vendor_param |= INTEL_EN_ALL_PIN_CVTS;
  1667. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1668. INTEL_SET_VENDOR_VERB, vendor_param);
  1669. if (vendor_param == -1)
  1670. return;
  1671. if (update_tree)
  1672. snd_hda_codec_update_widgets(codec);
  1673. }
  1674. static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
  1675. {
  1676. unsigned int vendor_param;
  1677. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1678. INTEL_GET_VENDOR_VERB, 0);
  1679. if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
  1680. return;
  1681. /* enable DP1.2 mode */
  1682. vendor_param |= INTEL_EN_DP12;
  1683. snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
  1684. INTEL_SET_VENDOR_VERB, vendor_param);
  1685. }
  1686. /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
  1687. * Otherwise you may get severe h/w communication errors.
  1688. */
  1689. static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  1690. unsigned int power_state)
  1691. {
  1692. if (power_state == AC_PWRST_D0) {
  1693. intel_haswell_enable_all_pins(codec, false);
  1694. intel_haswell_fixup_enable_dp12(codec);
  1695. }
  1696. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
  1697. snd_hda_codec_set_power_to_all(codec, fg, power_state);
  1698. }
  1699. static int patch_generic_hdmi(struct hda_codec *codec)
  1700. {
  1701. struct hdmi_spec *spec;
  1702. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1703. if (spec == NULL)
  1704. return -ENOMEM;
  1705. codec->spec = spec;
  1706. hdmi_array_init(spec, 4);
  1707. if (is_haswell(codec)) {
  1708. intel_haswell_enable_all_pins(codec, true);
  1709. intel_haswell_fixup_enable_dp12(codec);
  1710. }
  1711. if (hdmi_parse_codec(codec) < 0) {
  1712. codec->spec = NULL;
  1713. kfree(spec);
  1714. return -EINVAL;
  1715. }
  1716. codec->patch_ops = generic_hdmi_patch_ops;
  1717. if (is_haswell(codec)) {
  1718. codec->patch_ops.set_power_state = haswell_set_power_state;
  1719. codec->dp_mst = true;
  1720. }
  1721. generic_hdmi_init_per_pins(codec);
  1722. init_channel_allocations();
  1723. return 0;
  1724. }
  1725. /*
  1726. * Shared non-generic implementations
  1727. */
  1728. static int simple_playback_build_pcms(struct hda_codec *codec)
  1729. {
  1730. struct hdmi_spec *spec = codec->spec;
  1731. struct hda_pcm *info;
  1732. unsigned int chans;
  1733. struct hda_pcm_stream *pstr;
  1734. struct hdmi_spec_per_cvt *per_cvt;
  1735. per_cvt = get_cvt(spec, 0);
  1736. chans = get_wcaps(codec, per_cvt->cvt_nid);
  1737. chans = get_wcaps_channels(chans);
  1738. info = snd_array_new(&spec->pcm_rec);
  1739. if (!info)
  1740. return -ENOMEM;
  1741. info->name = get_pin(spec, 0)->pcm_name;
  1742. sprintf(info->name, "HDMI 0");
  1743. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1744. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1745. *pstr = spec->pcm_playback;
  1746. pstr->nid = per_cvt->cvt_nid;
  1747. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1748. pstr->channels_max = chans;
  1749. codec->num_pcms = 1;
  1750. codec->pcm_info = info;
  1751. return 0;
  1752. }
  1753. /* unsolicited event for jack sensing */
  1754. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1755. unsigned int res)
  1756. {
  1757. snd_hda_jack_set_dirty_all(codec);
  1758. snd_hda_jack_report_sync(codec);
  1759. }
  1760. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1761. * as long as spec->pins[] is set correctly
  1762. */
  1763. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1764. static int simple_playback_build_controls(struct hda_codec *codec)
  1765. {
  1766. struct hdmi_spec *spec = codec->spec;
  1767. struct hdmi_spec_per_cvt *per_cvt;
  1768. int err;
  1769. per_cvt = get_cvt(spec, 0);
  1770. err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
  1771. per_cvt->cvt_nid);
  1772. if (err < 0)
  1773. return err;
  1774. return simple_hdmi_build_jack(codec, 0);
  1775. }
  1776. static int simple_playback_init(struct hda_codec *codec)
  1777. {
  1778. struct hdmi_spec *spec = codec->spec;
  1779. struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
  1780. hda_nid_t pin = per_pin->pin_nid;
  1781. snd_hda_codec_write(codec, pin, 0,
  1782. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1783. /* some codecs require to unmute the pin */
  1784. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1785. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1786. AMP_OUT_UNMUTE);
  1787. snd_hda_jack_detect_enable(codec, pin, pin);
  1788. return 0;
  1789. }
  1790. static void simple_playback_free(struct hda_codec *codec)
  1791. {
  1792. struct hdmi_spec *spec = codec->spec;
  1793. hdmi_array_free(spec);
  1794. kfree(spec);
  1795. }
  1796. /*
  1797. * Nvidia specific implementations
  1798. */
  1799. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1800. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1801. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1802. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1803. #define nvhdmi_master_con_nid_7x 0x04
  1804. #define nvhdmi_master_pin_nid_7x 0x05
  1805. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1806. /*front, rear, clfe, rear_surr */
  1807. 0x6, 0x8, 0xa, 0xc,
  1808. };
  1809. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1810. /* set audio protect on */
  1811. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1812. /* enable digital output on pin widget */
  1813. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1814. {} /* terminator */
  1815. };
  1816. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1817. /* set audio protect on */
  1818. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1819. /* enable digital output on pin widget */
  1820. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1821. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1822. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1823. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1824. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1825. {} /* terminator */
  1826. };
  1827. #ifdef LIMITED_RATE_FMT_SUPPORT
  1828. /* support only the safe format and rate */
  1829. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1830. #define SUPPORTED_MAXBPS 16
  1831. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1832. #else
  1833. /* support all rates and formats */
  1834. #define SUPPORTED_RATES \
  1835. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1836. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1837. SNDRV_PCM_RATE_192000)
  1838. #define SUPPORTED_MAXBPS 24
  1839. #define SUPPORTED_FORMATS \
  1840. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1841. #endif
  1842. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1843. {
  1844. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1845. return 0;
  1846. }
  1847. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1848. {
  1849. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1850. return 0;
  1851. }
  1852. static unsigned int channels_2_6_8[] = {
  1853. 2, 6, 8
  1854. };
  1855. static unsigned int channels_2_8[] = {
  1856. 2, 8
  1857. };
  1858. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1859. .count = ARRAY_SIZE(channels_2_6_8),
  1860. .list = channels_2_6_8,
  1861. .mask = 0,
  1862. };
  1863. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1864. .count = ARRAY_SIZE(channels_2_8),
  1865. .list = channels_2_8,
  1866. .mask = 0,
  1867. };
  1868. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1869. struct hda_codec *codec,
  1870. struct snd_pcm_substream *substream)
  1871. {
  1872. struct hdmi_spec *spec = codec->spec;
  1873. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1874. switch (codec->preset->id) {
  1875. case 0x10de0002:
  1876. case 0x10de0003:
  1877. case 0x10de0005:
  1878. case 0x10de0006:
  1879. hw_constraints_channels = &hw_constraints_2_8_channels;
  1880. break;
  1881. case 0x10de0007:
  1882. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1883. break;
  1884. default:
  1885. break;
  1886. }
  1887. if (hw_constraints_channels != NULL) {
  1888. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1889. SNDRV_PCM_HW_PARAM_CHANNELS,
  1890. hw_constraints_channels);
  1891. } else {
  1892. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1893. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1894. }
  1895. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1896. }
  1897. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1898. struct hda_codec *codec,
  1899. struct snd_pcm_substream *substream)
  1900. {
  1901. struct hdmi_spec *spec = codec->spec;
  1902. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1903. }
  1904. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1905. struct hda_codec *codec,
  1906. unsigned int stream_tag,
  1907. unsigned int format,
  1908. struct snd_pcm_substream *substream)
  1909. {
  1910. struct hdmi_spec *spec = codec->spec;
  1911. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1912. stream_tag, format, substream);
  1913. }
  1914. static const struct hda_pcm_stream simple_pcm_playback = {
  1915. .substreams = 1,
  1916. .channels_min = 2,
  1917. .channels_max = 2,
  1918. .ops = {
  1919. .open = simple_playback_pcm_open,
  1920. .close = simple_playback_pcm_close,
  1921. .prepare = simple_playback_pcm_prepare
  1922. },
  1923. };
  1924. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  1925. .build_controls = simple_playback_build_controls,
  1926. .build_pcms = simple_playback_build_pcms,
  1927. .init = simple_playback_init,
  1928. .free = simple_playback_free,
  1929. .unsol_event = simple_hdmi_unsol_event,
  1930. };
  1931. static int patch_simple_hdmi(struct hda_codec *codec,
  1932. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  1933. {
  1934. struct hdmi_spec *spec;
  1935. struct hdmi_spec_per_cvt *per_cvt;
  1936. struct hdmi_spec_per_pin *per_pin;
  1937. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1938. if (!spec)
  1939. return -ENOMEM;
  1940. codec->spec = spec;
  1941. hdmi_array_init(spec, 1);
  1942. spec->multiout.num_dacs = 0; /* no analog */
  1943. spec->multiout.max_channels = 2;
  1944. spec->multiout.dig_out_nid = cvt_nid;
  1945. spec->num_cvts = 1;
  1946. spec->num_pins = 1;
  1947. per_pin = snd_array_new(&spec->pins);
  1948. per_cvt = snd_array_new(&spec->cvts);
  1949. if (!per_pin || !per_cvt) {
  1950. simple_playback_free(codec);
  1951. return -ENOMEM;
  1952. }
  1953. per_cvt->cvt_nid = cvt_nid;
  1954. per_pin->pin_nid = pin_nid;
  1955. spec->pcm_playback = simple_pcm_playback;
  1956. codec->patch_ops = simple_hdmi_patch_ops;
  1957. return 0;
  1958. }
  1959. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  1960. int channels)
  1961. {
  1962. unsigned int chanmask;
  1963. int chan = channels ? (channels - 1) : 1;
  1964. switch (channels) {
  1965. default:
  1966. case 0:
  1967. case 2:
  1968. chanmask = 0x00;
  1969. break;
  1970. case 4:
  1971. chanmask = 0x08;
  1972. break;
  1973. case 6:
  1974. chanmask = 0x0b;
  1975. break;
  1976. case 8:
  1977. chanmask = 0x13;
  1978. break;
  1979. }
  1980. /* Set the audio infoframe channel allocation and checksum fields. The
  1981. * channel count is computed implicitly by the hardware. */
  1982. snd_hda_codec_write(codec, 0x1, 0,
  1983. Nv_VERB_SET_Channel_Allocation, chanmask);
  1984. snd_hda_codec_write(codec, 0x1, 0,
  1985. Nv_VERB_SET_Info_Frame_Checksum,
  1986. (0x71 - chan - chanmask));
  1987. }
  1988. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  1989. struct hda_codec *codec,
  1990. struct snd_pcm_substream *substream)
  1991. {
  1992. struct hdmi_spec *spec = codec->spec;
  1993. int i;
  1994. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  1995. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  1996. for (i = 0; i < 4; i++) {
  1997. /* set the stream id */
  1998. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1999. AC_VERB_SET_CHANNEL_STREAMID, 0);
  2000. /* set the stream format */
  2001. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  2002. AC_VERB_SET_STREAM_FORMAT, 0);
  2003. }
  2004. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  2005. * streams are disabled. */
  2006. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2007. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  2008. }
  2009. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  2010. struct hda_codec *codec,
  2011. unsigned int stream_tag,
  2012. unsigned int format,
  2013. struct snd_pcm_substream *substream)
  2014. {
  2015. int chs;
  2016. unsigned int dataDCC2, channel_id;
  2017. int i;
  2018. struct hdmi_spec *spec = codec->spec;
  2019. struct hda_spdif_out *spdif;
  2020. struct hdmi_spec_per_cvt *per_cvt;
  2021. mutex_lock(&codec->spdif_mutex);
  2022. per_cvt = get_cvt(spec, 0);
  2023. spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
  2024. chs = substream->runtime->channels;
  2025. dataDCC2 = 0x2;
  2026. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  2027. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  2028. snd_hda_codec_write(codec,
  2029. nvhdmi_master_con_nid_7x,
  2030. 0,
  2031. AC_VERB_SET_DIGI_CONVERT_1,
  2032. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2033. /* set the stream id */
  2034. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2035. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  2036. /* set the stream format */
  2037. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2038. AC_VERB_SET_STREAM_FORMAT, format);
  2039. /* turn on again (if needed) */
  2040. /* enable and set the channel status audio/data flag */
  2041. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  2042. snd_hda_codec_write(codec,
  2043. nvhdmi_master_con_nid_7x,
  2044. 0,
  2045. AC_VERB_SET_DIGI_CONVERT_1,
  2046. spdif->ctls & 0xff);
  2047. snd_hda_codec_write(codec,
  2048. nvhdmi_master_con_nid_7x,
  2049. 0,
  2050. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2051. }
  2052. for (i = 0; i < 4; i++) {
  2053. if (chs == 2)
  2054. channel_id = 0;
  2055. else
  2056. channel_id = i * 2;
  2057. /* turn off SPDIF once;
  2058. *otherwise the IEC958 bits won't be updated
  2059. */
  2060. if (codec->spdif_status_reset &&
  2061. (spdif->ctls & AC_DIG1_ENABLE))
  2062. snd_hda_codec_write(codec,
  2063. nvhdmi_con_nids_7x[i],
  2064. 0,
  2065. AC_VERB_SET_DIGI_CONVERT_1,
  2066. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2067. /* set the stream id */
  2068. snd_hda_codec_write(codec,
  2069. nvhdmi_con_nids_7x[i],
  2070. 0,
  2071. AC_VERB_SET_CHANNEL_STREAMID,
  2072. (stream_tag << 4) | channel_id);
  2073. /* set the stream format */
  2074. snd_hda_codec_write(codec,
  2075. nvhdmi_con_nids_7x[i],
  2076. 0,
  2077. AC_VERB_SET_STREAM_FORMAT,
  2078. format);
  2079. /* turn on again (if needed) */
  2080. /* enable and set the channel status audio/data flag */
  2081. if (codec->spdif_status_reset &&
  2082. (spdif->ctls & AC_DIG1_ENABLE)) {
  2083. snd_hda_codec_write(codec,
  2084. nvhdmi_con_nids_7x[i],
  2085. 0,
  2086. AC_VERB_SET_DIGI_CONVERT_1,
  2087. spdif->ctls & 0xff);
  2088. snd_hda_codec_write(codec,
  2089. nvhdmi_con_nids_7x[i],
  2090. 0,
  2091. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2092. }
  2093. }
  2094. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  2095. mutex_unlock(&codec->spdif_mutex);
  2096. return 0;
  2097. }
  2098. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  2099. .substreams = 1,
  2100. .channels_min = 2,
  2101. .channels_max = 8,
  2102. .nid = nvhdmi_master_con_nid_7x,
  2103. .rates = SUPPORTED_RATES,
  2104. .maxbps = SUPPORTED_MAXBPS,
  2105. .formats = SUPPORTED_FORMATS,
  2106. .ops = {
  2107. .open = simple_playback_pcm_open,
  2108. .close = nvhdmi_8ch_7x_pcm_close,
  2109. .prepare = nvhdmi_8ch_7x_pcm_prepare
  2110. },
  2111. };
  2112. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  2113. {
  2114. struct hdmi_spec *spec;
  2115. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  2116. nvhdmi_master_pin_nid_7x);
  2117. if (err < 0)
  2118. return err;
  2119. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  2120. /* override the PCM rates, etc, as the codec doesn't give full list */
  2121. spec = codec->spec;
  2122. spec->pcm_playback.rates = SUPPORTED_RATES;
  2123. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  2124. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  2125. return 0;
  2126. }
  2127. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  2128. {
  2129. struct hdmi_spec *spec = codec->spec;
  2130. int err = simple_playback_build_pcms(codec);
  2131. if (!err) {
  2132. struct hda_pcm *info = get_pcm_rec(spec, 0);
  2133. info->own_chmap = true;
  2134. }
  2135. return err;
  2136. }
  2137. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  2138. {
  2139. struct hdmi_spec *spec = codec->spec;
  2140. struct hda_pcm *info;
  2141. struct snd_pcm_chmap *chmap;
  2142. int err;
  2143. err = simple_playback_build_controls(codec);
  2144. if (err < 0)
  2145. return err;
  2146. /* add channel maps */
  2147. info = get_pcm_rec(spec, 0);
  2148. err = snd_pcm_add_chmap_ctls(info->pcm,
  2149. SNDRV_PCM_STREAM_PLAYBACK,
  2150. snd_pcm_alt_chmaps, 8, 0, &chmap);
  2151. if (err < 0)
  2152. return err;
  2153. switch (codec->preset->id) {
  2154. case 0x10de0002:
  2155. case 0x10de0003:
  2156. case 0x10de0005:
  2157. case 0x10de0006:
  2158. chmap->channel_mask = (1U << 2) | (1U << 8);
  2159. break;
  2160. case 0x10de0007:
  2161. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  2162. }
  2163. return 0;
  2164. }
  2165. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  2166. {
  2167. struct hdmi_spec *spec;
  2168. int err = patch_nvhdmi_2ch(codec);
  2169. if (err < 0)
  2170. return err;
  2171. spec = codec->spec;
  2172. spec->multiout.max_channels = 8;
  2173. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  2174. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  2175. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  2176. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  2177. /* Initialize the audio infoframe channel mask and checksum to something
  2178. * valid */
  2179. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2180. return 0;
  2181. }
  2182. /*
  2183. * ATI-specific implementations
  2184. *
  2185. * FIXME: we may omit the whole this and use the generic code once after
  2186. * it's confirmed to work.
  2187. */
  2188. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  2189. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  2190. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  2191. struct hda_codec *codec,
  2192. unsigned int stream_tag,
  2193. unsigned int format,
  2194. struct snd_pcm_substream *substream)
  2195. {
  2196. struct hdmi_spec *spec = codec->spec;
  2197. struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
  2198. int chans = substream->runtime->channels;
  2199. int i, err;
  2200. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  2201. substream);
  2202. if (err < 0)
  2203. return err;
  2204. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2205. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  2206. /* FIXME: XXX */
  2207. for (i = 0; i < chans; i++) {
  2208. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2209. AC_VERB_SET_HDMI_CHAN_SLOT,
  2210. (i << 4) | i);
  2211. }
  2212. return 0;
  2213. }
  2214. static int patch_atihdmi(struct hda_codec *codec)
  2215. {
  2216. struct hdmi_spec *spec;
  2217. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  2218. if (err < 0)
  2219. return err;
  2220. spec = codec->spec;
  2221. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  2222. return 0;
  2223. }
  2224. /* VIA HDMI Implementation */
  2225. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  2226. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  2227. static int patch_via_hdmi(struct hda_codec *codec)
  2228. {
  2229. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  2230. }
  2231. /*
  2232. * patch entries
  2233. */
  2234. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  2235. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2236. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2237. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  2238. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  2239. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  2240. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  2241. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  2242. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2243. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2244. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2245. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2246. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  2247. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  2248. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  2249. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  2250. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  2251. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  2252. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  2253. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  2254. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  2255. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  2256. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  2257. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  2258. /* 17 is known to be absent */
  2259. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  2260. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  2261. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  2262. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  2263. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  2264. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  2265. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  2266. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  2267. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  2268. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  2269. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  2270. { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
  2271. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  2272. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  2273. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2274. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2275. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2276. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2277. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2278. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2279. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2280. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2281. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2282. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2283. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2284. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2285. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2286. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2287. {} /* terminator */
  2288. };
  2289. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2290. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2291. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2292. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2293. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2294. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2295. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2296. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2297. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2298. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2299. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2300. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2301. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2302. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2303. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2304. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2305. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2306. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2307. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2308. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2309. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2310. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2311. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2312. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2313. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2314. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2315. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2316. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2317. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2318. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2319. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2320. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2321. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2322. MODULE_ALIAS("snd-hda-codec-id:10de0060");
  2323. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2324. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2325. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2326. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2327. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2328. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2329. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2330. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2331. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2332. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2333. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2334. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2335. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2336. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2337. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2338. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2339. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2340. MODULE_LICENSE("GPL");
  2341. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2342. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2343. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2344. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2345. static struct hda_codec_preset_list intel_list = {
  2346. .preset = snd_hda_preset_hdmi,
  2347. .owner = THIS_MODULE,
  2348. };
  2349. static int __init patch_hdmi_init(void)
  2350. {
  2351. return snd_hda_add_codec_preset(&intel_list);
  2352. }
  2353. static void __exit patch_hdmi_exit(void)
  2354. {
  2355. snd_hda_delete_codec_preset(&intel_list);
  2356. }
  2357. module_init(patch_hdmi_init)
  2358. module_exit(patch_hdmi_exit)