s5p_fimc.h 5.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182
  1. /*
  2. * Samsung S5P/Exynos4 SoC series camera interface driver header
  3. *
  4. * Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #ifndef S5P_FIMC_H_
  12. #define S5P_FIMC_H_
  13. #include <media/media-entity.h>
  14. #include <media/v4l2-dev.h>
  15. #include <media/v4l2-mediabus.h>
  16. /*
  17. * Enumeration of data inputs to the camera subsystem.
  18. */
  19. enum fimc_input {
  20. FIMC_INPUT_PARALLEL_0 = 1,
  21. FIMC_INPUT_PARALLEL_1,
  22. FIMC_INPUT_MIPI_CSI2_0 = 3,
  23. FIMC_INPUT_MIPI_CSI2_1,
  24. FIMC_INPUT_WRITEBACK_A = 5,
  25. FIMC_INPUT_WRITEBACK_B,
  26. FIMC_INPUT_WRITEBACK_ISP = 5,
  27. };
  28. /*
  29. * Enumeration of the FIMC data bus types.
  30. */
  31. enum fimc_bus_type {
  32. /* Camera parallel bus */
  33. FIMC_BUS_TYPE_ITU_601 = 1,
  34. /* Camera parallel bus with embedded synchronization */
  35. FIMC_BUS_TYPE_ITU_656,
  36. /* Camera MIPI-CSI2 serial bus */
  37. FIMC_BUS_TYPE_MIPI_CSI2,
  38. /* FIFO link from LCD controller (WriteBack A) */
  39. FIMC_BUS_TYPE_LCD_WRITEBACK_A,
  40. /* FIFO link from LCD controller (WriteBack B) */
  41. FIMC_BUS_TYPE_LCD_WRITEBACK_B,
  42. /* FIFO link from FIMC-IS */
  43. FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
  44. };
  45. #define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
  46. #define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
  47. /*
  48. * The subdevices' group IDs.
  49. */
  50. #define GRP_ID_SENSOR (1 << 8)
  51. #define GRP_ID_FIMC_IS_SENSOR (1 << 9)
  52. #define GRP_ID_WRITEBACK (1 << 10)
  53. #define GRP_ID_CSIS (1 << 11)
  54. #define GRP_ID_FIMC (1 << 12)
  55. #define GRP_ID_FLITE (1 << 13)
  56. #define GRP_ID_FIMC_IS (1 << 14)
  57. struct i2c_board_info;
  58. /**
  59. * struct fimc_source_info - video source description required for the host
  60. * interface configuration
  61. *
  62. * @board_info: pointer to I2C subdevice's board info
  63. * @clk_frequency: frequency of the clock the host interface provides to sensor
  64. * @fimc_bus_type: FIMC camera input type
  65. * @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
  66. * @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
  67. * @i2c_bus_num: i2c control bus id the sensor is attached to
  68. * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
  69. * @clk_id: index of the SoC peripheral clock for sensors
  70. */
  71. struct fimc_source_info {
  72. struct i2c_board_info *board_info;
  73. unsigned long clk_frequency;
  74. enum fimc_bus_type fimc_bus_type;
  75. enum fimc_bus_type sensor_bus_type;
  76. u16 flags;
  77. u16 i2c_bus_num;
  78. u16 mux_id;
  79. u8 clk_id;
  80. };
  81. /**
  82. * struct s5p_platform_fimc - camera host interface platform data
  83. *
  84. * @source_info: properties of an image source for the host interface setup
  85. * @num_clients: the number of attached image sources
  86. */
  87. struct s5p_platform_fimc {
  88. struct fimc_source_info *source_info;
  89. int num_clients;
  90. };
  91. /*
  92. * v4l2_device notification id. This is only for internal use in the kernel.
  93. * Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single
  94. * frame capture mode when there is only one VSYNC pulse issued by the sensor
  95. * at begining of the frame transmission.
  96. */
  97. #define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)
  98. #define FIMC_MAX_PLANES 3
  99. /**
  100. * struct fimc_fmt - color format data structure
  101. * @mbus_code: media bus pixel code, -1 if not applicable
  102. * @name: format description
  103. * @fourcc: fourcc code for this format, 0 if not applicable
  104. * @color: the driver's private color format id
  105. * @memplanes: number of physically non-contiguous data planes
  106. * @colplanes: number of physically contiguous data planes
  107. * @colorspace: v4l2 colorspace (V4L2_COLORSPACE_*)
  108. * @depth: per plane driver's private 'number of bits per pixel'
  109. * @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no)
  110. * @flags: flags indicating which operation mode format applies to
  111. */
  112. struct fimc_fmt {
  113. enum v4l2_mbus_pixelcode mbus_code;
  114. char *name;
  115. u32 fourcc;
  116. u32 color;
  117. u16 memplanes;
  118. u16 colplanes;
  119. u8 colorspace;
  120. u8 depth[FIMC_MAX_PLANES];
  121. u16 mdataplanes;
  122. u16 flags;
  123. #define FMT_FLAGS_CAM (1 << 0)
  124. #define FMT_FLAGS_M2M_IN (1 << 1)
  125. #define FMT_FLAGS_M2M_OUT (1 << 2)
  126. #define FMT_FLAGS_M2M (1 << 1 | 1 << 2)
  127. #define FMT_HAS_ALPHA (1 << 3)
  128. #define FMT_FLAGS_COMPRESSED (1 << 4)
  129. #define FMT_FLAGS_WRITEBACK (1 << 5)
  130. #define FMT_FLAGS_RAW_BAYER (1 << 6)
  131. #define FMT_FLAGS_YUV (1 << 7)
  132. };
  133. struct exynos_media_pipeline;
  134. /*
  135. * Media pipeline operations to be called from within a video node, i.e. the
  136. * last entity within the pipeline. Implemented by related media device driver.
  137. */
  138. struct exynos_media_pipeline_ops {
  139. int (*prepare)(struct exynos_media_pipeline *p,
  140. struct media_entity *me);
  141. int (*unprepare)(struct exynos_media_pipeline *p);
  142. int (*open)(struct exynos_media_pipeline *p, struct media_entity *me,
  143. bool resume);
  144. int (*close)(struct exynos_media_pipeline *p);
  145. int (*set_stream)(struct exynos_media_pipeline *p, bool state);
  146. };
  147. struct exynos_video_entity {
  148. struct video_device vdev;
  149. struct exynos_media_pipeline *pipe;
  150. };
  151. struct exynos_media_pipeline {
  152. struct media_pipeline mp;
  153. const struct exynos_media_pipeline_ops *ops;
  154. };
  155. static inline struct exynos_video_entity *vdev_to_exynos_video_entity(
  156. struct video_device *vdev)
  157. {
  158. return container_of(vdev, struct exynos_video_entity, vdev);
  159. }
  160. #define fimc_pipeline_call(ent, op, args...) \
  161. (!(ent) ? -ENOENT : (((ent)->pipe->ops && (ent)->pipe->ops->op) ? \
  162. (ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD)) \
  163. #endif /* S5P_FIMC_H_ */