ehci-dbg.c 26 KB

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  1. /*
  2. * Copyright (c) 2001-2002 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
  20. /* check the values in the HCSPARAMS register
  21. * (host controller _Structural_ parameters)
  22. * see EHCI spec, Table 2-4 for each value
  23. */
  24. static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
  25. {
  26. u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
  27. ehci_dbg (ehci,
  28. "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
  29. label, params,
  30. HCS_DEBUG_PORT (params),
  31. HCS_INDICATOR (params) ? " ind" : "",
  32. HCS_N_CC (params),
  33. HCS_N_PCC (params),
  34. HCS_PORTROUTED (params) ? "" : " ordered",
  35. HCS_PPC (params) ? "" : " !ppc",
  36. HCS_N_PORTS (params)
  37. );
  38. /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
  39. if (HCS_PORTROUTED (params)) {
  40. int i;
  41. char buf [46], tmp [7], byte;
  42. buf[0] = 0;
  43. for (i = 0; i < HCS_N_PORTS (params); i++) {
  44. // FIXME MIPS won't readb() ...
  45. byte = readb (&ehci->caps->portroute[(i>>1)]);
  46. sprintf(tmp, "%d ",
  47. ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
  48. strcat(buf, tmp);
  49. }
  50. ehci_dbg (ehci, "%s portroute %s\n",
  51. label, buf);
  52. }
  53. }
  54. #else
  55. static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
  56. #endif
  57. #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
  58. /* check the values in the HCCPARAMS register
  59. * (host controller _Capability_ parameters)
  60. * see EHCI Spec, Table 2-5 for each value
  61. * */
  62. static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
  63. {
  64. u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
  65. if (HCC_ISOC_CACHE (params)) {
  66. ehci_dbg (ehci,
  67. "%s hcc_params %04x caching frame %s%s%s\n",
  68. label, params,
  69. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  70. HCC_CANPARK(params) ? " park" : "",
  71. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
  72. } else {
  73. ehci_dbg (ehci,
  74. "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
  75. label,
  76. params,
  77. HCC_ISOC_THRES(params),
  78. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  79. HCC_CANPARK(params) ? " park" : "",
  80. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
  81. HCC_LPM(params) ? " LPM" : "",
  82. HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
  83. HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
  84. HCC_32FRAME_PERIODIC_LIST(params) ?
  85. " 32 periodic list" : "");
  86. }
  87. }
  88. #else
  89. static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {}
  90. #endif
  91. #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
  92. static void __maybe_unused
  93. dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
  94. {
  95. ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
  96. hc32_to_cpup(ehci, &qtd->hw_next),
  97. hc32_to_cpup(ehci, &qtd->hw_alt_next),
  98. hc32_to_cpup(ehci, &qtd->hw_token),
  99. hc32_to_cpup(ehci, &qtd->hw_buf [0]));
  100. if (qtd->hw_buf [1])
  101. ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
  102. hc32_to_cpup(ehci, &qtd->hw_buf[1]),
  103. hc32_to_cpup(ehci, &qtd->hw_buf[2]),
  104. hc32_to_cpup(ehci, &qtd->hw_buf[3]),
  105. hc32_to_cpup(ehci, &qtd->hw_buf[4]));
  106. }
  107. static void __maybe_unused
  108. dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
  109. {
  110. struct ehci_qh_hw *hw = qh->hw;
  111. ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
  112. qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
  113. dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
  114. }
  115. static void __maybe_unused
  116. dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
  117. {
  118. ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
  119. label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
  120. itd->urb);
  121. ehci_dbg (ehci,
  122. " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
  123. hc32_to_cpu(ehci, itd->hw_transaction[0]),
  124. hc32_to_cpu(ehci, itd->hw_transaction[1]),
  125. hc32_to_cpu(ehci, itd->hw_transaction[2]),
  126. hc32_to_cpu(ehci, itd->hw_transaction[3]),
  127. hc32_to_cpu(ehci, itd->hw_transaction[4]),
  128. hc32_to_cpu(ehci, itd->hw_transaction[5]),
  129. hc32_to_cpu(ehci, itd->hw_transaction[6]),
  130. hc32_to_cpu(ehci, itd->hw_transaction[7]));
  131. ehci_dbg (ehci,
  132. " buf: %08x %08x %08x %08x %08x %08x %08x\n",
  133. hc32_to_cpu(ehci, itd->hw_bufp[0]),
  134. hc32_to_cpu(ehci, itd->hw_bufp[1]),
  135. hc32_to_cpu(ehci, itd->hw_bufp[2]),
  136. hc32_to_cpu(ehci, itd->hw_bufp[3]),
  137. hc32_to_cpu(ehci, itd->hw_bufp[4]),
  138. hc32_to_cpu(ehci, itd->hw_bufp[5]),
  139. hc32_to_cpu(ehci, itd->hw_bufp[6]));
  140. ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n",
  141. itd->index[0], itd->index[1], itd->index[2],
  142. itd->index[3], itd->index[4], itd->index[5],
  143. itd->index[6], itd->index[7]);
  144. }
  145. static void __maybe_unused
  146. dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
  147. {
  148. ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
  149. label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
  150. sitd->urb);
  151. ehci_dbg (ehci,
  152. " addr %08x sched %04x result %08x buf %08x %08x\n",
  153. hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
  154. hc32_to_cpu(ehci, sitd->hw_uframe),
  155. hc32_to_cpu(ehci, sitd->hw_results),
  156. hc32_to_cpu(ehci, sitd->hw_buf[0]),
  157. hc32_to_cpu(ehci, sitd->hw_buf[1]));
  158. }
  159. static int __maybe_unused
  160. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  161. {
  162. return scnprintf (buf, len,
  163. "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
  164. label, label [0] ? " " : "", status,
  165. (status & STS_PPCE_MASK) ? " PPCE" : "",
  166. (status & STS_ASS) ? " Async" : "",
  167. (status & STS_PSS) ? " Periodic" : "",
  168. (status & STS_RECL) ? " Recl" : "",
  169. (status & STS_HALT) ? " Halt" : "",
  170. (status & STS_IAA) ? " IAA" : "",
  171. (status & STS_FATAL) ? " FATAL" : "",
  172. (status & STS_FLR) ? " FLR" : "",
  173. (status & STS_PCD) ? " PCD" : "",
  174. (status & STS_ERR) ? " ERR" : "",
  175. (status & STS_INT) ? " INT" : ""
  176. );
  177. }
  178. static int __maybe_unused
  179. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  180. {
  181. return scnprintf (buf, len,
  182. "%s%sintrenable %02x%s%s%s%s%s%s%s",
  183. label, label [0] ? " " : "", enable,
  184. (enable & STS_PPCE_MASK) ? " PPCE" : "",
  185. (enable & STS_IAA) ? " IAA" : "",
  186. (enable & STS_FATAL) ? " FATAL" : "",
  187. (enable & STS_FLR) ? " FLR" : "",
  188. (enable & STS_PCD) ? " PCD" : "",
  189. (enable & STS_ERR) ? " ERR" : "",
  190. (enable & STS_INT) ? " INT" : ""
  191. );
  192. }
  193. static const char *const fls_strings [] =
  194. { "1024", "512", "256", "??" };
  195. static int
  196. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  197. {
  198. return scnprintf (buf, len,
  199. "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
  200. "period=%s%s %s",
  201. label, label [0] ? " " : "", command,
  202. (command & CMD_HIRD) ? " HIRD" : "",
  203. (command & CMD_PPCEE) ? " PPCEE" : "",
  204. (command & CMD_FSP) ? " FSP" : "",
  205. (command & CMD_ASPE) ? " ASPE" : "",
  206. (command & CMD_PSPE) ? " PSPE" : "",
  207. (command & CMD_PARK) ? " park" : "(park)",
  208. CMD_PARK_CNT (command),
  209. (command >> 16) & 0x3f,
  210. (command & CMD_LRESET) ? " LReset" : "",
  211. (command & CMD_IAAD) ? " IAAD" : "",
  212. (command & CMD_ASE) ? " Async" : "",
  213. (command & CMD_PSE) ? " Periodic" : "",
  214. fls_strings [(command >> 2) & 0x3],
  215. (command & CMD_RESET) ? " Reset" : "",
  216. (command & CMD_RUN) ? "RUN" : "HALT"
  217. );
  218. }
  219. static int
  220. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  221. {
  222. char *sig;
  223. /* signaling state */
  224. switch (status & (3 << 10)) {
  225. case 0 << 10: sig = "se0"; break;
  226. case 1 << 10: sig = "k"; break; /* low speed */
  227. case 2 << 10: sig = "j"; break;
  228. default: sig = "?"; break;
  229. }
  230. return scnprintf (buf, len,
  231. "%s%sport:%d status %06x %d %s%s%s%s%s%s "
  232. "sig=%s%s%s%s%s%s%s%s%s%s%s",
  233. label, label [0] ? " " : "", port, status,
  234. status>>25,/*device address */
  235. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_ACK ?
  236. " ACK" : "",
  237. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_NYET ?
  238. " NYET" : "",
  239. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_STALL ?
  240. " STALL" : "",
  241. (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_ERR ?
  242. " ERR" : "",
  243. (status & PORT_POWER) ? " POWER" : "",
  244. (status & PORT_OWNER) ? " OWNER" : "",
  245. sig,
  246. (status & PORT_LPM) ? " LPM" : "",
  247. (status & PORT_RESET) ? " RESET" : "",
  248. (status & PORT_SUSPEND) ? " SUSPEND" : "",
  249. (status & PORT_RESUME) ? " RESUME" : "",
  250. (status & PORT_OCC) ? " OCC" : "",
  251. (status & PORT_OC) ? " OC" : "",
  252. (status & PORT_PEC) ? " PEC" : "",
  253. (status & PORT_PE) ? " PE" : "",
  254. (status & PORT_CSC) ? " CSC" : "",
  255. (status & PORT_CONNECT) ? " CONNECT" : "");
  256. }
  257. #else
  258. static inline void __maybe_unused
  259. dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
  260. {}
  261. static inline int __maybe_unused
  262. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  263. { return 0; }
  264. static inline int __maybe_unused
  265. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  266. { return 0; }
  267. static inline int __maybe_unused
  268. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  269. { return 0; }
  270. static inline int __maybe_unused
  271. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  272. { return 0; }
  273. #endif /* DEBUG || CONFIG_DYNAMIC_DEBUG */
  274. /* functions have the "wrong" filename when they're output... */
  275. #define dbg_status(ehci, label, status) { \
  276. char _buf [80]; \
  277. dbg_status_buf (_buf, sizeof _buf, label, status); \
  278. ehci_dbg (ehci, "%s\n", _buf); \
  279. }
  280. #define dbg_cmd(ehci, label, command) { \
  281. char _buf [80]; \
  282. dbg_command_buf (_buf, sizeof _buf, label, command); \
  283. ehci_dbg (ehci, "%s\n", _buf); \
  284. }
  285. #define dbg_port(ehci, label, port, status) { \
  286. char _buf [80]; \
  287. dbg_port_buf (_buf, sizeof _buf, label, port, status); \
  288. ehci_dbg (ehci, "%s\n", _buf); \
  289. }
  290. /*-------------------------------------------------------------------------*/
  291. #ifdef STUB_DEBUG_FILES
  292. static inline void create_debug_files (struct ehci_hcd *bus) { }
  293. static inline void remove_debug_files (struct ehci_hcd *bus) { }
  294. #else
  295. /* troubleshooting help: expose state in debugfs */
  296. static int debug_async_open(struct inode *, struct file *);
  297. static int debug_periodic_open(struct inode *, struct file *);
  298. static int debug_registers_open(struct inode *, struct file *);
  299. static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
  300. static int debug_close(struct inode *, struct file *);
  301. static const struct file_operations debug_async_fops = {
  302. .owner = THIS_MODULE,
  303. .open = debug_async_open,
  304. .read = debug_output,
  305. .release = debug_close,
  306. .llseek = default_llseek,
  307. };
  308. static const struct file_operations debug_periodic_fops = {
  309. .owner = THIS_MODULE,
  310. .open = debug_periodic_open,
  311. .read = debug_output,
  312. .release = debug_close,
  313. .llseek = default_llseek,
  314. };
  315. static const struct file_operations debug_registers_fops = {
  316. .owner = THIS_MODULE,
  317. .open = debug_registers_open,
  318. .read = debug_output,
  319. .release = debug_close,
  320. .llseek = default_llseek,
  321. };
  322. static struct dentry *ehci_debug_root;
  323. struct debug_buffer {
  324. ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
  325. struct usb_bus *bus;
  326. struct mutex mutex; /* protect filling of buffer */
  327. size_t count; /* number of characters filled into buffer */
  328. char *output_buf;
  329. size_t alloc_size;
  330. };
  331. #define speed_char(info1) ({ char tmp; \
  332. switch (info1 & (3 << 12)) { \
  333. case QH_FULL_SPEED: tmp = 'f'; break; \
  334. case QH_LOW_SPEED: tmp = 'l'; break; \
  335. case QH_HIGH_SPEED: tmp = 'h'; break; \
  336. default: tmp = '?'; break; \
  337. }; tmp; })
  338. static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
  339. {
  340. __u32 v = hc32_to_cpu(ehci, token);
  341. if (v & QTD_STS_ACTIVE)
  342. return '*';
  343. if (v & QTD_STS_HALT)
  344. return '-';
  345. if (!IS_SHORT_READ (v))
  346. return ' ';
  347. /* tries to advance through hw_alt_next */
  348. return '/';
  349. }
  350. static void qh_lines (
  351. struct ehci_hcd *ehci,
  352. struct ehci_qh *qh,
  353. char **nextp,
  354. unsigned *sizep
  355. )
  356. {
  357. u32 scratch;
  358. u32 hw_curr;
  359. struct list_head *entry;
  360. struct ehci_qtd *td;
  361. unsigned temp;
  362. unsigned size = *sizep;
  363. char *next = *nextp;
  364. char mark;
  365. __le32 list_end = EHCI_LIST_END(ehci);
  366. struct ehci_qh_hw *hw = qh->hw;
  367. if (hw->hw_qtd_next == list_end) /* NEC does this */
  368. mark = '@';
  369. else
  370. mark = token_mark(ehci, hw->hw_token);
  371. if (mark == '/') { /* qh_alt_next controls qh advance? */
  372. if ((hw->hw_alt_next & QTD_MASK(ehci))
  373. == ehci->async->hw->hw_alt_next)
  374. mark = '#'; /* blocked */
  375. else if (hw->hw_alt_next == list_end)
  376. mark = '.'; /* use hw_qtd_next */
  377. /* else alt_next points to some other qtd */
  378. }
  379. scratch = hc32_to_cpup(ehci, &hw->hw_info1);
  380. hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
  381. temp = scnprintf (next, size,
  382. "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
  383. qh, scratch & 0x007f,
  384. speed_char (scratch),
  385. (scratch >> 8) & 0x000f,
  386. scratch, hc32_to_cpup(ehci, &hw->hw_info2),
  387. hc32_to_cpup(ehci, &hw->hw_token), mark,
  388. (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
  389. ? "data1" : "data0",
  390. (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f);
  391. size -= temp;
  392. next += temp;
  393. /* hc may be modifying the list as we read it ... */
  394. list_for_each (entry, &qh->qtd_list) {
  395. td = list_entry (entry, struct ehci_qtd, qtd_list);
  396. scratch = hc32_to_cpup(ehci, &td->hw_token);
  397. mark = ' ';
  398. if (hw_curr == td->qtd_dma)
  399. mark = '*';
  400. else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma))
  401. mark = '+';
  402. else if (QTD_LENGTH (scratch)) {
  403. if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
  404. mark = '#';
  405. else if (td->hw_alt_next != list_end)
  406. mark = '/';
  407. }
  408. temp = snprintf (next, size,
  409. "\n\t%p%c%s len=%d %08x urb %p",
  410. td, mark, ({ char *tmp;
  411. switch ((scratch>>8)&0x03) {
  412. case 0: tmp = "out"; break;
  413. case 1: tmp = "in"; break;
  414. case 2: tmp = "setup"; break;
  415. default: tmp = "?"; break;
  416. } tmp;}),
  417. (scratch >> 16) & 0x7fff,
  418. scratch,
  419. td->urb);
  420. if (size < temp)
  421. temp = size;
  422. size -= temp;
  423. next += temp;
  424. if (temp == size)
  425. goto done;
  426. }
  427. temp = snprintf (next, size, "\n");
  428. if (size < temp)
  429. temp = size;
  430. size -= temp;
  431. next += temp;
  432. done:
  433. *sizep = size;
  434. *nextp = next;
  435. }
  436. static ssize_t fill_async_buffer(struct debug_buffer *buf)
  437. {
  438. struct usb_hcd *hcd;
  439. struct ehci_hcd *ehci;
  440. unsigned long flags;
  441. unsigned temp, size;
  442. char *next;
  443. struct ehci_qh *qh;
  444. hcd = bus_to_hcd(buf->bus);
  445. ehci = hcd_to_ehci (hcd);
  446. next = buf->output_buf;
  447. size = buf->alloc_size;
  448. *next = 0;
  449. /* dumps a snapshot of the async schedule.
  450. * usually empty except for long-term bulk reads, or head.
  451. * one QH per line, and TDs we know about
  452. */
  453. spin_lock_irqsave (&ehci->lock, flags);
  454. for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
  455. qh_lines (ehci, qh, &next, &size);
  456. if (!list_empty(&ehci->async_unlink) && size > 0) {
  457. temp = scnprintf(next, size, "\nunlink =\n");
  458. size -= temp;
  459. next += temp;
  460. list_for_each_entry(qh, &ehci->async_unlink, unlink_node) {
  461. if (size <= 0)
  462. break;
  463. qh_lines(ehci, qh, &next, &size);
  464. }
  465. }
  466. spin_unlock_irqrestore (&ehci->lock, flags);
  467. return strlen(buf->output_buf);
  468. }
  469. #define DBG_SCHED_LIMIT 64
  470. static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
  471. {
  472. struct usb_hcd *hcd;
  473. struct ehci_hcd *ehci;
  474. unsigned long flags;
  475. union ehci_shadow p, *seen;
  476. unsigned temp, size, seen_count;
  477. char *next;
  478. unsigned i;
  479. __hc32 tag;
  480. if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
  481. return 0;
  482. seen_count = 0;
  483. hcd = bus_to_hcd(buf->bus);
  484. ehci = hcd_to_ehci (hcd);
  485. next = buf->output_buf;
  486. size = buf->alloc_size;
  487. temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size);
  488. size -= temp;
  489. next += temp;
  490. /* dump a snapshot of the periodic schedule.
  491. * iso changes, interrupt usually doesn't.
  492. */
  493. spin_lock_irqsave (&ehci->lock, flags);
  494. for (i = 0; i < ehci->periodic_size; i++) {
  495. p = ehci->pshadow [i];
  496. if (likely (!p.ptr))
  497. continue;
  498. tag = Q_NEXT_TYPE(ehci, ehci->periodic [i]);
  499. temp = scnprintf (next, size, "%4d: ", i);
  500. size -= temp;
  501. next += temp;
  502. do {
  503. struct ehci_qh_hw *hw;
  504. switch (hc32_to_cpu(ehci, tag)) {
  505. case Q_TYPE_QH:
  506. hw = p.qh->hw;
  507. temp = scnprintf (next, size, " qh%d-%04x/%p",
  508. p.qh->period,
  509. hc32_to_cpup(ehci,
  510. &hw->hw_info2)
  511. /* uframe masks */
  512. & (QH_CMASK | QH_SMASK),
  513. p.qh);
  514. size -= temp;
  515. next += temp;
  516. /* don't repeat what follows this qh */
  517. for (temp = 0; temp < seen_count; temp++) {
  518. if (seen [temp].ptr != p.ptr)
  519. continue;
  520. if (p.qh->qh_next.ptr) {
  521. temp = scnprintf (next, size,
  522. " ...");
  523. size -= temp;
  524. next += temp;
  525. }
  526. break;
  527. }
  528. /* show more info the first time around */
  529. if (temp == seen_count) {
  530. u32 scratch = hc32_to_cpup(ehci,
  531. &hw->hw_info1);
  532. struct ehci_qtd *qtd;
  533. char *type = "";
  534. /* count tds, get ep direction */
  535. temp = 0;
  536. list_for_each_entry (qtd,
  537. &p.qh->qtd_list,
  538. qtd_list) {
  539. temp++;
  540. switch (0x03 & (hc32_to_cpu(
  541. ehci,
  542. qtd->hw_token) >> 8)) {
  543. case 0: type = "out"; continue;
  544. case 1: type = "in"; continue;
  545. }
  546. }
  547. temp = scnprintf (next, size,
  548. " (%c%d ep%d%s "
  549. "[%d/%d] q%d p%d)",
  550. speed_char (scratch),
  551. scratch & 0x007f,
  552. (scratch >> 8) & 0x000f, type,
  553. p.qh->usecs, p.qh->c_usecs,
  554. temp,
  555. 0x7ff & (scratch >> 16));
  556. if (seen_count < DBG_SCHED_LIMIT)
  557. seen [seen_count++].qh = p.qh;
  558. } else
  559. temp = 0;
  560. tag = Q_NEXT_TYPE(ehci, hw->hw_next);
  561. p = p.qh->qh_next;
  562. break;
  563. case Q_TYPE_FSTN:
  564. temp = scnprintf (next, size,
  565. " fstn-%8x/%p", p.fstn->hw_prev,
  566. p.fstn);
  567. tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
  568. p = p.fstn->fstn_next;
  569. break;
  570. case Q_TYPE_ITD:
  571. temp = scnprintf (next, size,
  572. " itd/%p", p.itd);
  573. tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
  574. p = p.itd->itd_next;
  575. break;
  576. case Q_TYPE_SITD:
  577. temp = scnprintf (next, size,
  578. " sitd%d-%04x/%p",
  579. p.sitd->stream->interval,
  580. hc32_to_cpup(ehci, &p.sitd->hw_uframe)
  581. & 0x0000ffff,
  582. p.sitd);
  583. tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
  584. p = p.sitd->sitd_next;
  585. break;
  586. }
  587. size -= temp;
  588. next += temp;
  589. } while (p.ptr);
  590. temp = scnprintf (next, size, "\n");
  591. size -= temp;
  592. next += temp;
  593. }
  594. spin_unlock_irqrestore (&ehci->lock, flags);
  595. kfree (seen);
  596. return buf->alloc_size - size;
  597. }
  598. #undef DBG_SCHED_LIMIT
  599. static const char *rh_state_string(struct ehci_hcd *ehci)
  600. {
  601. switch (ehci->rh_state) {
  602. case EHCI_RH_HALTED:
  603. return "halted";
  604. case EHCI_RH_SUSPENDED:
  605. return "suspended";
  606. case EHCI_RH_RUNNING:
  607. return "running";
  608. case EHCI_RH_STOPPING:
  609. return "stopping";
  610. }
  611. return "?";
  612. }
  613. static ssize_t fill_registers_buffer(struct debug_buffer *buf)
  614. {
  615. struct usb_hcd *hcd;
  616. struct ehci_hcd *ehci;
  617. unsigned long flags;
  618. unsigned temp, size, i;
  619. char *next, scratch [80];
  620. static char fmt [] = "%*s\n";
  621. static char label [] = "";
  622. hcd = bus_to_hcd(buf->bus);
  623. ehci = hcd_to_ehci (hcd);
  624. next = buf->output_buf;
  625. size = buf->alloc_size;
  626. spin_lock_irqsave (&ehci->lock, flags);
  627. if (!HCD_HW_ACCESSIBLE(hcd)) {
  628. size = scnprintf (next, size,
  629. "bus %s, device %s\n"
  630. "%s\n"
  631. "SUSPENDED (no register access)\n",
  632. hcd->self.controller->bus->name,
  633. dev_name(hcd->self.controller),
  634. hcd->product_desc);
  635. goto done;
  636. }
  637. /* Capability Registers */
  638. i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
  639. temp = scnprintf (next, size,
  640. "bus %s, device %s\n"
  641. "%s\n"
  642. "EHCI %x.%02x, rh state %s\n",
  643. hcd->self.controller->bus->name,
  644. dev_name(hcd->self.controller),
  645. hcd->product_desc,
  646. i >> 8, i & 0x0ff, rh_state_string(ehci));
  647. size -= temp;
  648. next += temp;
  649. #ifdef CONFIG_PCI
  650. /* EHCI 0.96 and later may have "extended capabilities" */
  651. if (hcd->self.controller->bus == &pci_bus_type) {
  652. struct pci_dev *pdev;
  653. u32 offset, cap, cap2;
  654. unsigned count = 256/4;
  655. pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
  656. offset = HCC_EXT_CAPS(ehci_readl(ehci,
  657. &ehci->caps->hcc_params));
  658. while (offset && count--) {
  659. pci_read_config_dword (pdev, offset, &cap);
  660. switch (cap & 0xff) {
  661. case 1:
  662. temp = scnprintf (next, size,
  663. "ownership %08x%s%s\n", cap,
  664. (cap & (1 << 24)) ? " linux" : "",
  665. (cap & (1 << 16)) ? " firmware" : "");
  666. size -= temp;
  667. next += temp;
  668. offset += 4;
  669. pci_read_config_dword (pdev, offset, &cap2);
  670. temp = scnprintf (next, size,
  671. "SMI sts/enable 0x%08x\n", cap2);
  672. size -= temp;
  673. next += temp;
  674. break;
  675. case 0: /* illegal reserved capability */
  676. cap = 0;
  677. /* FALLTHROUGH */
  678. default: /* unknown */
  679. break;
  680. }
  681. temp = (cap >> 8) & 0xff;
  682. }
  683. }
  684. #endif
  685. // FIXME interpret both types of params
  686. i = ehci_readl(ehci, &ehci->caps->hcs_params);
  687. temp = scnprintf (next, size, "structural params 0x%08x\n", i);
  688. size -= temp;
  689. next += temp;
  690. i = ehci_readl(ehci, &ehci->caps->hcc_params);
  691. temp = scnprintf (next, size, "capability params 0x%08x\n", i);
  692. size -= temp;
  693. next += temp;
  694. /* Operational Registers */
  695. temp = dbg_status_buf (scratch, sizeof scratch, label,
  696. ehci_readl(ehci, &ehci->regs->status));
  697. temp = scnprintf (next, size, fmt, temp, scratch);
  698. size -= temp;
  699. next += temp;
  700. temp = dbg_command_buf (scratch, sizeof scratch, label,
  701. ehci_readl(ehci, &ehci->regs->command));
  702. temp = scnprintf (next, size, fmt, temp, scratch);
  703. size -= temp;
  704. next += temp;
  705. temp = dbg_intr_buf (scratch, sizeof scratch, label,
  706. ehci_readl(ehci, &ehci->regs->intr_enable));
  707. temp = scnprintf (next, size, fmt, temp, scratch);
  708. size -= temp;
  709. next += temp;
  710. temp = scnprintf (next, size, "uframe %04x\n",
  711. ehci_read_frame_index(ehci));
  712. size -= temp;
  713. next += temp;
  714. for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
  715. temp = dbg_port_buf (scratch, sizeof scratch, label, i,
  716. ehci_readl(ehci,
  717. &ehci->regs->port_status[i - 1]));
  718. temp = scnprintf (next, size, fmt, temp, scratch);
  719. size -= temp;
  720. next += temp;
  721. if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
  722. temp = scnprintf (next, size,
  723. " debug control %08x\n",
  724. ehci_readl(ehci,
  725. &ehci->debug->control));
  726. size -= temp;
  727. next += temp;
  728. }
  729. }
  730. if (!list_empty(&ehci->async_unlink)) {
  731. temp = scnprintf(next, size, "async unlink qh %p\n",
  732. list_first_entry(&ehci->async_unlink,
  733. struct ehci_qh, unlink_node));
  734. size -= temp;
  735. next += temp;
  736. }
  737. #ifdef EHCI_STATS
  738. temp = scnprintf (next, size,
  739. "irq normal %ld err %ld iaa %ld (lost %ld)\n",
  740. ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
  741. ehci->stats.lost_iaa);
  742. size -= temp;
  743. next += temp;
  744. temp = scnprintf (next, size, "complete %ld unlink %ld\n",
  745. ehci->stats.complete, ehci->stats.unlink);
  746. size -= temp;
  747. next += temp;
  748. #endif
  749. done:
  750. spin_unlock_irqrestore (&ehci->lock, flags);
  751. return buf->alloc_size - size;
  752. }
  753. static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
  754. ssize_t (*fill_func)(struct debug_buffer *))
  755. {
  756. struct debug_buffer *buf;
  757. buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
  758. if (buf) {
  759. buf->bus = bus;
  760. buf->fill_func = fill_func;
  761. mutex_init(&buf->mutex);
  762. buf->alloc_size = PAGE_SIZE;
  763. }
  764. return buf;
  765. }
  766. static int fill_buffer(struct debug_buffer *buf)
  767. {
  768. int ret = 0;
  769. if (!buf->output_buf)
  770. buf->output_buf = vmalloc(buf->alloc_size);
  771. if (!buf->output_buf) {
  772. ret = -ENOMEM;
  773. goto out;
  774. }
  775. ret = buf->fill_func(buf);
  776. if (ret >= 0) {
  777. buf->count = ret;
  778. ret = 0;
  779. }
  780. out:
  781. return ret;
  782. }
  783. static ssize_t debug_output(struct file *file, char __user *user_buf,
  784. size_t len, loff_t *offset)
  785. {
  786. struct debug_buffer *buf = file->private_data;
  787. int ret = 0;
  788. mutex_lock(&buf->mutex);
  789. if (buf->count == 0) {
  790. ret = fill_buffer(buf);
  791. if (ret != 0) {
  792. mutex_unlock(&buf->mutex);
  793. goto out;
  794. }
  795. }
  796. mutex_unlock(&buf->mutex);
  797. ret = simple_read_from_buffer(user_buf, len, offset,
  798. buf->output_buf, buf->count);
  799. out:
  800. return ret;
  801. }
  802. static int debug_close(struct inode *inode, struct file *file)
  803. {
  804. struct debug_buffer *buf = file->private_data;
  805. if (buf) {
  806. vfree(buf->output_buf);
  807. kfree(buf);
  808. }
  809. return 0;
  810. }
  811. static int debug_async_open(struct inode *inode, struct file *file)
  812. {
  813. file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
  814. return file->private_data ? 0 : -ENOMEM;
  815. }
  816. static int debug_periodic_open(struct inode *inode, struct file *file)
  817. {
  818. struct debug_buffer *buf;
  819. buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
  820. if (!buf)
  821. return -ENOMEM;
  822. buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
  823. file->private_data = buf;
  824. return 0;
  825. }
  826. static int debug_registers_open(struct inode *inode, struct file *file)
  827. {
  828. file->private_data = alloc_buffer(inode->i_private,
  829. fill_registers_buffer);
  830. return file->private_data ? 0 : -ENOMEM;
  831. }
  832. static inline void create_debug_files (struct ehci_hcd *ehci)
  833. {
  834. struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
  835. ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
  836. if (!ehci->debug_dir)
  837. return;
  838. if (!debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
  839. &debug_async_fops))
  840. goto file_error;
  841. if (!debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
  842. &debug_periodic_fops))
  843. goto file_error;
  844. if (!debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
  845. &debug_registers_fops))
  846. goto file_error;
  847. return;
  848. file_error:
  849. debugfs_remove_recursive(ehci->debug_dir);
  850. }
  851. static inline void remove_debug_files (struct ehci_hcd *ehci)
  852. {
  853. debugfs_remove_recursive(ehci->debug_dir);
  854. }
  855. #endif /* STUB_DEBUG_FILES */