udc.c 45 KB

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  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/err.h>
  16. #include <linux/irqreturn.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/usb/ch9.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/otg.h>
  23. #include <linux/usb/chipidea.h>
  24. #include "ci.h"
  25. #include "udc.h"
  26. #include "bits.h"
  27. #include "debug.h"
  28. #include "otg.h"
  29. /* control endpoint description */
  30. static const struct usb_endpoint_descriptor
  31. ctrl_endpt_out_desc = {
  32. .bLength = USB_DT_ENDPOINT_SIZE,
  33. .bDescriptorType = USB_DT_ENDPOINT,
  34. .bEndpointAddress = USB_DIR_OUT,
  35. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  36. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  37. };
  38. static const struct usb_endpoint_descriptor
  39. ctrl_endpt_in_desc = {
  40. .bLength = USB_DT_ENDPOINT_SIZE,
  41. .bDescriptorType = USB_DT_ENDPOINT,
  42. .bEndpointAddress = USB_DIR_IN,
  43. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  44. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  45. };
  46. /**
  47. * hw_ep_bit: calculates the bit number
  48. * @num: endpoint number
  49. * @dir: endpoint direction
  50. *
  51. * This function returns bit number
  52. */
  53. static inline int hw_ep_bit(int num, int dir)
  54. {
  55. return num + (dir ? 16 : 0);
  56. }
  57. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  58. {
  59. int fill = 16 - ci->hw_ep_max / 2;
  60. if (n >= ci->hw_ep_max / 2)
  61. n += fill;
  62. return n;
  63. }
  64. /**
  65. * hw_device_state: enables/disables interrupts (execute without interruption)
  66. * @dma: 0 => disable, !0 => enable and set dma engine
  67. *
  68. * This function returns an error code
  69. */
  70. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  71. {
  72. if (dma) {
  73. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  74. /* interrupt, error, port change, reset, sleep/suspend */
  75. hw_write(ci, OP_USBINTR, ~0,
  76. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  77. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  78. } else {
  79. hw_write(ci, OP_USBINTR, ~0, 0);
  80. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  81. }
  82. return 0;
  83. }
  84. /**
  85. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  86. * @num: endpoint number
  87. * @dir: endpoint direction
  88. *
  89. * This function returns an error code
  90. */
  91. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  92. {
  93. int n = hw_ep_bit(num, dir);
  94. do {
  95. /* flush any pending transfer */
  96. hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n));
  97. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  98. cpu_relax();
  99. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  100. return 0;
  101. }
  102. /**
  103. * hw_ep_disable: disables endpoint (execute without interruption)
  104. * @num: endpoint number
  105. * @dir: endpoint direction
  106. *
  107. * This function returns an error code
  108. */
  109. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  110. {
  111. hw_ep_flush(ci, num, dir);
  112. hw_write(ci, OP_ENDPTCTRL + num,
  113. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  114. return 0;
  115. }
  116. /**
  117. * hw_ep_enable: enables endpoint (execute without interruption)
  118. * @num: endpoint number
  119. * @dir: endpoint direction
  120. * @type: endpoint type
  121. *
  122. * This function returns an error code
  123. */
  124. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  125. {
  126. u32 mask, data;
  127. if (dir) {
  128. mask = ENDPTCTRL_TXT; /* type */
  129. data = type << __ffs(mask);
  130. mask |= ENDPTCTRL_TXS; /* unstall */
  131. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  132. data |= ENDPTCTRL_TXR;
  133. mask |= ENDPTCTRL_TXE; /* enable */
  134. data |= ENDPTCTRL_TXE;
  135. } else {
  136. mask = ENDPTCTRL_RXT; /* type */
  137. data = type << __ffs(mask);
  138. mask |= ENDPTCTRL_RXS; /* unstall */
  139. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  140. data |= ENDPTCTRL_RXR;
  141. mask |= ENDPTCTRL_RXE; /* enable */
  142. data |= ENDPTCTRL_RXE;
  143. }
  144. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  145. return 0;
  146. }
  147. /**
  148. * hw_ep_get_halt: return endpoint halt status
  149. * @num: endpoint number
  150. * @dir: endpoint direction
  151. *
  152. * This function returns 1 if endpoint halted
  153. */
  154. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  155. {
  156. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  157. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  158. }
  159. /**
  160. * hw_test_and_clear_setup_status: test & clear setup status (execute without
  161. * interruption)
  162. * @n: endpoint number
  163. *
  164. * This function returns setup status
  165. */
  166. static int hw_test_and_clear_setup_status(struct ci_hdrc *ci, int n)
  167. {
  168. n = ep_to_bit(ci, n);
  169. return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n));
  170. }
  171. /**
  172. * hw_ep_prime: primes endpoint (execute without interruption)
  173. * @num: endpoint number
  174. * @dir: endpoint direction
  175. * @is_ctrl: true if control endpoint
  176. *
  177. * This function returns an error code
  178. */
  179. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  180. {
  181. int n = hw_ep_bit(num, dir);
  182. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  183. return -EAGAIN;
  184. hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n));
  185. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  186. cpu_relax();
  187. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  188. return -EAGAIN;
  189. /* status shoult be tested according with manual but it doesn't work */
  190. return 0;
  191. }
  192. /**
  193. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  194. * without interruption)
  195. * @num: endpoint number
  196. * @dir: endpoint direction
  197. * @value: true => stall, false => unstall
  198. *
  199. * This function returns an error code
  200. */
  201. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  202. {
  203. if (value != 0 && value != 1)
  204. return -EINVAL;
  205. do {
  206. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  207. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  208. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  209. /* data toggle - reserved for EP0 but it's in ESS */
  210. hw_write(ci, reg, mask_xs|mask_xr,
  211. value ? mask_xs : mask_xr);
  212. } while (value != hw_ep_get_halt(ci, num, dir));
  213. return 0;
  214. }
  215. /**
  216. * hw_is_port_high_speed: test if port is high speed
  217. *
  218. * This function returns true if high speed port
  219. */
  220. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  221. {
  222. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  223. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  224. }
  225. /**
  226. * hw_read_intr_enable: returns interrupt enable register
  227. *
  228. * This function returns register data
  229. */
  230. static u32 hw_read_intr_enable(struct ci_hdrc *ci)
  231. {
  232. return hw_read(ci, OP_USBINTR, ~0);
  233. }
  234. /**
  235. * hw_read_intr_status: returns interrupt status register
  236. *
  237. * This function returns register data
  238. */
  239. static u32 hw_read_intr_status(struct ci_hdrc *ci)
  240. {
  241. return hw_read(ci, OP_USBSTS, ~0);
  242. }
  243. /**
  244. * hw_test_and_clear_complete: test & clear complete status (execute without
  245. * interruption)
  246. * @n: endpoint number
  247. *
  248. * This function returns complete status
  249. */
  250. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  251. {
  252. n = ep_to_bit(ci, n);
  253. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  254. }
  255. /**
  256. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  257. * without interruption)
  258. *
  259. * This function returns active interrutps
  260. */
  261. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  262. {
  263. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  264. hw_write(ci, OP_USBSTS, ~0, reg);
  265. return reg;
  266. }
  267. /**
  268. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  269. * interruption)
  270. *
  271. * This function returns guard value
  272. */
  273. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  274. {
  275. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  276. }
  277. /**
  278. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  279. * interruption)
  280. *
  281. * This function returns guard value
  282. */
  283. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  284. {
  285. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  286. }
  287. /**
  288. * hw_usb_set_address: configures USB address (execute without interruption)
  289. * @value: new USB address
  290. *
  291. * This function explicitly sets the address, without the "USBADRA" (advance)
  292. * feature, which is not supported by older versions of the controller.
  293. */
  294. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  295. {
  296. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  297. value << __ffs(DEVICEADDR_USBADR));
  298. }
  299. /**
  300. * hw_usb_reset: restart device after a bus reset (execute without
  301. * interruption)
  302. *
  303. * This function returns an error code
  304. */
  305. static int hw_usb_reset(struct ci_hdrc *ci)
  306. {
  307. hw_usb_set_address(ci, 0);
  308. /* ESS flushes only at end?!? */
  309. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  310. /* clear setup token semaphores */
  311. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  312. /* clear complete status */
  313. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  314. /* wait until all bits cleared */
  315. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  316. udelay(10); /* not RTOS friendly */
  317. /* reset all endpoints ? */
  318. /* reset internal status and wait for further instructions
  319. no need to verify the port reset status (ESS does it) */
  320. return 0;
  321. }
  322. /******************************************************************************
  323. * UTIL block
  324. *****************************************************************************/
  325. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  326. unsigned length)
  327. {
  328. int i;
  329. u32 temp;
  330. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  331. GFP_ATOMIC);
  332. if (node == NULL)
  333. return -ENOMEM;
  334. node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
  335. &node->dma);
  336. if (node->ptr == NULL) {
  337. kfree(node);
  338. return -ENOMEM;
  339. }
  340. memset(node->ptr, 0, sizeof(struct ci_hw_td));
  341. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  342. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  343. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  344. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  345. if (length) {
  346. node->ptr->page[0] = cpu_to_le32(temp);
  347. for (i = 1; i < TD_PAGE_COUNT; i++) {
  348. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  349. page &= ~TD_RESERVED_MASK;
  350. node->ptr->page[i] = cpu_to_le32(page);
  351. }
  352. }
  353. hwreq->req.actual += length;
  354. if (!list_empty(&hwreq->tds)) {
  355. /* get the last entry */
  356. lastnode = list_entry(hwreq->tds.prev,
  357. struct td_node, td);
  358. lastnode->ptr->next = cpu_to_le32(node->dma);
  359. }
  360. INIT_LIST_HEAD(&node->td);
  361. list_add_tail(&node->td, &hwreq->tds);
  362. return 0;
  363. }
  364. /**
  365. * _usb_addr: calculates endpoint address from direction & number
  366. * @ep: endpoint
  367. */
  368. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  369. {
  370. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  371. }
  372. /**
  373. * _hardware_queue: configures a request at hardware level
  374. * @gadget: gadget
  375. * @hwep: endpoint
  376. *
  377. * This function returns an error code
  378. */
  379. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  380. {
  381. struct ci_hdrc *ci = hwep->ci;
  382. int ret = 0;
  383. unsigned rest = hwreq->req.length;
  384. int pages = TD_PAGE_COUNT;
  385. struct td_node *firstnode, *lastnode;
  386. /* don't queue twice */
  387. if (hwreq->req.status == -EALREADY)
  388. return -EALREADY;
  389. hwreq->req.status = -EALREADY;
  390. ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
  391. if (ret)
  392. return ret;
  393. /*
  394. * The first buffer could be not page aligned.
  395. * In that case we have to span into one extra td.
  396. */
  397. if (hwreq->req.dma % PAGE_SIZE)
  398. pages--;
  399. if (rest == 0)
  400. add_td_to_list(hwep, hwreq, 0);
  401. while (rest > 0) {
  402. unsigned count = min(hwreq->req.length - hwreq->req.actual,
  403. (unsigned)(pages * CI_HDRC_PAGE_SIZE));
  404. add_td_to_list(hwep, hwreq, count);
  405. rest -= count;
  406. }
  407. if (hwreq->req.zero && hwreq->req.length
  408. && (hwreq->req.length % hwep->ep.maxpacket == 0))
  409. add_td_to_list(hwep, hwreq, 0);
  410. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  411. lastnode = list_entry(hwreq->tds.prev,
  412. struct td_node, td);
  413. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  414. if (!hwreq->req.no_interrupt)
  415. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  416. wmb();
  417. hwreq->req.actual = 0;
  418. if (!list_empty(&hwep->qh.queue)) {
  419. struct ci_hw_req *hwreqprev;
  420. int n = hw_ep_bit(hwep->num, hwep->dir);
  421. int tmp_stat;
  422. struct td_node *prevlastnode;
  423. u32 next = firstnode->dma & TD_ADDR_MASK;
  424. hwreqprev = list_entry(hwep->qh.queue.prev,
  425. struct ci_hw_req, queue);
  426. prevlastnode = list_entry(hwreqprev->tds.prev,
  427. struct td_node, td);
  428. prevlastnode->ptr->next = cpu_to_le32(next);
  429. wmb();
  430. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  431. goto done;
  432. do {
  433. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  434. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  435. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  436. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  437. if (tmp_stat)
  438. goto done;
  439. }
  440. /* QH configuration */
  441. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  442. hwep->qh.ptr->td.token &=
  443. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  444. if (hwep->type == USB_ENDPOINT_XFER_ISOC) {
  445. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  446. if (hwreq->req.length % hwep->ep.maxpacket)
  447. mul++;
  448. hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
  449. }
  450. wmb(); /* synchronize before ep prime */
  451. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  452. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  453. done:
  454. return ret;
  455. }
  456. /*
  457. * free_pending_td: remove a pending request for the endpoint
  458. * @hwep: endpoint
  459. */
  460. static void free_pending_td(struct ci_hw_ep *hwep)
  461. {
  462. struct td_node *pending = hwep->pending_td;
  463. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  464. hwep->pending_td = NULL;
  465. kfree(pending);
  466. }
  467. /**
  468. * _hardware_dequeue: handles a request at hardware level
  469. * @gadget: gadget
  470. * @hwep: endpoint
  471. *
  472. * This function returns an error code
  473. */
  474. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  475. {
  476. u32 tmptoken;
  477. struct td_node *node, *tmpnode;
  478. unsigned remaining_length;
  479. unsigned actual = hwreq->req.length;
  480. if (hwreq->req.status != -EALREADY)
  481. return -EINVAL;
  482. hwreq->req.status = 0;
  483. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  484. tmptoken = le32_to_cpu(node->ptr->token);
  485. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  486. hwreq->req.status = -EALREADY;
  487. return -EBUSY;
  488. }
  489. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  490. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  491. actual -= remaining_length;
  492. hwreq->req.status = tmptoken & TD_STATUS;
  493. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  494. hwreq->req.status = -EPIPE;
  495. break;
  496. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  497. hwreq->req.status = -EPROTO;
  498. break;
  499. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  500. hwreq->req.status = -EILSEQ;
  501. break;
  502. }
  503. if (remaining_length) {
  504. if (hwep->dir) {
  505. hwreq->req.status = -EPROTO;
  506. break;
  507. }
  508. }
  509. /*
  510. * As the hardware could still address the freed td
  511. * which will run the udc unusable, the cleanup of the
  512. * td has to be delayed by one.
  513. */
  514. if (hwep->pending_td)
  515. free_pending_td(hwep);
  516. hwep->pending_td = node;
  517. list_del_init(&node->td);
  518. }
  519. usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
  520. hwreq->req.actual += actual;
  521. if (hwreq->req.status)
  522. return hwreq->req.status;
  523. return hwreq->req.actual;
  524. }
  525. /**
  526. * _ep_nuke: dequeues all endpoint requests
  527. * @hwep: endpoint
  528. *
  529. * This function returns an error code
  530. * Caller must hold lock
  531. */
  532. static int _ep_nuke(struct ci_hw_ep *hwep)
  533. __releases(hwep->lock)
  534. __acquires(hwep->lock)
  535. {
  536. struct td_node *node, *tmpnode;
  537. if (hwep == NULL)
  538. return -EINVAL;
  539. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  540. while (!list_empty(&hwep->qh.queue)) {
  541. /* pop oldest request */
  542. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  543. struct ci_hw_req, queue);
  544. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  545. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  546. list_del_init(&node->td);
  547. node->ptr = NULL;
  548. kfree(node);
  549. }
  550. list_del_init(&hwreq->queue);
  551. hwreq->req.status = -ESHUTDOWN;
  552. if (hwreq->req.complete != NULL) {
  553. spin_unlock(hwep->lock);
  554. hwreq->req.complete(&hwep->ep, &hwreq->req);
  555. spin_lock(hwep->lock);
  556. }
  557. }
  558. if (hwep->pending_td)
  559. free_pending_td(hwep);
  560. return 0;
  561. }
  562. /**
  563. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  564. * @gadget: gadget
  565. *
  566. * This function returns an error code
  567. */
  568. static int _gadget_stop_activity(struct usb_gadget *gadget)
  569. {
  570. struct usb_ep *ep;
  571. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  572. unsigned long flags;
  573. spin_lock_irqsave(&ci->lock, flags);
  574. ci->gadget.speed = USB_SPEED_UNKNOWN;
  575. ci->remote_wakeup = 0;
  576. ci->suspended = 0;
  577. spin_unlock_irqrestore(&ci->lock, flags);
  578. /* flush all endpoints */
  579. gadget_for_each_ep(ep, gadget) {
  580. usb_ep_fifo_flush(ep);
  581. }
  582. usb_ep_fifo_flush(&ci->ep0out->ep);
  583. usb_ep_fifo_flush(&ci->ep0in->ep);
  584. if (ci->driver)
  585. ci->driver->disconnect(gadget);
  586. /* make sure to disable all endpoints */
  587. gadget_for_each_ep(ep, gadget) {
  588. usb_ep_disable(ep);
  589. }
  590. if (ci->status != NULL) {
  591. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  592. ci->status = NULL;
  593. }
  594. return 0;
  595. }
  596. /******************************************************************************
  597. * ISR block
  598. *****************************************************************************/
  599. /**
  600. * isr_reset_handler: USB reset interrupt handler
  601. * @ci: UDC device
  602. *
  603. * This function resets USB engine after a bus reset occurred
  604. */
  605. static void isr_reset_handler(struct ci_hdrc *ci)
  606. __releases(ci->lock)
  607. __acquires(ci->lock)
  608. {
  609. int retval;
  610. spin_unlock(&ci->lock);
  611. retval = _gadget_stop_activity(&ci->gadget);
  612. if (retval)
  613. goto done;
  614. retval = hw_usb_reset(ci);
  615. if (retval)
  616. goto done;
  617. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  618. if (ci->status == NULL)
  619. retval = -ENOMEM;
  620. done:
  621. spin_lock(&ci->lock);
  622. if (retval)
  623. dev_err(ci->dev, "error: %i\n", retval);
  624. }
  625. /**
  626. * isr_get_status_complete: get_status request complete function
  627. * @ep: endpoint
  628. * @req: request handled
  629. *
  630. * Caller must release lock
  631. */
  632. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  633. {
  634. if (ep == NULL || req == NULL)
  635. return;
  636. kfree(req->buf);
  637. usb_ep_free_request(ep, req);
  638. }
  639. /**
  640. * _ep_queue: queues (submits) an I/O request to an endpoint
  641. *
  642. * Caller must hold lock
  643. */
  644. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  645. gfp_t __maybe_unused gfp_flags)
  646. {
  647. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  648. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  649. struct ci_hdrc *ci = hwep->ci;
  650. int retval = 0;
  651. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  652. return -EINVAL;
  653. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  654. if (req->length)
  655. hwep = (ci->ep0_dir == RX) ?
  656. ci->ep0out : ci->ep0in;
  657. if (!list_empty(&hwep->qh.queue)) {
  658. _ep_nuke(hwep);
  659. retval = -EOVERFLOW;
  660. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  661. _usb_addr(hwep));
  662. }
  663. }
  664. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  665. hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
  666. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  667. return -EMSGSIZE;
  668. }
  669. /* first nuke then test link, e.g. previous status has not sent */
  670. if (!list_empty(&hwreq->queue)) {
  671. dev_err(hwep->ci->dev, "request already in queue\n");
  672. return -EBUSY;
  673. }
  674. /* push request */
  675. hwreq->req.status = -EINPROGRESS;
  676. hwreq->req.actual = 0;
  677. retval = _hardware_enqueue(hwep, hwreq);
  678. if (retval == -EALREADY)
  679. retval = 0;
  680. if (!retval)
  681. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  682. return retval;
  683. }
  684. /**
  685. * isr_get_status_response: get_status request response
  686. * @ci: ci struct
  687. * @setup: setup request packet
  688. *
  689. * This function returns an error code
  690. */
  691. static int isr_get_status_response(struct ci_hdrc *ci,
  692. struct usb_ctrlrequest *setup)
  693. __releases(hwep->lock)
  694. __acquires(hwep->lock)
  695. {
  696. struct ci_hw_ep *hwep = ci->ep0in;
  697. struct usb_request *req = NULL;
  698. gfp_t gfp_flags = GFP_ATOMIC;
  699. int dir, num, retval;
  700. if (hwep == NULL || setup == NULL)
  701. return -EINVAL;
  702. spin_unlock(hwep->lock);
  703. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  704. spin_lock(hwep->lock);
  705. if (req == NULL)
  706. return -ENOMEM;
  707. req->complete = isr_get_status_complete;
  708. req->length = 2;
  709. req->buf = kzalloc(req->length, gfp_flags);
  710. if (req->buf == NULL) {
  711. retval = -ENOMEM;
  712. goto err_free_req;
  713. }
  714. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  715. /* Assume that device is bus powered for now. */
  716. *(u16 *)req->buf = ci->remote_wakeup << 1;
  717. retval = 0;
  718. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  719. == USB_RECIP_ENDPOINT) {
  720. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  721. TX : RX;
  722. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  723. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  724. }
  725. /* else do nothing; reserved for future use */
  726. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  727. if (retval)
  728. goto err_free_buf;
  729. return 0;
  730. err_free_buf:
  731. kfree(req->buf);
  732. err_free_req:
  733. spin_unlock(hwep->lock);
  734. usb_ep_free_request(&hwep->ep, req);
  735. spin_lock(hwep->lock);
  736. return retval;
  737. }
  738. /**
  739. * isr_setup_status_complete: setup_status request complete function
  740. * @ep: endpoint
  741. * @req: request handled
  742. *
  743. * Caller must release lock. Put the port in test mode if test mode
  744. * feature is selected.
  745. */
  746. static void
  747. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  748. {
  749. struct ci_hdrc *ci = req->context;
  750. unsigned long flags;
  751. if (ci->setaddr) {
  752. hw_usb_set_address(ci, ci->address);
  753. ci->setaddr = false;
  754. }
  755. spin_lock_irqsave(&ci->lock, flags);
  756. if (ci->test_mode)
  757. hw_port_test_set(ci, ci->test_mode);
  758. spin_unlock_irqrestore(&ci->lock, flags);
  759. }
  760. /**
  761. * isr_setup_status_phase: queues the status phase of a setup transation
  762. * @ci: ci struct
  763. *
  764. * This function returns an error code
  765. */
  766. static int isr_setup_status_phase(struct ci_hdrc *ci)
  767. {
  768. int retval;
  769. struct ci_hw_ep *hwep;
  770. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  771. ci->status->context = ci;
  772. ci->status->complete = isr_setup_status_complete;
  773. retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  774. return retval;
  775. }
  776. /**
  777. * isr_tr_complete_low: transaction complete low level handler
  778. * @hwep: endpoint
  779. *
  780. * This function returns an error code
  781. * Caller must hold lock
  782. */
  783. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  784. __releases(hwep->lock)
  785. __acquires(hwep->lock)
  786. {
  787. struct ci_hw_req *hwreq, *hwreqtemp;
  788. struct ci_hw_ep *hweptemp = hwep;
  789. int retval = 0;
  790. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  791. queue) {
  792. retval = _hardware_dequeue(hwep, hwreq);
  793. if (retval < 0)
  794. break;
  795. list_del_init(&hwreq->queue);
  796. if (hwreq->req.complete != NULL) {
  797. spin_unlock(hwep->lock);
  798. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  799. hwreq->req.length)
  800. hweptemp = hwep->ci->ep0in;
  801. hwreq->req.complete(&hweptemp->ep, &hwreq->req);
  802. spin_lock(hwep->lock);
  803. }
  804. }
  805. if (retval == -EBUSY)
  806. retval = 0;
  807. return retval;
  808. }
  809. /**
  810. * isr_tr_complete_handler: transaction complete interrupt handler
  811. * @ci: UDC descriptor
  812. *
  813. * This function handles traffic events
  814. */
  815. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  816. __releases(ci->lock)
  817. __acquires(ci->lock)
  818. {
  819. unsigned i;
  820. u8 tmode = 0;
  821. for (i = 0; i < ci->hw_ep_max; i++) {
  822. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  823. int type, num, dir, err = -EINVAL;
  824. struct usb_ctrlrequest req;
  825. if (hwep->ep.desc == NULL)
  826. continue; /* not configured */
  827. if (hw_test_and_clear_complete(ci, i)) {
  828. err = isr_tr_complete_low(hwep);
  829. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  830. if (err > 0) /* needs status phase */
  831. err = isr_setup_status_phase(ci);
  832. if (err < 0) {
  833. spin_unlock(&ci->lock);
  834. if (usb_ep_set_halt(&hwep->ep))
  835. dev_err(ci->dev,
  836. "error: ep_set_halt\n");
  837. spin_lock(&ci->lock);
  838. }
  839. }
  840. }
  841. if (hwep->type != USB_ENDPOINT_XFER_CONTROL ||
  842. !hw_test_and_clear_setup_status(ci, i))
  843. continue;
  844. if (i != 0) {
  845. dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i);
  846. continue;
  847. }
  848. /*
  849. * Flush data and handshake transactions of previous
  850. * setup packet.
  851. */
  852. _ep_nuke(ci->ep0out);
  853. _ep_nuke(ci->ep0in);
  854. /* read_setup_packet */
  855. do {
  856. hw_test_and_set_setup_guard(ci);
  857. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  858. } while (!hw_test_and_clear_setup_guard(ci));
  859. type = req.bRequestType;
  860. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  861. switch (req.bRequest) {
  862. case USB_REQ_CLEAR_FEATURE:
  863. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  864. le16_to_cpu(req.wValue) ==
  865. USB_ENDPOINT_HALT) {
  866. if (req.wLength != 0)
  867. break;
  868. num = le16_to_cpu(req.wIndex);
  869. dir = num & USB_ENDPOINT_DIR_MASK;
  870. num &= USB_ENDPOINT_NUMBER_MASK;
  871. if (dir) /* TX */
  872. num += ci->hw_ep_max/2;
  873. if (!ci->ci_hw_ep[num].wedge) {
  874. spin_unlock(&ci->lock);
  875. err = usb_ep_clear_halt(
  876. &ci->ci_hw_ep[num].ep);
  877. spin_lock(&ci->lock);
  878. if (err)
  879. break;
  880. }
  881. err = isr_setup_status_phase(ci);
  882. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  883. le16_to_cpu(req.wValue) ==
  884. USB_DEVICE_REMOTE_WAKEUP) {
  885. if (req.wLength != 0)
  886. break;
  887. ci->remote_wakeup = 0;
  888. err = isr_setup_status_phase(ci);
  889. } else {
  890. goto delegate;
  891. }
  892. break;
  893. case USB_REQ_GET_STATUS:
  894. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  895. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  896. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  897. goto delegate;
  898. if (le16_to_cpu(req.wLength) != 2 ||
  899. le16_to_cpu(req.wValue) != 0)
  900. break;
  901. err = isr_get_status_response(ci, &req);
  902. break;
  903. case USB_REQ_SET_ADDRESS:
  904. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  905. goto delegate;
  906. if (le16_to_cpu(req.wLength) != 0 ||
  907. le16_to_cpu(req.wIndex) != 0)
  908. break;
  909. ci->address = (u8)le16_to_cpu(req.wValue);
  910. ci->setaddr = true;
  911. err = isr_setup_status_phase(ci);
  912. break;
  913. case USB_REQ_SET_FEATURE:
  914. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  915. le16_to_cpu(req.wValue) ==
  916. USB_ENDPOINT_HALT) {
  917. if (req.wLength != 0)
  918. break;
  919. num = le16_to_cpu(req.wIndex);
  920. dir = num & USB_ENDPOINT_DIR_MASK;
  921. num &= USB_ENDPOINT_NUMBER_MASK;
  922. if (dir) /* TX */
  923. num += ci->hw_ep_max/2;
  924. spin_unlock(&ci->lock);
  925. err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep);
  926. spin_lock(&ci->lock);
  927. if (!err)
  928. isr_setup_status_phase(ci);
  929. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  930. if (req.wLength != 0)
  931. break;
  932. switch (le16_to_cpu(req.wValue)) {
  933. case USB_DEVICE_REMOTE_WAKEUP:
  934. ci->remote_wakeup = 1;
  935. err = isr_setup_status_phase(ci);
  936. break;
  937. case USB_DEVICE_TEST_MODE:
  938. tmode = le16_to_cpu(req.wIndex) >> 8;
  939. switch (tmode) {
  940. case TEST_J:
  941. case TEST_K:
  942. case TEST_SE0_NAK:
  943. case TEST_PACKET:
  944. case TEST_FORCE_EN:
  945. ci->test_mode = tmode;
  946. err = isr_setup_status_phase(
  947. ci);
  948. break;
  949. default:
  950. break;
  951. }
  952. default:
  953. goto delegate;
  954. }
  955. } else {
  956. goto delegate;
  957. }
  958. break;
  959. default:
  960. delegate:
  961. if (req.wLength == 0) /* no data phase */
  962. ci->ep0_dir = TX;
  963. spin_unlock(&ci->lock);
  964. err = ci->driver->setup(&ci->gadget, &req);
  965. spin_lock(&ci->lock);
  966. break;
  967. }
  968. if (err < 0) {
  969. spin_unlock(&ci->lock);
  970. if (usb_ep_set_halt(&hwep->ep))
  971. dev_err(ci->dev, "error: ep_set_halt\n");
  972. spin_lock(&ci->lock);
  973. }
  974. }
  975. }
  976. /******************************************************************************
  977. * ENDPT block
  978. *****************************************************************************/
  979. /**
  980. * ep_enable: configure endpoint, making it usable
  981. *
  982. * Check usb_ep_enable() at "usb_gadget.h" for details
  983. */
  984. static int ep_enable(struct usb_ep *ep,
  985. const struct usb_endpoint_descriptor *desc)
  986. {
  987. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  988. int retval = 0;
  989. unsigned long flags;
  990. u32 cap = 0;
  991. if (ep == NULL || desc == NULL)
  992. return -EINVAL;
  993. spin_lock_irqsave(hwep->lock, flags);
  994. /* only internal SW should enable ctrl endpts */
  995. hwep->ep.desc = desc;
  996. if (!list_empty(&hwep->qh.queue))
  997. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  998. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  999. hwep->num = usb_endpoint_num(desc);
  1000. hwep->type = usb_endpoint_type(desc);
  1001. hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
  1002. hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
  1003. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1004. cap |= QH_IOS;
  1005. if (hwep->num)
  1006. cap |= QH_ZLT;
  1007. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1008. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1009. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1010. /*
  1011. * Enable endpoints in the HW other than ep0 as ep0
  1012. * is always enabled
  1013. */
  1014. if (hwep->num)
  1015. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1016. hwep->type);
  1017. spin_unlock_irqrestore(hwep->lock, flags);
  1018. return retval;
  1019. }
  1020. /**
  1021. * ep_disable: endpoint is no longer usable
  1022. *
  1023. * Check usb_ep_disable() at "usb_gadget.h" for details
  1024. */
  1025. static int ep_disable(struct usb_ep *ep)
  1026. {
  1027. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1028. int direction, retval = 0;
  1029. unsigned long flags;
  1030. if (ep == NULL)
  1031. return -EINVAL;
  1032. else if (hwep->ep.desc == NULL)
  1033. return -EBUSY;
  1034. spin_lock_irqsave(hwep->lock, flags);
  1035. /* only internal SW should disable ctrl endpts */
  1036. direction = hwep->dir;
  1037. do {
  1038. retval |= _ep_nuke(hwep);
  1039. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1040. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1041. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1042. } while (hwep->dir != direction);
  1043. hwep->ep.desc = NULL;
  1044. spin_unlock_irqrestore(hwep->lock, flags);
  1045. return retval;
  1046. }
  1047. /**
  1048. * ep_alloc_request: allocate a request object to use with this endpoint
  1049. *
  1050. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1051. */
  1052. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1053. {
  1054. struct ci_hw_req *hwreq = NULL;
  1055. if (ep == NULL)
  1056. return NULL;
  1057. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1058. if (hwreq != NULL) {
  1059. INIT_LIST_HEAD(&hwreq->queue);
  1060. INIT_LIST_HEAD(&hwreq->tds);
  1061. }
  1062. return (hwreq == NULL) ? NULL : &hwreq->req;
  1063. }
  1064. /**
  1065. * ep_free_request: frees a request object
  1066. *
  1067. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1068. */
  1069. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1070. {
  1071. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1072. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1073. struct td_node *node, *tmpnode;
  1074. unsigned long flags;
  1075. if (ep == NULL || req == NULL) {
  1076. return;
  1077. } else if (!list_empty(&hwreq->queue)) {
  1078. dev_err(hwep->ci->dev, "freeing queued request\n");
  1079. return;
  1080. }
  1081. spin_lock_irqsave(hwep->lock, flags);
  1082. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1083. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1084. list_del_init(&node->td);
  1085. node->ptr = NULL;
  1086. kfree(node);
  1087. }
  1088. kfree(hwreq);
  1089. spin_unlock_irqrestore(hwep->lock, flags);
  1090. }
  1091. /**
  1092. * ep_queue: queues (submits) an I/O request to an endpoint
  1093. *
  1094. * Check usb_ep_queue()* at usb_gadget.h" for details
  1095. */
  1096. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1097. gfp_t __maybe_unused gfp_flags)
  1098. {
  1099. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1100. int retval = 0;
  1101. unsigned long flags;
  1102. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1103. return -EINVAL;
  1104. spin_lock_irqsave(hwep->lock, flags);
  1105. retval = _ep_queue(ep, req, gfp_flags);
  1106. spin_unlock_irqrestore(hwep->lock, flags);
  1107. return retval;
  1108. }
  1109. /**
  1110. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1111. *
  1112. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1113. */
  1114. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1115. {
  1116. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1117. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1118. unsigned long flags;
  1119. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1120. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1121. list_empty(&hwep->qh.queue))
  1122. return -EINVAL;
  1123. spin_lock_irqsave(hwep->lock, flags);
  1124. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1125. /* pop request */
  1126. list_del_init(&hwreq->queue);
  1127. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1128. req->status = -ECONNRESET;
  1129. if (hwreq->req.complete != NULL) {
  1130. spin_unlock(hwep->lock);
  1131. hwreq->req.complete(&hwep->ep, &hwreq->req);
  1132. spin_lock(hwep->lock);
  1133. }
  1134. spin_unlock_irqrestore(hwep->lock, flags);
  1135. return 0;
  1136. }
  1137. /**
  1138. * ep_set_halt: sets the endpoint halt feature
  1139. *
  1140. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1141. */
  1142. static int ep_set_halt(struct usb_ep *ep, int value)
  1143. {
  1144. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1145. int direction, retval = 0;
  1146. unsigned long flags;
  1147. if (ep == NULL || hwep->ep.desc == NULL)
  1148. return -EINVAL;
  1149. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  1150. return -EOPNOTSUPP;
  1151. spin_lock_irqsave(hwep->lock, flags);
  1152. #ifndef STALL_IN
  1153. /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
  1154. if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
  1155. !list_empty(&hwep->qh.queue)) {
  1156. spin_unlock_irqrestore(hwep->lock, flags);
  1157. return -EAGAIN;
  1158. }
  1159. #endif
  1160. direction = hwep->dir;
  1161. do {
  1162. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  1163. if (!value)
  1164. hwep->wedge = 0;
  1165. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1166. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1167. } while (hwep->dir != direction);
  1168. spin_unlock_irqrestore(hwep->lock, flags);
  1169. return retval;
  1170. }
  1171. /**
  1172. * ep_set_wedge: sets the halt feature and ignores clear requests
  1173. *
  1174. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1175. */
  1176. static int ep_set_wedge(struct usb_ep *ep)
  1177. {
  1178. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1179. unsigned long flags;
  1180. if (ep == NULL || hwep->ep.desc == NULL)
  1181. return -EINVAL;
  1182. spin_lock_irqsave(hwep->lock, flags);
  1183. hwep->wedge = 1;
  1184. spin_unlock_irqrestore(hwep->lock, flags);
  1185. return usb_ep_set_halt(ep);
  1186. }
  1187. /**
  1188. * ep_fifo_flush: flushes contents of a fifo
  1189. *
  1190. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1191. */
  1192. static void ep_fifo_flush(struct usb_ep *ep)
  1193. {
  1194. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1195. unsigned long flags;
  1196. if (ep == NULL) {
  1197. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1198. return;
  1199. }
  1200. spin_lock_irqsave(hwep->lock, flags);
  1201. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1202. spin_unlock_irqrestore(hwep->lock, flags);
  1203. }
  1204. /**
  1205. * Endpoint-specific part of the API to the USB controller hardware
  1206. * Check "usb_gadget.h" for details
  1207. */
  1208. static const struct usb_ep_ops usb_ep_ops = {
  1209. .enable = ep_enable,
  1210. .disable = ep_disable,
  1211. .alloc_request = ep_alloc_request,
  1212. .free_request = ep_free_request,
  1213. .queue = ep_queue,
  1214. .dequeue = ep_dequeue,
  1215. .set_halt = ep_set_halt,
  1216. .set_wedge = ep_set_wedge,
  1217. .fifo_flush = ep_fifo_flush,
  1218. };
  1219. /******************************************************************************
  1220. * GADGET block
  1221. *****************************************************************************/
  1222. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1223. {
  1224. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1225. unsigned long flags;
  1226. int gadget_ready = 0;
  1227. spin_lock_irqsave(&ci->lock, flags);
  1228. ci->vbus_active = is_active;
  1229. if (ci->driver)
  1230. gadget_ready = 1;
  1231. spin_unlock_irqrestore(&ci->lock, flags);
  1232. if (gadget_ready) {
  1233. if (is_active) {
  1234. pm_runtime_get_sync(&_gadget->dev);
  1235. hw_device_reset(ci, USBMODE_CM_DC);
  1236. hw_device_state(ci, ci->ep0out->qh.dma);
  1237. dev_dbg(ci->dev, "Connected to host\n");
  1238. } else {
  1239. hw_device_state(ci, 0);
  1240. if (ci->platdata->notify_event)
  1241. ci->platdata->notify_event(ci,
  1242. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1243. _gadget_stop_activity(&ci->gadget);
  1244. pm_runtime_put_sync(&_gadget->dev);
  1245. dev_dbg(ci->dev, "Disconnected from host\n");
  1246. }
  1247. }
  1248. return 0;
  1249. }
  1250. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1251. {
  1252. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1253. unsigned long flags;
  1254. int ret = 0;
  1255. spin_lock_irqsave(&ci->lock, flags);
  1256. if (!ci->remote_wakeup) {
  1257. ret = -EOPNOTSUPP;
  1258. goto out;
  1259. }
  1260. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1261. ret = -EINVAL;
  1262. goto out;
  1263. }
  1264. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1265. out:
  1266. spin_unlock_irqrestore(&ci->lock, flags);
  1267. return ret;
  1268. }
  1269. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1270. {
  1271. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1272. if (ci->transceiver)
  1273. return usb_phy_set_power(ci->transceiver, ma);
  1274. return -ENOTSUPP;
  1275. }
  1276. /* Change Data+ pullup status
  1277. * this func is used by usb_gadget_connect/disconnet
  1278. */
  1279. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1280. {
  1281. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1282. if (!ci->vbus_active)
  1283. return -EOPNOTSUPP;
  1284. if (is_on)
  1285. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1286. else
  1287. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1288. return 0;
  1289. }
  1290. static int ci_udc_start(struct usb_gadget *gadget,
  1291. struct usb_gadget_driver *driver);
  1292. static int ci_udc_stop(struct usb_gadget *gadget,
  1293. struct usb_gadget_driver *driver);
  1294. /**
  1295. * Device operations part of the API to the USB controller hardware,
  1296. * which don't involve endpoints (or i/o)
  1297. * Check "usb_gadget.h" for details
  1298. */
  1299. static const struct usb_gadget_ops usb_gadget_ops = {
  1300. .vbus_session = ci_udc_vbus_session,
  1301. .wakeup = ci_udc_wakeup,
  1302. .pullup = ci_udc_pullup,
  1303. .vbus_draw = ci_udc_vbus_draw,
  1304. .udc_start = ci_udc_start,
  1305. .udc_stop = ci_udc_stop,
  1306. };
  1307. static int init_eps(struct ci_hdrc *ci)
  1308. {
  1309. int retval = 0, i, j;
  1310. for (i = 0; i < ci->hw_ep_max/2; i++)
  1311. for (j = RX; j <= TX; j++) {
  1312. int k = i + j * ci->hw_ep_max/2;
  1313. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1314. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1315. (j == TX) ? "in" : "out");
  1316. hwep->ci = ci;
  1317. hwep->lock = &ci->lock;
  1318. hwep->td_pool = ci->td_pool;
  1319. hwep->ep.name = hwep->name;
  1320. hwep->ep.ops = &usb_ep_ops;
  1321. /*
  1322. * for ep0: maxP defined in desc, for other
  1323. * eps, maxP is set by epautoconfig() called
  1324. * by gadget layer
  1325. */
  1326. hwep->ep.maxpacket = (unsigned short)~0;
  1327. INIT_LIST_HEAD(&hwep->qh.queue);
  1328. hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1329. &hwep->qh.dma);
  1330. if (hwep->qh.ptr == NULL)
  1331. retval = -ENOMEM;
  1332. else
  1333. memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
  1334. /*
  1335. * set up shorthands for ep0 out and in endpoints,
  1336. * don't add to gadget's ep_list
  1337. */
  1338. if (i == 0) {
  1339. if (j == RX)
  1340. ci->ep0out = hwep;
  1341. else
  1342. ci->ep0in = hwep;
  1343. hwep->ep.maxpacket = CTRL_PAYLOAD_MAX;
  1344. continue;
  1345. }
  1346. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1347. }
  1348. return retval;
  1349. }
  1350. static void destroy_eps(struct ci_hdrc *ci)
  1351. {
  1352. int i;
  1353. for (i = 0; i < ci->hw_ep_max; i++) {
  1354. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1355. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1356. }
  1357. }
  1358. /**
  1359. * ci_udc_start: register a gadget driver
  1360. * @gadget: our gadget
  1361. * @driver: the driver being registered
  1362. *
  1363. * Interrupts are enabled here.
  1364. */
  1365. static int ci_udc_start(struct usb_gadget *gadget,
  1366. struct usb_gadget_driver *driver)
  1367. {
  1368. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1369. unsigned long flags;
  1370. int retval = -ENOMEM;
  1371. if (driver->disconnect == NULL)
  1372. return -EINVAL;
  1373. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1374. retval = usb_ep_enable(&ci->ep0out->ep);
  1375. if (retval)
  1376. return retval;
  1377. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1378. retval = usb_ep_enable(&ci->ep0in->ep);
  1379. if (retval)
  1380. return retval;
  1381. spin_lock_irqsave(&ci->lock, flags);
  1382. ci->driver = driver;
  1383. pm_runtime_get_sync(&ci->gadget.dev);
  1384. if (ci->vbus_active) {
  1385. hw_device_reset(ci, USBMODE_CM_DC);
  1386. } else {
  1387. pm_runtime_put_sync(&ci->gadget.dev);
  1388. goto done;
  1389. }
  1390. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1391. if (retval)
  1392. pm_runtime_put_sync(&ci->gadget.dev);
  1393. done:
  1394. spin_unlock_irqrestore(&ci->lock, flags);
  1395. return retval;
  1396. }
  1397. /**
  1398. * ci_udc_stop: unregister a gadget driver
  1399. */
  1400. static int ci_udc_stop(struct usb_gadget *gadget,
  1401. struct usb_gadget_driver *driver)
  1402. {
  1403. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1404. unsigned long flags;
  1405. spin_lock_irqsave(&ci->lock, flags);
  1406. if (ci->vbus_active) {
  1407. hw_device_state(ci, 0);
  1408. if (ci->platdata->notify_event)
  1409. ci->platdata->notify_event(ci,
  1410. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1411. ci->driver = NULL;
  1412. spin_unlock_irqrestore(&ci->lock, flags);
  1413. _gadget_stop_activity(&ci->gadget);
  1414. spin_lock_irqsave(&ci->lock, flags);
  1415. pm_runtime_put(&ci->gadget.dev);
  1416. }
  1417. spin_unlock_irqrestore(&ci->lock, flags);
  1418. return 0;
  1419. }
  1420. /******************************************************************************
  1421. * BUS block
  1422. *****************************************************************************/
  1423. /**
  1424. * udc_irq: ci interrupt handler
  1425. *
  1426. * This function returns IRQ_HANDLED if the IRQ has been handled
  1427. * It locks access to registers
  1428. */
  1429. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1430. {
  1431. irqreturn_t retval;
  1432. u32 intr;
  1433. if (ci == NULL)
  1434. return IRQ_HANDLED;
  1435. spin_lock(&ci->lock);
  1436. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1437. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1438. USBMODE_CM_DC) {
  1439. spin_unlock(&ci->lock);
  1440. return IRQ_NONE;
  1441. }
  1442. }
  1443. intr = hw_test_and_clear_intr_active(ci);
  1444. if (intr) {
  1445. /* order defines priority - do NOT change it */
  1446. if (USBi_URI & intr)
  1447. isr_reset_handler(ci);
  1448. if (USBi_PCI & intr) {
  1449. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1450. USB_SPEED_HIGH : USB_SPEED_FULL;
  1451. if (ci->suspended && ci->driver->resume) {
  1452. spin_unlock(&ci->lock);
  1453. ci->driver->resume(&ci->gadget);
  1454. spin_lock(&ci->lock);
  1455. ci->suspended = 0;
  1456. }
  1457. }
  1458. if (USBi_UI & intr)
  1459. isr_tr_complete_handler(ci);
  1460. if (USBi_SLI & intr) {
  1461. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1462. ci->driver->suspend) {
  1463. ci->suspended = 1;
  1464. spin_unlock(&ci->lock);
  1465. ci->driver->suspend(&ci->gadget);
  1466. spin_lock(&ci->lock);
  1467. }
  1468. }
  1469. retval = IRQ_HANDLED;
  1470. } else {
  1471. retval = IRQ_NONE;
  1472. }
  1473. spin_unlock(&ci->lock);
  1474. return retval;
  1475. }
  1476. /**
  1477. * udc_start: initialize gadget role
  1478. * @ci: chipidea controller
  1479. */
  1480. static int udc_start(struct ci_hdrc *ci)
  1481. {
  1482. struct device *dev = ci->dev;
  1483. int retval = 0;
  1484. spin_lock_init(&ci->lock);
  1485. ci->gadget.ops = &usb_gadget_ops;
  1486. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1487. ci->gadget.max_speed = USB_SPEED_HIGH;
  1488. ci->gadget.is_otg = 0;
  1489. ci->gadget.name = ci->platdata->name;
  1490. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1491. /* alloc resources */
  1492. ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
  1493. sizeof(struct ci_hw_qh),
  1494. 64, CI_HDRC_PAGE_SIZE);
  1495. if (ci->qh_pool == NULL)
  1496. return -ENOMEM;
  1497. ci->td_pool = dma_pool_create("ci_hw_td", dev,
  1498. sizeof(struct ci_hw_td),
  1499. 64, CI_HDRC_PAGE_SIZE);
  1500. if (ci->td_pool == NULL) {
  1501. retval = -ENOMEM;
  1502. goto free_qh_pool;
  1503. }
  1504. retval = init_eps(ci);
  1505. if (retval)
  1506. goto free_pools;
  1507. ci->gadget.ep0 = &ci->ep0in->ep;
  1508. if (ci->global_phy) {
  1509. ci->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
  1510. if (IS_ERR(ci->transceiver))
  1511. ci->transceiver = NULL;
  1512. }
  1513. if (ci->platdata->flags & CI_HDRC_REQUIRE_TRANSCEIVER) {
  1514. if (ci->transceiver == NULL) {
  1515. retval = -ENODEV;
  1516. goto destroy_eps;
  1517. }
  1518. }
  1519. if (ci->transceiver) {
  1520. retval = otg_set_peripheral(ci->transceiver->otg,
  1521. &ci->gadget);
  1522. /*
  1523. * If we implement all USB functions using chipidea drivers,
  1524. * it doesn't need to call above API, meanwhile, if we only
  1525. * use gadget function, calling above API is useless.
  1526. */
  1527. if (retval && retval != -ENOTSUPP)
  1528. goto put_transceiver;
  1529. }
  1530. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1531. if (retval)
  1532. goto remove_trans;
  1533. pm_runtime_no_callbacks(&ci->gadget.dev);
  1534. pm_runtime_enable(&ci->gadget.dev);
  1535. /* Update ci->vbus_active */
  1536. ci_handle_vbus_change(ci);
  1537. return retval;
  1538. remove_trans:
  1539. if (ci->transceiver) {
  1540. otg_set_peripheral(ci->transceiver->otg, NULL);
  1541. if (ci->global_phy)
  1542. usb_put_phy(ci->transceiver);
  1543. }
  1544. dev_err(dev, "error = %i\n", retval);
  1545. put_transceiver:
  1546. if (ci->transceiver && ci->global_phy)
  1547. usb_put_phy(ci->transceiver);
  1548. destroy_eps:
  1549. destroy_eps(ci);
  1550. free_pools:
  1551. dma_pool_destroy(ci->td_pool);
  1552. free_qh_pool:
  1553. dma_pool_destroy(ci->qh_pool);
  1554. return retval;
  1555. }
  1556. /**
  1557. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1558. *
  1559. * No interrupts active, the IRQ has been released
  1560. */
  1561. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1562. {
  1563. if (!ci->roles[CI_ROLE_GADGET])
  1564. return;
  1565. usb_del_gadget_udc(&ci->gadget);
  1566. destroy_eps(ci);
  1567. dma_pool_destroy(ci->td_pool);
  1568. dma_pool_destroy(ci->qh_pool);
  1569. if (ci->transceiver) {
  1570. otg_set_peripheral(ci->transceiver->otg, NULL);
  1571. if (ci->global_phy)
  1572. usb_put_phy(ci->transceiver);
  1573. }
  1574. }
  1575. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1576. {
  1577. if (ci->is_otg) {
  1578. ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
  1579. ci_enable_otg_interrupt(ci, OTGSC_BSVIE);
  1580. }
  1581. return 0;
  1582. }
  1583. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1584. {
  1585. if (ci->is_otg) {
  1586. /* host doesn't care B_SESSION_VALID event */
  1587. ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
  1588. ci_disable_otg_interrupt(ci, OTGSC_BSVIE);
  1589. }
  1590. }
  1591. /**
  1592. * ci_hdrc_gadget_init - initialize device related bits
  1593. * ci: the controller
  1594. *
  1595. * This function initializes the gadget, if the device is "device capable".
  1596. */
  1597. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1598. {
  1599. struct ci_role_driver *rdrv;
  1600. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1601. return -ENXIO;
  1602. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1603. if (!rdrv)
  1604. return -ENOMEM;
  1605. rdrv->start = udc_id_switch_for_device;
  1606. rdrv->stop = udc_id_switch_for_host;
  1607. rdrv->irq = udc_irq;
  1608. rdrv->name = "gadget";
  1609. ci->roles[CI_ROLE_GADGET] = rdrv;
  1610. return udc_start(ci);
  1611. }