st-asc.c 22 KB

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  1. /*
  2. * st-asc.c: ST Asynchronous serial controller (ASC) driver
  3. *
  4. * Copyright (C) 2003-2013 STMicroelectronics (R&D) Limited
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. */
  12. #if defined(CONFIG_SERIAL_ST_ASC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  13. #define SUPPORT_SYSRQ
  14. #endif
  15. #include <linux/module.h>
  16. #include <linux/serial.h>
  17. #include <linux/console.h>
  18. #include <linux/sysrq.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/io.h>
  21. #include <linux/irq.h>
  22. #include <linux/tty.h>
  23. #include <linux/tty_flip.h>
  24. #include <linux/delay.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/of.h>
  28. #include <linux/of_platform.h>
  29. #include <linux/serial_core.h>
  30. #include <linux/clk.h>
  31. #define DRIVER_NAME "st-asc"
  32. #define ASC_SERIAL_NAME "ttyAS"
  33. #define ASC_FIFO_SIZE 16
  34. #define ASC_MAX_PORTS 8
  35. struct asc_port {
  36. struct uart_port port;
  37. struct clk *clk;
  38. unsigned int hw_flow_control:1;
  39. unsigned int force_m1:1;
  40. };
  41. static struct asc_port asc_ports[ASC_MAX_PORTS];
  42. static struct uart_driver asc_uart_driver;
  43. /*---- UART Register definitions ------------------------------*/
  44. /* Register offsets */
  45. #define ASC_BAUDRATE 0x00
  46. #define ASC_TXBUF 0x04
  47. #define ASC_RXBUF 0x08
  48. #define ASC_CTL 0x0C
  49. #define ASC_INTEN 0x10
  50. #define ASC_STA 0x14
  51. #define ASC_GUARDTIME 0x18
  52. #define ASC_TIMEOUT 0x1C
  53. #define ASC_TXRESET 0x20
  54. #define ASC_RXRESET 0x24
  55. #define ASC_RETRIES 0x28
  56. /* ASC_RXBUF */
  57. #define ASC_RXBUF_PE 0x100
  58. #define ASC_RXBUF_FE 0x200
  59. /**
  60. * Some of status comes from higher bits of the character and some come from
  61. * the status register. Combining both of them in to single status using dummy
  62. * bits.
  63. */
  64. #define ASC_RXBUF_DUMMY_RX 0x10000
  65. #define ASC_RXBUF_DUMMY_BE 0x20000
  66. #define ASC_RXBUF_DUMMY_OE 0x40000
  67. /* ASC_CTL */
  68. #define ASC_CTL_MODE_MSK 0x0007
  69. #define ASC_CTL_MODE_8BIT 0x0001
  70. #define ASC_CTL_MODE_7BIT_PAR 0x0003
  71. #define ASC_CTL_MODE_9BIT 0x0004
  72. #define ASC_CTL_MODE_8BIT_WKUP 0x0005
  73. #define ASC_CTL_MODE_8BIT_PAR 0x0007
  74. #define ASC_CTL_STOP_MSK 0x0018
  75. #define ASC_CTL_STOP_HALFBIT 0x0000
  76. #define ASC_CTL_STOP_1BIT 0x0008
  77. #define ASC_CTL_STOP_1_HALFBIT 0x0010
  78. #define ASC_CTL_STOP_2BIT 0x0018
  79. #define ASC_CTL_PARITYODD 0x0020
  80. #define ASC_CTL_LOOPBACK 0x0040
  81. #define ASC_CTL_RUN 0x0080
  82. #define ASC_CTL_RXENABLE 0x0100
  83. #define ASC_CTL_SCENABLE 0x0200
  84. #define ASC_CTL_FIFOENABLE 0x0400
  85. #define ASC_CTL_CTSENABLE 0x0800
  86. #define ASC_CTL_BAUDMODE 0x1000
  87. /* ASC_GUARDTIME */
  88. #define ASC_GUARDTIME_MSK 0x00FF
  89. /* ASC_INTEN */
  90. #define ASC_INTEN_RBE 0x0001
  91. #define ASC_INTEN_TE 0x0002
  92. #define ASC_INTEN_THE 0x0004
  93. #define ASC_INTEN_PE 0x0008
  94. #define ASC_INTEN_FE 0x0010
  95. #define ASC_INTEN_OE 0x0020
  96. #define ASC_INTEN_TNE 0x0040
  97. #define ASC_INTEN_TOI 0x0080
  98. #define ASC_INTEN_RHF 0x0100
  99. /* ASC_RETRIES */
  100. #define ASC_RETRIES_MSK 0x00FF
  101. /* ASC_RXBUF */
  102. #define ASC_RXBUF_MSK 0x03FF
  103. /* ASC_STA */
  104. #define ASC_STA_RBF 0x0001
  105. #define ASC_STA_TE 0x0002
  106. #define ASC_STA_THE 0x0004
  107. #define ASC_STA_PE 0x0008
  108. #define ASC_STA_FE 0x0010
  109. #define ASC_STA_OE 0x0020
  110. #define ASC_STA_TNE 0x0040
  111. #define ASC_STA_TOI 0x0080
  112. #define ASC_STA_RHF 0x0100
  113. #define ASC_STA_TF 0x0200
  114. #define ASC_STA_NKD 0x0400
  115. /* ASC_TIMEOUT */
  116. #define ASC_TIMEOUT_MSK 0x00FF
  117. /* ASC_TXBUF */
  118. #define ASC_TXBUF_MSK 0x01FF
  119. /*---- Inline function definitions ---------------------------*/
  120. static inline struct asc_port *to_asc_port(struct uart_port *port)
  121. {
  122. return container_of(port, struct asc_port, port);
  123. }
  124. static inline u32 asc_in(struct uart_port *port, u32 offset)
  125. {
  126. return readl(port->membase + offset);
  127. }
  128. static inline void asc_out(struct uart_port *port, u32 offset, u32 value)
  129. {
  130. writel(value, port->membase + offset);
  131. }
  132. /*
  133. * Some simple utility functions to enable and disable interrupts.
  134. * Note that these need to be called with interrupts disabled.
  135. */
  136. static inline void asc_disable_tx_interrupts(struct uart_port *port)
  137. {
  138. u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_THE;
  139. asc_out(port, ASC_INTEN, intenable);
  140. (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */
  141. }
  142. static inline void asc_enable_tx_interrupts(struct uart_port *port)
  143. {
  144. u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_THE;
  145. asc_out(port, ASC_INTEN, intenable);
  146. }
  147. static inline void asc_disable_rx_interrupts(struct uart_port *port)
  148. {
  149. u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_RBE;
  150. asc_out(port, ASC_INTEN, intenable);
  151. (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */
  152. }
  153. static inline void asc_enable_rx_interrupts(struct uart_port *port)
  154. {
  155. u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_RBE;
  156. asc_out(port, ASC_INTEN, intenable);
  157. }
  158. static inline u32 asc_txfifo_is_empty(struct uart_port *port)
  159. {
  160. return asc_in(port, ASC_STA) & ASC_STA_TE;
  161. }
  162. static inline int asc_txfifo_is_full(struct uart_port *port)
  163. {
  164. return asc_in(port, ASC_STA) & ASC_STA_TF;
  165. }
  166. static inline const char *asc_port_name(struct uart_port *port)
  167. {
  168. return to_platform_device(port->dev)->name;
  169. }
  170. /*----------------------------------------------------------------------*/
  171. /*
  172. * This section contains code to support the use of the ASC as a
  173. * generic serial port.
  174. */
  175. static inline unsigned asc_hw_txroom(struct uart_port *port)
  176. {
  177. u32 status = asc_in(port, ASC_STA);
  178. if (status & ASC_STA_THE)
  179. return port->fifosize / 2;
  180. else if (!(status & ASC_STA_TF))
  181. return 1;
  182. return 0;
  183. }
  184. /*
  185. * Start transmitting chars.
  186. * This is called from both interrupt and task level.
  187. * Either way interrupts are disabled.
  188. */
  189. static void asc_transmit_chars(struct uart_port *port)
  190. {
  191. struct circ_buf *xmit = &port->state->xmit;
  192. int txroom;
  193. unsigned char c;
  194. txroom = asc_hw_txroom(port);
  195. if ((txroom != 0) && port->x_char) {
  196. c = port->x_char;
  197. port->x_char = 0;
  198. asc_out(port, ASC_TXBUF, c);
  199. port->icount.tx++;
  200. txroom = asc_hw_txroom(port);
  201. }
  202. if (uart_tx_stopped(port)) {
  203. /*
  204. * We should try and stop the hardware here, but I
  205. * don't think the ASC has any way to do that.
  206. */
  207. asc_disable_tx_interrupts(port);
  208. return;
  209. }
  210. if (uart_circ_empty(xmit)) {
  211. asc_disable_tx_interrupts(port);
  212. return;
  213. }
  214. if (txroom == 0)
  215. return;
  216. do {
  217. c = xmit->buf[xmit->tail];
  218. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  219. asc_out(port, ASC_TXBUF, c);
  220. port->icount.tx++;
  221. txroom--;
  222. } while ((txroom > 0) && (!uart_circ_empty(xmit)));
  223. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  224. uart_write_wakeup(port);
  225. if (uart_circ_empty(xmit))
  226. asc_disable_tx_interrupts(port);
  227. }
  228. static void asc_receive_chars(struct uart_port *port)
  229. {
  230. struct tty_port *tport = &port->state->port;
  231. unsigned long status;
  232. unsigned long c = 0;
  233. char flag;
  234. if (port->irq_wake)
  235. pm_wakeup_event(tport->tty->dev, 0);
  236. while ((status = asc_in(port, ASC_STA)) & ASC_STA_RBF) {
  237. c = asc_in(port, ASC_RXBUF) | ASC_RXBUF_DUMMY_RX;
  238. flag = TTY_NORMAL;
  239. port->icount.rx++;
  240. if ((c & (ASC_RXBUF_FE | ASC_RXBUF_PE)) ||
  241. status & ASC_STA_OE) {
  242. if (c & ASC_RXBUF_FE) {
  243. if (c == ASC_RXBUF_FE) {
  244. port->icount.brk++;
  245. if (uart_handle_break(port))
  246. continue;
  247. c |= ASC_RXBUF_DUMMY_BE;
  248. } else {
  249. port->icount.frame++;
  250. }
  251. } else if (c & ASC_RXBUF_PE) {
  252. port->icount.parity++;
  253. }
  254. /*
  255. * Reading any data from the RX FIFO clears the
  256. * overflow error condition.
  257. */
  258. if (status & ASC_STA_OE) {
  259. port->icount.overrun++;
  260. c |= ASC_RXBUF_DUMMY_OE;
  261. }
  262. c &= port->read_status_mask;
  263. if (c & ASC_RXBUF_DUMMY_BE)
  264. flag = TTY_BREAK;
  265. else if (c & ASC_RXBUF_PE)
  266. flag = TTY_PARITY;
  267. else if (c & ASC_RXBUF_FE)
  268. flag = TTY_FRAME;
  269. }
  270. if (uart_handle_sysrq_char(port, c))
  271. continue;
  272. uart_insert_char(port, c, ASC_RXBUF_DUMMY_OE, c & 0xff, flag);
  273. }
  274. /* Tell the rest of the system the news. New characters! */
  275. tty_flip_buffer_push(tport);
  276. }
  277. static irqreturn_t asc_interrupt(int irq, void *ptr)
  278. {
  279. struct uart_port *port = ptr;
  280. u32 status;
  281. spin_lock(&port->lock);
  282. status = asc_in(port, ASC_STA);
  283. if (status & ASC_STA_RBF) {
  284. /* Receive FIFO not empty */
  285. asc_receive_chars(port);
  286. }
  287. if ((status & ASC_STA_THE) &&
  288. (asc_in(port, ASC_INTEN) & ASC_INTEN_THE)) {
  289. /* Transmitter FIFO at least half empty */
  290. asc_transmit_chars(port);
  291. }
  292. spin_unlock(&port->lock);
  293. return IRQ_HANDLED;
  294. }
  295. /*----------------------------------------------------------------------*/
  296. /*
  297. * UART Functions
  298. */
  299. static unsigned int asc_tx_empty(struct uart_port *port)
  300. {
  301. return asc_txfifo_is_empty(port) ? TIOCSER_TEMT : 0;
  302. }
  303. static void asc_set_mctrl(struct uart_port *port, unsigned int mctrl)
  304. {
  305. /*
  306. * This routine is used for seting signals of: DTR, DCD, CTS/RTS
  307. * We use ASC's hardware for CTS/RTS, so don't need any for that.
  308. * Some boards have DTR and DCD implemented using PIO pins,
  309. * code to do this should be hooked in here.
  310. */
  311. }
  312. static unsigned int asc_get_mctrl(struct uart_port *port)
  313. {
  314. /*
  315. * This routine is used for geting signals of: DTR, DCD, DSR, RI,
  316. * and CTS/RTS
  317. */
  318. return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  319. }
  320. /* There are probably characters waiting to be transmitted. */
  321. static void asc_start_tx(struct uart_port *port)
  322. {
  323. struct circ_buf *xmit = &port->state->xmit;
  324. if (!uart_circ_empty(xmit))
  325. asc_enable_tx_interrupts(port);
  326. }
  327. /* Transmit stop */
  328. static void asc_stop_tx(struct uart_port *port)
  329. {
  330. asc_disable_tx_interrupts(port);
  331. }
  332. /* Receive stop */
  333. static void asc_stop_rx(struct uart_port *port)
  334. {
  335. asc_disable_rx_interrupts(port);
  336. }
  337. /* Force modem status interrupts on */
  338. static void asc_enable_ms(struct uart_port *port)
  339. {
  340. /* Nothing here yet .. */
  341. }
  342. /* Handle breaks - ignored by us */
  343. static void asc_break_ctl(struct uart_port *port, int break_state)
  344. {
  345. /* Nothing here yet .. */
  346. }
  347. /*
  348. * Enable port for reception.
  349. */
  350. static int asc_startup(struct uart_port *port)
  351. {
  352. if (request_irq(port->irq, asc_interrupt, IRQF_NO_SUSPEND,
  353. asc_port_name(port), port)) {
  354. dev_err(port->dev, "cannot allocate irq.\n");
  355. return -ENODEV;
  356. }
  357. asc_transmit_chars(port);
  358. asc_enable_rx_interrupts(port);
  359. return 0;
  360. }
  361. static void asc_shutdown(struct uart_port *port)
  362. {
  363. asc_disable_tx_interrupts(port);
  364. asc_disable_rx_interrupts(port);
  365. free_irq(port->irq, port);
  366. }
  367. static void asc_pm(struct uart_port *port, unsigned int state,
  368. unsigned int oldstate)
  369. {
  370. struct asc_port *ascport = to_asc_port(port);
  371. unsigned long flags = 0;
  372. u32 ctl;
  373. switch (state) {
  374. case UART_PM_STATE_ON:
  375. clk_prepare_enable(ascport->clk);
  376. break;
  377. case UART_PM_STATE_OFF:
  378. /*
  379. * Disable the ASC baud rate generator, which is as close as
  380. * we can come to turning it off. Note this is not called with
  381. * the port spinlock held.
  382. */
  383. spin_lock_irqsave(&port->lock, flags);
  384. ctl = asc_in(port, ASC_CTL) & ~ASC_CTL_RUN;
  385. asc_out(port, ASC_CTL, ctl);
  386. spin_unlock_irqrestore(&port->lock, flags);
  387. clk_disable_unprepare(ascport->clk);
  388. break;
  389. }
  390. }
  391. static void asc_set_termios(struct uart_port *port, struct ktermios *termios,
  392. struct ktermios *old)
  393. {
  394. struct asc_port *ascport = to_asc_port(port);
  395. unsigned int baud;
  396. u32 ctrl_val;
  397. tcflag_t cflag;
  398. unsigned long flags;
  399. /* Update termios to reflect hardware capabilities */
  400. termios->c_cflag &= ~(CMSPAR |
  401. (ascport->hw_flow_control ? 0 : CRTSCTS));
  402. port->uartclk = clk_get_rate(ascport->clk);
  403. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  404. cflag = termios->c_cflag;
  405. spin_lock_irqsave(&port->lock, flags);
  406. /* read control register */
  407. ctrl_val = asc_in(port, ASC_CTL);
  408. /* stop serial port and reset value */
  409. asc_out(port, ASC_CTL, (ctrl_val & ~ASC_CTL_RUN));
  410. ctrl_val = ASC_CTL_RXENABLE | ASC_CTL_FIFOENABLE;
  411. /* reset fifo rx & tx */
  412. asc_out(port, ASC_TXRESET, 1);
  413. asc_out(port, ASC_RXRESET, 1);
  414. /* set character length */
  415. if ((cflag & CSIZE) == CS7) {
  416. ctrl_val |= ASC_CTL_MODE_7BIT_PAR;
  417. } else {
  418. ctrl_val |= (cflag & PARENB) ? ASC_CTL_MODE_8BIT_PAR :
  419. ASC_CTL_MODE_8BIT;
  420. }
  421. /* set stop bit */
  422. ctrl_val |= (cflag & CSTOPB) ? ASC_CTL_STOP_2BIT : ASC_CTL_STOP_1BIT;
  423. /* odd parity */
  424. if (cflag & PARODD)
  425. ctrl_val |= ASC_CTL_PARITYODD;
  426. /* hardware flow control */
  427. if ((cflag & CRTSCTS))
  428. ctrl_val |= ASC_CTL_CTSENABLE;
  429. if ((baud < 19200) && !ascport->force_m1) {
  430. asc_out(port, ASC_BAUDRATE, (port->uartclk / (16 * baud)));
  431. } else {
  432. /*
  433. * MODE 1: recommended for high bit rates (above 19.2K)
  434. *
  435. * baudrate * 16 * 2^16
  436. * ASCBaudRate = ------------------------
  437. * inputclock
  438. *
  439. * However to keep the maths inside 32bits we divide top and
  440. * bottom by 64. The +1 is to avoid a divide by zero if the
  441. * input clock rate is something unexpected.
  442. */
  443. u32 counter = (baud * 16384) / ((port->uartclk / 64) + 1);
  444. asc_out(port, ASC_BAUDRATE, counter);
  445. ctrl_val |= ASC_CTL_BAUDMODE;
  446. }
  447. uart_update_timeout(port, cflag, baud);
  448. ascport->port.read_status_mask = ASC_RXBUF_DUMMY_OE;
  449. if (termios->c_iflag & INPCK)
  450. ascport->port.read_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE;
  451. if (termios->c_iflag & (BRKINT | PARMRK))
  452. ascport->port.read_status_mask |= ASC_RXBUF_DUMMY_BE;
  453. /*
  454. * Characters to ignore
  455. */
  456. ascport->port.ignore_status_mask = 0;
  457. if (termios->c_iflag & IGNPAR)
  458. ascport->port.ignore_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE;
  459. if (termios->c_iflag & IGNBRK) {
  460. ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_BE;
  461. /*
  462. * If we're ignoring parity and break indicators,
  463. * ignore overruns too (for real raw support).
  464. */
  465. if (termios->c_iflag & IGNPAR)
  466. ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_OE;
  467. }
  468. /*
  469. * Ignore all characters if CREAD is not set.
  470. */
  471. if (!(termios->c_cflag & CREAD))
  472. ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_RX;
  473. /* Set the timeout */
  474. asc_out(port, ASC_TIMEOUT, 20);
  475. /* write final value and enable port */
  476. asc_out(port, ASC_CTL, (ctrl_val | ASC_CTL_RUN));
  477. spin_unlock_irqrestore(&port->lock, flags);
  478. }
  479. static const char *asc_type(struct uart_port *port)
  480. {
  481. return (port->type == PORT_ASC) ? DRIVER_NAME : NULL;
  482. }
  483. static void asc_release_port(struct uart_port *port)
  484. {
  485. }
  486. static int asc_request_port(struct uart_port *port)
  487. {
  488. return 0;
  489. }
  490. /*
  491. * Called when the port is opened, and UPF_BOOT_AUTOCONF flag is set
  492. * Set type field if successful
  493. */
  494. static void asc_config_port(struct uart_port *port, int flags)
  495. {
  496. if ((flags & UART_CONFIG_TYPE))
  497. port->type = PORT_ASC;
  498. }
  499. static int
  500. asc_verify_port(struct uart_port *port, struct serial_struct *ser)
  501. {
  502. /* No user changeable parameters */
  503. return -EINVAL;
  504. }
  505. #ifdef CONFIG_CONSOLE_POLL
  506. /*
  507. * Console polling routines for writing and reading from the uart while
  508. * in an interrupt or debug context (i.e. kgdb).
  509. */
  510. static int asc_get_poll_char(struct uart_port *port)
  511. {
  512. if (!(asc_in(port, ASC_STA) & ASC_STA_RBF))
  513. return NO_POLL_CHAR;
  514. return asc_in(port, ASC_RXBUF);
  515. }
  516. static void asc_put_poll_char(struct uart_port *port, unsigned char c)
  517. {
  518. while (asc_txfifo_is_full(port))
  519. cpu_relax();
  520. asc_out(port, ASC_TXBUF, c);
  521. }
  522. #endif /* CONFIG_CONSOLE_POLL */
  523. /*---------------------------------------------------------------------*/
  524. static struct uart_ops asc_uart_ops = {
  525. .tx_empty = asc_tx_empty,
  526. .set_mctrl = asc_set_mctrl,
  527. .get_mctrl = asc_get_mctrl,
  528. .start_tx = asc_start_tx,
  529. .stop_tx = asc_stop_tx,
  530. .stop_rx = asc_stop_rx,
  531. .enable_ms = asc_enable_ms,
  532. .break_ctl = asc_break_ctl,
  533. .startup = asc_startup,
  534. .shutdown = asc_shutdown,
  535. .set_termios = asc_set_termios,
  536. .type = asc_type,
  537. .release_port = asc_release_port,
  538. .request_port = asc_request_port,
  539. .config_port = asc_config_port,
  540. .verify_port = asc_verify_port,
  541. .pm = asc_pm,
  542. #ifdef CONFIG_CONSOLE_POLL
  543. .poll_get_char = asc_get_poll_char,
  544. .poll_put_char = asc_put_poll_char,
  545. #endif /* CONFIG_CONSOLE_POLL */
  546. };
  547. static int asc_init_port(struct asc_port *ascport,
  548. struct platform_device *pdev)
  549. {
  550. struct uart_port *port = &ascport->port;
  551. struct resource *res;
  552. port->iotype = UPIO_MEM;
  553. port->flags = UPF_BOOT_AUTOCONF;
  554. port->ops = &asc_uart_ops;
  555. port->fifosize = ASC_FIFO_SIZE;
  556. port->dev = &pdev->dev;
  557. port->irq = platform_get_irq(pdev, 0);
  558. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  559. port->membase = devm_ioremap_resource(&pdev->dev, res);
  560. if (IS_ERR(port->membase))
  561. return PTR_ERR(port->membase);
  562. port->mapbase = res->start;
  563. spin_lock_init(&port->lock);
  564. ascport->clk = devm_clk_get(&pdev->dev, NULL);
  565. if (WARN_ON(IS_ERR(ascport->clk)))
  566. return -EINVAL;
  567. /* ensure that clk rate is correct by enabling the clk */
  568. clk_prepare_enable(ascport->clk);
  569. ascport->port.uartclk = clk_get_rate(ascport->clk);
  570. WARN_ON(ascport->port.uartclk == 0);
  571. clk_disable_unprepare(ascport->clk);
  572. return 0;
  573. }
  574. static struct asc_port *asc_of_get_asc_port(struct platform_device *pdev)
  575. {
  576. struct device_node *np = pdev->dev.of_node;
  577. int id;
  578. if (!np)
  579. return NULL;
  580. id = of_alias_get_id(np, ASC_SERIAL_NAME);
  581. if (id < 0)
  582. id = 0;
  583. if (WARN_ON(id >= ASC_MAX_PORTS))
  584. return NULL;
  585. asc_ports[id].hw_flow_control = of_property_read_bool(np,
  586. "st,hw-flow-control");
  587. asc_ports[id].force_m1 = of_property_read_bool(np, "st,force_m1");
  588. asc_ports[id].port.line = id;
  589. return &asc_ports[id];
  590. }
  591. #ifdef CONFIG_OF
  592. static struct of_device_id asc_match[] = {
  593. { .compatible = "st,asc", },
  594. {},
  595. };
  596. MODULE_DEVICE_TABLE(of, asc_match);
  597. #endif
  598. static int asc_serial_probe(struct platform_device *pdev)
  599. {
  600. int ret;
  601. struct asc_port *ascport;
  602. ascport = asc_of_get_asc_port(pdev);
  603. if (!ascport)
  604. return -ENODEV;
  605. ret = asc_init_port(ascport, pdev);
  606. if (ret)
  607. return ret;
  608. ret = uart_add_one_port(&asc_uart_driver, &ascport->port);
  609. if (ret)
  610. return ret;
  611. platform_set_drvdata(pdev, &ascport->port);
  612. return 0;
  613. }
  614. static int asc_serial_remove(struct platform_device *pdev)
  615. {
  616. struct uart_port *port = platform_get_drvdata(pdev);
  617. return uart_remove_one_port(&asc_uart_driver, port);
  618. }
  619. #ifdef CONFIG_PM_SLEEP
  620. static int asc_serial_suspend(struct device *dev)
  621. {
  622. struct platform_device *pdev = to_platform_device(dev);
  623. struct uart_port *port = platform_get_drvdata(pdev);
  624. return uart_suspend_port(&asc_uart_driver, port);
  625. }
  626. static int asc_serial_resume(struct device *dev)
  627. {
  628. struct platform_device *pdev = to_platform_device(dev);
  629. struct uart_port *port = platform_get_drvdata(pdev);
  630. return uart_resume_port(&asc_uart_driver, port);
  631. }
  632. #endif /* CONFIG_PM_SLEEP */
  633. /*----------------------------------------------------------------------*/
  634. #ifdef CONFIG_SERIAL_ST_ASC_CONSOLE
  635. static void asc_console_putchar(struct uart_port *port, int ch)
  636. {
  637. unsigned int timeout = 1000000;
  638. /* Wait for upto 1 second in case flow control is stopping us. */
  639. while (--timeout && asc_txfifo_is_full(port))
  640. udelay(1);
  641. asc_out(port, ASC_TXBUF, ch);
  642. }
  643. /*
  644. * Print a string to the serial port trying not to disturb
  645. * any possible real use of the port...
  646. */
  647. static void asc_console_write(struct console *co, const char *s, unsigned count)
  648. {
  649. struct uart_port *port = &asc_ports[co->index].port;
  650. unsigned long flags;
  651. unsigned long timeout = 1000000;
  652. int locked = 1;
  653. u32 intenable;
  654. local_irq_save(flags);
  655. if (port->sysrq)
  656. locked = 0; /* asc_interrupt has already claimed the lock */
  657. else if (oops_in_progress)
  658. locked = spin_trylock(&port->lock);
  659. else
  660. spin_lock(&port->lock);
  661. /*
  662. * Disable interrupts so we don't get the IRQ line bouncing
  663. * up and down while interrupts are disabled.
  664. */
  665. intenable = asc_in(port, ASC_INTEN);
  666. asc_out(port, ASC_INTEN, 0);
  667. (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */
  668. uart_console_write(port, s, count, asc_console_putchar);
  669. while (--timeout && !asc_txfifo_is_empty(port))
  670. udelay(1);
  671. asc_out(port, ASC_INTEN, intenable);
  672. if (locked)
  673. spin_unlock(&port->lock);
  674. local_irq_restore(flags);
  675. }
  676. static int asc_console_setup(struct console *co, char *options)
  677. {
  678. struct asc_port *ascport;
  679. int baud = 9600;
  680. int bits = 8;
  681. int parity = 'n';
  682. int flow = 'n';
  683. if (co->index >= ASC_MAX_PORTS)
  684. return -ENODEV;
  685. ascport = &asc_ports[co->index];
  686. /*
  687. * This driver does not support early console initialization
  688. * (use ARM early printk support instead), so we only expect
  689. * this to be called during the uart port registration when the
  690. * driver gets probed and the port should be mapped at that point.
  691. */
  692. BUG_ON(ascport->port.mapbase == 0 || ascport->port.membase == NULL);
  693. if (options)
  694. uart_parse_options(options, &baud, &parity, &bits, &flow);
  695. return uart_set_options(&ascport->port, co, baud, parity, bits, flow);
  696. }
  697. static struct console asc_console = {
  698. .name = ASC_SERIAL_NAME,
  699. .device = uart_console_device,
  700. .write = asc_console_write,
  701. .setup = asc_console_setup,
  702. .flags = CON_PRINTBUFFER,
  703. .index = -1,
  704. .data = &asc_uart_driver,
  705. };
  706. #define ASC_SERIAL_CONSOLE (&asc_console)
  707. #else
  708. #define ASC_SERIAL_CONSOLE NULL
  709. #endif /* CONFIG_SERIAL_ST_ASC_CONSOLE */
  710. static struct uart_driver asc_uart_driver = {
  711. .owner = THIS_MODULE,
  712. .driver_name = DRIVER_NAME,
  713. .dev_name = ASC_SERIAL_NAME,
  714. .major = 0,
  715. .minor = 0,
  716. .nr = ASC_MAX_PORTS,
  717. .cons = ASC_SERIAL_CONSOLE,
  718. };
  719. static const struct dev_pm_ops asc_serial_pm_ops = {
  720. SET_SYSTEM_SLEEP_PM_OPS(asc_serial_suspend, asc_serial_resume)
  721. };
  722. static struct platform_driver asc_serial_driver = {
  723. .probe = asc_serial_probe,
  724. .remove = asc_serial_remove,
  725. .driver = {
  726. .name = DRIVER_NAME,
  727. .pm = &asc_serial_pm_ops,
  728. .owner = THIS_MODULE,
  729. .of_match_table = of_match_ptr(asc_match),
  730. },
  731. };
  732. static int __init asc_init(void)
  733. {
  734. int ret;
  735. static char banner[] __initdata =
  736. KERN_INFO "STMicroelectronics ASC driver initialized\n";
  737. printk(banner);
  738. ret = uart_register_driver(&asc_uart_driver);
  739. if (ret)
  740. return ret;
  741. ret = platform_driver_register(&asc_serial_driver);
  742. if (ret)
  743. uart_unregister_driver(&asc_uart_driver);
  744. return ret;
  745. }
  746. static void __exit asc_exit(void)
  747. {
  748. platform_driver_unregister(&asc_serial_driver);
  749. uart_unregister_driver(&asc_uart_driver);
  750. }
  751. module_init(asc_init);
  752. module_exit(asc_exit);
  753. MODULE_ALIAS("platform:" DRIVER_NAME);
  754. MODULE_AUTHOR("STMicroelectronics (R&D) Limited");
  755. MODULE_DESCRIPTION("STMicroelectronics ASC serial port driver");
  756. MODULE_LICENSE("GPL");