pxa.c 23 KB

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  1. /*
  2. * Based on drivers/serial/8250.c by Russell King.
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Feb 20, 2003
  6. * Copyright: (C) 2003 Monta Vista Software, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * Note 1: This driver is made separate from the already too overloaded
  14. * 8250.c because it needs some kirks of its own and that'll make it
  15. * easier to add DMA support.
  16. *
  17. * Note 2: I'm too sick of device allocation policies for serial ports.
  18. * If someone else wants to request an "official" allocation of major/minor
  19. * for this driver please be my guest. And don't forget that new hardware
  20. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  21. * hope for a better port registration and dynamic device allocation scheme
  22. * with the serial core maintainer satisfaction to appear soon.
  23. */
  24. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  25. #define SUPPORT_SYSRQ
  26. #endif
  27. #include <linux/module.h>
  28. #include <linux/ioport.h>
  29. #include <linux/init.h>
  30. #include <linux/console.h>
  31. #include <linux/sysrq.h>
  32. #include <linux/serial_reg.h>
  33. #include <linux/circ_buf.h>
  34. #include <linux/delay.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/of.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #include <linux/clk.h>
  42. #include <linux/io.h>
  43. #include <linux/slab.h>
  44. #define PXA_NAME_LEN 8
  45. struct uart_pxa_port {
  46. struct uart_port port;
  47. unsigned char ier;
  48. unsigned char lcr;
  49. unsigned char mcr;
  50. unsigned int lsr_break_flag;
  51. struct clk *clk;
  52. char name[PXA_NAME_LEN];
  53. };
  54. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  55. {
  56. offset <<= 2;
  57. return readl(up->port.membase + offset);
  58. }
  59. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  60. {
  61. offset <<= 2;
  62. writel(value, up->port.membase + offset);
  63. }
  64. static void serial_pxa_enable_ms(struct uart_port *port)
  65. {
  66. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  67. up->ier |= UART_IER_MSI;
  68. serial_out(up, UART_IER, up->ier);
  69. }
  70. static void serial_pxa_stop_tx(struct uart_port *port)
  71. {
  72. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  73. if (up->ier & UART_IER_THRI) {
  74. up->ier &= ~UART_IER_THRI;
  75. serial_out(up, UART_IER, up->ier);
  76. }
  77. }
  78. static void serial_pxa_stop_rx(struct uart_port *port)
  79. {
  80. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  81. up->ier &= ~UART_IER_RLSI;
  82. up->port.read_status_mask &= ~UART_LSR_DR;
  83. serial_out(up, UART_IER, up->ier);
  84. }
  85. static inline void receive_chars(struct uart_pxa_port *up, int *status)
  86. {
  87. unsigned int ch, flag;
  88. int max_count = 256;
  89. do {
  90. /* work around Errata #20 according to
  91. * Intel(R) PXA27x Processor Family
  92. * Specification Update (May 2005)
  93. *
  94. * Step 2
  95. * Disable the Reciever Time Out Interrupt via IER[RTOEI]
  96. */
  97. up->ier &= ~UART_IER_RTOIE;
  98. serial_out(up, UART_IER, up->ier);
  99. ch = serial_in(up, UART_RX);
  100. flag = TTY_NORMAL;
  101. up->port.icount.rx++;
  102. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  103. UART_LSR_FE | UART_LSR_OE))) {
  104. /*
  105. * For statistics only
  106. */
  107. if (*status & UART_LSR_BI) {
  108. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  109. up->port.icount.brk++;
  110. /*
  111. * We do the SysRQ and SAK checking
  112. * here because otherwise the break
  113. * may get masked by ignore_status_mask
  114. * or read_status_mask.
  115. */
  116. if (uart_handle_break(&up->port))
  117. goto ignore_char;
  118. } else if (*status & UART_LSR_PE)
  119. up->port.icount.parity++;
  120. else if (*status & UART_LSR_FE)
  121. up->port.icount.frame++;
  122. if (*status & UART_LSR_OE)
  123. up->port.icount.overrun++;
  124. /*
  125. * Mask off conditions which should be ignored.
  126. */
  127. *status &= up->port.read_status_mask;
  128. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  129. if (up->port.line == up->port.cons->index) {
  130. /* Recover the break flag from console xmit */
  131. *status |= up->lsr_break_flag;
  132. up->lsr_break_flag = 0;
  133. }
  134. #endif
  135. if (*status & UART_LSR_BI) {
  136. flag = TTY_BREAK;
  137. } else if (*status & UART_LSR_PE)
  138. flag = TTY_PARITY;
  139. else if (*status & UART_LSR_FE)
  140. flag = TTY_FRAME;
  141. }
  142. if (uart_handle_sysrq_char(&up->port, ch))
  143. goto ignore_char;
  144. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  145. ignore_char:
  146. *status = serial_in(up, UART_LSR);
  147. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  148. tty_flip_buffer_push(&up->port.state->port);
  149. /* work around Errata #20 according to
  150. * Intel(R) PXA27x Processor Family
  151. * Specification Update (May 2005)
  152. *
  153. * Step 6:
  154. * No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE]
  155. */
  156. up->ier |= UART_IER_RTOIE;
  157. serial_out(up, UART_IER, up->ier);
  158. }
  159. static void transmit_chars(struct uart_pxa_port *up)
  160. {
  161. struct circ_buf *xmit = &up->port.state->xmit;
  162. int count;
  163. if (up->port.x_char) {
  164. serial_out(up, UART_TX, up->port.x_char);
  165. up->port.icount.tx++;
  166. up->port.x_char = 0;
  167. return;
  168. }
  169. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  170. serial_pxa_stop_tx(&up->port);
  171. return;
  172. }
  173. count = up->port.fifosize / 2;
  174. do {
  175. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  176. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  177. up->port.icount.tx++;
  178. if (uart_circ_empty(xmit))
  179. break;
  180. } while (--count > 0);
  181. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  182. uart_write_wakeup(&up->port);
  183. if (uart_circ_empty(xmit))
  184. serial_pxa_stop_tx(&up->port);
  185. }
  186. static void serial_pxa_start_tx(struct uart_port *port)
  187. {
  188. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  189. if (!(up->ier & UART_IER_THRI)) {
  190. up->ier |= UART_IER_THRI;
  191. serial_out(up, UART_IER, up->ier);
  192. }
  193. }
  194. static inline void check_modem_status(struct uart_pxa_port *up)
  195. {
  196. int status;
  197. status = serial_in(up, UART_MSR);
  198. if ((status & UART_MSR_ANY_DELTA) == 0)
  199. return;
  200. if (status & UART_MSR_TERI)
  201. up->port.icount.rng++;
  202. if (status & UART_MSR_DDSR)
  203. up->port.icount.dsr++;
  204. if (status & UART_MSR_DDCD)
  205. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  206. if (status & UART_MSR_DCTS)
  207. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  208. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  209. }
  210. /*
  211. * This handles the interrupt from one port.
  212. */
  213. static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
  214. {
  215. struct uart_pxa_port *up = dev_id;
  216. unsigned int iir, lsr;
  217. iir = serial_in(up, UART_IIR);
  218. if (iir & UART_IIR_NO_INT)
  219. return IRQ_NONE;
  220. lsr = serial_in(up, UART_LSR);
  221. if (lsr & UART_LSR_DR)
  222. receive_chars(up, &lsr);
  223. check_modem_status(up);
  224. if (lsr & UART_LSR_THRE)
  225. transmit_chars(up);
  226. return IRQ_HANDLED;
  227. }
  228. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  229. {
  230. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  231. unsigned long flags;
  232. unsigned int ret;
  233. spin_lock_irqsave(&up->port.lock, flags);
  234. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  235. spin_unlock_irqrestore(&up->port.lock, flags);
  236. return ret;
  237. }
  238. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  239. {
  240. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  241. unsigned char status;
  242. unsigned int ret;
  243. status = serial_in(up, UART_MSR);
  244. ret = 0;
  245. if (status & UART_MSR_DCD)
  246. ret |= TIOCM_CAR;
  247. if (status & UART_MSR_RI)
  248. ret |= TIOCM_RNG;
  249. if (status & UART_MSR_DSR)
  250. ret |= TIOCM_DSR;
  251. if (status & UART_MSR_CTS)
  252. ret |= TIOCM_CTS;
  253. return ret;
  254. }
  255. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  256. {
  257. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  258. unsigned char mcr = 0;
  259. if (mctrl & TIOCM_RTS)
  260. mcr |= UART_MCR_RTS;
  261. if (mctrl & TIOCM_DTR)
  262. mcr |= UART_MCR_DTR;
  263. if (mctrl & TIOCM_OUT1)
  264. mcr |= UART_MCR_OUT1;
  265. if (mctrl & TIOCM_OUT2)
  266. mcr |= UART_MCR_OUT2;
  267. if (mctrl & TIOCM_LOOP)
  268. mcr |= UART_MCR_LOOP;
  269. mcr |= up->mcr;
  270. serial_out(up, UART_MCR, mcr);
  271. }
  272. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  273. {
  274. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  275. unsigned long flags;
  276. spin_lock_irqsave(&up->port.lock, flags);
  277. if (break_state == -1)
  278. up->lcr |= UART_LCR_SBC;
  279. else
  280. up->lcr &= ~UART_LCR_SBC;
  281. serial_out(up, UART_LCR, up->lcr);
  282. spin_unlock_irqrestore(&up->port.lock, flags);
  283. }
  284. static int serial_pxa_startup(struct uart_port *port)
  285. {
  286. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  287. unsigned long flags;
  288. int retval;
  289. if (port->line == 3) /* HWUART */
  290. up->mcr |= UART_MCR_AFE;
  291. else
  292. up->mcr = 0;
  293. up->port.uartclk = clk_get_rate(up->clk);
  294. /*
  295. * Allocate the IRQ
  296. */
  297. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  298. if (retval)
  299. return retval;
  300. /*
  301. * Clear the FIFO buffers and disable them.
  302. * (they will be reenabled in set_termios())
  303. */
  304. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  305. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  306. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  307. serial_out(up, UART_FCR, 0);
  308. /*
  309. * Clear the interrupt registers.
  310. */
  311. (void) serial_in(up, UART_LSR);
  312. (void) serial_in(up, UART_RX);
  313. (void) serial_in(up, UART_IIR);
  314. (void) serial_in(up, UART_MSR);
  315. /*
  316. * Now, initialize the UART
  317. */
  318. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  319. spin_lock_irqsave(&up->port.lock, flags);
  320. up->port.mctrl |= TIOCM_OUT2;
  321. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  322. spin_unlock_irqrestore(&up->port.lock, flags);
  323. /*
  324. * Finally, enable interrupts. Note: Modem status interrupts
  325. * are set via set_termios(), which will be occurring imminently
  326. * anyway, so we don't enable them here.
  327. */
  328. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  329. serial_out(up, UART_IER, up->ier);
  330. /*
  331. * And clear the interrupt registers again for luck.
  332. */
  333. (void) serial_in(up, UART_LSR);
  334. (void) serial_in(up, UART_RX);
  335. (void) serial_in(up, UART_IIR);
  336. (void) serial_in(up, UART_MSR);
  337. return 0;
  338. }
  339. static void serial_pxa_shutdown(struct uart_port *port)
  340. {
  341. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  342. unsigned long flags;
  343. free_irq(up->port.irq, up);
  344. /*
  345. * Disable interrupts from this port
  346. */
  347. up->ier = 0;
  348. serial_out(up, UART_IER, 0);
  349. spin_lock_irqsave(&up->port.lock, flags);
  350. up->port.mctrl &= ~TIOCM_OUT2;
  351. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  352. spin_unlock_irqrestore(&up->port.lock, flags);
  353. /*
  354. * Disable break condition and FIFOs
  355. */
  356. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  357. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  358. UART_FCR_CLEAR_RCVR |
  359. UART_FCR_CLEAR_XMIT);
  360. serial_out(up, UART_FCR, 0);
  361. }
  362. static void
  363. serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
  364. struct ktermios *old)
  365. {
  366. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  367. unsigned char cval, fcr = 0;
  368. unsigned long flags;
  369. unsigned int baud, quot;
  370. unsigned int dll;
  371. switch (termios->c_cflag & CSIZE) {
  372. case CS5:
  373. cval = UART_LCR_WLEN5;
  374. break;
  375. case CS6:
  376. cval = UART_LCR_WLEN6;
  377. break;
  378. case CS7:
  379. cval = UART_LCR_WLEN7;
  380. break;
  381. default:
  382. case CS8:
  383. cval = UART_LCR_WLEN8;
  384. break;
  385. }
  386. if (termios->c_cflag & CSTOPB)
  387. cval |= UART_LCR_STOP;
  388. if (termios->c_cflag & PARENB)
  389. cval |= UART_LCR_PARITY;
  390. if (!(termios->c_cflag & PARODD))
  391. cval |= UART_LCR_EPAR;
  392. /*
  393. * Ask the core to calculate the divisor for us.
  394. */
  395. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  396. quot = uart_get_divisor(port, baud);
  397. if ((up->port.uartclk / quot) < (2400 * 16))
  398. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  399. else if ((up->port.uartclk / quot) < (230400 * 16))
  400. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  401. else
  402. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  403. /*
  404. * Ok, we're now changing the port state. Do it with
  405. * interrupts disabled.
  406. */
  407. spin_lock_irqsave(&up->port.lock, flags);
  408. /*
  409. * Ensure the port will be enabled.
  410. * This is required especially for serial console.
  411. */
  412. up->ier |= UART_IER_UUE;
  413. /*
  414. * Update the per-port timeout.
  415. */
  416. uart_update_timeout(port, termios->c_cflag, baud);
  417. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  418. if (termios->c_iflag & INPCK)
  419. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  420. if (termios->c_iflag & (BRKINT | PARMRK))
  421. up->port.read_status_mask |= UART_LSR_BI;
  422. /*
  423. * Characters to ignore
  424. */
  425. up->port.ignore_status_mask = 0;
  426. if (termios->c_iflag & IGNPAR)
  427. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  428. if (termios->c_iflag & IGNBRK) {
  429. up->port.ignore_status_mask |= UART_LSR_BI;
  430. /*
  431. * If we're ignoring parity and break indicators,
  432. * ignore overruns too (for real raw support).
  433. */
  434. if (termios->c_iflag & IGNPAR)
  435. up->port.ignore_status_mask |= UART_LSR_OE;
  436. }
  437. /*
  438. * ignore all characters if CREAD is not set
  439. */
  440. if ((termios->c_cflag & CREAD) == 0)
  441. up->port.ignore_status_mask |= UART_LSR_DR;
  442. /*
  443. * CTS flow control flag and modem status interrupts
  444. */
  445. up->ier &= ~UART_IER_MSI;
  446. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  447. up->ier |= UART_IER_MSI;
  448. serial_out(up, UART_IER, up->ier);
  449. if (termios->c_cflag & CRTSCTS)
  450. up->mcr |= UART_MCR_AFE;
  451. else
  452. up->mcr &= ~UART_MCR_AFE;
  453. serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
  454. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  455. /*
  456. * work around Errata #75 according to Intel(R) PXA27x Processor Family
  457. * Specification Update (Nov 2005)
  458. */
  459. dll = serial_in(up, UART_DLL);
  460. WARN_ON(dll != (quot & 0xff));
  461. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  462. serial_out(up, UART_LCR, cval); /* reset DLAB */
  463. up->lcr = cval; /* Save LCR */
  464. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  465. serial_out(up, UART_FCR, fcr);
  466. spin_unlock_irqrestore(&up->port.lock, flags);
  467. }
  468. static void
  469. serial_pxa_pm(struct uart_port *port, unsigned int state,
  470. unsigned int oldstate)
  471. {
  472. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  473. if (!state)
  474. clk_prepare_enable(up->clk);
  475. else
  476. clk_disable_unprepare(up->clk);
  477. }
  478. static void serial_pxa_release_port(struct uart_port *port)
  479. {
  480. }
  481. static int serial_pxa_request_port(struct uart_port *port)
  482. {
  483. return 0;
  484. }
  485. static void serial_pxa_config_port(struct uart_port *port, int flags)
  486. {
  487. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  488. up->port.type = PORT_PXA;
  489. }
  490. static int
  491. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  492. {
  493. /* we don't want the core code to modify any port params */
  494. return -EINVAL;
  495. }
  496. static const char *
  497. serial_pxa_type(struct uart_port *port)
  498. {
  499. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  500. return up->name;
  501. }
  502. static struct uart_pxa_port *serial_pxa_ports[4];
  503. static struct uart_driver serial_pxa_reg;
  504. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  505. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  506. /*
  507. * Wait for transmitter & holding register to empty
  508. */
  509. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  510. {
  511. unsigned int status, tmout = 10000;
  512. /* Wait up to 10ms for the character(s) to be sent. */
  513. do {
  514. status = serial_in(up, UART_LSR);
  515. if (status & UART_LSR_BI)
  516. up->lsr_break_flag = UART_LSR_BI;
  517. if (--tmout == 0)
  518. break;
  519. udelay(1);
  520. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  521. /* Wait up to 1s for flow control if necessary */
  522. if (up->port.flags & UPF_CONS_FLOW) {
  523. tmout = 1000000;
  524. while (--tmout &&
  525. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  526. udelay(1);
  527. }
  528. }
  529. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  530. {
  531. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  532. wait_for_xmitr(up);
  533. serial_out(up, UART_TX, ch);
  534. }
  535. /*
  536. * Print a string to the serial port trying not to disturb
  537. * any possible real use of the port...
  538. *
  539. * The console_lock must be held when we get here.
  540. */
  541. static void
  542. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  543. {
  544. struct uart_pxa_port *up = serial_pxa_ports[co->index];
  545. unsigned int ier;
  546. unsigned long flags;
  547. int locked = 1;
  548. clk_enable(up->clk);
  549. local_irq_save(flags);
  550. if (up->port.sysrq)
  551. locked = 0;
  552. else if (oops_in_progress)
  553. locked = spin_trylock(&up->port.lock);
  554. else
  555. spin_lock(&up->port.lock);
  556. /*
  557. * First save the IER then disable the interrupts
  558. */
  559. ier = serial_in(up, UART_IER);
  560. serial_out(up, UART_IER, UART_IER_UUE);
  561. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  562. /*
  563. * Finally, wait for transmitter to become empty
  564. * and restore the IER
  565. */
  566. wait_for_xmitr(up);
  567. serial_out(up, UART_IER, ier);
  568. if (locked)
  569. spin_unlock(&up->port.lock);
  570. local_irq_restore(flags);
  571. clk_disable(up->clk);
  572. }
  573. #ifdef CONFIG_CONSOLE_POLL
  574. /*
  575. * Console polling routines for writing and reading from the uart while
  576. * in an interrupt or debug context.
  577. */
  578. static int serial_pxa_get_poll_char(struct uart_port *port)
  579. {
  580. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  581. unsigned char lsr = serial_in(up, UART_LSR);
  582. while (!(lsr & UART_LSR_DR))
  583. lsr = serial_in(up, UART_LSR);
  584. return serial_in(up, UART_RX);
  585. }
  586. static void serial_pxa_put_poll_char(struct uart_port *port,
  587. unsigned char c)
  588. {
  589. unsigned int ier;
  590. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  591. /*
  592. * First save the IER then disable the interrupts
  593. */
  594. ier = serial_in(up, UART_IER);
  595. serial_out(up, UART_IER, UART_IER_UUE);
  596. wait_for_xmitr(up);
  597. /*
  598. * Send the character out.
  599. * If a LF, also do CR...
  600. */
  601. serial_out(up, UART_TX, c);
  602. if (c == 10) {
  603. wait_for_xmitr(up);
  604. serial_out(up, UART_TX, 13);
  605. }
  606. /*
  607. * Finally, wait for transmitter to become empty
  608. * and restore the IER
  609. */
  610. wait_for_xmitr(up);
  611. serial_out(up, UART_IER, ier);
  612. }
  613. #endif /* CONFIG_CONSOLE_POLL */
  614. static int __init
  615. serial_pxa_console_setup(struct console *co, char *options)
  616. {
  617. struct uart_pxa_port *up;
  618. int baud = 9600;
  619. int bits = 8;
  620. int parity = 'n';
  621. int flow = 'n';
  622. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  623. co->index = 0;
  624. up = serial_pxa_ports[co->index];
  625. if (!up)
  626. return -ENODEV;
  627. if (options)
  628. uart_parse_options(options, &baud, &parity, &bits, &flow);
  629. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  630. }
  631. static struct console serial_pxa_console = {
  632. .name = "ttyS",
  633. .write = serial_pxa_console_write,
  634. .device = uart_console_device,
  635. .setup = serial_pxa_console_setup,
  636. .flags = CON_PRINTBUFFER,
  637. .index = -1,
  638. .data = &serial_pxa_reg,
  639. };
  640. #define PXA_CONSOLE &serial_pxa_console
  641. #else
  642. #define PXA_CONSOLE NULL
  643. #endif
  644. static struct uart_ops serial_pxa_pops = {
  645. .tx_empty = serial_pxa_tx_empty,
  646. .set_mctrl = serial_pxa_set_mctrl,
  647. .get_mctrl = serial_pxa_get_mctrl,
  648. .stop_tx = serial_pxa_stop_tx,
  649. .start_tx = serial_pxa_start_tx,
  650. .stop_rx = serial_pxa_stop_rx,
  651. .enable_ms = serial_pxa_enable_ms,
  652. .break_ctl = serial_pxa_break_ctl,
  653. .startup = serial_pxa_startup,
  654. .shutdown = serial_pxa_shutdown,
  655. .set_termios = serial_pxa_set_termios,
  656. .pm = serial_pxa_pm,
  657. .type = serial_pxa_type,
  658. .release_port = serial_pxa_release_port,
  659. .request_port = serial_pxa_request_port,
  660. .config_port = serial_pxa_config_port,
  661. .verify_port = serial_pxa_verify_port,
  662. #ifdef CONFIG_CONSOLE_POLL
  663. .poll_get_char = serial_pxa_get_poll_char,
  664. .poll_put_char = serial_pxa_put_poll_char,
  665. #endif
  666. };
  667. static struct uart_driver serial_pxa_reg = {
  668. .owner = THIS_MODULE,
  669. .driver_name = "PXA serial",
  670. .dev_name = "ttyS",
  671. .major = TTY_MAJOR,
  672. .minor = 64,
  673. .nr = 4,
  674. .cons = PXA_CONSOLE,
  675. };
  676. #ifdef CONFIG_PM
  677. static int serial_pxa_suspend(struct device *dev)
  678. {
  679. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  680. if (sport)
  681. uart_suspend_port(&serial_pxa_reg, &sport->port);
  682. return 0;
  683. }
  684. static int serial_pxa_resume(struct device *dev)
  685. {
  686. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  687. if (sport)
  688. uart_resume_port(&serial_pxa_reg, &sport->port);
  689. return 0;
  690. }
  691. static const struct dev_pm_ops serial_pxa_pm_ops = {
  692. .suspend = serial_pxa_suspend,
  693. .resume = serial_pxa_resume,
  694. };
  695. #endif
  696. static struct of_device_id serial_pxa_dt_ids[] = {
  697. { .compatible = "mrvl,pxa-uart", },
  698. { .compatible = "mrvl,mmp-uart", },
  699. {}
  700. };
  701. MODULE_DEVICE_TABLE(of, serial_pxa_dt_ids);
  702. static int serial_pxa_probe_dt(struct platform_device *pdev,
  703. struct uart_pxa_port *sport)
  704. {
  705. struct device_node *np = pdev->dev.of_node;
  706. int ret;
  707. if (!np)
  708. return 1;
  709. ret = of_alias_get_id(np, "serial");
  710. if (ret < 0) {
  711. dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
  712. return ret;
  713. }
  714. sport->port.line = ret;
  715. return 0;
  716. }
  717. static int serial_pxa_probe(struct platform_device *dev)
  718. {
  719. struct uart_pxa_port *sport;
  720. struct resource *mmres, *irqres;
  721. int ret;
  722. mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
  723. irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
  724. if (!mmres || !irqres)
  725. return -ENODEV;
  726. sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
  727. if (!sport)
  728. return -ENOMEM;
  729. sport->clk = clk_get(&dev->dev, NULL);
  730. if (IS_ERR(sport->clk)) {
  731. ret = PTR_ERR(sport->clk);
  732. goto err_free;
  733. }
  734. ret = clk_prepare(sport->clk);
  735. if (ret) {
  736. clk_put(sport->clk);
  737. goto err_free;
  738. }
  739. sport->port.type = PORT_PXA;
  740. sport->port.iotype = UPIO_MEM;
  741. sport->port.mapbase = mmres->start;
  742. sport->port.irq = irqres->start;
  743. sport->port.fifosize = 64;
  744. sport->port.ops = &serial_pxa_pops;
  745. sport->port.dev = &dev->dev;
  746. sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
  747. sport->port.uartclk = clk_get_rate(sport->clk);
  748. ret = serial_pxa_probe_dt(dev, sport);
  749. if (ret > 0)
  750. sport->port.line = dev->id;
  751. else if (ret < 0)
  752. goto err_clk;
  753. snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1);
  754. sport->port.membase = ioremap(mmres->start, resource_size(mmres));
  755. if (!sport->port.membase) {
  756. ret = -ENOMEM;
  757. goto err_clk;
  758. }
  759. serial_pxa_ports[sport->port.line] = sport;
  760. uart_add_one_port(&serial_pxa_reg, &sport->port);
  761. platform_set_drvdata(dev, sport);
  762. return 0;
  763. err_clk:
  764. clk_unprepare(sport->clk);
  765. clk_put(sport->clk);
  766. err_free:
  767. kfree(sport);
  768. return ret;
  769. }
  770. static int serial_pxa_remove(struct platform_device *dev)
  771. {
  772. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  773. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  774. clk_unprepare(sport->clk);
  775. clk_put(sport->clk);
  776. kfree(sport);
  777. return 0;
  778. }
  779. static struct platform_driver serial_pxa_driver = {
  780. .probe = serial_pxa_probe,
  781. .remove = serial_pxa_remove,
  782. .driver = {
  783. .name = "pxa2xx-uart",
  784. .owner = THIS_MODULE,
  785. #ifdef CONFIG_PM
  786. .pm = &serial_pxa_pm_ops,
  787. #endif
  788. .of_match_table = serial_pxa_dt_ids,
  789. },
  790. };
  791. static int __init serial_pxa_init(void)
  792. {
  793. int ret;
  794. ret = uart_register_driver(&serial_pxa_reg);
  795. if (ret != 0)
  796. return ret;
  797. ret = platform_driver_register(&serial_pxa_driver);
  798. if (ret != 0)
  799. uart_unregister_driver(&serial_pxa_reg);
  800. return ret;
  801. }
  802. static void __exit serial_pxa_exit(void)
  803. {
  804. platform_driver_unregister(&serial_pxa_driver);
  805. uart_unregister_driver(&serial_pxa_reg);
  806. }
  807. module_init(serial_pxa_init);
  808. module_exit(serial_pxa_exit);
  809. MODULE_LICENSE("GPL");
  810. MODULE_ALIAS("platform:pxa2xx-uart");