arc_uart.c 20 KB

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  1. /*
  2. * ARC On-Chip(fpga) UART Driver
  3. *
  4. * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * vineetg: July 10th 2012
  11. * -Decoupled the driver from arch/arc
  12. * +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)
  13. * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
  14. *
  15. * Vineetg: Aug 21st 2010
  16. * -Is uart_tx_stopped() not done in tty write path as it has already been
  17. * taken care of, in serial core
  18. *
  19. * Vineetg: Aug 18th 2010
  20. * -New Serial Core based ARC UART driver
  21. * -Derived largely from blackfin driver albiet with some major tweaks
  22. *
  23. * TODO:
  24. * -check if sysreq works
  25. */
  26. #if defined(CONFIG_SERIAL_ARC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  27. #define SUPPORT_SYSRQ
  28. #endif
  29. #include <linux/module.h>
  30. #include <linux/serial.h>
  31. #include <linux/console.h>
  32. #include <linux/sysrq.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/tty.h>
  35. #include <linux/tty_flip.h>
  36. #include <linux/serial_core.h>
  37. #include <linux/io.h>
  38. #include <linux/of.h>
  39. #include <linux/of_platform.h>
  40. /*************************************
  41. * ARC UART Hardware Specs
  42. ************************************/
  43. #define ARC_UART_TX_FIFO_SIZE 1
  44. /*
  45. * UART Register set (this is not a Standards Compliant IP)
  46. * Also each reg is Word aligned, but only 8 bits wide
  47. */
  48. #define R_ID0 0
  49. #define R_ID1 4
  50. #define R_ID2 8
  51. #define R_ID3 12
  52. #define R_DATA 16
  53. #define R_STS 20
  54. #define R_BAUDL 24
  55. #define R_BAUDH 28
  56. /* Bits for UART Status Reg (R/W) */
  57. #define RXIENB 0x04 /* Receive Interrupt Enable */
  58. #define TXIENB 0x40 /* Transmit Interrupt Enable */
  59. #define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */
  60. #define TXEMPTY 0x80 /* Transmit FIFO Empty, thus char can be written into */
  61. #define RXFULL 0x08 /* Receive FIFO full */
  62. #define RXFULL1 0x10 /* Receive FIFO has space for 1 char (tot space=4) */
  63. #define RXFERR 0x01 /* Frame Error: Stop Bit not detected */
  64. #define RXOERR 0x02 /* OverFlow Err: Char recv but RXFULL still set */
  65. /* Uart bit fiddling helpers: lowest level */
  66. #define RBASE(uart, reg) (uart->port.membase + reg)
  67. #define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r))
  68. #define UART_REG_GET(u, r) readb(RBASE(u, r))
  69. #define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v))
  70. #define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v))
  71. /* Uart bit fiddling helpers: API level */
  72. #define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val)
  73. #define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA)
  74. #define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val)
  75. #define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val)
  76. #define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val)
  77. #define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS)
  78. #define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)
  79. #define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB)
  80. #define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB)
  81. #define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB)
  82. #define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB)
  83. #define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB)
  84. #define ARC_SERIAL_DEV_NAME "ttyARC"
  85. struct arc_uart_port {
  86. struct uart_port port;
  87. unsigned long baud;
  88. int is_emulated; /* H/w vs. Instruction Set Simulator */
  89. };
  90. #define to_arc_port(uport) container_of(uport, struct arc_uart_port, port)
  91. static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS];
  92. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  93. static struct console arc_console;
  94. #endif
  95. #define DRIVER_NAME "arc-uart"
  96. static struct uart_driver arc_uart_driver = {
  97. .owner = THIS_MODULE,
  98. .driver_name = DRIVER_NAME,
  99. .dev_name = ARC_SERIAL_DEV_NAME,
  100. .major = 0,
  101. .minor = 0,
  102. .nr = CONFIG_SERIAL_ARC_NR_PORTS,
  103. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  104. .cons = &arc_console,
  105. #endif
  106. };
  107. static void arc_serial_stop_rx(struct uart_port *port)
  108. {
  109. struct arc_uart_port *uart = to_arc_port(port);
  110. UART_RX_IRQ_DISABLE(uart);
  111. }
  112. static void arc_serial_stop_tx(struct uart_port *port)
  113. {
  114. struct arc_uart_port *uart = to_arc_port(port);
  115. while (!(UART_GET_STATUS(uart) & TXEMPTY))
  116. cpu_relax();
  117. UART_TX_IRQ_DISABLE(uart);
  118. }
  119. /*
  120. * Return TIOCSER_TEMT when transmitter is not busy.
  121. */
  122. static unsigned int arc_serial_tx_empty(struct uart_port *port)
  123. {
  124. struct arc_uart_port *uart = to_arc_port(port);
  125. unsigned int stat;
  126. stat = UART_GET_STATUS(uart);
  127. if (stat & TXEMPTY)
  128. return TIOCSER_TEMT;
  129. return 0;
  130. }
  131. /*
  132. * Driver internal routine, used by both tty(serial core) as well as tx-isr
  133. * -Called under spinlock in either cases
  134. * -also tty->stopped has already been checked
  135. * = by uart_start( ) before calling us
  136. * = tx_ist checks that too before calling
  137. */
  138. static void arc_serial_tx_chars(struct arc_uart_port *uart)
  139. {
  140. struct circ_buf *xmit = &uart->port.state->xmit;
  141. int sent = 0;
  142. unsigned char ch;
  143. if (unlikely(uart->port.x_char)) {
  144. UART_SET_DATA(uart, uart->port.x_char);
  145. uart->port.icount.tx++;
  146. uart->port.x_char = 0;
  147. sent = 1;
  148. } else if (xmit->tail != xmit->head) { /* TODO: uart_circ_empty */
  149. ch = xmit->buf[xmit->tail];
  150. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  151. uart->port.icount.tx++;
  152. while (!(UART_GET_STATUS(uart) & TXEMPTY))
  153. cpu_relax();
  154. UART_SET_DATA(uart, ch);
  155. sent = 1;
  156. }
  157. /*
  158. * If num chars in xmit buffer are too few, ask tty layer for more.
  159. * By Hard ISR to schedule processing in software interrupt part
  160. */
  161. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  162. uart_write_wakeup(&uart->port);
  163. if (sent)
  164. UART_TX_IRQ_ENABLE(uart);
  165. }
  166. /*
  167. * port is locked and interrupts are disabled
  168. * uart_start( ) calls us under the port spinlock irqsave
  169. */
  170. static void arc_serial_start_tx(struct uart_port *port)
  171. {
  172. struct arc_uart_port *uart = to_arc_port(port);
  173. arc_serial_tx_chars(uart);
  174. }
  175. static void arc_serial_rx_chars(struct arc_uart_port *uart, unsigned int status)
  176. {
  177. unsigned int ch, flg = 0;
  178. /*
  179. * UART has 4 deep RX-FIFO. Driver's recongnition of this fact
  180. * is very subtle. Here's how ...
  181. * Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available,
  182. * driver reads the DATA Reg and keeps doing that in a loop, until
  183. * RX-EMPTY=1. Multiple chars being avail, with a single Interrupt,
  184. * before RX-EMPTY=0, implies some sort of buffering going on in the
  185. * controller, which is indeed the Rx-FIFO.
  186. */
  187. do {
  188. /*
  189. * This could be an Rx Intr for err (no data),
  190. * so check err and clear that Intr first
  191. */
  192. if (unlikely(status & (RXOERR | RXFERR))) {
  193. if (status & RXOERR) {
  194. uart->port.icount.overrun++;
  195. flg = TTY_OVERRUN;
  196. UART_CLR_STATUS(uart, RXOERR);
  197. }
  198. if (status & RXFERR) {
  199. uart->port.icount.frame++;
  200. flg = TTY_FRAME;
  201. UART_CLR_STATUS(uart, RXFERR);
  202. }
  203. } else
  204. flg = TTY_NORMAL;
  205. if (status & RXEMPTY)
  206. continue;
  207. ch = UART_GET_DATA(uart);
  208. uart->port.icount.rx++;
  209. if (!(uart_handle_sysrq_char(&uart->port, ch)))
  210. uart_insert_char(&uart->port, status, RXOERR, ch, flg);
  211. spin_unlock(&uart->port.lock);
  212. tty_flip_buffer_push(&uart->port.state->port);
  213. spin_lock(&uart->port.lock);
  214. } while (!((status = UART_GET_STATUS(uart)) & RXEMPTY));
  215. }
  216. /*
  217. * A note on the Interrupt handling state machine of this driver
  218. *
  219. * kernel printk writes funnel thru the console driver framework and in order
  220. * to keep things simple as well as efficient, it writes to UART in polled
  221. * mode, in one shot, and exits.
  222. *
  223. * OTOH, Userland output (via tty layer), uses interrupt based writes as there
  224. * can be undeterministic delay between char writes.
  225. *
  226. * Thus Rx-interrupts are always enabled, while tx-interrupts are by default
  227. * disabled.
  228. *
  229. * When tty has some data to send out, serial core calls driver's start_tx
  230. * which
  231. * -checks-if-tty-buffer-has-char-to-send
  232. * -writes-data-to-uart
  233. * -enable-tx-intr
  234. *
  235. * Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt.
  236. * The first thing Tx ISR does is disable further Tx interrupts (as this could
  237. * be the last char to send, before settling down into the quiet polled mode).
  238. * It then calls the exact routine used by tty layer write to send out any
  239. * more char in tty buffer. In case of sending, it re-enables Tx-intr. In case
  240. * of no data, it remains disabled.
  241. * This is how the transmit state machine is dynamically switched on/off
  242. */
  243. static irqreturn_t arc_serial_isr(int irq, void *dev_id)
  244. {
  245. struct arc_uart_port *uart = dev_id;
  246. unsigned int status;
  247. status = UART_GET_STATUS(uart);
  248. /*
  249. * Single IRQ for both Rx (data available) Tx (room available) Interrupt
  250. * notifications from the UART Controller.
  251. * To demultiplex between the two, we check the relevant bits
  252. */
  253. if (status & RXIENB) {
  254. /* already in ISR, no need of xx_irqsave */
  255. spin_lock(&uart->port.lock);
  256. arc_serial_rx_chars(uart, status);
  257. spin_unlock(&uart->port.lock);
  258. }
  259. if ((status & TXIENB) && (status & TXEMPTY)) {
  260. /* Unconditionally disable further Tx-Interrupts.
  261. * will be enabled by tx_chars() if needed.
  262. */
  263. UART_TX_IRQ_DISABLE(uart);
  264. spin_lock(&uart->port.lock);
  265. if (!uart_tx_stopped(&uart->port))
  266. arc_serial_tx_chars(uart);
  267. spin_unlock(&uart->port.lock);
  268. }
  269. return IRQ_HANDLED;
  270. }
  271. static unsigned int arc_serial_get_mctrl(struct uart_port *port)
  272. {
  273. /*
  274. * Pretend we have a Modem status reg and following bits are
  275. * always set, to satify the serial core state machine
  276. * (DSR) Data Set Ready
  277. * (CTS) Clear To Send
  278. * (CAR) Carrier Detect
  279. */
  280. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  281. }
  282. static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  283. {
  284. /* MCR not present */
  285. }
  286. /* Enable Modem Status Interrupts */
  287. static void arc_serial_enable_ms(struct uart_port *port)
  288. {
  289. /* MSR not present */
  290. }
  291. static void arc_serial_break_ctl(struct uart_port *port, int break_state)
  292. {
  293. /* ARC UART doesn't support sending Break signal */
  294. }
  295. static int arc_serial_startup(struct uart_port *port)
  296. {
  297. struct arc_uart_port *uart = to_arc_port(port);
  298. /* Before we hook up the ISR, Disable all UART Interrupts */
  299. UART_ALL_IRQ_DISABLE(uart);
  300. if (request_irq(uart->port.irq, arc_serial_isr, 0, "arc uart rx-tx",
  301. uart)) {
  302. dev_warn(uart->port.dev, "Unable to attach ARC UART intr\n");
  303. return -EBUSY;
  304. }
  305. UART_RX_IRQ_ENABLE(uart); /* Only Rx IRQ enabled to begin with */
  306. return 0;
  307. }
  308. /* This is not really needed */
  309. static void arc_serial_shutdown(struct uart_port *port)
  310. {
  311. struct arc_uart_port *uart = to_arc_port(port);
  312. free_irq(uart->port.irq, uart);
  313. }
  314. static void
  315. arc_serial_set_termios(struct uart_port *port, struct ktermios *new,
  316. struct ktermios *old)
  317. {
  318. struct arc_uart_port *uart = to_arc_port(port);
  319. unsigned int baud, uartl, uarth, hw_val;
  320. unsigned long flags;
  321. /*
  322. * Use the generic handler so that any specially encoded baud rates
  323. * such as SPD_xx flags or "%B0" can be handled
  324. * Max Baud I suppose will not be more than current 115K * 4
  325. * Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1)
  326. * spread over two 8-bit registers
  327. */
  328. baud = uart_get_baud_rate(port, new, old, 0, 460800);
  329. hw_val = port->uartclk / (uart->baud * 4) - 1;
  330. uartl = hw_val & 0xFF;
  331. uarth = (hw_val >> 8) & 0xFF;
  332. /*
  333. * UART ISS(Instruction Set simulator) emulation has a subtle bug:
  334. * A existing value of Baudh = 0 is used as a indication to startup
  335. * it's internal state machine.
  336. * Thus if baudh is set to 0, 2 times, it chokes.
  337. * This happens with BAUD=115200 and the formaula above
  338. * Until that is fixed, when running on ISS, we will set baudh to !0
  339. */
  340. if (uart->is_emulated)
  341. uarth = 1;
  342. spin_lock_irqsave(&port->lock, flags);
  343. UART_ALL_IRQ_DISABLE(uart);
  344. UART_SET_BAUDL(uart, uartl);
  345. UART_SET_BAUDH(uart, uarth);
  346. UART_RX_IRQ_ENABLE(uart);
  347. /*
  348. * UART doesn't support Parity/Hardware Flow Control;
  349. * Only supports 8N1 character size
  350. */
  351. new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE);
  352. new->c_cflag |= CS8;
  353. if (old)
  354. tty_termios_copy_hw(new, old);
  355. /* Don't rewrite B0 */
  356. if (tty_termios_baud_rate(new))
  357. tty_termios_encode_baud_rate(new, baud, baud);
  358. uart_update_timeout(port, new->c_cflag, baud);
  359. spin_unlock_irqrestore(&port->lock, flags);
  360. }
  361. static const char *arc_serial_type(struct uart_port *port)
  362. {
  363. struct arc_uart_port *uart = to_arc_port(port);
  364. return uart->port.type == PORT_ARC ? DRIVER_NAME : NULL;
  365. }
  366. static void arc_serial_release_port(struct uart_port *port)
  367. {
  368. }
  369. static int arc_serial_request_port(struct uart_port *port)
  370. {
  371. return 0;
  372. }
  373. /*
  374. * Verify the new serial_struct (for TIOCSSERIAL).
  375. */
  376. static int
  377. arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  378. {
  379. if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC)
  380. return -EINVAL;
  381. return 0;
  382. }
  383. /*
  384. * Configure/autoconfigure the port.
  385. */
  386. static void arc_serial_config_port(struct uart_port *port, int flags)
  387. {
  388. struct arc_uart_port *uart = to_arc_port(port);
  389. if (flags & UART_CONFIG_TYPE)
  390. uart->port.type = PORT_ARC;
  391. }
  392. #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_ARC_CONSOLE)
  393. static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr)
  394. {
  395. struct arc_uart_port *uart = to_arc_port(port);
  396. while (!(UART_GET_STATUS(uart) & TXEMPTY))
  397. cpu_relax();
  398. UART_SET_DATA(uart, chr);
  399. }
  400. #endif
  401. #ifdef CONFIG_CONSOLE_POLL
  402. static int arc_serial_poll_getchar(struct uart_port *port)
  403. {
  404. struct arc_uart_port *uart = to_arc_port(port);
  405. unsigned char chr;
  406. while (!(UART_GET_STATUS(uart) & RXEMPTY))
  407. cpu_relax();
  408. chr = UART_GET_DATA(uart);
  409. return chr;
  410. }
  411. #endif
  412. static struct uart_ops arc_serial_pops = {
  413. .tx_empty = arc_serial_tx_empty,
  414. .set_mctrl = arc_serial_set_mctrl,
  415. .get_mctrl = arc_serial_get_mctrl,
  416. .stop_tx = arc_serial_stop_tx,
  417. .start_tx = arc_serial_start_tx,
  418. .stop_rx = arc_serial_stop_rx,
  419. .enable_ms = arc_serial_enable_ms,
  420. .break_ctl = arc_serial_break_ctl,
  421. .startup = arc_serial_startup,
  422. .shutdown = arc_serial_shutdown,
  423. .set_termios = arc_serial_set_termios,
  424. .type = arc_serial_type,
  425. .release_port = arc_serial_release_port,
  426. .request_port = arc_serial_request_port,
  427. .config_port = arc_serial_config_port,
  428. .verify_port = arc_serial_verify_port,
  429. #ifdef CONFIG_CONSOLE_POLL
  430. .poll_put_char = arc_serial_poll_putchar,
  431. .poll_get_char = arc_serial_poll_getchar,
  432. #endif
  433. };
  434. static int
  435. arc_uart_init_one(struct platform_device *pdev, int dev_id)
  436. {
  437. struct resource *res, *res2;
  438. unsigned long *plat_data;
  439. struct arc_uart_port *uart = &arc_uart_ports[dev_id];
  440. plat_data = (unsigned long *)dev_get_platdata(&pdev->dev);
  441. if (!plat_data)
  442. return -ENODEV;
  443. uart->is_emulated = !!plat_data[0]; /* workaround ISS bug */
  444. if (is_early_platform_device(pdev)) {
  445. uart->port.uartclk = plat_data[1];
  446. uart->baud = plat_data[2];
  447. } else {
  448. struct device_node *np = pdev->dev.of_node;
  449. u32 val;
  450. if (of_property_read_u32(np, "clock-frequency", &val)) {
  451. dev_err(&pdev->dev, "clock-frequency property NOTset\n");
  452. return -EINVAL;
  453. }
  454. uart->port.uartclk = val;
  455. if (of_property_read_u32(np, "current-speed", &val)) {
  456. dev_err(&pdev->dev, "current-speed property NOT set\n");
  457. return -EINVAL;
  458. }
  459. uart->baud = val;
  460. }
  461. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  462. if (!res)
  463. return -ENODEV;
  464. res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  465. if (!res2)
  466. return -ENODEV;
  467. uart->port.mapbase = res->start;
  468. uart->port.membase = ioremap_nocache(res->start, resource_size(res));
  469. if (!uart->port.membase)
  470. /* No point of dev_err since UART itself is hosed here */
  471. return -ENXIO;
  472. uart->port.irq = res2->start;
  473. uart->port.dev = &pdev->dev;
  474. uart->port.iotype = UPIO_MEM;
  475. uart->port.flags = UPF_BOOT_AUTOCONF;
  476. uart->port.line = dev_id;
  477. uart->port.ops = &arc_serial_pops;
  478. uart->port.fifosize = ARC_UART_TX_FIFO_SIZE;
  479. /*
  480. * uart_insert_char( ) uses it in decideding whether to ignore a
  481. * char or not. Explicitly setting it here, removes the subtelty
  482. */
  483. uart->port.ignore_status_mask = 0;
  484. return 0;
  485. }
  486. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  487. static int arc_serial_console_setup(struct console *co, char *options)
  488. {
  489. struct uart_port *port;
  490. int baud = 115200;
  491. int bits = 8;
  492. int parity = 'n';
  493. int flow = 'n';
  494. if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS)
  495. return -ENODEV;
  496. /*
  497. * The uart port backing the console (e.g. ttyARC1) might not have been
  498. * init yet. If so, defer the console setup to after the port.
  499. */
  500. port = &arc_uart_ports[co->index].port;
  501. if (!port->membase)
  502. return -ENODEV;
  503. if (options)
  504. uart_parse_options(options, &baud, &parity, &bits, &flow);
  505. /*
  506. * Serial core will call port->ops->set_termios( )
  507. * which will set the baud reg
  508. */
  509. return uart_set_options(port, co, baud, parity, bits, flow);
  510. }
  511. static void arc_serial_console_putchar(struct uart_port *port, int ch)
  512. {
  513. arc_serial_poll_putchar(port, (unsigned char)ch);
  514. }
  515. /*
  516. * Interrupts are disabled on entering
  517. */
  518. static void arc_serial_console_write(struct console *co, const char *s,
  519. unsigned int count)
  520. {
  521. struct uart_port *port = &arc_uart_ports[co->index].port;
  522. unsigned long flags;
  523. spin_lock_irqsave(&port->lock, flags);
  524. uart_console_write(port, s, count, arc_serial_console_putchar);
  525. spin_unlock_irqrestore(&port->lock, flags);
  526. }
  527. static struct console arc_console = {
  528. .name = ARC_SERIAL_DEV_NAME,
  529. .write = arc_serial_console_write,
  530. .device = uart_console_device,
  531. .setup = arc_serial_console_setup,
  532. .flags = CON_PRINTBUFFER,
  533. .index = -1,
  534. .data = &arc_uart_driver
  535. };
  536. static __init void early_serial_write(struct console *con, const char *s,
  537. unsigned int n)
  538. {
  539. struct uart_port *port = &arc_uart_ports[con->index].port;
  540. unsigned int i;
  541. for (i = 0; i < n; i++, s++) {
  542. if (*s == '\n')
  543. arc_serial_poll_putchar(port, '\r');
  544. arc_serial_poll_putchar(port, *s);
  545. }
  546. }
  547. static struct console arc_early_serial_console __initdata = {
  548. .name = "early_ARCuart",
  549. .write = early_serial_write,
  550. .flags = CON_PRINTBUFFER | CON_BOOT,
  551. .index = -1
  552. };
  553. static int __init arc_serial_probe_earlyprintk(struct platform_device *pdev)
  554. {
  555. int dev_id = pdev->id < 0 ? 0 : pdev->id;
  556. int rc;
  557. arc_early_serial_console.index = dev_id;
  558. rc = arc_uart_init_one(pdev, dev_id);
  559. if (rc)
  560. panic("early console init failed\n");
  561. arc_serial_console_setup(&arc_early_serial_console, NULL);
  562. register_console(&arc_early_serial_console);
  563. return 0;
  564. }
  565. #endif /* CONFIG_SERIAL_ARC_CONSOLE */
  566. static int arc_serial_probe(struct platform_device *pdev)
  567. {
  568. int rc, dev_id;
  569. struct device_node *np = pdev->dev.of_node;
  570. /* no device tree device */
  571. if (!np)
  572. return -ENODEV;
  573. dev_id = of_alias_get_id(np, "serial");
  574. if (dev_id < 0)
  575. dev_id = 0;
  576. rc = arc_uart_init_one(pdev, dev_id);
  577. if (rc)
  578. return rc;
  579. rc = uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port);
  580. return rc;
  581. }
  582. static int arc_serial_remove(struct platform_device *pdev)
  583. {
  584. /* This will never be called */
  585. return 0;
  586. }
  587. static const struct of_device_id arc_uart_dt_ids[] = {
  588. { .compatible = "snps,arc-uart" },
  589. { /* Sentinel */ }
  590. };
  591. MODULE_DEVICE_TABLE(of, arc_uart_dt_ids);
  592. static struct platform_driver arc_platform_driver = {
  593. .probe = arc_serial_probe,
  594. .remove = arc_serial_remove,
  595. .driver = {
  596. .name = DRIVER_NAME,
  597. .owner = THIS_MODULE,
  598. .of_match_table = arc_uart_dt_ids,
  599. },
  600. };
  601. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  602. static struct platform_driver early_arc_platform_driver __initdata = {
  603. .probe = arc_serial_probe_earlyprintk,
  604. .remove = arc_serial_remove,
  605. .driver = {
  606. .name = DRIVER_NAME,
  607. .owner = THIS_MODULE,
  608. },
  609. };
  610. /*
  611. * Register an early platform driver of "earlyprintk" class.
  612. * ARCH platform code installs the driver and probes the early devices
  613. * The installation could rely on user specifying earlyprintk=xyx in cmd line
  614. * or it could be done independently, for all "earlyprintk" class drivers.
  615. * [see arch/arc/plat-arcfpga/platform.c]
  616. */
  617. early_platform_init("earlyprintk", &early_arc_platform_driver);
  618. #endif /* CONFIG_SERIAL_ARC_CONSOLE */
  619. static int __init arc_serial_init(void)
  620. {
  621. int ret;
  622. ret = uart_register_driver(&arc_uart_driver);
  623. if (ret)
  624. return ret;
  625. ret = platform_driver_register(&arc_platform_driver);
  626. if (ret)
  627. uart_unregister_driver(&arc_uart_driver);
  628. return ret;
  629. }
  630. static void __exit arc_serial_exit(void)
  631. {
  632. platform_driver_unregister(&arc_platform_driver);
  633. uart_unregister_driver(&arc_uart_driver);
  634. }
  635. module_init(arc_serial_init);
  636. module_exit(arc_serial_exit);
  637. MODULE_LICENSE("GPL");
  638. MODULE_ALIAS("platform:" DRIVER_NAME);
  639. MODULE_AUTHOR("Vineet Gupta");
  640. MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver");