ar933x_uart.c 18 KB

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  1. /*
  2. * Atheros AR933X SoC built-in UART driver
  3. *
  4. * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published
  10. * by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/ioport.h>
  14. #include <linux/init.h>
  15. #include <linux/console.h>
  16. #include <linux/sysrq.h>
  17. #include <linux/delay.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/of.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/serial.h>
  25. #include <linux/slab.h>
  26. #include <linux/io.h>
  27. #include <linux/irq.h>
  28. #include <linux/clk.h>
  29. #include <asm/div64.h>
  30. #include <asm/mach-ath79/ar933x_uart.h>
  31. #define DRIVER_NAME "ar933x-uart"
  32. #define AR933X_UART_MAX_SCALE 0xff
  33. #define AR933X_UART_MAX_STEP 0xffff
  34. #define AR933X_UART_MIN_BAUD 300
  35. #define AR933X_UART_MAX_BAUD 3000000
  36. #define AR933X_DUMMY_STATUS_RD 0x01
  37. static struct uart_driver ar933x_uart_driver;
  38. struct ar933x_uart_port {
  39. struct uart_port port;
  40. unsigned int ier; /* shadow Interrupt Enable Register */
  41. unsigned int min_baud;
  42. unsigned int max_baud;
  43. struct clk *clk;
  44. };
  45. static inline bool ar933x_uart_console_enabled(void)
  46. {
  47. return config_enabled(CONFIG_SERIAL_AR933X_CONSOLE);
  48. }
  49. static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
  50. int offset)
  51. {
  52. return readl(up->port.membase + offset);
  53. }
  54. static inline void ar933x_uart_write(struct ar933x_uart_port *up,
  55. int offset, unsigned int value)
  56. {
  57. writel(value, up->port.membase + offset);
  58. }
  59. static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
  60. unsigned int offset,
  61. unsigned int mask,
  62. unsigned int val)
  63. {
  64. unsigned int t;
  65. t = ar933x_uart_read(up, offset);
  66. t &= ~mask;
  67. t |= val;
  68. ar933x_uart_write(up, offset, t);
  69. }
  70. static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
  71. unsigned int offset,
  72. unsigned int val)
  73. {
  74. ar933x_uart_rmw(up, offset, 0, val);
  75. }
  76. static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
  77. unsigned int offset,
  78. unsigned int val)
  79. {
  80. ar933x_uart_rmw(up, offset, val, 0);
  81. }
  82. static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
  83. {
  84. up->ier |= AR933X_UART_INT_TX_EMPTY;
  85. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  86. }
  87. static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
  88. {
  89. up->ier &= ~AR933X_UART_INT_TX_EMPTY;
  90. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  91. }
  92. static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
  93. {
  94. unsigned int rdata;
  95. rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
  96. rdata |= AR933X_UART_DATA_TX_CSR;
  97. ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
  98. }
  99. static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
  100. {
  101. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  102. unsigned long flags;
  103. unsigned int rdata;
  104. spin_lock_irqsave(&up->port.lock, flags);
  105. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  106. spin_unlock_irqrestore(&up->port.lock, flags);
  107. return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
  108. }
  109. static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
  110. {
  111. return TIOCM_CAR;
  112. }
  113. static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  114. {
  115. }
  116. static void ar933x_uart_start_tx(struct uart_port *port)
  117. {
  118. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  119. ar933x_uart_start_tx_interrupt(up);
  120. }
  121. static void ar933x_uart_stop_tx(struct uart_port *port)
  122. {
  123. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  124. ar933x_uart_stop_tx_interrupt(up);
  125. }
  126. static void ar933x_uart_stop_rx(struct uart_port *port)
  127. {
  128. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  129. up->ier &= ~AR933X_UART_INT_RX_VALID;
  130. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  131. }
  132. static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
  133. {
  134. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  135. unsigned long flags;
  136. spin_lock_irqsave(&up->port.lock, flags);
  137. if (break_state == -1)
  138. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  139. AR933X_UART_CS_TX_BREAK);
  140. else
  141. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  142. AR933X_UART_CS_TX_BREAK);
  143. spin_unlock_irqrestore(&up->port.lock, flags);
  144. }
  145. static void ar933x_uart_enable_ms(struct uart_port *port)
  146. {
  147. }
  148. /*
  149. * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
  150. */
  151. static unsigned long ar933x_uart_get_baud(unsigned int clk,
  152. unsigned int scale,
  153. unsigned int step)
  154. {
  155. u64 t;
  156. u32 div;
  157. div = (2 << 16) * (scale + 1);
  158. t = clk;
  159. t *= step;
  160. t += (div / 2);
  161. do_div(t, div);
  162. return t;
  163. }
  164. static void ar933x_uart_get_scale_step(unsigned int clk,
  165. unsigned int baud,
  166. unsigned int *scale,
  167. unsigned int *step)
  168. {
  169. unsigned int tscale;
  170. long min_diff;
  171. *scale = 0;
  172. *step = 0;
  173. min_diff = baud;
  174. for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
  175. u64 tstep;
  176. int diff;
  177. tstep = baud * (tscale + 1);
  178. tstep *= (2 << 16);
  179. do_div(tstep, clk);
  180. if (tstep > AR933X_UART_MAX_STEP)
  181. break;
  182. diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
  183. if (diff < min_diff) {
  184. min_diff = diff;
  185. *scale = tscale;
  186. *step = tstep;
  187. }
  188. }
  189. }
  190. static void ar933x_uart_set_termios(struct uart_port *port,
  191. struct ktermios *new,
  192. struct ktermios *old)
  193. {
  194. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  195. unsigned int cs;
  196. unsigned long flags;
  197. unsigned int baud, scale, step;
  198. /* Only CS8 is supported */
  199. new->c_cflag &= ~CSIZE;
  200. new->c_cflag |= CS8;
  201. /* Only one stop bit is supported */
  202. new->c_cflag &= ~CSTOPB;
  203. cs = 0;
  204. if (new->c_cflag & PARENB) {
  205. if (!(new->c_cflag & PARODD))
  206. cs |= AR933X_UART_CS_PARITY_EVEN;
  207. else
  208. cs |= AR933X_UART_CS_PARITY_ODD;
  209. } else {
  210. cs |= AR933X_UART_CS_PARITY_NONE;
  211. }
  212. /* Mark/space parity is not supported */
  213. new->c_cflag &= ~CMSPAR;
  214. baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
  215. ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
  216. /*
  217. * Ok, we're now changing the port state. Do it with
  218. * interrupts disabled.
  219. */
  220. spin_lock_irqsave(&up->port.lock, flags);
  221. /* disable the UART */
  222. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  223. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
  224. /* Update the per-port timeout. */
  225. uart_update_timeout(port, new->c_cflag, baud);
  226. up->port.ignore_status_mask = 0;
  227. /* ignore all characters if CREAD is not set */
  228. if ((new->c_cflag & CREAD) == 0)
  229. up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
  230. ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
  231. scale << AR933X_UART_CLOCK_SCALE_S | step);
  232. /* setup configuration register */
  233. ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
  234. /* enable host interrupt */
  235. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  236. AR933X_UART_CS_HOST_INT_EN);
  237. /* reenable the UART */
  238. ar933x_uart_rmw(up, AR933X_UART_CS_REG,
  239. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
  240. AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
  241. spin_unlock_irqrestore(&up->port.lock, flags);
  242. if (tty_termios_baud_rate(new))
  243. tty_termios_encode_baud_rate(new, baud, baud);
  244. }
  245. static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
  246. {
  247. struct tty_port *port = &up->port.state->port;
  248. int max_count = 256;
  249. do {
  250. unsigned int rdata;
  251. unsigned char ch;
  252. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  253. if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
  254. break;
  255. /* remove the character from the FIFO */
  256. ar933x_uart_write(up, AR933X_UART_DATA_REG,
  257. AR933X_UART_DATA_RX_CSR);
  258. up->port.icount.rx++;
  259. ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
  260. if (uart_handle_sysrq_char(&up->port, ch))
  261. continue;
  262. if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
  263. tty_insert_flip_char(port, ch, TTY_NORMAL);
  264. } while (max_count-- > 0);
  265. spin_unlock(&up->port.lock);
  266. tty_flip_buffer_push(port);
  267. spin_lock(&up->port.lock);
  268. }
  269. static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
  270. {
  271. struct circ_buf *xmit = &up->port.state->xmit;
  272. int count;
  273. if (uart_tx_stopped(&up->port))
  274. return;
  275. count = up->port.fifosize;
  276. do {
  277. unsigned int rdata;
  278. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  279. if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
  280. break;
  281. if (up->port.x_char) {
  282. ar933x_uart_putc(up, up->port.x_char);
  283. up->port.icount.tx++;
  284. up->port.x_char = 0;
  285. continue;
  286. }
  287. if (uart_circ_empty(xmit))
  288. break;
  289. ar933x_uart_putc(up, xmit->buf[xmit->tail]);
  290. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  291. up->port.icount.tx++;
  292. } while (--count > 0);
  293. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  294. uart_write_wakeup(&up->port);
  295. if (!uart_circ_empty(xmit))
  296. ar933x_uart_start_tx_interrupt(up);
  297. }
  298. static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
  299. {
  300. struct ar933x_uart_port *up = dev_id;
  301. unsigned int status;
  302. status = ar933x_uart_read(up, AR933X_UART_CS_REG);
  303. if ((status & AR933X_UART_CS_HOST_INT) == 0)
  304. return IRQ_NONE;
  305. spin_lock(&up->port.lock);
  306. status = ar933x_uart_read(up, AR933X_UART_INT_REG);
  307. status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  308. if (status & AR933X_UART_INT_RX_VALID) {
  309. ar933x_uart_write(up, AR933X_UART_INT_REG,
  310. AR933X_UART_INT_RX_VALID);
  311. ar933x_uart_rx_chars(up);
  312. }
  313. if (status & AR933X_UART_INT_TX_EMPTY) {
  314. ar933x_uart_write(up, AR933X_UART_INT_REG,
  315. AR933X_UART_INT_TX_EMPTY);
  316. ar933x_uart_stop_tx_interrupt(up);
  317. ar933x_uart_tx_chars(up);
  318. }
  319. spin_unlock(&up->port.lock);
  320. return IRQ_HANDLED;
  321. }
  322. static int ar933x_uart_startup(struct uart_port *port)
  323. {
  324. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  325. unsigned long flags;
  326. int ret;
  327. ret = request_irq(up->port.irq, ar933x_uart_interrupt,
  328. up->port.irqflags, dev_name(up->port.dev), up);
  329. if (ret)
  330. return ret;
  331. spin_lock_irqsave(&up->port.lock, flags);
  332. /* Enable HOST interrupts */
  333. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  334. AR933X_UART_CS_HOST_INT_EN);
  335. /* Enable RX interrupts */
  336. up->ier = AR933X_UART_INT_RX_VALID;
  337. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  338. spin_unlock_irqrestore(&up->port.lock, flags);
  339. return 0;
  340. }
  341. static void ar933x_uart_shutdown(struct uart_port *port)
  342. {
  343. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  344. /* Disable all interrupts */
  345. up->ier = 0;
  346. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  347. /* Disable break condition */
  348. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  349. AR933X_UART_CS_TX_BREAK);
  350. free_irq(up->port.irq, up);
  351. }
  352. static const char *ar933x_uart_type(struct uart_port *port)
  353. {
  354. return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
  355. }
  356. static void ar933x_uart_release_port(struct uart_port *port)
  357. {
  358. /* Nothing to release ... */
  359. }
  360. static int ar933x_uart_request_port(struct uart_port *port)
  361. {
  362. /* UARTs always present */
  363. return 0;
  364. }
  365. static void ar933x_uart_config_port(struct uart_port *port, int flags)
  366. {
  367. if (flags & UART_CONFIG_TYPE)
  368. port->type = PORT_AR933X;
  369. }
  370. static int ar933x_uart_verify_port(struct uart_port *port,
  371. struct serial_struct *ser)
  372. {
  373. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  374. if (ser->type != PORT_UNKNOWN &&
  375. ser->type != PORT_AR933X)
  376. return -EINVAL;
  377. if (ser->irq < 0 || ser->irq >= NR_IRQS)
  378. return -EINVAL;
  379. if (ser->baud_base < up->min_baud ||
  380. ser->baud_base > up->max_baud)
  381. return -EINVAL;
  382. return 0;
  383. }
  384. static struct uart_ops ar933x_uart_ops = {
  385. .tx_empty = ar933x_uart_tx_empty,
  386. .set_mctrl = ar933x_uart_set_mctrl,
  387. .get_mctrl = ar933x_uart_get_mctrl,
  388. .stop_tx = ar933x_uart_stop_tx,
  389. .start_tx = ar933x_uart_start_tx,
  390. .stop_rx = ar933x_uart_stop_rx,
  391. .enable_ms = ar933x_uart_enable_ms,
  392. .break_ctl = ar933x_uart_break_ctl,
  393. .startup = ar933x_uart_startup,
  394. .shutdown = ar933x_uart_shutdown,
  395. .set_termios = ar933x_uart_set_termios,
  396. .type = ar933x_uart_type,
  397. .release_port = ar933x_uart_release_port,
  398. .request_port = ar933x_uart_request_port,
  399. .config_port = ar933x_uart_config_port,
  400. .verify_port = ar933x_uart_verify_port,
  401. };
  402. static struct ar933x_uart_port *
  403. ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
  404. static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
  405. {
  406. unsigned int status;
  407. unsigned int timeout = 60000;
  408. /* Wait up to 60ms for the character(s) to be sent. */
  409. do {
  410. status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  411. if (--timeout == 0)
  412. break;
  413. udelay(1);
  414. } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
  415. }
  416. static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
  417. {
  418. struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
  419. ar933x_uart_wait_xmitr(up);
  420. ar933x_uart_putc(up, ch);
  421. }
  422. static void ar933x_uart_console_write(struct console *co, const char *s,
  423. unsigned int count)
  424. {
  425. struct ar933x_uart_port *up = ar933x_console_ports[co->index];
  426. unsigned long flags;
  427. unsigned int int_en;
  428. int locked = 1;
  429. local_irq_save(flags);
  430. if (up->port.sysrq)
  431. locked = 0;
  432. else if (oops_in_progress)
  433. locked = spin_trylock(&up->port.lock);
  434. else
  435. spin_lock(&up->port.lock);
  436. /*
  437. * First save the IER then disable the interrupts
  438. */
  439. int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  440. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
  441. uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
  442. /*
  443. * Finally, wait for transmitter to become empty
  444. * and restore the IER
  445. */
  446. ar933x_uart_wait_xmitr(up);
  447. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
  448. ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
  449. if (locked)
  450. spin_unlock(&up->port.lock);
  451. local_irq_restore(flags);
  452. }
  453. static int ar933x_uart_console_setup(struct console *co, char *options)
  454. {
  455. struct ar933x_uart_port *up;
  456. int baud = 115200;
  457. int bits = 8;
  458. int parity = 'n';
  459. int flow = 'n';
  460. if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
  461. return -EINVAL;
  462. up = ar933x_console_ports[co->index];
  463. if (!up)
  464. return -ENODEV;
  465. if (options)
  466. uart_parse_options(options, &baud, &parity, &bits, &flow);
  467. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  468. }
  469. static struct console ar933x_uart_console = {
  470. .name = "ttyATH",
  471. .write = ar933x_uart_console_write,
  472. .device = uart_console_device,
  473. .setup = ar933x_uart_console_setup,
  474. .flags = CON_PRINTBUFFER,
  475. .index = -1,
  476. .data = &ar933x_uart_driver,
  477. };
  478. static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
  479. {
  480. if (!ar933x_uart_console_enabled())
  481. return;
  482. ar933x_console_ports[up->port.line] = up;
  483. }
  484. static struct uart_driver ar933x_uart_driver = {
  485. .owner = THIS_MODULE,
  486. .driver_name = DRIVER_NAME,
  487. .dev_name = "ttyATH",
  488. .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
  489. .cons = NULL, /* filled in runtime */
  490. };
  491. static int ar933x_uart_probe(struct platform_device *pdev)
  492. {
  493. struct ar933x_uart_port *up;
  494. struct uart_port *port;
  495. struct resource *mem_res;
  496. struct resource *irq_res;
  497. struct device_node *np;
  498. unsigned int baud;
  499. int id;
  500. int ret;
  501. np = pdev->dev.of_node;
  502. if (config_enabled(CONFIG_OF) && np) {
  503. id = of_alias_get_id(np, "serial");
  504. if (id < 0) {
  505. dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
  506. id);
  507. return id;
  508. }
  509. } else {
  510. id = pdev->id;
  511. if (id == -1)
  512. id = 0;
  513. }
  514. if (id > CONFIG_SERIAL_AR933X_NR_UARTS)
  515. return -EINVAL;
  516. irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  517. if (!irq_res) {
  518. dev_err(&pdev->dev, "no IRQ resource\n");
  519. return -EINVAL;
  520. }
  521. up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
  522. GFP_KERNEL);
  523. if (!up)
  524. return -ENOMEM;
  525. up->clk = devm_clk_get(&pdev->dev, "uart");
  526. if (IS_ERR(up->clk)) {
  527. dev_err(&pdev->dev, "unable to get UART clock\n");
  528. return PTR_ERR(up->clk);
  529. }
  530. port = &up->port;
  531. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  532. port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
  533. if (IS_ERR(port->membase))
  534. return PTR_ERR(port->membase);
  535. ret = clk_prepare_enable(up->clk);
  536. if (ret)
  537. return ret;
  538. port->uartclk = clk_get_rate(up->clk);
  539. if (!port->uartclk) {
  540. ret = -EINVAL;
  541. goto err_disable_clk;
  542. }
  543. port->mapbase = mem_res->start;
  544. port->line = id;
  545. port->irq = irq_res->start;
  546. port->dev = &pdev->dev;
  547. port->type = PORT_AR933X;
  548. port->iotype = UPIO_MEM32;
  549. port->regshift = 2;
  550. port->fifosize = AR933X_UART_FIFO_SIZE;
  551. port->ops = &ar933x_uart_ops;
  552. baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
  553. up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
  554. baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
  555. up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
  556. ar933x_uart_add_console_port(up);
  557. ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
  558. if (ret)
  559. goto err_disable_clk;
  560. platform_set_drvdata(pdev, up);
  561. return 0;
  562. err_disable_clk:
  563. clk_disable_unprepare(up->clk);
  564. return ret;
  565. }
  566. static int ar933x_uart_remove(struct platform_device *pdev)
  567. {
  568. struct ar933x_uart_port *up;
  569. up = platform_get_drvdata(pdev);
  570. if (up) {
  571. uart_remove_one_port(&ar933x_uart_driver, &up->port);
  572. clk_disable_unprepare(up->clk);
  573. }
  574. return 0;
  575. }
  576. #ifdef CONFIG_OF
  577. static const struct of_device_id ar933x_uart_of_ids[] = {
  578. { .compatible = "qca,ar9330-uart" },
  579. {},
  580. };
  581. MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
  582. #endif
  583. static struct platform_driver ar933x_uart_platform_driver = {
  584. .probe = ar933x_uart_probe,
  585. .remove = ar933x_uart_remove,
  586. .driver = {
  587. .name = DRIVER_NAME,
  588. .owner = THIS_MODULE,
  589. .of_match_table = of_match_ptr(ar933x_uart_of_ids),
  590. },
  591. };
  592. static int __init ar933x_uart_init(void)
  593. {
  594. int ret;
  595. if (ar933x_uart_console_enabled())
  596. ar933x_uart_driver.cons = &ar933x_uart_console;
  597. ret = uart_register_driver(&ar933x_uart_driver);
  598. if (ret)
  599. goto err_out;
  600. ret = platform_driver_register(&ar933x_uart_platform_driver);
  601. if (ret)
  602. goto err_unregister_uart_driver;
  603. return 0;
  604. err_unregister_uart_driver:
  605. uart_unregister_driver(&ar933x_uart_driver);
  606. err_out:
  607. return ret;
  608. }
  609. static void __exit ar933x_uart_exit(void)
  610. {
  611. platform_driver_unregister(&ar933x_uart_platform_driver);
  612. uart_unregister_driver(&ar933x_uart_driver);
  613. }
  614. module_init(ar933x_uart_init);
  615. module_exit(ar933x_uart_exit);
  616. MODULE_DESCRIPTION("Atheros AR933X UART driver");
  617. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
  618. MODULE_LICENSE("GPL v2");
  619. MODULE_ALIAS("platform:" DRIVER_NAME);