qla_iocb.c 75 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2013 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_target.h"
  9. #include <linux/blkdev.h>
  10. #include <linux/delay.h>
  11. #include <scsi/scsi_tcq.h>
  12. static void qla25xx_set_que(srb_t *, struct rsp_que **);
  13. /**
  14. * qla2x00_get_cmd_direction() - Determine control_flag data direction.
  15. * @cmd: SCSI command
  16. *
  17. * Returns the proper CF_* direction based on CDB.
  18. */
  19. static inline uint16_t
  20. qla2x00_get_cmd_direction(srb_t *sp)
  21. {
  22. uint16_t cflags;
  23. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  24. struct scsi_qla_host *vha = sp->fcport->vha;
  25. cflags = 0;
  26. /* Set transfer direction */
  27. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  28. cflags = CF_WRITE;
  29. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  30. vha->qla_stats.output_requests++;
  31. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  32. cflags = CF_READ;
  33. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  34. vha->qla_stats.input_requests++;
  35. }
  36. return (cflags);
  37. }
  38. /**
  39. * qla2x00_calc_iocbs_32() - Determine number of Command Type 2 and
  40. * Continuation Type 0 IOCBs to allocate.
  41. *
  42. * @dsds: number of data segment decriptors needed
  43. *
  44. * Returns the number of IOCB entries needed to store @dsds.
  45. */
  46. uint16_t
  47. qla2x00_calc_iocbs_32(uint16_t dsds)
  48. {
  49. uint16_t iocbs;
  50. iocbs = 1;
  51. if (dsds > 3) {
  52. iocbs += (dsds - 3) / 7;
  53. if ((dsds - 3) % 7)
  54. iocbs++;
  55. }
  56. return (iocbs);
  57. }
  58. /**
  59. * qla2x00_calc_iocbs_64() - Determine number of Command Type 3 and
  60. * Continuation Type 1 IOCBs to allocate.
  61. *
  62. * @dsds: number of data segment decriptors needed
  63. *
  64. * Returns the number of IOCB entries needed to store @dsds.
  65. */
  66. uint16_t
  67. qla2x00_calc_iocbs_64(uint16_t dsds)
  68. {
  69. uint16_t iocbs;
  70. iocbs = 1;
  71. if (dsds > 2) {
  72. iocbs += (dsds - 2) / 5;
  73. if ((dsds - 2) % 5)
  74. iocbs++;
  75. }
  76. return (iocbs);
  77. }
  78. /**
  79. * qla2x00_prep_cont_type0_iocb() - Initialize a Continuation Type 0 IOCB.
  80. * @ha: HA context
  81. *
  82. * Returns a pointer to the Continuation Type 0 IOCB packet.
  83. */
  84. static inline cont_entry_t *
  85. qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha)
  86. {
  87. cont_entry_t *cont_pkt;
  88. struct req_que *req = vha->req;
  89. /* Adjust ring index. */
  90. req->ring_index++;
  91. if (req->ring_index == req->length) {
  92. req->ring_index = 0;
  93. req->ring_ptr = req->ring;
  94. } else {
  95. req->ring_ptr++;
  96. }
  97. cont_pkt = (cont_entry_t *)req->ring_ptr;
  98. /* Load packet defaults. */
  99. *((uint32_t *)(&cont_pkt->entry_type)) =
  100. __constant_cpu_to_le32(CONTINUE_TYPE);
  101. return (cont_pkt);
  102. }
  103. /**
  104. * qla2x00_prep_cont_type1_iocb() - Initialize a Continuation Type 1 IOCB.
  105. * @ha: HA context
  106. *
  107. * Returns a pointer to the continuation type 1 IOCB packet.
  108. */
  109. static inline cont_a64_entry_t *
  110. qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req)
  111. {
  112. cont_a64_entry_t *cont_pkt;
  113. /* Adjust ring index. */
  114. req->ring_index++;
  115. if (req->ring_index == req->length) {
  116. req->ring_index = 0;
  117. req->ring_ptr = req->ring;
  118. } else {
  119. req->ring_ptr++;
  120. }
  121. cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
  122. /* Load packet defaults. */
  123. *((uint32_t *)(&cont_pkt->entry_type)) = IS_QLAFX00(vha->hw) ?
  124. __constant_cpu_to_le32(CONTINUE_A64_TYPE_FX00) :
  125. __constant_cpu_to_le32(CONTINUE_A64_TYPE);
  126. return (cont_pkt);
  127. }
  128. static inline int
  129. qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
  130. {
  131. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  132. uint8_t guard = scsi_host_get_guard(cmd->device->host);
  133. /* We always use DIFF Bundling for best performance */
  134. *fw_prot_opts = 0;
  135. /* Translate SCSI opcode to a protection opcode */
  136. switch (scsi_get_prot_op(cmd)) {
  137. case SCSI_PROT_READ_STRIP:
  138. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  139. break;
  140. case SCSI_PROT_WRITE_INSERT:
  141. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  142. break;
  143. case SCSI_PROT_READ_INSERT:
  144. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  145. break;
  146. case SCSI_PROT_WRITE_STRIP:
  147. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  148. break;
  149. case SCSI_PROT_READ_PASS:
  150. case SCSI_PROT_WRITE_PASS:
  151. if (guard & SHOST_DIX_GUARD_IP)
  152. *fw_prot_opts |= PO_MODE_DIF_TCP_CKSUM;
  153. else
  154. *fw_prot_opts |= PO_MODE_DIF_PASS;
  155. break;
  156. default: /* Normal Request */
  157. *fw_prot_opts |= PO_MODE_DIF_PASS;
  158. break;
  159. }
  160. return scsi_prot_sg_count(cmd);
  161. }
  162. /*
  163. * qla2x00_build_scsi_iocbs_32() - Build IOCB command utilizing 32bit
  164. * capable IOCB types.
  165. *
  166. * @sp: SRB command to process
  167. * @cmd_pkt: Command type 2 IOCB
  168. * @tot_dsds: Total number of segments to transfer
  169. */
  170. void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
  171. uint16_t tot_dsds)
  172. {
  173. uint16_t avail_dsds;
  174. uint32_t *cur_dsd;
  175. scsi_qla_host_t *vha;
  176. struct scsi_cmnd *cmd;
  177. struct scatterlist *sg;
  178. int i;
  179. cmd = GET_CMD_SP(sp);
  180. /* Update entry type to indicate Command Type 2 IOCB */
  181. *((uint32_t *)(&cmd_pkt->entry_type)) =
  182. __constant_cpu_to_le32(COMMAND_TYPE);
  183. /* No data transfer */
  184. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  185. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  186. return;
  187. }
  188. vha = sp->fcport->vha;
  189. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  190. /* Three DSDs are available in the Command Type 2 IOCB */
  191. avail_dsds = 3;
  192. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  193. /* Load data segments */
  194. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  195. cont_entry_t *cont_pkt;
  196. /* Allocate additional continuation packets? */
  197. if (avail_dsds == 0) {
  198. /*
  199. * Seven DSDs are available in the Continuation
  200. * Type 0 IOCB.
  201. */
  202. cont_pkt = qla2x00_prep_cont_type0_iocb(vha);
  203. cur_dsd = (uint32_t *)&cont_pkt->dseg_0_address;
  204. avail_dsds = 7;
  205. }
  206. *cur_dsd++ = cpu_to_le32(sg_dma_address(sg));
  207. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  208. avail_dsds--;
  209. }
  210. }
  211. /**
  212. * qla2x00_build_scsi_iocbs_64() - Build IOCB command utilizing 64bit
  213. * capable IOCB types.
  214. *
  215. * @sp: SRB command to process
  216. * @cmd_pkt: Command type 3 IOCB
  217. * @tot_dsds: Total number of segments to transfer
  218. */
  219. void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
  220. uint16_t tot_dsds)
  221. {
  222. uint16_t avail_dsds;
  223. uint32_t *cur_dsd;
  224. scsi_qla_host_t *vha;
  225. struct scsi_cmnd *cmd;
  226. struct scatterlist *sg;
  227. int i;
  228. cmd = GET_CMD_SP(sp);
  229. /* Update entry type to indicate Command Type 3 IOCB */
  230. *((uint32_t *)(&cmd_pkt->entry_type)) =
  231. __constant_cpu_to_le32(COMMAND_A64_TYPE);
  232. /* No data transfer */
  233. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  234. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  235. return;
  236. }
  237. vha = sp->fcport->vha;
  238. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  239. /* Two DSDs are available in the Command Type 3 IOCB */
  240. avail_dsds = 2;
  241. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  242. /* Load data segments */
  243. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  244. dma_addr_t sle_dma;
  245. cont_a64_entry_t *cont_pkt;
  246. /* Allocate additional continuation packets? */
  247. if (avail_dsds == 0) {
  248. /*
  249. * Five DSDs are available in the Continuation
  250. * Type 1 IOCB.
  251. */
  252. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  253. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  254. avail_dsds = 5;
  255. }
  256. sle_dma = sg_dma_address(sg);
  257. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  258. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  259. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  260. avail_dsds--;
  261. }
  262. }
  263. /**
  264. * qla2x00_start_scsi() - Send a SCSI command to the ISP
  265. * @sp: command to send to the ISP
  266. *
  267. * Returns non-zero if a failure occurred, else zero.
  268. */
  269. int
  270. qla2x00_start_scsi(srb_t *sp)
  271. {
  272. int ret, nseg;
  273. unsigned long flags;
  274. scsi_qla_host_t *vha;
  275. struct scsi_cmnd *cmd;
  276. uint32_t *clr_ptr;
  277. uint32_t index;
  278. uint32_t handle;
  279. cmd_entry_t *cmd_pkt;
  280. uint16_t cnt;
  281. uint16_t req_cnt;
  282. uint16_t tot_dsds;
  283. struct device_reg_2xxx __iomem *reg;
  284. struct qla_hw_data *ha;
  285. struct req_que *req;
  286. struct rsp_que *rsp;
  287. char tag[2];
  288. /* Setup device pointers. */
  289. ret = 0;
  290. vha = sp->fcport->vha;
  291. ha = vha->hw;
  292. reg = &ha->iobase->isp;
  293. cmd = GET_CMD_SP(sp);
  294. req = ha->req_q_map[0];
  295. rsp = ha->rsp_q_map[0];
  296. /* So we know we haven't pci_map'ed anything yet */
  297. tot_dsds = 0;
  298. /* Send marker if required */
  299. if (vha->marker_needed != 0) {
  300. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  301. QLA_SUCCESS) {
  302. return (QLA_FUNCTION_FAILED);
  303. }
  304. vha->marker_needed = 0;
  305. }
  306. /* Acquire ring specific lock */
  307. spin_lock_irqsave(&ha->hardware_lock, flags);
  308. /* Check for room in outstanding command list. */
  309. handle = req->current_outstanding_cmd;
  310. for (index = 1; index < req->num_outstanding_cmds; index++) {
  311. handle++;
  312. if (handle == req->num_outstanding_cmds)
  313. handle = 1;
  314. if (!req->outstanding_cmds[handle])
  315. break;
  316. }
  317. if (index == req->num_outstanding_cmds)
  318. goto queuing_error;
  319. /* Map the sg table so we have an accurate count of sg entries needed */
  320. if (scsi_sg_count(cmd)) {
  321. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  322. scsi_sg_count(cmd), cmd->sc_data_direction);
  323. if (unlikely(!nseg))
  324. goto queuing_error;
  325. } else
  326. nseg = 0;
  327. tot_dsds = nseg;
  328. /* Calculate the number of request entries needed. */
  329. req_cnt = ha->isp_ops->calc_req_entries(tot_dsds);
  330. if (req->cnt < (req_cnt + 2)) {
  331. cnt = RD_REG_WORD_RELAXED(ISP_REQ_Q_OUT(ha, reg));
  332. if (req->ring_index < cnt)
  333. req->cnt = cnt - req->ring_index;
  334. else
  335. req->cnt = req->length -
  336. (req->ring_index - cnt);
  337. /* If still no head room then bail out */
  338. if (req->cnt < (req_cnt + 2))
  339. goto queuing_error;
  340. }
  341. /* Build command packet */
  342. req->current_outstanding_cmd = handle;
  343. req->outstanding_cmds[handle] = sp;
  344. sp->handle = handle;
  345. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  346. req->cnt -= req_cnt;
  347. cmd_pkt = (cmd_entry_t *)req->ring_ptr;
  348. cmd_pkt->handle = handle;
  349. /* Zero out remaining portion of packet. */
  350. clr_ptr = (uint32_t *)cmd_pkt + 2;
  351. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  352. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  353. /* Set target ID and LUN number*/
  354. SET_TARGET_ID(ha, cmd_pkt->target, sp->fcport->loop_id);
  355. cmd_pkt->lun = cpu_to_le16(cmd->device->lun);
  356. /* Update tagged queuing modifier */
  357. if (scsi_populate_tag_msg(cmd, tag)) {
  358. switch (tag[0]) {
  359. case HEAD_OF_QUEUE_TAG:
  360. cmd_pkt->control_flags =
  361. __constant_cpu_to_le16(CF_HEAD_TAG);
  362. break;
  363. case ORDERED_QUEUE_TAG:
  364. cmd_pkt->control_flags =
  365. __constant_cpu_to_le16(CF_ORDERED_TAG);
  366. break;
  367. default:
  368. cmd_pkt->control_flags =
  369. __constant_cpu_to_le16(CF_SIMPLE_TAG);
  370. break;
  371. }
  372. } else {
  373. cmd_pkt->control_flags = __constant_cpu_to_le16(CF_SIMPLE_TAG);
  374. }
  375. /* Load SCSI command packet. */
  376. memcpy(cmd_pkt->scsi_cdb, cmd->cmnd, cmd->cmd_len);
  377. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  378. /* Build IOCB segments */
  379. ha->isp_ops->build_iocbs(sp, cmd_pkt, tot_dsds);
  380. /* Set total data segment count. */
  381. cmd_pkt->entry_count = (uint8_t)req_cnt;
  382. wmb();
  383. /* Adjust ring index. */
  384. req->ring_index++;
  385. if (req->ring_index == req->length) {
  386. req->ring_index = 0;
  387. req->ring_ptr = req->ring;
  388. } else
  389. req->ring_ptr++;
  390. sp->flags |= SRB_DMA_VALID;
  391. /* Set chip new ring index. */
  392. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), req->ring_index);
  393. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
  394. /* Manage unprocessed RIO/ZIO commands in response queue. */
  395. if (vha->flags.process_response_queue &&
  396. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  397. qla2x00_process_response_queue(rsp);
  398. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  399. return (QLA_SUCCESS);
  400. queuing_error:
  401. if (tot_dsds)
  402. scsi_dma_unmap(cmd);
  403. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  404. return (QLA_FUNCTION_FAILED);
  405. }
  406. /**
  407. * qla2x00_start_iocbs() - Execute the IOCB command
  408. */
  409. void
  410. qla2x00_start_iocbs(struct scsi_qla_host *vha, struct req_que *req)
  411. {
  412. struct qla_hw_data *ha = vha->hw;
  413. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  414. if (IS_P3P_TYPE(ha)) {
  415. qla82xx_start_iocbs(vha);
  416. } else {
  417. /* Adjust ring index. */
  418. req->ring_index++;
  419. if (req->ring_index == req->length) {
  420. req->ring_index = 0;
  421. req->ring_ptr = req->ring;
  422. } else
  423. req->ring_ptr++;
  424. /* Set chip new ring index. */
  425. if (ha->mqenable || IS_QLA83XX(ha)) {
  426. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  427. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  428. } else if (IS_QLAFX00(ha)) {
  429. WRT_REG_DWORD(&reg->ispfx00.req_q_in, req->ring_index);
  430. RD_REG_DWORD_RELAXED(&reg->ispfx00.req_q_in);
  431. QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
  432. } else if (IS_FWI2_CAPABLE(ha)) {
  433. WRT_REG_DWORD(&reg->isp24.req_q_in, req->ring_index);
  434. RD_REG_DWORD_RELAXED(&reg->isp24.req_q_in);
  435. } else {
  436. WRT_REG_WORD(ISP_REQ_Q_IN(ha, &reg->isp),
  437. req->ring_index);
  438. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, &reg->isp));
  439. }
  440. }
  441. }
  442. /**
  443. * qla2x00_marker() - Send a marker IOCB to the firmware.
  444. * @ha: HA context
  445. * @loop_id: loop ID
  446. * @lun: LUN
  447. * @type: marker modifier
  448. *
  449. * Can be called from both normal and interrupt context.
  450. *
  451. * Returns non-zero if a failure occurred, else zero.
  452. */
  453. static int
  454. __qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  455. struct rsp_que *rsp, uint16_t loop_id,
  456. uint16_t lun, uint8_t type)
  457. {
  458. mrk_entry_t *mrk;
  459. struct mrk_entry_24xx *mrk24 = NULL;
  460. struct mrk_entry_fx00 *mrkfx = NULL;
  461. struct qla_hw_data *ha = vha->hw;
  462. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  463. req = ha->req_q_map[0];
  464. mrk = (mrk_entry_t *)qla2x00_alloc_iocbs(vha, NULL);
  465. if (mrk == NULL) {
  466. ql_log(ql_log_warn, base_vha, 0x3026,
  467. "Failed to allocate Marker IOCB.\n");
  468. return (QLA_FUNCTION_FAILED);
  469. }
  470. mrk->entry_type = MARKER_TYPE;
  471. mrk->modifier = type;
  472. if (type != MK_SYNC_ALL) {
  473. if (IS_QLAFX00(ha)) {
  474. mrkfx = (struct mrk_entry_fx00 *) mrk;
  475. mrkfx->handle = MAKE_HANDLE(req->id, mrkfx->handle);
  476. mrkfx->handle_hi = 0;
  477. mrkfx->tgt_id = cpu_to_le16(loop_id);
  478. mrkfx->lun[1] = LSB(lun);
  479. mrkfx->lun[2] = MSB(lun);
  480. host_to_fcp_swap(mrkfx->lun, sizeof(mrkfx->lun));
  481. } else if (IS_FWI2_CAPABLE(ha)) {
  482. mrk24 = (struct mrk_entry_24xx *) mrk;
  483. mrk24->nport_handle = cpu_to_le16(loop_id);
  484. mrk24->lun[1] = LSB(lun);
  485. mrk24->lun[2] = MSB(lun);
  486. host_to_fcp_swap(mrk24->lun, sizeof(mrk24->lun));
  487. mrk24->vp_index = vha->vp_idx;
  488. mrk24->handle = MAKE_HANDLE(req->id, mrk24->handle);
  489. } else {
  490. SET_TARGET_ID(ha, mrk->target, loop_id);
  491. mrk->lun = cpu_to_le16(lun);
  492. }
  493. }
  494. wmb();
  495. qla2x00_start_iocbs(vha, req);
  496. return (QLA_SUCCESS);
  497. }
  498. int
  499. qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  500. struct rsp_que *rsp, uint16_t loop_id, uint16_t lun,
  501. uint8_t type)
  502. {
  503. int ret;
  504. unsigned long flags = 0;
  505. spin_lock_irqsave(&vha->hw->hardware_lock, flags);
  506. ret = __qla2x00_marker(vha, req, rsp, loop_id, lun, type);
  507. spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
  508. return (ret);
  509. }
  510. /*
  511. * qla2x00_issue_marker
  512. *
  513. * Issue marker
  514. * Caller CAN have hardware lock held as specified by ha_locked parameter.
  515. * Might release it, then reaquire.
  516. */
  517. int qla2x00_issue_marker(scsi_qla_host_t *vha, int ha_locked)
  518. {
  519. if (ha_locked) {
  520. if (__qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  521. MK_SYNC_ALL) != QLA_SUCCESS)
  522. return QLA_FUNCTION_FAILED;
  523. } else {
  524. if (qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  525. MK_SYNC_ALL) != QLA_SUCCESS)
  526. return QLA_FUNCTION_FAILED;
  527. }
  528. vha->marker_needed = 0;
  529. return QLA_SUCCESS;
  530. }
  531. static inline int
  532. qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
  533. uint16_t tot_dsds)
  534. {
  535. uint32_t *cur_dsd = NULL;
  536. scsi_qla_host_t *vha;
  537. struct qla_hw_data *ha;
  538. struct scsi_cmnd *cmd;
  539. struct scatterlist *cur_seg;
  540. uint32_t *dsd_seg;
  541. void *next_dsd;
  542. uint8_t avail_dsds;
  543. uint8_t first_iocb = 1;
  544. uint32_t dsd_list_len;
  545. struct dsd_dma *dsd_ptr;
  546. struct ct6_dsd *ctx;
  547. cmd = GET_CMD_SP(sp);
  548. /* Update entry type to indicate Command Type 3 IOCB */
  549. *((uint32_t *)(&cmd_pkt->entry_type)) =
  550. __constant_cpu_to_le32(COMMAND_TYPE_6);
  551. /* No data transfer */
  552. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  553. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  554. return 0;
  555. }
  556. vha = sp->fcport->vha;
  557. ha = vha->hw;
  558. /* Set transfer direction */
  559. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  560. cmd_pkt->control_flags =
  561. __constant_cpu_to_le16(CF_WRITE_DATA);
  562. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  563. vha->qla_stats.output_requests++;
  564. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  565. cmd_pkt->control_flags =
  566. __constant_cpu_to_le16(CF_READ_DATA);
  567. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  568. vha->qla_stats.input_requests++;
  569. }
  570. cur_seg = scsi_sglist(cmd);
  571. ctx = GET_CMD_CTX_SP(sp);
  572. while (tot_dsds) {
  573. avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ?
  574. QLA_DSDS_PER_IOCB : tot_dsds;
  575. tot_dsds -= avail_dsds;
  576. dsd_list_len = (avail_dsds + 1) * QLA_DSD_SIZE;
  577. dsd_ptr = list_first_entry(&ha->gbl_dsd_list,
  578. struct dsd_dma, list);
  579. next_dsd = dsd_ptr->dsd_addr;
  580. list_del(&dsd_ptr->list);
  581. ha->gbl_dsd_avail--;
  582. list_add_tail(&dsd_ptr->list, &ctx->dsd_list);
  583. ctx->dsd_use_cnt++;
  584. ha->gbl_dsd_inuse++;
  585. if (first_iocb) {
  586. first_iocb = 0;
  587. dsd_seg = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  588. *dsd_seg++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  589. *dsd_seg++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  590. cmd_pkt->fcp_data_dseg_len = cpu_to_le32(dsd_list_len);
  591. } else {
  592. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  593. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  594. *cur_dsd++ = cpu_to_le32(dsd_list_len);
  595. }
  596. cur_dsd = (uint32_t *)next_dsd;
  597. while (avail_dsds) {
  598. dma_addr_t sle_dma;
  599. sle_dma = sg_dma_address(cur_seg);
  600. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  601. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  602. *cur_dsd++ = cpu_to_le32(sg_dma_len(cur_seg));
  603. cur_seg = sg_next(cur_seg);
  604. avail_dsds--;
  605. }
  606. }
  607. /* Null termination */
  608. *cur_dsd++ = 0;
  609. *cur_dsd++ = 0;
  610. *cur_dsd++ = 0;
  611. cmd_pkt->control_flags |= CF_DATA_SEG_DESCR_ENABLE;
  612. return 0;
  613. }
  614. /*
  615. * qla24xx_calc_dsd_lists() - Determine number of DSD list required
  616. * for Command Type 6.
  617. *
  618. * @dsds: number of data segment decriptors needed
  619. *
  620. * Returns the number of dsd list needed to store @dsds.
  621. */
  622. inline uint16_t
  623. qla24xx_calc_dsd_lists(uint16_t dsds)
  624. {
  625. uint16_t dsd_lists = 0;
  626. dsd_lists = (dsds/QLA_DSDS_PER_IOCB);
  627. if (dsds % QLA_DSDS_PER_IOCB)
  628. dsd_lists++;
  629. return dsd_lists;
  630. }
  631. /**
  632. * qla24xx_build_scsi_iocbs() - Build IOCB command utilizing Command Type 7
  633. * IOCB types.
  634. *
  635. * @sp: SRB command to process
  636. * @cmd_pkt: Command type 3 IOCB
  637. * @tot_dsds: Total number of segments to transfer
  638. */
  639. inline void
  640. qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
  641. uint16_t tot_dsds)
  642. {
  643. uint16_t avail_dsds;
  644. uint32_t *cur_dsd;
  645. scsi_qla_host_t *vha;
  646. struct scsi_cmnd *cmd;
  647. struct scatterlist *sg;
  648. int i;
  649. struct req_que *req;
  650. cmd = GET_CMD_SP(sp);
  651. /* Update entry type to indicate Command Type 3 IOCB */
  652. *((uint32_t *)(&cmd_pkt->entry_type)) =
  653. __constant_cpu_to_le32(COMMAND_TYPE_7);
  654. /* No data transfer */
  655. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  656. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  657. return;
  658. }
  659. vha = sp->fcport->vha;
  660. req = vha->req;
  661. /* Set transfer direction */
  662. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  663. cmd_pkt->task_mgmt_flags =
  664. __constant_cpu_to_le16(TMF_WRITE_DATA);
  665. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  666. vha->qla_stats.output_requests++;
  667. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  668. cmd_pkt->task_mgmt_flags =
  669. __constant_cpu_to_le16(TMF_READ_DATA);
  670. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  671. vha->qla_stats.input_requests++;
  672. }
  673. /* One DSD is available in the Command Type 3 IOCB */
  674. avail_dsds = 1;
  675. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  676. /* Load data segments */
  677. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  678. dma_addr_t sle_dma;
  679. cont_a64_entry_t *cont_pkt;
  680. /* Allocate additional continuation packets? */
  681. if (avail_dsds == 0) {
  682. /*
  683. * Five DSDs are available in the Continuation
  684. * Type 1 IOCB.
  685. */
  686. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  687. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  688. avail_dsds = 5;
  689. }
  690. sle_dma = sg_dma_address(sg);
  691. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  692. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  693. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  694. avail_dsds--;
  695. }
  696. }
  697. struct fw_dif_context {
  698. uint32_t ref_tag;
  699. uint16_t app_tag;
  700. uint8_t ref_tag_mask[4]; /* Validation/Replacement Mask*/
  701. uint8_t app_tag_mask[2]; /* Validation/Replacement Mask*/
  702. };
  703. /*
  704. * qla24xx_set_t10dif_tags_from_cmd - Extract Ref and App tags from SCSI command
  705. *
  706. */
  707. static inline void
  708. qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
  709. unsigned int protcnt)
  710. {
  711. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  712. switch (scsi_get_prot_type(cmd)) {
  713. case SCSI_PROT_DIF_TYPE0:
  714. /*
  715. * No check for ql2xenablehba_err_chk, as it would be an
  716. * I/O error if hba tag generation is not done.
  717. */
  718. pkt->ref_tag = cpu_to_le32((uint32_t)
  719. (0xffffffff & scsi_get_lba(cmd)));
  720. if (!qla2x00_hba_err_chk_enabled(sp))
  721. break;
  722. pkt->ref_tag_mask[0] = 0xff;
  723. pkt->ref_tag_mask[1] = 0xff;
  724. pkt->ref_tag_mask[2] = 0xff;
  725. pkt->ref_tag_mask[3] = 0xff;
  726. break;
  727. /*
  728. * For TYPE 2 protection: 16 bit GUARD + 32 bit REF tag has to
  729. * match LBA in CDB + N
  730. */
  731. case SCSI_PROT_DIF_TYPE2:
  732. pkt->app_tag = __constant_cpu_to_le16(0);
  733. pkt->app_tag_mask[0] = 0x0;
  734. pkt->app_tag_mask[1] = 0x0;
  735. pkt->ref_tag = cpu_to_le32((uint32_t)
  736. (0xffffffff & scsi_get_lba(cmd)));
  737. if (!qla2x00_hba_err_chk_enabled(sp))
  738. break;
  739. /* enable ALL bytes of the ref tag */
  740. pkt->ref_tag_mask[0] = 0xff;
  741. pkt->ref_tag_mask[1] = 0xff;
  742. pkt->ref_tag_mask[2] = 0xff;
  743. pkt->ref_tag_mask[3] = 0xff;
  744. break;
  745. /* For Type 3 protection: 16 bit GUARD only */
  746. case SCSI_PROT_DIF_TYPE3:
  747. pkt->ref_tag_mask[0] = pkt->ref_tag_mask[1] =
  748. pkt->ref_tag_mask[2] = pkt->ref_tag_mask[3] =
  749. 0x00;
  750. break;
  751. /*
  752. * For TYpe 1 protection: 16 bit GUARD tag, 32 bit REF tag, and
  753. * 16 bit app tag.
  754. */
  755. case SCSI_PROT_DIF_TYPE1:
  756. pkt->ref_tag = cpu_to_le32((uint32_t)
  757. (0xffffffff & scsi_get_lba(cmd)));
  758. pkt->app_tag = __constant_cpu_to_le16(0);
  759. pkt->app_tag_mask[0] = 0x0;
  760. pkt->app_tag_mask[1] = 0x0;
  761. if (!qla2x00_hba_err_chk_enabled(sp))
  762. break;
  763. /* enable ALL bytes of the ref tag */
  764. pkt->ref_tag_mask[0] = 0xff;
  765. pkt->ref_tag_mask[1] = 0xff;
  766. pkt->ref_tag_mask[2] = 0xff;
  767. pkt->ref_tag_mask[3] = 0xff;
  768. break;
  769. }
  770. }
  771. struct qla2_sgx {
  772. dma_addr_t dma_addr; /* OUT */
  773. uint32_t dma_len; /* OUT */
  774. uint32_t tot_bytes; /* IN */
  775. struct scatterlist *cur_sg; /* IN */
  776. /* for book keeping, bzero on initial invocation */
  777. uint32_t bytes_consumed;
  778. uint32_t num_bytes;
  779. uint32_t tot_partial;
  780. /* for debugging */
  781. uint32_t num_sg;
  782. srb_t *sp;
  783. };
  784. static int
  785. qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx,
  786. uint32_t *partial)
  787. {
  788. struct scatterlist *sg;
  789. uint32_t cumulative_partial, sg_len;
  790. dma_addr_t sg_dma_addr;
  791. if (sgx->num_bytes == sgx->tot_bytes)
  792. return 0;
  793. sg = sgx->cur_sg;
  794. cumulative_partial = sgx->tot_partial;
  795. sg_dma_addr = sg_dma_address(sg);
  796. sg_len = sg_dma_len(sg);
  797. sgx->dma_addr = sg_dma_addr + sgx->bytes_consumed;
  798. if ((cumulative_partial + (sg_len - sgx->bytes_consumed)) >= blk_sz) {
  799. sgx->dma_len = (blk_sz - cumulative_partial);
  800. sgx->tot_partial = 0;
  801. sgx->num_bytes += blk_sz;
  802. *partial = 0;
  803. } else {
  804. sgx->dma_len = sg_len - sgx->bytes_consumed;
  805. sgx->tot_partial += sgx->dma_len;
  806. *partial = 1;
  807. }
  808. sgx->bytes_consumed += sgx->dma_len;
  809. if (sg_len == sgx->bytes_consumed) {
  810. sg = sg_next(sg);
  811. sgx->num_sg++;
  812. sgx->cur_sg = sg;
  813. sgx->bytes_consumed = 0;
  814. }
  815. return 1;
  816. }
  817. static int
  818. qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp,
  819. uint32_t *dsd, uint16_t tot_dsds)
  820. {
  821. void *next_dsd;
  822. uint8_t avail_dsds = 0;
  823. uint32_t dsd_list_len;
  824. struct dsd_dma *dsd_ptr;
  825. struct scatterlist *sg_prot;
  826. uint32_t *cur_dsd = dsd;
  827. uint16_t used_dsds = tot_dsds;
  828. uint32_t prot_int;
  829. uint32_t partial;
  830. struct qla2_sgx sgx;
  831. dma_addr_t sle_dma;
  832. uint32_t sle_dma_len, tot_prot_dma_len = 0;
  833. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  834. prot_int = cmd->device->sector_size;
  835. memset(&sgx, 0, sizeof(struct qla2_sgx));
  836. sgx.tot_bytes = scsi_bufflen(cmd);
  837. sgx.cur_sg = scsi_sglist(cmd);
  838. sgx.sp = sp;
  839. sg_prot = scsi_prot_sglist(cmd);
  840. while (qla24xx_get_one_block_sg(prot_int, &sgx, &partial)) {
  841. sle_dma = sgx.dma_addr;
  842. sle_dma_len = sgx.dma_len;
  843. alloc_and_fill:
  844. /* Allocate additional continuation packets? */
  845. if (avail_dsds == 0) {
  846. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  847. QLA_DSDS_PER_IOCB : used_dsds;
  848. dsd_list_len = (avail_dsds + 1) * 12;
  849. used_dsds -= avail_dsds;
  850. /* allocate tracking DS */
  851. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  852. if (!dsd_ptr)
  853. return 1;
  854. /* allocate new list */
  855. dsd_ptr->dsd_addr = next_dsd =
  856. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  857. &dsd_ptr->dsd_list_dma);
  858. if (!next_dsd) {
  859. /*
  860. * Need to cleanup only this dsd_ptr, rest
  861. * will be done by sp_free_dma()
  862. */
  863. kfree(dsd_ptr);
  864. return 1;
  865. }
  866. list_add_tail(&dsd_ptr->list,
  867. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  868. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  869. /* add new list to cmd iocb or last list */
  870. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  871. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  872. *cur_dsd++ = dsd_list_len;
  873. cur_dsd = (uint32_t *)next_dsd;
  874. }
  875. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  876. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  877. *cur_dsd++ = cpu_to_le32(sle_dma_len);
  878. avail_dsds--;
  879. if (partial == 0) {
  880. /* Got a full protection interval */
  881. sle_dma = sg_dma_address(sg_prot) + tot_prot_dma_len;
  882. sle_dma_len = 8;
  883. tot_prot_dma_len += sle_dma_len;
  884. if (tot_prot_dma_len == sg_dma_len(sg_prot)) {
  885. tot_prot_dma_len = 0;
  886. sg_prot = sg_next(sg_prot);
  887. }
  888. partial = 1; /* So as to not re-enter this block */
  889. goto alloc_and_fill;
  890. }
  891. }
  892. /* Null termination */
  893. *cur_dsd++ = 0;
  894. *cur_dsd++ = 0;
  895. *cur_dsd++ = 0;
  896. return 0;
  897. }
  898. static int
  899. qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
  900. uint16_t tot_dsds)
  901. {
  902. void *next_dsd;
  903. uint8_t avail_dsds = 0;
  904. uint32_t dsd_list_len;
  905. struct dsd_dma *dsd_ptr;
  906. struct scatterlist *sg;
  907. uint32_t *cur_dsd = dsd;
  908. int i;
  909. uint16_t used_dsds = tot_dsds;
  910. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  911. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  912. dma_addr_t sle_dma;
  913. /* Allocate additional continuation packets? */
  914. if (avail_dsds == 0) {
  915. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  916. QLA_DSDS_PER_IOCB : used_dsds;
  917. dsd_list_len = (avail_dsds + 1) * 12;
  918. used_dsds -= avail_dsds;
  919. /* allocate tracking DS */
  920. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  921. if (!dsd_ptr)
  922. return 1;
  923. /* allocate new list */
  924. dsd_ptr->dsd_addr = next_dsd =
  925. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  926. &dsd_ptr->dsd_list_dma);
  927. if (!next_dsd) {
  928. /*
  929. * Need to cleanup only this dsd_ptr, rest
  930. * will be done by sp_free_dma()
  931. */
  932. kfree(dsd_ptr);
  933. return 1;
  934. }
  935. list_add_tail(&dsd_ptr->list,
  936. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  937. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  938. /* add new list to cmd iocb or last list */
  939. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  940. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  941. *cur_dsd++ = dsd_list_len;
  942. cur_dsd = (uint32_t *)next_dsd;
  943. }
  944. sle_dma = sg_dma_address(sg);
  945. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  946. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  947. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  948. avail_dsds--;
  949. }
  950. /* Null termination */
  951. *cur_dsd++ = 0;
  952. *cur_dsd++ = 0;
  953. *cur_dsd++ = 0;
  954. return 0;
  955. }
  956. static int
  957. qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
  958. uint32_t *dsd,
  959. uint16_t tot_dsds)
  960. {
  961. void *next_dsd;
  962. uint8_t avail_dsds = 0;
  963. uint32_t dsd_list_len;
  964. struct dsd_dma *dsd_ptr;
  965. struct scatterlist *sg;
  966. int i;
  967. struct scsi_cmnd *cmd;
  968. uint32_t *cur_dsd = dsd;
  969. uint16_t used_dsds = tot_dsds;
  970. cmd = GET_CMD_SP(sp);
  971. scsi_for_each_prot_sg(cmd, sg, tot_dsds, i) {
  972. dma_addr_t sle_dma;
  973. /* Allocate additional continuation packets? */
  974. if (avail_dsds == 0) {
  975. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  976. QLA_DSDS_PER_IOCB : used_dsds;
  977. dsd_list_len = (avail_dsds + 1) * 12;
  978. used_dsds -= avail_dsds;
  979. /* allocate tracking DS */
  980. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  981. if (!dsd_ptr)
  982. return 1;
  983. /* allocate new list */
  984. dsd_ptr->dsd_addr = next_dsd =
  985. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  986. &dsd_ptr->dsd_list_dma);
  987. if (!next_dsd) {
  988. /*
  989. * Need to cleanup only this dsd_ptr, rest
  990. * will be done by sp_free_dma()
  991. */
  992. kfree(dsd_ptr);
  993. return 1;
  994. }
  995. list_add_tail(&dsd_ptr->list,
  996. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  997. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  998. /* add new list to cmd iocb or last list */
  999. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  1000. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  1001. *cur_dsd++ = dsd_list_len;
  1002. cur_dsd = (uint32_t *)next_dsd;
  1003. }
  1004. sle_dma = sg_dma_address(sg);
  1005. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1006. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1007. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1008. avail_dsds--;
  1009. }
  1010. /* Null termination */
  1011. *cur_dsd++ = 0;
  1012. *cur_dsd++ = 0;
  1013. *cur_dsd++ = 0;
  1014. return 0;
  1015. }
  1016. /**
  1017. * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
  1018. * Type 6 IOCB types.
  1019. *
  1020. * @sp: SRB command to process
  1021. * @cmd_pkt: Command type 3 IOCB
  1022. * @tot_dsds: Total number of segments to transfer
  1023. */
  1024. static inline int
  1025. qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
  1026. uint16_t tot_dsds, uint16_t tot_prot_dsds, uint16_t fw_prot_opts)
  1027. {
  1028. uint32_t *cur_dsd, *fcp_dl;
  1029. scsi_qla_host_t *vha;
  1030. struct scsi_cmnd *cmd;
  1031. int sgc;
  1032. uint32_t total_bytes = 0;
  1033. uint32_t data_bytes;
  1034. uint32_t dif_bytes;
  1035. uint8_t bundling = 1;
  1036. uint16_t blk_size;
  1037. uint8_t *clr_ptr;
  1038. struct crc_context *crc_ctx_pkt = NULL;
  1039. struct qla_hw_data *ha;
  1040. uint8_t additional_fcpcdb_len;
  1041. uint16_t fcp_cmnd_len;
  1042. struct fcp_cmnd *fcp_cmnd;
  1043. dma_addr_t crc_ctx_dma;
  1044. char tag[2];
  1045. cmd = GET_CMD_SP(sp);
  1046. sgc = 0;
  1047. /* Update entry type to indicate Command Type CRC_2 IOCB */
  1048. *((uint32_t *)(&cmd_pkt->entry_type)) =
  1049. __constant_cpu_to_le32(COMMAND_TYPE_CRC_2);
  1050. vha = sp->fcport->vha;
  1051. ha = vha->hw;
  1052. /* No data transfer */
  1053. data_bytes = scsi_bufflen(cmd);
  1054. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1055. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1056. return QLA_SUCCESS;
  1057. }
  1058. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1059. /* Set transfer direction */
  1060. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  1061. cmd_pkt->control_flags =
  1062. __constant_cpu_to_le16(CF_WRITE_DATA);
  1063. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  1064. cmd_pkt->control_flags =
  1065. __constant_cpu_to_le16(CF_READ_DATA);
  1066. }
  1067. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1068. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP) ||
  1069. (scsi_get_prot_op(cmd) == SCSI_PROT_READ_STRIP) ||
  1070. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_INSERT))
  1071. bundling = 0;
  1072. /* Allocate CRC context from global pool */
  1073. crc_ctx_pkt = sp->u.scmd.ctx =
  1074. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma);
  1075. if (!crc_ctx_pkt)
  1076. goto crc_queuing_error;
  1077. /* Zero out CTX area. */
  1078. clr_ptr = (uint8_t *)crc_ctx_pkt;
  1079. memset(clr_ptr, 0, sizeof(*crc_ctx_pkt));
  1080. crc_ctx_pkt->crc_ctx_dma = crc_ctx_dma;
  1081. sp->flags |= SRB_CRC_CTX_DMA_VALID;
  1082. /* Set handle */
  1083. crc_ctx_pkt->handle = cmd_pkt->handle;
  1084. INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list);
  1085. qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *)
  1086. &crc_ctx_pkt->ref_tag, tot_prot_dsds);
  1087. cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma));
  1088. cmd_pkt->crc_context_address[1] = cpu_to_le32(MSD(crc_ctx_dma));
  1089. cmd_pkt->crc_context_len = CRC_CONTEXT_LEN_FW;
  1090. /* Determine SCSI command length -- align to 4 byte boundary */
  1091. if (cmd->cmd_len > 16) {
  1092. additional_fcpcdb_len = cmd->cmd_len - 16;
  1093. if ((cmd->cmd_len % 4) != 0) {
  1094. /* SCSI cmd > 16 bytes must be multiple of 4 */
  1095. goto crc_queuing_error;
  1096. }
  1097. fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  1098. } else {
  1099. additional_fcpcdb_len = 0;
  1100. fcp_cmnd_len = 12 + 16 + 4;
  1101. }
  1102. fcp_cmnd = &crc_ctx_pkt->fcp_cmnd;
  1103. fcp_cmnd->additional_cdb_len = additional_fcpcdb_len;
  1104. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1105. fcp_cmnd->additional_cdb_len |= 1;
  1106. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  1107. fcp_cmnd->additional_cdb_len |= 2;
  1108. int_to_scsilun(cmd->device->lun, &fcp_cmnd->lun);
  1109. memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  1110. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len);
  1111. cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32(
  1112. LSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1113. cmd_pkt->fcp_cmnd_dseg_address[1] = cpu_to_le32(
  1114. MSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1115. fcp_cmnd->task_management = 0;
  1116. /*
  1117. * Update tagged queuing modifier if using command tag queuing
  1118. */
  1119. if (scsi_populate_tag_msg(cmd, tag)) {
  1120. switch (tag[0]) {
  1121. case HEAD_OF_QUEUE_TAG:
  1122. fcp_cmnd->task_attribute = TSK_HEAD_OF_QUEUE;
  1123. break;
  1124. case ORDERED_QUEUE_TAG:
  1125. fcp_cmnd->task_attribute = TSK_ORDERED;
  1126. break;
  1127. default:
  1128. fcp_cmnd->task_attribute = TSK_SIMPLE;
  1129. break;
  1130. }
  1131. } else {
  1132. fcp_cmnd->task_attribute = TSK_SIMPLE;
  1133. }
  1134. cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */
  1135. /* Compute dif len and adjust data len to incude protection */
  1136. dif_bytes = 0;
  1137. blk_size = cmd->device->sector_size;
  1138. dif_bytes = (data_bytes / blk_size) * 8;
  1139. switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
  1140. case SCSI_PROT_READ_INSERT:
  1141. case SCSI_PROT_WRITE_STRIP:
  1142. total_bytes = data_bytes;
  1143. data_bytes += dif_bytes;
  1144. break;
  1145. case SCSI_PROT_READ_STRIP:
  1146. case SCSI_PROT_WRITE_INSERT:
  1147. case SCSI_PROT_READ_PASS:
  1148. case SCSI_PROT_WRITE_PASS:
  1149. total_bytes = data_bytes + dif_bytes;
  1150. break;
  1151. default:
  1152. BUG();
  1153. }
  1154. if (!qla2x00_hba_err_chk_enabled(sp))
  1155. fw_prot_opts |= 0x10; /* Disable Guard tag checking */
  1156. /* HBA error checking enabled */
  1157. else if (IS_PI_UNINIT_CAPABLE(ha)) {
  1158. if ((scsi_get_prot_type(GET_CMD_SP(sp)) == SCSI_PROT_DIF_TYPE1)
  1159. || (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1160. SCSI_PROT_DIF_TYPE2))
  1161. fw_prot_opts |= BIT_10;
  1162. else if (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1163. SCSI_PROT_DIF_TYPE3)
  1164. fw_prot_opts |= BIT_11;
  1165. }
  1166. if (!bundling) {
  1167. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
  1168. } else {
  1169. /*
  1170. * Configure Bundling if we need to fetch interlaving
  1171. * protection PCI accesses
  1172. */
  1173. fw_prot_opts |= PO_ENABLE_DIF_BUNDLING;
  1174. crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
  1175. crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds -
  1176. tot_prot_dsds);
  1177. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.data_address;
  1178. }
  1179. /* Finish the common fields of CRC pkt */
  1180. crc_ctx_pkt->blk_size = cpu_to_le16(blk_size);
  1181. crc_ctx_pkt->prot_opts = cpu_to_le16(fw_prot_opts);
  1182. crc_ctx_pkt->byte_count = cpu_to_le32(data_bytes);
  1183. crc_ctx_pkt->guard_seed = __constant_cpu_to_le16(0);
  1184. /* Fibre channel byte count */
  1185. cmd_pkt->byte_count = cpu_to_le32(total_bytes);
  1186. fcp_dl = (uint32_t *)(crc_ctx_pkt->fcp_cmnd.cdb + 16 +
  1187. additional_fcpcdb_len);
  1188. *fcp_dl = htonl(total_bytes);
  1189. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1190. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1191. return QLA_SUCCESS;
  1192. }
  1193. /* Walks data segments */
  1194. cmd_pkt->control_flags |=
  1195. __constant_cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE);
  1196. if (!bundling && tot_prot_dsds) {
  1197. if (qla24xx_walk_and_build_sglist_no_difb(ha, sp,
  1198. cur_dsd, tot_dsds))
  1199. goto crc_queuing_error;
  1200. } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd,
  1201. (tot_dsds - tot_prot_dsds)))
  1202. goto crc_queuing_error;
  1203. if (bundling && tot_prot_dsds) {
  1204. /* Walks dif segments */
  1205. cmd_pkt->control_flags |=
  1206. __constant_cpu_to_le16(CF_DIF_SEG_DESCR_ENABLE);
  1207. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.dif_address;
  1208. if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd,
  1209. tot_prot_dsds))
  1210. goto crc_queuing_error;
  1211. }
  1212. return QLA_SUCCESS;
  1213. crc_queuing_error:
  1214. /* Cleanup will be performed by the caller */
  1215. return QLA_FUNCTION_FAILED;
  1216. }
  1217. /**
  1218. * qla24xx_start_scsi() - Send a SCSI command to the ISP
  1219. * @sp: command to send to the ISP
  1220. *
  1221. * Returns non-zero if a failure occurred, else zero.
  1222. */
  1223. int
  1224. qla24xx_start_scsi(srb_t *sp)
  1225. {
  1226. int ret, nseg;
  1227. unsigned long flags;
  1228. uint32_t *clr_ptr;
  1229. uint32_t index;
  1230. uint32_t handle;
  1231. struct cmd_type_7 *cmd_pkt;
  1232. uint16_t cnt;
  1233. uint16_t req_cnt;
  1234. uint16_t tot_dsds;
  1235. struct req_que *req = NULL;
  1236. struct rsp_que *rsp = NULL;
  1237. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1238. struct scsi_qla_host *vha = sp->fcport->vha;
  1239. struct qla_hw_data *ha = vha->hw;
  1240. char tag[2];
  1241. /* Setup device pointers. */
  1242. ret = 0;
  1243. qla25xx_set_que(sp, &rsp);
  1244. req = vha->req;
  1245. /* So we know we haven't pci_map'ed anything yet */
  1246. tot_dsds = 0;
  1247. /* Send marker if required */
  1248. if (vha->marker_needed != 0) {
  1249. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1250. QLA_SUCCESS)
  1251. return QLA_FUNCTION_FAILED;
  1252. vha->marker_needed = 0;
  1253. }
  1254. /* Acquire ring specific lock */
  1255. spin_lock_irqsave(&ha->hardware_lock, flags);
  1256. /* Check for room in outstanding command list. */
  1257. handle = req->current_outstanding_cmd;
  1258. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1259. handle++;
  1260. if (handle == req->num_outstanding_cmds)
  1261. handle = 1;
  1262. if (!req->outstanding_cmds[handle])
  1263. break;
  1264. }
  1265. if (index == req->num_outstanding_cmds)
  1266. goto queuing_error;
  1267. /* Map the sg table so we have an accurate count of sg entries needed */
  1268. if (scsi_sg_count(cmd)) {
  1269. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1270. scsi_sg_count(cmd), cmd->sc_data_direction);
  1271. if (unlikely(!nseg))
  1272. goto queuing_error;
  1273. } else
  1274. nseg = 0;
  1275. tot_dsds = nseg;
  1276. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1277. if (req->cnt < (req_cnt + 2)) {
  1278. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  1279. if (req->ring_index < cnt)
  1280. req->cnt = cnt - req->ring_index;
  1281. else
  1282. req->cnt = req->length -
  1283. (req->ring_index - cnt);
  1284. if (req->cnt < (req_cnt + 2))
  1285. goto queuing_error;
  1286. }
  1287. /* Build command packet. */
  1288. req->current_outstanding_cmd = handle;
  1289. req->outstanding_cmds[handle] = sp;
  1290. sp->handle = handle;
  1291. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1292. req->cnt -= req_cnt;
  1293. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1294. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1295. /* Zero out remaining portion of packet. */
  1296. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1297. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1298. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1299. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1300. /* Set NPORT-ID and LUN number*/
  1301. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1302. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1303. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1304. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1305. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1306. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1307. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1308. /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1309. if (scsi_populate_tag_msg(cmd, tag)) {
  1310. switch (tag[0]) {
  1311. case HEAD_OF_QUEUE_TAG:
  1312. cmd_pkt->task = TSK_HEAD_OF_QUEUE;
  1313. break;
  1314. case ORDERED_QUEUE_TAG:
  1315. cmd_pkt->task = TSK_ORDERED;
  1316. break;
  1317. default:
  1318. cmd_pkt->task = TSK_SIMPLE;
  1319. break;
  1320. }
  1321. } else {
  1322. cmd_pkt->task = TSK_SIMPLE;
  1323. }
  1324. /* Load SCSI command packet. */
  1325. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1326. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1327. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1328. /* Build IOCB segments */
  1329. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  1330. /* Set total data segment count. */
  1331. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1332. /* Specify response queue number where completion should happen */
  1333. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1334. wmb();
  1335. /* Adjust ring index. */
  1336. req->ring_index++;
  1337. if (req->ring_index == req->length) {
  1338. req->ring_index = 0;
  1339. req->ring_ptr = req->ring;
  1340. } else
  1341. req->ring_ptr++;
  1342. sp->flags |= SRB_DMA_VALID;
  1343. /* Set chip new ring index. */
  1344. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1345. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1346. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1347. if (vha->flags.process_response_queue &&
  1348. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1349. qla24xx_process_response_queue(vha, rsp);
  1350. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1351. return QLA_SUCCESS;
  1352. queuing_error:
  1353. if (tot_dsds)
  1354. scsi_dma_unmap(cmd);
  1355. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1356. return QLA_FUNCTION_FAILED;
  1357. }
  1358. /**
  1359. * qla24xx_dif_start_scsi() - Send a SCSI command to the ISP
  1360. * @sp: command to send to the ISP
  1361. *
  1362. * Returns non-zero if a failure occurred, else zero.
  1363. */
  1364. int
  1365. qla24xx_dif_start_scsi(srb_t *sp)
  1366. {
  1367. int nseg;
  1368. unsigned long flags;
  1369. uint32_t *clr_ptr;
  1370. uint32_t index;
  1371. uint32_t handle;
  1372. uint16_t cnt;
  1373. uint16_t req_cnt = 0;
  1374. uint16_t tot_dsds;
  1375. uint16_t tot_prot_dsds;
  1376. uint16_t fw_prot_opts = 0;
  1377. struct req_que *req = NULL;
  1378. struct rsp_que *rsp = NULL;
  1379. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1380. struct scsi_qla_host *vha = sp->fcport->vha;
  1381. struct qla_hw_data *ha = vha->hw;
  1382. struct cmd_type_crc_2 *cmd_pkt;
  1383. uint32_t status = 0;
  1384. #define QDSS_GOT_Q_SPACE BIT_0
  1385. /* Only process protection or >16 cdb in this routine */
  1386. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1387. if (cmd->cmd_len <= 16)
  1388. return qla24xx_start_scsi(sp);
  1389. }
  1390. /* Setup device pointers. */
  1391. qla25xx_set_que(sp, &rsp);
  1392. req = vha->req;
  1393. /* So we know we haven't pci_map'ed anything yet */
  1394. tot_dsds = 0;
  1395. /* Send marker if required */
  1396. if (vha->marker_needed != 0) {
  1397. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1398. QLA_SUCCESS)
  1399. return QLA_FUNCTION_FAILED;
  1400. vha->marker_needed = 0;
  1401. }
  1402. /* Acquire ring specific lock */
  1403. spin_lock_irqsave(&ha->hardware_lock, flags);
  1404. /* Check for room in outstanding command list. */
  1405. handle = req->current_outstanding_cmd;
  1406. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1407. handle++;
  1408. if (handle == req->num_outstanding_cmds)
  1409. handle = 1;
  1410. if (!req->outstanding_cmds[handle])
  1411. break;
  1412. }
  1413. if (index == req->num_outstanding_cmds)
  1414. goto queuing_error;
  1415. /* Compute number of required data segments */
  1416. /* Map the sg table so we have an accurate count of sg entries needed */
  1417. if (scsi_sg_count(cmd)) {
  1418. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1419. scsi_sg_count(cmd), cmd->sc_data_direction);
  1420. if (unlikely(!nseg))
  1421. goto queuing_error;
  1422. else
  1423. sp->flags |= SRB_DMA_VALID;
  1424. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1425. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1426. struct qla2_sgx sgx;
  1427. uint32_t partial;
  1428. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1429. sgx.tot_bytes = scsi_bufflen(cmd);
  1430. sgx.cur_sg = scsi_sglist(cmd);
  1431. sgx.sp = sp;
  1432. nseg = 0;
  1433. while (qla24xx_get_one_block_sg(
  1434. cmd->device->sector_size, &sgx, &partial))
  1435. nseg++;
  1436. }
  1437. } else
  1438. nseg = 0;
  1439. /* number of required data segments */
  1440. tot_dsds = nseg;
  1441. /* Compute number of required protection segments */
  1442. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1443. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1444. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1445. if (unlikely(!nseg))
  1446. goto queuing_error;
  1447. else
  1448. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1449. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1450. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1451. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1452. }
  1453. } else {
  1454. nseg = 0;
  1455. }
  1456. req_cnt = 1;
  1457. /* Total Data and protection sg segment(s) */
  1458. tot_prot_dsds = nseg;
  1459. tot_dsds += nseg;
  1460. if (req->cnt < (req_cnt + 2)) {
  1461. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  1462. if (req->ring_index < cnt)
  1463. req->cnt = cnt - req->ring_index;
  1464. else
  1465. req->cnt = req->length -
  1466. (req->ring_index - cnt);
  1467. if (req->cnt < (req_cnt + 2))
  1468. goto queuing_error;
  1469. }
  1470. status |= QDSS_GOT_Q_SPACE;
  1471. /* Build header part of command packet (excluding the OPCODE). */
  1472. req->current_outstanding_cmd = handle;
  1473. req->outstanding_cmds[handle] = sp;
  1474. sp->handle = handle;
  1475. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1476. req->cnt -= req_cnt;
  1477. /* Fill-in common area */
  1478. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1479. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1480. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1481. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1482. /* Set NPORT-ID and LUN number*/
  1483. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1484. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1485. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1486. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1487. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1488. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1489. /* Total Data and protection segment(s) */
  1490. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1491. /* Build IOCB segments and adjust for data protection segments */
  1492. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1493. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1494. QLA_SUCCESS)
  1495. goto queuing_error;
  1496. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1497. /* Specify response queue number where completion should happen */
  1498. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1499. cmd_pkt->timeout = __constant_cpu_to_le16(0);
  1500. wmb();
  1501. /* Adjust ring index. */
  1502. req->ring_index++;
  1503. if (req->ring_index == req->length) {
  1504. req->ring_index = 0;
  1505. req->ring_ptr = req->ring;
  1506. } else
  1507. req->ring_ptr++;
  1508. /* Set chip new ring index. */
  1509. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1510. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1511. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1512. if (vha->flags.process_response_queue &&
  1513. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1514. qla24xx_process_response_queue(vha, rsp);
  1515. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1516. return QLA_SUCCESS;
  1517. queuing_error:
  1518. if (status & QDSS_GOT_Q_SPACE) {
  1519. req->outstanding_cmds[handle] = NULL;
  1520. req->cnt += req_cnt;
  1521. }
  1522. /* Cleanup will be performed by the caller (queuecommand) */
  1523. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1524. return QLA_FUNCTION_FAILED;
  1525. }
  1526. static void qla25xx_set_que(srb_t *sp, struct rsp_que **rsp)
  1527. {
  1528. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1529. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1530. int affinity = cmd->request->cpu;
  1531. if (ha->flags.cpu_affinity_enabled && affinity >= 0 &&
  1532. affinity < ha->max_rsp_queues - 1)
  1533. *rsp = ha->rsp_q_map[affinity + 1];
  1534. else
  1535. *rsp = ha->rsp_q_map[0];
  1536. }
  1537. /* Generic Control-SRB manipulation functions. */
  1538. void *
  1539. qla2x00_alloc_iocbs(scsi_qla_host_t *vha, srb_t *sp)
  1540. {
  1541. struct qla_hw_data *ha = vha->hw;
  1542. struct req_que *req = ha->req_q_map[0];
  1543. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  1544. uint32_t index, handle;
  1545. request_t *pkt;
  1546. uint16_t cnt, req_cnt;
  1547. pkt = NULL;
  1548. req_cnt = 1;
  1549. handle = 0;
  1550. if (!sp)
  1551. goto skip_cmd_array;
  1552. /* Check for room in outstanding command list. */
  1553. handle = req->current_outstanding_cmd;
  1554. for (index = 1; req->num_outstanding_cmds; index++) {
  1555. handle++;
  1556. if (handle == req->num_outstanding_cmds)
  1557. handle = 1;
  1558. if (!req->outstanding_cmds[handle])
  1559. break;
  1560. }
  1561. if (index == req->num_outstanding_cmds) {
  1562. ql_log(ql_log_warn, vha, 0x700b,
  1563. "No room on outstanding cmd array.\n");
  1564. goto queuing_error;
  1565. }
  1566. /* Prep command array. */
  1567. req->current_outstanding_cmd = handle;
  1568. req->outstanding_cmds[handle] = sp;
  1569. sp->handle = handle;
  1570. /* Adjust entry-counts as needed. */
  1571. if (sp->type != SRB_SCSI_CMD)
  1572. req_cnt = sp->iocbs;
  1573. skip_cmd_array:
  1574. /* Check for room on request queue. */
  1575. if (req->cnt < req_cnt) {
  1576. if (ha->mqenable || IS_QLA83XX(ha))
  1577. cnt = RD_REG_DWORD(&reg->isp25mq.req_q_out);
  1578. else if (IS_P3P_TYPE(ha))
  1579. cnt = RD_REG_DWORD(&reg->isp82.req_q_out);
  1580. else if (IS_FWI2_CAPABLE(ha))
  1581. cnt = RD_REG_DWORD(&reg->isp24.req_q_out);
  1582. else if (IS_QLAFX00(ha))
  1583. cnt = RD_REG_DWORD(&reg->ispfx00.req_q_out);
  1584. else
  1585. cnt = qla2x00_debounce_register(
  1586. ISP_REQ_Q_OUT(ha, &reg->isp));
  1587. if (req->ring_index < cnt)
  1588. req->cnt = cnt - req->ring_index;
  1589. else
  1590. req->cnt = req->length -
  1591. (req->ring_index - cnt);
  1592. }
  1593. if (req->cnt < req_cnt)
  1594. goto queuing_error;
  1595. /* Prep packet */
  1596. req->cnt -= req_cnt;
  1597. pkt = req->ring_ptr;
  1598. memset(pkt, 0, REQUEST_ENTRY_SIZE);
  1599. if (IS_QLAFX00(ha)) {
  1600. WRT_REG_BYTE((void __iomem *)&pkt->entry_count, req_cnt);
  1601. WRT_REG_WORD((void __iomem *)&pkt->handle, handle);
  1602. } else {
  1603. pkt->entry_count = req_cnt;
  1604. pkt->handle = handle;
  1605. }
  1606. queuing_error:
  1607. return pkt;
  1608. }
  1609. static void
  1610. qla24xx_login_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1611. {
  1612. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1613. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1614. logio->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
  1615. if (lio->u.logio.flags & SRB_LOGIN_COND_PLOGI)
  1616. logio->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
  1617. if (lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI)
  1618. logio->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
  1619. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1620. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1621. logio->port_id[1] = sp->fcport->d_id.b.area;
  1622. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1623. logio->vp_index = sp->fcport->vha->vp_idx;
  1624. }
  1625. static void
  1626. qla2x00_login_iocb(srb_t *sp, struct mbx_entry *mbx)
  1627. {
  1628. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1629. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1630. uint16_t opts;
  1631. mbx->entry_type = MBX_IOCB_TYPE;
  1632. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1633. mbx->mb0 = cpu_to_le16(MBC_LOGIN_FABRIC_PORT);
  1634. opts = lio->u.logio.flags & SRB_LOGIN_COND_PLOGI ? BIT_0 : 0;
  1635. opts |= lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI ? BIT_1 : 0;
  1636. if (HAS_EXTENDED_IDS(ha)) {
  1637. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1638. mbx->mb10 = cpu_to_le16(opts);
  1639. } else {
  1640. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | opts);
  1641. }
  1642. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1643. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1644. sp->fcport->d_id.b.al_pa);
  1645. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1646. }
  1647. static void
  1648. qla24xx_logout_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1649. {
  1650. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1651. logio->control_flags =
  1652. cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1653. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1654. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1655. logio->port_id[1] = sp->fcport->d_id.b.area;
  1656. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1657. logio->vp_index = sp->fcport->vha->vp_idx;
  1658. }
  1659. static void
  1660. qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)
  1661. {
  1662. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1663. mbx->entry_type = MBX_IOCB_TYPE;
  1664. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1665. mbx->mb0 = cpu_to_le16(MBC_LOGOUT_FABRIC_PORT);
  1666. mbx->mb1 = HAS_EXTENDED_IDS(ha) ?
  1667. cpu_to_le16(sp->fcport->loop_id):
  1668. cpu_to_le16(sp->fcport->loop_id << 8);
  1669. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1670. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1671. sp->fcport->d_id.b.al_pa);
  1672. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1673. /* Implicit: mbx->mbx10 = 0. */
  1674. }
  1675. static void
  1676. qla24xx_adisc_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1677. {
  1678. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1679. logio->control_flags = cpu_to_le16(LCF_COMMAND_ADISC);
  1680. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1681. logio->vp_index = sp->fcport->vha->vp_idx;
  1682. }
  1683. static void
  1684. qla2x00_adisc_iocb(srb_t *sp, struct mbx_entry *mbx)
  1685. {
  1686. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1687. mbx->entry_type = MBX_IOCB_TYPE;
  1688. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1689. mbx->mb0 = cpu_to_le16(MBC_GET_PORT_DATABASE);
  1690. if (HAS_EXTENDED_IDS(ha)) {
  1691. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1692. mbx->mb10 = cpu_to_le16(BIT_0);
  1693. } else {
  1694. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | BIT_0);
  1695. }
  1696. mbx->mb2 = cpu_to_le16(MSW(ha->async_pd_dma));
  1697. mbx->mb3 = cpu_to_le16(LSW(ha->async_pd_dma));
  1698. mbx->mb6 = cpu_to_le16(MSW(MSD(ha->async_pd_dma)));
  1699. mbx->mb7 = cpu_to_le16(LSW(MSD(ha->async_pd_dma)));
  1700. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1701. }
  1702. static void
  1703. qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)
  1704. {
  1705. uint32_t flags;
  1706. unsigned int lun;
  1707. struct fc_port *fcport = sp->fcport;
  1708. scsi_qla_host_t *vha = fcport->vha;
  1709. struct qla_hw_data *ha = vha->hw;
  1710. struct srb_iocb *iocb = &sp->u.iocb_cmd;
  1711. struct req_que *req = vha->req;
  1712. flags = iocb->u.tmf.flags;
  1713. lun = iocb->u.tmf.lun;
  1714. tsk->entry_type = TSK_MGMT_IOCB_TYPE;
  1715. tsk->entry_count = 1;
  1716. tsk->handle = MAKE_HANDLE(req->id, tsk->handle);
  1717. tsk->nport_handle = cpu_to_le16(fcport->loop_id);
  1718. tsk->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  1719. tsk->control_flags = cpu_to_le32(flags);
  1720. tsk->port_id[0] = fcport->d_id.b.al_pa;
  1721. tsk->port_id[1] = fcport->d_id.b.area;
  1722. tsk->port_id[2] = fcport->d_id.b.domain;
  1723. tsk->vp_index = fcport->vha->vp_idx;
  1724. if (flags == TCF_LUN_RESET) {
  1725. int_to_scsilun(lun, &tsk->lun);
  1726. host_to_fcp_swap((uint8_t *)&tsk->lun,
  1727. sizeof(tsk->lun));
  1728. }
  1729. }
  1730. static void
  1731. qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  1732. {
  1733. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1734. els_iocb->entry_type = ELS_IOCB_TYPE;
  1735. els_iocb->entry_count = 1;
  1736. els_iocb->sys_define = 0;
  1737. els_iocb->entry_status = 0;
  1738. els_iocb->handle = sp->handle;
  1739. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1740. els_iocb->tx_dsd_count = __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1741. els_iocb->vp_index = sp->fcport->vha->vp_idx;
  1742. els_iocb->sof_type = EST_SOFI3;
  1743. els_iocb->rx_dsd_count = __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1744. els_iocb->opcode =
  1745. sp->type == SRB_ELS_CMD_RPT ?
  1746. bsg_job->request->rqst_data.r_els.els_code :
  1747. bsg_job->request->rqst_data.h_els.command_code;
  1748. els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  1749. els_iocb->port_id[1] = sp->fcport->d_id.b.area;
  1750. els_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  1751. els_iocb->control_flags = 0;
  1752. els_iocb->rx_byte_count =
  1753. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1754. els_iocb->tx_byte_count =
  1755. cpu_to_le32(bsg_job->request_payload.payload_len);
  1756. els_iocb->tx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1757. (bsg_job->request_payload.sg_list)));
  1758. els_iocb->tx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1759. (bsg_job->request_payload.sg_list)));
  1760. els_iocb->tx_len = cpu_to_le32(sg_dma_len
  1761. (bsg_job->request_payload.sg_list));
  1762. els_iocb->rx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1763. (bsg_job->reply_payload.sg_list)));
  1764. els_iocb->rx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1765. (bsg_job->reply_payload.sg_list)));
  1766. els_iocb->rx_len = cpu_to_le32(sg_dma_len
  1767. (bsg_job->reply_payload.sg_list));
  1768. sp->fcport->vha->qla_stats.control_requests++;
  1769. }
  1770. static void
  1771. qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
  1772. {
  1773. uint16_t avail_dsds;
  1774. uint32_t *cur_dsd;
  1775. struct scatterlist *sg;
  1776. int index;
  1777. uint16_t tot_dsds;
  1778. scsi_qla_host_t *vha = sp->fcport->vha;
  1779. struct qla_hw_data *ha = vha->hw;
  1780. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1781. int loop_iterartion = 0;
  1782. int cont_iocb_prsnt = 0;
  1783. int entry_count = 1;
  1784. memset(ct_iocb, 0, sizeof(ms_iocb_entry_t));
  1785. ct_iocb->entry_type = CT_IOCB_TYPE;
  1786. ct_iocb->entry_status = 0;
  1787. ct_iocb->handle1 = sp->handle;
  1788. SET_TARGET_ID(ha, ct_iocb->loop_id, sp->fcport->loop_id);
  1789. ct_iocb->status = __constant_cpu_to_le16(0);
  1790. ct_iocb->control_flags = __constant_cpu_to_le16(0);
  1791. ct_iocb->timeout = 0;
  1792. ct_iocb->cmd_dsd_count =
  1793. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1794. ct_iocb->total_dsd_count =
  1795. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt + 1);
  1796. ct_iocb->req_bytecount =
  1797. cpu_to_le32(bsg_job->request_payload.payload_len);
  1798. ct_iocb->rsp_bytecount =
  1799. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1800. ct_iocb->dseg_req_address[0] = cpu_to_le32(LSD(sg_dma_address
  1801. (bsg_job->request_payload.sg_list)));
  1802. ct_iocb->dseg_req_address[1] = cpu_to_le32(MSD(sg_dma_address
  1803. (bsg_job->request_payload.sg_list)));
  1804. ct_iocb->dseg_req_length = ct_iocb->req_bytecount;
  1805. ct_iocb->dseg_rsp_address[0] = cpu_to_le32(LSD(sg_dma_address
  1806. (bsg_job->reply_payload.sg_list)));
  1807. ct_iocb->dseg_rsp_address[1] = cpu_to_le32(MSD(sg_dma_address
  1808. (bsg_job->reply_payload.sg_list)));
  1809. ct_iocb->dseg_rsp_length = ct_iocb->rsp_bytecount;
  1810. avail_dsds = 1;
  1811. cur_dsd = (uint32_t *)ct_iocb->dseg_rsp_address;
  1812. index = 0;
  1813. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1814. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1815. dma_addr_t sle_dma;
  1816. cont_a64_entry_t *cont_pkt;
  1817. /* Allocate additional continuation packets? */
  1818. if (avail_dsds == 0) {
  1819. /*
  1820. * Five DSDs are available in the Cont.
  1821. * Type 1 IOCB.
  1822. */
  1823. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1824. vha->hw->req_q_map[0]);
  1825. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1826. avail_dsds = 5;
  1827. cont_iocb_prsnt = 1;
  1828. entry_count++;
  1829. }
  1830. sle_dma = sg_dma_address(sg);
  1831. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1832. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1833. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1834. loop_iterartion++;
  1835. avail_dsds--;
  1836. }
  1837. ct_iocb->entry_count = entry_count;
  1838. sp->fcport->vha->qla_stats.control_requests++;
  1839. }
  1840. static void
  1841. qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
  1842. {
  1843. uint16_t avail_dsds;
  1844. uint32_t *cur_dsd;
  1845. struct scatterlist *sg;
  1846. int index;
  1847. uint16_t tot_dsds;
  1848. scsi_qla_host_t *vha = sp->fcport->vha;
  1849. struct qla_hw_data *ha = vha->hw;
  1850. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1851. int loop_iterartion = 0;
  1852. int cont_iocb_prsnt = 0;
  1853. int entry_count = 1;
  1854. ct_iocb->entry_type = CT_IOCB_TYPE;
  1855. ct_iocb->entry_status = 0;
  1856. ct_iocb->sys_define = 0;
  1857. ct_iocb->handle = sp->handle;
  1858. ct_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1859. ct_iocb->vp_index = sp->fcport->vha->vp_idx;
  1860. ct_iocb->comp_status = __constant_cpu_to_le16(0);
  1861. ct_iocb->cmd_dsd_count =
  1862. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1863. ct_iocb->timeout = 0;
  1864. ct_iocb->rsp_dsd_count =
  1865. __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1866. ct_iocb->rsp_byte_count =
  1867. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1868. ct_iocb->cmd_byte_count =
  1869. cpu_to_le32(bsg_job->request_payload.payload_len);
  1870. ct_iocb->dseg_0_address[0] = cpu_to_le32(LSD(sg_dma_address
  1871. (bsg_job->request_payload.sg_list)));
  1872. ct_iocb->dseg_0_address[1] = cpu_to_le32(MSD(sg_dma_address
  1873. (bsg_job->request_payload.sg_list)));
  1874. ct_iocb->dseg_0_len = cpu_to_le32(sg_dma_len
  1875. (bsg_job->request_payload.sg_list));
  1876. avail_dsds = 1;
  1877. cur_dsd = (uint32_t *)ct_iocb->dseg_1_address;
  1878. index = 0;
  1879. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1880. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1881. dma_addr_t sle_dma;
  1882. cont_a64_entry_t *cont_pkt;
  1883. /* Allocate additional continuation packets? */
  1884. if (avail_dsds == 0) {
  1885. /*
  1886. * Five DSDs are available in the Cont.
  1887. * Type 1 IOCB.
  1888. */
  1889. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1890. ha->req_q_map[0]);
  1891. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1892. avail_dsds = 5;
  1893. cont_iocb_prsnt = 1;
  1894. entry_count++;
  1895. }
  1896. sle_dma = sg_dma_address(sg);
  1897. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1898. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1899. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1900. loop_iterartion++;
  1901. avail_dsds--;
  1902. }
  1903. ct_iocb->entry_count = entry_count;
  1904. }
  1905. /*
  1906. * qla82xx_start_scsi() - Send a SCSI command to the ISP
  1907. * @sp: command to send to the ISP
  1908. *
  1909. * Returns non-zero if a failure occurred, else zero.
  1910. */
  1911. int
  1912. qla82xx_start_scsi(srb_t *sp)
  1913. {
  1914. int ret, nseg;
  1915. unsigned long flags;
  1916. struct scsi_cmnd *cmd;
  1917. uint32_t *clr_ptr;
  1918. uint32_t index;
  1919. uint32_t handle;
  1920. uint16_t cnt;
  1921. uint16_t req_cnt;
  1922. uint16_t tot_dsds;
  1923. struct device_reg_82xx __iomem *reg;
  1924. uint32_t dbval;
  1925. uint32_t *fcp_dl;
  1926. uint8_t additional_cdb_len;
  1927. struct ct6_dsd *ctx;
  1928. struct scsi_qla_host *vha = sp->fcport->vha;
  1929. struct qla_hw_data *ha = vha->hw;
  1930. struct req_que *req = NULL;
  1931. struct rsp_que *rsp = NULL;
  1932. char tag[2];
  1933. /* Setup device pointers. */
  1934. ret = 0;
  1935. reg = &ha->iobase->isp82;
  1936. cmd = GET_CMD_SP(sp);
  1937. req = vha->req;
  1938. rsp = ha->rsp_q_map[0];
  1939. /* So we know we haven't pci_map'ed anything yet */
  1940. tot_dsds = 0;
  1941. dbval = 0x04 | (ha->portnum << 5);
  1942. /* Send marker if required */
  1943. if (vha->marker_needed != 0) {
  1944. if (qla2x00_marker(vha, req,
  1945. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS) {
  1946. ql_log(ql_log_warn, vha, 0x300c,
  1947. "qla2x00_marker failed for cmd=%p.\n", cmd);
  1948. return QLA_FUNCTION_FAILED;
  1949. }
  1950. vha->marker_needed = 0;
  1951. }
  1952. /* Acquire ring specific lock */
  1953. spin_lock_irqsave(&ha->hardware_lock, flags);
  1954. /* Check for room in outstanding command list. */
  1955. handle = req->current_outstanding_cmd;
  1956. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1957. handle++;
  1958. if (handle == req->num_outstanding_cmds)
  1959. handle = 1;
  1960. if (!req->outstanding_cmds[handle])
  1961. break;
  1962. }
  1963. if (index == req->num_outstanding_cmds)
  1964. goto queuing_error;
  1965. /* Map the sg table so we have an accurate count of sg entries needed */
  1966. if (scsi_sg_count(cmd)) {
  1967. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1968. scsi_sg_count(cmd), cmd->sc_data_direction);
  1969. if (unlikely(!nseg))
  1970. goto queuing_error;
  1971. } else
  1972. nseg = 0;
  1973. tot_dsds = nseg;
  1974. if (tot_dsds > ql2xshiftctondsd) {
  1975. struct cmd_type_6 *cmd_pkt;
  1976. uint16_t more_dsd_lists = 0;
  1977. struct dsd_dma *dsd_ptr;
  1978. uint16_t i;
  1979. more_dsd_lists = qla24xx_calc_dsd_lists(tot_dsds);
  1980. if ((more_dsd_lists + ha->gbl_dsd_inuse) >= NUM_DSD_CHAIN) {
  1981. ql_dbg(ql_dbg_io, vha, 0x300d,
  1982. "Num of DSD list %d is than %d for cmd=%p.\n",
  1983. more_dsd_lists + ha->gbl_dsd_inuse, NUM_DSD_CHAIN,
  1984. cmd);
  1985. goto queuing_error;
  1986. }
  1987. if (more_dsd_lists <= ha->gbl_dsd_avail)
  1988. goto sufficient_dsds;
  1989. else
  1990. more_dsd_lists -= ha->gbl_dsd_avail;
  1991. for (i = 0; i < more_dsd_lists; i++) {
  1992. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  1993. if (!dsd_ptr) {
  1994. ql_log(ql_log_fatal, vha, 0x300e,
  1995. "Failed to allocate memory for dsd_dma "
  1996. "for cmd=%p.\n", cmd);
  1997. goto queuing_error;
  1998. }
  1999. dsd_ptr->dsd_addr = dma_pool_alloc(ha->dl_dma_pool,
  2000. GFP_ATOMIC, &dsd_ptr->dsd_list_dma);
  2001. if (!dsd_ptr->dsd_addr) {
  2002. kfree(dsd_ptr);
  2003. ql_log(ql_log_fatal, vha, 0x300f,
  2004. "Failed to allocate memory for dsd_addr "
  2005. "for cmd=%p.\n", cmd);
  2006. goto queuing_error;
  2007. }
  2008. list_add_tail(&dsd_ptr->list, &ha->gbl_dsd_list);
  2009. ha->gbl_dsd_avail++;
  2010. }
  2011. sufficient_dsds:
  2012. req_cnt = 1;
  2013. if (req->cnt < (req_cnt + 2)) {
  2014. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2015. &reg->req_q_out[0]);
  2016. if (req->ring_index < cnt)
  2017. req->cnt = cnt - req->ring_index;
  2018. else
  2019. req->cnt = req->length -
  2020. (req->ring_index - cnt);
  2021. if (req->cnt < (req_cnt + 2))
  2022. goto queuing_error;
  2023. }
  2024. ctx = sp->u.scmd.ctx =
  2025. mempool_alloc(ha->ctx_mempool, GFP_ATOMIC);
  2026. if (!ctx) {
  2027. ql_log(ql_log_fatal, vha, 0x3010,
  2028. "Failed to allocate ctx for cmd=%p.\n", cmd);
  2029. goto queuing_error;
  2030. }
  2031. memset(ctx, 0, sizeof(struct ct6_dsd));
  2032. ctx->fcp_cmnd = dma_pool_alloc(ha->fcp_cmnd_dma_pool,
  2033. GFP_ATOMIC, &ctx->fcp_cmnd_dma);
  2034. if (!ctx->fcp_cmnd) {
  2035. ql_log(ql_log_fatal, vha, 0x3011,
  2036. "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd);
  2037. goto queuing_error;
  2038. }
  2039. /* Initialize the DSD list and dma handle */
  2040. INIT_LIST_HEAD(&ctx->dsd_list);
  2041. ctx->dsd_use_cnt = 0;
  2042. if (cmd->cmd_len > 16) {
  2043. additional_cdb_len = cmd->cmd_len - 16;
  2044. if ((cmd->cmd_len % 4) != 0) {
  2045. /* SCSI command bigger than 16 bytes must be
  2046. * multiple of 4
  2047. */
  2048. ql_log(ql_log_warn, vha, 0x3012,
  2049. "scsi cmd len %d not multiple of 4 "
  2050. "for cmd=%p.\n", cmd->cmd_len, cmd);
  2051. goto queuing_error_fcp_cmnd;
  2052. }
  2053. ctx->fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  2054. } else {
  2055. additional_cdb_len = 0;
  2056. ctx->fcp_cmnd_len = 12 + 16 + 4;
  2057. }
  2058. cmd_pkt = (struct cmd_type_6 *)req->ring_ptr;
  2059. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2060. /* Zero out remaining portion of packet. */
  2061. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  2062. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2063. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2064. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2065. /* Set NPORT-ID and LUN number*/
  2066. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2067. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2068. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2069. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2070. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2071. /* Build IOCB segments */
  2072. if (qla24xx_build_scsi_type_6_iocbs(sp, cmd_pkt, tot_dsds))
  2073. goto queuing_error_fcp_cmnd;
  2074. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2075. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  2076. /* build FCP_CMND IU */
  2077. memset(ctx->fcp_cmnd, 0, sizeof(struct fcp_cmnd));
  2078. int_to_scsilun(cmd->device->lun, &ctx->fcp_cmnd->lun);
  2079. ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len;
  2080. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  2081. ctx->fcp_cmnd->additional_cdb_len |= 1;
  2082. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  2083. ctx->fcp_cmnd->additional_cdb_len |= 2;
  2084. /*
  2085. * Update tagged queuing modifier -- default is TSK_SIMPLE (0).
  2086. */
  2087. if (scsi_populate_tag_msg(cmd, tag)) {
  2088. switch (tag[0]) {
  2089. case HEAD_OF_QUEUE_TAG:
  2090. ctx->fcp_cmnd->task_attribute =
  2091. TSK_HEAD_OF_QUEUE;
  2092. break;
  2093. case ORDERED_QUEUE_TAG:
  2094. ctx->fcp_cmnd->task_attribute =
  2095. TSK_ORDERED;
  2096. break;
  2097. }
  2098. }
  2099. /* Populate the FCP_PRIO. */
  2100. if (ha->flags.fcp_prio_enabled)
  2101. ctx->fcp_cmnd->task_attribute |=
  2102. sp->fcport->fcp_prio << 3;
  2103. memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  2104. fcp_dl = (uint32_t *)(ctx->fcp_cmnd->cdb + 16 +
  2105. additional_cdb_len);
  2106. *fcp_dl = htonl((uint32_t)scsi_bufflen(cmd));
  2107. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len);
  2108. cmd_pkt->fcp_cmnd_dseg_address[0] =
  2109. cpu_to_le32(LSD(ctx->fcp_cmnd_dma));
  2110. cmd_pkt->fcp_cmnd_dseg_address[1] =
  2111. cpu_to_le32(MSD(ctx->fcp_cmnd_dma));
  2112. sp->flags |= SRB_FCP_CMND_DMA_VALID;
  2113. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2114. /* Set total data segment count. */
  2115. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2116. /* Specify response queue number where
  2117. * completion should happen
  2118. */
  2119. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2120. } else {
  2121. struct cmd_type_7 *cmd_pkt;
  2122. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2123. if (req->cnt < (req_cnt + 2)) {
  2124. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2125. &reg->req_q_out[0]);
  2126. if (req->ring_index < cnt)
  2127. req->cnt = cnt - req->ring_index;
  2128. else
  2129. req->cnt = req->length -
  2130. (req->ring_index - cnt);
  2131. }
  2132. if (req->cnt < (req_cnt + 2))
  2133. goto queuing_error;
  2134. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  2135. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2136. /* Zero out remaining portion of packet. */
  2137. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2138. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2139. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2140. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2141. /* Set NPORT-ID and LUN number*/
  2142. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2143. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2144. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2145. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2146. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2147. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2148. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun,
  2149. sizeof(cmd_pkt->lun));
  2150. /*
  2151. * Update tagged queuing modifier -- default is TSK_SIMPLE (0).
  2152. */
  2153. if (scsi_populate_tag_msg(cmd, tag)) {
  2154. switch (tag[0]) {
  2155. case HEAD_OF_QUEUE_TAG:
  2156. cmd_pkt->task = TSK_HEAD_OF_QUEUE;
  2157. break;
  2158. case ORDERED_QUEUE_TAG:
  2159. cmd_pkt->task = TSK_ORDERED;
  2160. break;
  2161. }
  2162. }
  2163. /* Populate the FCP_PRIO. */
  2164. if (ha->flags.fcp_prio_enabled)
  2165. cmd_pkt->task |= sp->fcport->fcp_prio << 3;
  2166. /* Load SCSI command packet. */
  2167. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  2168. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  2169. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2170. /* Build IOCB segments */
  2171. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  2172. /* Set total data segment count. */
  2173. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2174. /* Specify response queue number where
  2175. * completion should happen.
  2176. */
  2177. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2178. }
  2179. /* Build command packet. */
  2180. req->current_outstanding_cmd = handle;
  2181. req->outstanding_cmds[handle] = sp;
  2182. sp->handle = handle;
  2183. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  2184. req->cnt -= req_cnt;
  2185. wmb();
  2186. /* Adjust ring index. */
  2187. req->ring_index++;
  2188. if (req->ring_index == req->length) {
  2189. req->ring_index = 0;
  2190. req->ring_ptr = req->ring;
  2191. } else
  2192. req->ring_ptr++;
  2193. sp->flags |= SRB_DMA_VALID;
  2194. /* Set chip new ring index. */
  2195. /* write, read and verify logic */
  2196. dbval = dbval | (req->id << 8) | (req->ring_index << 16);
  2197. if (ql2xdbwr)
  2198. qla82xx_wr_32(ha, ha->nxdb_wr_ptr, dbval);
  2199. else {
  2200. WRT_REG_DWORD(
  2201. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2202. dbval);
  2203. wmb();
  2204. while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) {
  2205. WRT_REG_DWORD(
  2206. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2207. dbval);
  2208. wmb();
  2209. }
  2210. }
  2211. /* Manage unprocessed RIO/ZIO commands in response queue. */
  2212. if (vha->flags.process_response_queue &&
  2213. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  2214. qla24xx_process_response_queue(vha, rsp);
  2215. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2216. return QLA_SUCCESS;
  2217. queuing_error_fcp_cmnd:
  2218. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma);
  2219. queuing_error:
  2220. if (tot_dsds)
  2221. scsi_dma_unmap(cmd);
  2222. if (sp->u.scmd.ctx) {
  2223. mempool_free(sp->u.scmd.ctx, ha->ctx_mempool);
  2224. sp->u.scmd.ctx = NULL;
  2225. }
  2226. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2227. return QLA_FUNCTION_FAILED;
  2228. }
  2229. int
  2230. qla2x00_start_sp(srb_t *sp)
  2231. {
  2232. int rval;
  2233. struct qla_hw_data *ha = sp->fcport->vha->hw;
  2234. void *pkt;
  2235. unsigned long flags;
  2236. rval = QLA_FUNCTION_FAILED;
  2237. spin_lock_irqsave(&ha->hardware_lock, flags);
  2238. pkt = qla2x00_alloc_iocbs(sp->fcport->vha, sp);
  2239. if (!pkt) {
  2240. ql_log(ql_log_warn, sp->fcport->vha, 0x700c,
  2241. "qla2x00_alloc_iocbs failed.\n");
  2242. goto done;
  2243. }
  2244. rval = QLA_SUCCESS;
  2245. switch (sp->type) {
  2246. case SRB_LOGIN_CMD:
  2247. IS_FWI2_CAPABLE(ha) ?
  2248. qla24xx_login_iocb(sp, pkt) :
  2249. qla2x00_login_iocb(sp, pkt);
  2250. break;
  2251. case SRB_LOGOUT_CMD:
  2252. IS_FWI2_CAPABLE(ha) ?
  2253. qla24xx_logout_iocb(sp, pkt) :
  2254. qla2x00_logout_iocb(sp, pkt);
  2255. break;
  2256. case SRB_ELS_CMD_RPT:
  2257. case SRB_ELS_CMD_HST:
  2258. qla24xx_els_iocb(sp, pkt);
  2259. break;
  2260. case SRB_CT_CMD:
  2261. IS_FWI2_CAPABLE(ha) ?
  2262. qla24xx_ct_iocb(sp, pkt) :
  2263. qla2x00_ct_iocb(sp, pkt);
  2264. break;
  2265. case SRB_ADISC_CMD:
  2266. IS_FWI2_CAPABLE(ha) ?
  2267. qla24xx_adisc_iocb(sp, pkt) :
  2268. qla2x00_adisc_iocb(sp, pkt);
  2269. break;
  2270. case SRB_TM_CMD:
  2271. IS_QLAFX00(ha) ?
  2272. qlafx00_tm_iocb(sp, pkt) :
  2273. qla24xx_tm_iocb(sp, pkt);
  2274. break;
  2275. case SRB_FXIOCB_DCMD:
  2276. case SRB_FXIOCB_BCMD:
  2277. qlafx00_fxdisc_iocb(sp, pkt);
  2278. break;
  2279. case SRB_ABT_CMD:
  2280. qlafx00_abort_iocb(sp, pkt);
  2281. break;
  2282. default:
  2283. break;
  2284. }
  2285. wmb();
  2286. qla2x00_start_iocbs(sp->fcport->vha, ha->req_q_map[0]);
  2287. done:
  2288. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2289. return rval;
  2290. }
  2291. static void
  2292. qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
  2293. struct cmd_bidir *cmd_pkt, uint32_t tot_dsds)
  2294. {
  2295. uint16_t avail_dsds;
  2296. uint32_t *cur_dsd;
  2297. uint32_t req_data_len = 0;
  2298. uint32_t rsp_data_len = 0;
  2299. struct scatterlist *sg;
  2300. int index;
  2301. int entry_count = 1;
  2302. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  2303. /*Update entry type to indicate bidir command */
  2304. *((uint32_t *)(&cmd_pkt->entry_type)) =
  2305. __constant_cpu_to_le32(COMMAND_BIDIRECTIONAL);
  2306. /* Set the transfer direction, in this set both flags
  2307. * Also set the BD_WRAP_BACK flag, firmware will take care
  2308. * assigning DID=SID for outgoing pkts.
  2309. */
  2310. cmd_pkt->wr_dseg_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2311. cmd_pkt->rd_dseg_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  2312. cmd_pkt->control_flags =
  2313. __constant_cpu_to_le16(BD_WRITE_DATA | BD_READ_DATA |
  2314. BD_WRAP_BACK);
  2315. req_data_len = rsp_data_len = bsg_job->request_payload.payload_len;
  2316. cmd_pkt->wr_byte_count = cpu_to_le32(req_data_len);
  2317. cmd_pkt->rd_byte_count = cpu_to_le32(rsp_data_len);
  2318. cmd_pkt->timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
  2319. vha->bidi_stats.transfer_bytes += req_data_len;
  2320. vha->bidi_stats.io_count++;
  2321. vha->qla_stats.output_bytes += req_data_len;
  2322. vha->qla_stats.output_requests++;
  2323. /* Only one dsd is available for bidirectional IOCB, remaining dsds
  2324. * are bundled in continuation iocb
  2325. */
  2326. avail_dsds = 1;
  2327. cur_dsd = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  2328. index = 0;
  2329. for_each_sg(bsg_job->request_payload.sg_list, sg,
  2330. bsg_job->request_payload.sg_cnt, index) {
  2331. dma_addr_t sle_dma;
  2332. cont_a64_entry_t *cont_pkt;
  2333. /* Allocate additional continuation packets */
  2334. if (avail_dsds == 0) {
  2335. /* Continuation type 1 IOCB can accomodate
  2336. * 5 DSDS
  2337. */
  2338. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2339. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2340. avail_dsds = 5;
  2341. entry_count++;
  2342. }
  2343. sle_dma = sg_dma_address(sg);
  2344. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2345. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2346. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2347. avail_dsds--;
  2348. }
  2349. /* For read request DSD will always goes to continuation IOCB
  2350. * and follow the write DSD. If there is room on the current IOCB
  2351. * then it is added to that IOCB else new continuation IOCB is
  2352. * allocated.
  2353. */
  2354. for_each_sg(bsg_job->reply_payload.sg_list, sg,
  2355. bsg_job->reply_payload.sg_cnt, index) {
  2356. dma_addr_t sle_dma;
  2357. cont_a64_entry_t *cont_pkt;
  2358. /* Allocate additional continuation packets */
  2359. if (avail_dsds == 0) {
  2360. /* Continuation type 1 IOCB can accomodate
  2361. * 5 DSDS
  2362. */
  2363. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2364. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2365. avail_dsds = 5;
  2366. entry_count++;
  2367. }
  2368. sle_dma = sg_dma_address(sg);
  2369. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2370. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2371. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2372. avail_dsds--;
  2373. }
  2374. /* This value should be same as number of IOCB required for this cmd */
  2375. cmd_pkt->entry_count = entry_count;
  2376. }
  2377. int
  2378. qla2x00_start_bidir(srb_t *sp, struct scsi_qla_host *vha, uint32_t tot_dsds)
  2379. {
  2380. struct qla_hw_data *ha = vha->hw;
  2381. unsigned long flags;
  2382. uint32_t handle;
  2383. uint32_t index;
  2384. uint16_t req_cnt;
  2385. uint16_t cnt;
  2386. uint32_t *clr_ptr;
  2387. struct cmd_bidir *cmd_pkt = NULL;
  2388. struct rsp_que *rsp;
  2389. struct req_que *req;
  2390. int rval = EXT_STATUS_OK;
  2391. rval = QLA_SUCCESS;
  2392. rsp = ha->rsp_q_map[0];
  2393. req = vha->req;
  2394. /* Send marker if required */
  2395. if (vha->marker_needed != 0) {
  2396. if (qla2x00_marker(vha, req,
  2397. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS)
  2398. return EXT_STATUS_MAILBOX;
  2399. vha->marker_needed = 0;
  2400. }
  2401. /* Acquire ring specific lock */
  2402. spin_lock_irqsave(&ha->hardware_lock, flags);
  2403. /* Check for room in outstanding command list. */
  2404. handle = req->current_outstanding_cmd;
  2405. for (index = 1; index < req->num_outstanding_cmds; index++) {
  2406. handle++;
  2407. if (handle == req->num_outstanding_cmds)
  2408. handle = 1;
  2409. if (!req->outstanding_cmds[handle])
  2410. break;
  2411. }
  2412. if (index == req->num_outstanding_cmds) {
  2413. rval = EXT_STATUS_BUSY;
  2414. goto queuing_error;
  2415. }
  2416. /* Calculate number of IOCB required */
  2417. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2418. /* Check for room on request queue. */
  2419. if (req->cnt < req_cnt + 2) {
  2420. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  2421. if (req->ring_index < cnt)
  2422. req->cnt = cnt - req->ring_index;
  2423. else
  2424. req->cnt = req->length -
  2425. (req->ring_index - cnt);
  2426. }
  2427. if (req->cnt < req_cnt + 2) {
  2428. rval = EXT_STATUS_BUSY;
  2429. goto queuing_error;
  2430. }
  2431. cmd_pkt = (struct cmd_bidir *)req->ring_ptr;
  2432. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2433. /* Zero out remaining portion of packet. */
  2434. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2435. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2436. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2437. /* Set NPORT-ID (of vha)*/
  2438. cmd_pkt->nport_handle = cpu_to_le16(vha->self_login_loop_id);
  2439. cmd_pkt->port_id[0] = vha->d_id.b.al_pa;
  2440. cmd_pkt->port_id[1] = vha->d_id.b.area;
  2441. cmd_pkt->port_id[2] = vha->d_id.b.domain;
  2442. qla25xx_build_bidir_iocb(sp, vha, cmd_pkt, tot_dsds);
  2443. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2444. /* Build command packet. */
  2445. req->current_outstanding_cmd = handle;
  2446. req->outstanding_cmds[handle] = sp;
  2447. sp->handle = handle;
  2448. req->cnt -= req_cnt;
  2449. /* Send the command to the firmware */
  2450. wmb();
  2451. qla2x00_start_iocbs(vha, req);
  2452. queuing_error:
  2453. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2454. return rval;
  2455. }