pm8001_ctl.c 18 KB

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  1. /*
  2. * PMC-Sierra 8001/8081/8088/8089 SAS/SATA based host adapters driver
  3. *
  4. * Copyright (c) 2008-2009 USI Co., Ltd.
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14. * substantially similar to the "NO WARRANTY" disclaimer below
  15. * ("Disclaimer") and any redistribution must be conditioned upon
  16. * including a substantially similar Disclaimer requirement for further
  17. * binary redistribution.
  18. * 3. Neither the names of the above-listed copyright holders nor the names
  19. * of any contributors may be used to endorse or promote products derived
  20. * from this software without specific prior written permission.
  21. *
  22. * Alternatively, this software may be distributed under the terms of the
  23. * GNU General Public License ("GPL") version 2 as published by the Free
  24. * Software Foundation.
  25. *
  26. * NO WARRANTY
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37. * POSSIBILITY OF SUCH DAMAGES.
  38. *
  39. */
  40. #include <linux/firmware.h>
  41. #include <linux/slab.h>
  42. #include "pm8001_sas.h"
  43. #include "pm8001_ctl.h"
  44. /* scsi host attributes */
  45. /**
  46. * pm8001_ctl_mpi_interface_rev_show - MPI interface revision number
  47. * @cdev: pointer to embedded class device
  48. * @buf: the buffer returned
  49. *
  50. * A sysfs 'read-only' shost attribute.
  51. */
  52. static ssize_t pm8001_ctl_mpi_interface_rev_show(struct device *cdev,
  53. struct device_attribute *attr, char *buf)
  54. {
  55. struct Scsi_Host *shost = class_to_shost(cdev);
  56. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  57. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  58. if (pm8001_ha->chip_id == chip_8001) {
  59. return snprintf(buf, PAGE_SIZE, "%d\n",
  60. pm8001_ha->main_cfg_tbl.pm8001_tbl.interface_rev);
  61. } else {
  62. return snprintf(buf, PAGE_SIZE, "%d\n",
  63. pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev);
  64. }
  65. }
  66. static
  67. DEVICE_ATTR(interface_rev, S_IRUGO, pm8001_ctl_mpi_interface_rev_show, NULL);
  68. /**
  69. * pm8001_ctl_fw_version_show - firmware version
  70. * @cdev: pointer to embedded class device
  71. * @buf: the buffer returned
  72. *
  73. * A sysfs 'read-only' shost attribute.
  74. */
  75. static ssize_t pm8001_ctl_fw_version_show(struct device *cdev,
  76. struct device_attribute *attr, char *buf)
  77. {
  78. struct Scsi_Host *shost = class_to_shost(cdev);
  79. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  80. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  81. if (pm8001_ha->chip_id == chip_8001) {
  82. return snprintf(buf, PAGE_SIZE, "%02x.%02x.%02x.%02x\n",
  83. (u8)(pm8001_ha->main_cfg_tbl.pm8001_tbl.firmware_rev >> 24),
  84. (u8)(pm8001_ha->main_cfg_tbl.pm8001_tbl.firmware_rev >> 16),
  85. (u8)(pm8001_ha->main_cfg_tbl.pm8001_tbl.firmware_rev >> 8),
  86. (u8)(pm8001_ha->main_cfg_tbl.pm8001_tbl.firmware_rev));
  87. } else {
  88. return snprintf(buf, PAGE_SIZE, "%02x.%02x.%02x.%02x\n",
  89. (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev >> 24),
  90. (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev >> 16),
  91. (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev >> 8),
  92. (u8)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev));
  93. }
  94. }
  95. static DEVICE_ATTR(fw_version, S_IRUGO, pm8001_ctl_fw_version_show, NULL);
  96. /**
  97. * pm8001_ctl_max_out_io_show - max outstanding io supported
  98. * @cdev: pointer to embedded class device
  99. * @buf: the buffer returned
  100. *
  101. * A sysfs 'read-only' shost attribute.
  102. */
  103. static ssize_t pm8001_ctl_max_out_io_show(struct device *cdev,
  104. struct device_attribute *attr, char *buf)
  105. {
  106. struct Scsi_Host *shost = class_to_shost(cdev);
  107. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  108. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  109. if (pm8001_ha->chip_id == chip_8001) {
  110. return snprintf(buf, PAGE_SIZE, "%d\n",
  111. pm8001_ha->main_cfg_tbl.pm8001_tbl.max_out_io);
  112. } else {
  113. return snprintf(buf, PAGE_SIZE, "%d\n",
  114. pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io);
  115. }
  116. }
  117. static DEVICE_ATTR(max_out_io, S_IRUGO, pm8001_ctl_max_out_io_show, NULL);
  118. /**
  119. * pm8001_ctl_max_devices_show - max devices support
  120. * @cdev: pointer to embedded class device
  121. * @buf: the buffer returned
  122. *
  123. * A sysfs 'read-only' shost attribute.
  124. */
  125. static ssize_t pm8001_ctl_max_devices_show(struct device *cdev,
  126. struct device_attribute *attr, char *buf)
  127. {
  128. struct Scsi_Host *shost = class_to_shost(cdev);
  129. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  130. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  131. if (pm8001_ha->chip_id == chip_8001) {
  132. return snprintf(buf, PAGE_SIZE, "%04d\n",
  133. (u16)(pm8001_ha->main_cfg_tbl.pm8001_tbl.max_sgl >> 16)
  134. );
  135. } else {
  136. return snprintf(buf, PAGE_SIZE, "%04d\n",
  137. (u16)(pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl >> 16)
  138. );
  139. }
  140. }
  141. static DEVICE_ATTR(max_devices, S_IRUGO, pm8001_ctl_max_devices_show, NULL);
  142. /**
  143. * pm8001_ctl_max_sg_list_show - max sg list supported iff not 0.0 for no
  144. * hardware limitation
  145. * @cdev: pointer to embedded class device
  146. * @buf: the buffer returned
  147. *
  148. * A sysfs 'read-only' shost attribute.
  149. */
  150. static ssize_t pm8001_ctl_max_sg_list_show(struct device *cdev,
  151. struct device_attribute *attr, char *buf)
  152. {
  153. struct Scsi_Host *shost = class_to_shost(cdev);
  154. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  155. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  156. if (pm8001_ha->chip_id == chip_8001) {
  157. return snprintf(buf, PAGE_SIZE, "%04d\n",
  158. pm8001_ha->main_cfg_tbl.pm8001_tbl.max_sgl & 0x0000FFFF
  159. );
  160. } else {
  161. return snprintf(buf, PAGE_SIZE, "%04d\n",
  162. pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl & 0x0000FFFF
  163. );
  164. }
  165. }
  166. static DEVICE_ATTR(max_sg_list, S_IRUGO, pm8001_ctl_max_sg_list_show, NULL);
  167. #define SAS_1_0 0x1
  168. #define SAS_1_1 0x2
  169. #define SAS_2_0 0x4
  170. static ssize_t
  171. show_sas_spec_support_status(unsigned int mode, char *buf)
  172. {
  173. ssize_t len = 0;
  174. if (mode & SAS_1_1)
  175. len = sprintf(buf, "%s", "SAS1.1");
  176. if (mode & SAS_2_0)
  177. len += sprintf(buf + len, "%s%s", len ? ", " : "", "SAS2.0");
  178. len += sprintf(buf + len, "\n");
  179. return len;
  180. }
  181. /**
  182. * pm8001_ctl_sas_spec_support_show - sas spec supported
  183. * @cdev: pointer to embedded class device
  184. * @buf: the buffer returned
  185. *
  186. * A sysfs 'read-only' shost attribute.
  187. */
  188. static ssize_t pm8001_ctl_sas_spec_support_show(struct device *cdev,
  189. struct device_attribute *attr, char *buf)
  190. {
  191. unsigned int mode;
  192. struct Scsi_Host *shost = class_to_shost(cdev);
  193. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  194. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  195. /* fe000000 means supports SAS2.1 */
  196. if (pm8001_ha->chip_id == chip_8001)
  197. mode = (pm8001_ha->main_cfg_tbl.pm8001_tbl.ctrl_cap_flag &
  198. 0xfe000000)>>25;
  199. else
  200. /* fe000000 means supports SAS2.1 */
  201. mode = (pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag &
  202. 0xfe000000)>>25;
  203. return show_sas_spec_support_status(mode, buf);
  204. }
  205. static DEVICE_ATTR(sas_spec_support, S_IRUGO,
  206. pm8001_ctl_sas_spec_support_show, NULL);
  207. /**
  208. * pm8001_ctl_sas_address_show - sas address
  209. * @cdev: pointer to embedded class device
  210. * @buf: the buffer returned
  211. *
  212. * This is the controller sas address
  213. *
  214. * A sysfs 'read-only' shost attribute.
  215. */
  216. static ssize_t pm8001_ctl_host_sas_address_show(struct device *cdev,
  217. struct device_attribute *attr, char *buf)
  218. {
  219. struct Scsi_Host *shost = class_to_shost(cdev);
  220. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  221. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  222. return snprintf(buf, PAGE_SIZE, "0x%016llx\n",
  223. be64_to_cpu(*(__be64 *)pm8001_ha->sas_addr));
  224. }
  225. static DEVICE_ATTR(host_sas_address, S_IRUGO,
  226. pm8001_ctl_host_sas_address_show, NULL);
  227. /**
  228. * pm8001_ctl_logging_level_show - logging level
  229. * @cdev: pointer to embedded class device
  230. * @buf: the buffer returned
  231. *
  232. * A sysfs 'read/write' shost attribute.
  233. */
  234. static ssize_t pm8001_ctl_logging_level_show(struct device *cdev,
  235. struct device_attribute *attr, char *buf)
  236. {
  237. struct Scsi_Host *shost = class_to_shost(cdev);
  238. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  239. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  240. return snprintf(buf, PAGE_SIZE, "%08xh\n", pm8001_ha->logging_level);
  241. }
  242. static ssize_t pm8001_ctl_logging_level_store(struct device *cdev,
  243. struct device_attribute *attr, const char *buf, size_t count)
  244. {
  245. struct Scsi_Host *shost = class_to_shost(cdev);
  246. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  247. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  248. int val = 0;
  249. if (sscanf(buf, "%x", &val) != 1)
  250. return -EINVAL;
  251. pm8001_ha->logging_level = val;
  252. return strlen(buf);
  253. }
  254. static DEVICE_ATTR(logging_level, S_IRUGO | S_IWUSR,
  255. pm8001_ctl_logging_level_show, pm8001_ctl_logging_level_store);
  256. /**
  257. * pm8001_ctl_aap_log_show - aap1 event log
  258. * @cdev: pointer to embedded class device
  259. * @buf: the buffer returned
  260. *
  261. * A sysfs 'read-only' shost attribute.
  262. */
  263. static ssize_t pm8001_ctl_aap_log_show(struct device *cdev,
  264. struct device_attribute *attr, char *buf)
  265. {
  266. struct Scsi_Host *shost = class_to_shost(cdev);
  267. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  268. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  269. int i;
  270. #define AAP1_MEMMAP(r, c) \
  271. (*(u32 *)((u8*)pm8001_ha->memoryMap.region[AAP1].virt_ptr + (r) * 32 \
  272. + (c)))
  273. char *str = buf;
  274. int max = 2;
  275. for (i = 0; i < max; i++) {
  276. str += sprintf(str, "0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x"
  277. "0x%08x 0x%08x\n",
  278. AAP1_MEMMAP(i, 0),
  279. AAP1_MEMMAP(i, 4),
  280. AAP1_MEMMAP(i, 8),
  281. AAP1_MEMMAP(i, 12),
  282. AAP1_MEMMAP(i, 16),
  283. AAP1_MEMMAP(i, 20),
  284. AAP1_MEMMAP(i, 24),
  285. AAP1_MEMMAP(i, 28));
  286. }
  287. return str - buf;
  288. }
  289. static DEVICE_ATTR(aap_log, S_IRUGO, pm8001_ctl_aap_log_show, NULL);
  290. /**
  291. * pm8001_ctl_aap_log_show - IOP event log
  292. * @cdev: pointer to embedded class device
  293. * @buf: the buffer returned
  294. *
  295. * A sysfs 'read-only' shost attribute.
  296. */
  297. static ssize_t pm8001_ctl_iop_log_show(struct device *cdev,
  298. struct device_attribute *attr, char *buf)
  299. {
  300. struct Scsi_Host *shost = class_to_shost(cdev);
  301. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  302. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  303. #define IOP_MEMMAP(r, c) \
  304. (*(u32 *)((u8*)pm8001_ha->memoryMap.region[IOP].virt_ptr + (r) * 32 \
  305. + (c)))
  306. int i;
  307. char *str = buf;
  308. int max = 2;
  309. for (i = 0; i < max; i++) {
  310. str += sprintf(str, "0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x"
  311. "0x%08x 0x%08x\n",
  312. IOP_MEMMAP(i, 0),
  313. IOP_MEMMAP(i, 4),
  314. IOP_MEMMAP(i, 8),
  315. IOP_MEMMAP(i, 12),
  316. IOP_MEMMAP(i, 16),
  317. IOP_MEMMAP(i, 20),
  318. IOP_MEMMAP(i, 24),
  319. IOP_MEMMAP(i, 28));
  320. }
  321. return str - buf;
  322. }
  323. static DEVICE_ATTR(iop_log, S_IRUGO, pm8001_ctl_iop_log_show, NULL);
  324. #define FLASH_CMD_NONE 0x00
  325. #define FLASH_CMD_UPDATE 0x01
  326. #define FLASH_CMD_SET_NVMD 0x02
  327. struct flash_command {
  328. u8 command[8];
  329. int code;
  330. };
  331. static struct flash_command flash_command_table[] =
  332. {
  333. {"set_nvmd", FLASH_CMD_SET_NVMD},
  334. {"update", FLASH_CMD_UPDATE},
  335. {"", FLASH_CMD_NONE} /* Last entry should be NULL. */
  336. };
  337. struct error_fw {
  338. char *reason;
  339. int err_code;
  340. };
  341. static struct error_fw flash_error_table[] =
  342. {
  343. {"Failed to open fw image file", FAIL_OPEN_BIOS_FILE},
  344. {"image header mismatch", FLASH_UPDATE_HDR_ERR},
  345. {"image offset mismatch", FLASH_UPDATE_OFFSET_ERR},
  346. {"image CRC Error", FLASH_UPDATE_CRC_ERR},
  347. {"image length Error.", FLASH_UPDATE_LENGTH_ERR},
  348. {"Failed to program flash chip", FLASH_UPDATE_HW_ERR},
  349. {"Flash chip not supported.", FLASH_UPDATE_DNLD_NOT_SUPPORTED},
  350. {"Flash update disabled.", FLASH_UPDATE_DISABLED},
  351. {"Flash in progress", FLASH_IN_PROGRESS},
  352. {"Image file size Error", FAIL_FILE_SIZE},
  353. {"Input parameter error", FAIL_PARAMETERS},
  354. {"Out of memory", FAIL_OUT_MEMORY},
  355. {"OK", 0} /* Last entry err_code = 0. */
  356. };
  357. static int pm8001_set_nvmd(struct pm8001_hba_info *pm8001_ha)
  358. {
  359. struct pm8001_ioctl_payload *payload;
  360. DECLARE_COMPLETION_ONSTACK(completion);
  361. u8 *ioctlbuffer = NULL;
  362. u32 length = 0;
  363. u32 ret = 0;
  364. length = 1024 * 5 + sizeof(*payload) - 1;
  365. ioctlbuffer = kzalloc(length, GFP_KERNEL);
  366. if (!ioctlbuffer)
  367. return -ENOMEM;
  368. if ((pm8001_ha->fw_image->size <= 0) ||
  369. (pm8001_ha->fw_image->size > 4096)) {
  370. ret = FAIL_FILE_SIZE;
  371. goto out;
  372. }
  373. payload = (struct pm8001_ioctl_payload *)ioctlbuffer;
  374. memcpy((u8 *)&payload->func_specific, (u8 *)pm8001_ha->fw_image->data,
  375. pm8001_ha->fw_image->size);
  376. payload->length = pm8001_ha->fw_image->size;
  377. payload->id = 0;
  378. payload->minor_function = 0x1;
  379. pm8001_ha->nvmd_completion = &completion;
  380. ret = PM8001_CHIP_DISP->set_nvmd_req(pm8001_ha, payload);
  381. wait_for_completion(&completion);
  382. out:
  383. kfree(ioctlbuffer);
  384. return ret;
  385. }
  386. static int pm8001_update_flash(struct pm8001_hba_info *pm8001_ha)
  387. {
  388. struct pm8001_ioctl_payload *payload;
  389. DECLARE_COMPLETION_ONSTACK(completion);
  390. u8 *ioctlbuffer = NULL;
  391. u32 length = 0;
  392. struct fw_control_info *fwControl;
  393. u32 loopNumber, loopcount = 0;
  394. u32 sizeRead = 0;
  395. u32 partitionSize, partitionSizeTmp;
  396. u32 ret = 0;
  397. u32 partitionNumber = 0;
  398. struct pm8001_fw_image_header *image_hdr;
  399. length = 1024 * 16 + sizeof(*payload) - 1;
  400. ioctlbuffer = kzalloc(length, GFP_KERNEL);
  401. image_hdr = (struct pm8001_fw_image_header *)pm8001_ha->fw_image->data;
  402. if (!ioctlbuffer)
  403. return -ENOMEM;
  404. if (pm8001_ha->fw_image->size < 28) {
  405. ret = FAIL_FILE_SIZE;
  406. goto out;
  407. }
  408. while (sizeRead < pm8001_ha->fw_image->size) {
  409. partitionSizeTmp =
  410. *(u32 *)((u8 *)&image_hdr->image_length + sizeRead);
  411. partitionSize = be32_to_cpu(partitionSizeTmp);
  412. loopcount = (partitionSize + HEADER_LEN)/IOCTL_BUF_SIZE;
  413. if (loopcount % IOCTL_BUF_SIZE)
  414. loopcount++;
  415. if (loopcount == 0)
  416. loopcount++;
  417. for (loopNumber = 0; loopNumber < loopcount; loopNumber++) {
  418. payload = (struct pm8001_ioctl_payload *)ioctlbuffer;
  419. payload->length = 1024*16;
  420. payload->id = 0;
  421. fwControl =
  422. (struct fw_control_info *)&payload->func_specific;
  423. fwControl->len = IOCTL_BUF_SIZE; /* IN */
  424. fwControl->size = partitionSize + HEADER_LEN;/* IN */
  425. fwControl->retcode = 0;/* OUT */
  426. fwControl->offset = loopNumber * IOCTL_BUF_SIZE;/*OUT */
  427. /* for the last chunk of data in case file size is not even with
  428. 4k, load only the rest*/
  429. if (((loopcount-loopNumber) == 1) &&
  430. ((partitionSize + HEADER_LEN) % IOCTL_BUF_SIZE)) {
  431. fwControl->len =
  432. (partitionSize + HEADER_LEN) % IOCTL_BUF_SIZE;
  433. memcpy((u8 *)fwControl->buffer,
  434. (u8 *)pm8001_ha->fw_image->data + sizeRead,
  435. (partitionSize + HEADER_LEN) % IOCTL_BUF_SIZE);
  436. sizeRead +=
  437. (partitionSize + HEADER_LEN) % IOCTL_BUF_SIZE;
  438. } else {
  439. memcpy((u8 *)fwControl->buffer,
  440. (u8 *)pm8001_ha->fw_image->data + sizeRead,
  441. IOCTL_BUF_SIZE);
  442. sizeRead += IOCTL_BUF_SIZE;
  443. }
  444. pm8001_ha->nvmd_completion = &completion;
  445. ret = PM8001_CHIP_DISP->fw_flash_update_req(pm8001_ha, payload);
  446. wait_for_completion(&completion);
  447. if (ret || (fwControl->retcode > FLASH_UPDATE_IN_PROGRESS)) {
  448. ret = fwControl->retcode;
  449. kfree(ioctlbuffer);
  450. ioctlbuffer = NULL;
  451. break;
  452. }
  453. }
  454. if (ret)
  455. break;
  456. partitionNumber++;
  457. }
  458. out:
  459. kfree(ioctlbuffer);
  460. return ret;
  461. }
  462. static ssize_t pm8001_store_update_fw(struct device *cdev,
  463. struct device_attribute *attr,
  464. const char *buf, size_t count)
  465. {
  466. struct Scsi_Host *shost = class_to_shost(cdev);
  467. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  468. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  469. char *cmd_ptr, *filename_ptr;
  470. int res, i;
  471. int flash_command = FLASH_CMD_NONE;
  472. int err = 0;
  473. if (!capable(CAP_SYS_ADMIN))
  474. return -EACCES;
  475. cmd_ptr = kzalloc(count*2, GFP_KERNEL);
  476. if (!cmd_ptr) {
  477. err = FAIL_OUT_MEMORY;
  478. goto out;
  479. }
  480. filename_ptr = cmd_ptr + count;
  481. res = sscanf(buf, "%s %s", cmd_ptr, filename_ptr);
  482. if (res != 2) {
  483. err = FAIL_PARAMETERS;
  484. goto out1;
  485. }
  486. for (i = 0; flash_command_table[i].code != FLASH_CMD_NONE; i++) {
  487. if (!memcmp(flash_command_table[i].command,
  488. cmd_ptr, strlen(cmd_ptr))) {
  489. flash_command = flash_command_table[i].code;
  490. break;
  491. }
  492. }
  493. if (flash_command == FLASH_CMD_NONE) {
  494. err = FAIL_PARAMETERS;
  495. goto out1;
  496. }
  497. if (pm8001_ha->fw_status == FLASH_IN_PROGRESS) {
  498. err = FLASH_IN_PROGRESS;
  499. goto out1;
  500. }
  501. err = request_firmware(&pm8001_ha->fw_image,
  502. filename_ptr,
  503. pm8001_ha->dev);
  504. if (err) {
  505. PM8001_FAIL_DBG(pm8001_ha,
  506. pm8001_printk("Failed to load firmware image file %s,"
  507. " error %d\n", filename_ptr, err));
  508. err = FAIL_OPEN_BIOS_FILE;
  509. goto out1;
  510. }
  511. switch (flash_command) {
  512. case FLASH_CMD_UPDATE:
  513. pm8001_ha->fw_status = FLASH_IN_PROGRESS;
  514. err = pm8001_update_flash(pm8001_ha);
  515. break;
  516. case FLASH_CMD_SET_NVMD:
  517. pm8001_ha->fw_status = FLASH_IN_PROGRESS;
  518. err = pm8001_set_nvmd(pm8001_ha);
  519. break;
  520. default:
  521. pm8001_ha->fw_status = FAIL_PARAMETERS;
  522. err = FAIL_PARAMETERS;
  523. break;
  524. }
  525. release_firmware(pm8001_ha->fw_image);
  526. out1:
  527. kfree(cmd_ptr);
  528. out:
  529. pm8001_ha->fw_status = err;
  530. if (!err)
  531. return count;
  532. else
  533. return -err;
  534. }
  535. static ssize_t pm8001_show_update_fw(struct device *cdev,
  536. struct device_attribute *attr, char *buf)
  537. {
  538. int i;
  539. struct Scsi_Host *shost = class_to_shost(cdev);
  540. struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
  541. struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
  542. for (i = 0; flash_error_table[i].err_code != 0; i++) {
  543. if (flash_error_table[i].err_code == pm8001_ha->fw_status)
  544. break;
  545. }
  546. if (pm8001_ha->fw_status != FLASH_IN_PROGRESS)
  547. pm8001_ha->fw_status = FLASH_OK;
  548. return snprintf(buf, PAGE_SIZE, "status=%x %s\n",
  549. flash_error_table[i].err_code,
  550. flash_error_table[i].reason);
  551. }
  552. static DEVICE_ATTR(update_fw, S_IRUGO|S_IWUGO,
  553. pm8001_show_update_fw, pm8001_store_update_fw);
  554. struct device_attribute *pm8001_host_attrs[] = {
  555. &dev_attr_interface_rev,
  556. &dev_attr_fw_version,
  557. &dev_attr_update_fw,
  558. &dev_attr_aap_log,
  559. &dev_attr_iop_log,
  560. &dev_attr_max_out_io,
  561. &dev_attr_max_devices,
  562. &dev_attr_max_sg_list,
  563. &dev_attr_sas_spec_support,
  564. &dev_attr_logging_level,
  565. &dev_attr_host_sas_address,
  566. NULL,
  567. };