qdio.h 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427
  1. /*
  2. * Copyright IBM Corp. 2000, 2009
  3. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  4. * Jan Glauber <jang@linux.vnet.ibm.com>
  5. */
  6. #ifndef _CIO_QDIO_H
  7. #define _CIO_QDIO_H
  8. #include <asm/page.h>
  9. #include <asm/schid.h>
  10. #include <asm/debug.h>
  11. #include "chsc.h"
  12. #define QDIO_BUSY_BIT_PATIENCE (100 << 12) /* 100 microseconds */
  13. #define QDIO_BUSY_BIT_RETRY_DELAY 10 /* 10 milliseconds */
  14. #define QDIO_BUSY_BIT_RETRIES 1000 /* = 10s retry time */
  15. #define QDIO_INPUT_THRESHOLD (500 << 12) /* 500 microseconds */
  16. enum qdio_irq_states {
  17. QDIO_IRQ_STATE_INACTIVE,
  18. QDIO_IRQ_STATE_ESTABLISHED,
  19. QDIO_IRQ_STATE_ACTIVE,
  20. QDIO_IRQ_STATE_STOPPED,
  21. QDIO_IRQ_STATE_CLEANUP,
  22. QDIO_IRQ_STATE_ERR,
  23. NR_QDIO_IRQ_STATES,
  24. };
  25. /* used as intparm in do_IO */
  26. #define QDIO_DOING_ESTABLISH 1
  27. #define QDIO_DOING_ACTIVATE 2
  28. #define QDIO_DOING_CLEANUP 3
  29. #define SLSB_STATE_NOT_INIT 0x0
  30. #define SLSB_STATE_EMPTY 0x1
  31. #define SLSB_STATE_PRIMED 0x2
  32. #define SLSB_STATE_PENDING 0x3
  33. #define SLSB_STATE_HALTED 0xe
  34. #define SLSB_STATE_ERROR 0xf
  35. #define SLSB_TYPE_INPUT 0x0
  36. #define SLSB_TYPE_OUTPUT 0x20
  37. #define SLSB_OWNER_PROG 0x80
  38. #define SLSB_OWNER_CU 0x40
  39. #define SLSB_P_INPUT_NOT_INIT \
  40. (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT) /* 0x80 */
  41. #define SLSB_P_INPUT_ACK \
  42. (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x81 */
  43. #define SLSB_CU_INPUT_EMPTY \
  44. (SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x41 */
  45. #define SLSB_P_INPUT_PRIMED \
  46. (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED) /* 0x82 */
  47. #define SLSB_P_INPUT_HALTED \
  48. (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED) /* 0x8e */
  49. #define SLSB_P_INPUT_ERROR \
  50. (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR) /* 0x8f */
  51. #define SLSB_P_OUTPUT_NOT_INIT \
  52. (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT) /* 0xa0 */
  53. #define SLSB_P_OUTPUT_EMPTY \
  54. (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY) /* 0xa1 */
  55. #define SLSB_P_OUTPUT_PENDING \
  56. (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_PENDING) /* 0xa3 */
  57. #define SLSB_CU_OUTPUT_PRIMED \
  58. (SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED) /* 0x62 */
  59. #define SLSB_P_OUTPUT_HALTED \
  60. (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED) /* 0xae */
  61. #define SLSB_P_OUTPUT_ERROR \
  62. (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR) /* 0xaf */
  63. #define SLSB_ERROR_DURING_LOOKUP 0xff
  64. /* additional CIWs returned by extended Sense-ID */
  65. #define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */
  66. #define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */
  67. /* flags for st qdio sch data */
  68. #define CHSC_FLAG_QDIO_CAPABILITY 0x80
  69. #define CHSC_FLAG_VALIDITY 0x40
  70. /* SIGA flags */
  71. #define QDIO_SIGA_WRITE 0x00
  72. #define QDIO_SIGA_READ 0x01
  73. #define QDIO_SIGA_SYNC 0x02
  74. #define QDIO_SIGA_WRITEQ 0x04
  75. #define QDIO_SIGA_QEBSM_FLAG 0x80
  76. #ifdef CONFIG_64BIT
  77. static inline int do_sqbs(u64 token, unsigned char state, int queue,
  78. int *start, int *count)
  79. {
  80. register unsigned long _ccq asm ("0") = *count;
  81. register unsigned long _token asm ("1") = token;
  82. unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
  83. asm volatile(
  84. " .insn rsy,0xeb000000008A,%1,0,0(%2)"
  85. : "+d" (_ccq), "+d" (_queuestart)
  86. : "d" ((unsigned long)state), "d" (_token)
  87. : "memory", "cc");
  88. *count = _ccq & 0xff;
  89. *start = _queuestart & 0xff;
  90. return (_ccq >> 32) & 0xff;
  91. }
  92. static inline int do_eqbs(u64 token, unsigned char *state, int queue,
  93. int *start, int *count, int ack)
  94. {
  95. register unsigned long _ccq asm ("0") = *count;
  96. register unsigned long _token asm ("1") = token;
  97. unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
  98. unsigned long _state = (unsigned long)ack << 63;
  99. asm volatile(
  100. " .insn rrf,0xB99c0000,%1,%2,0,0"
  101. : "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
  102. : "d" (_token)
  103. : "memory", "cc");
  104. *count = _ccq & 0xff;
  105. *start = _queuestart & 0xff;
  106. *state = _state & 0xff;
  107. return (_ccq >> 32) & 0xff;
  108. }
  109. #else
  110. static inline int do_sqbs(u64 token, unsigned char state, int queue,
  111. int *start, int *count) { return 0; }
  112. static inline int do_eqbs(u64 token, unsigned char *state, int queue,
  113. int *start, int *count, int ack) { return 0; }
  114. #endif /* CONFIG_64BIT */
  115. struct qdio_irq;
  116. struct siga_flag {
  117. u8 input:1;
  118. u8 output:1;
  119. u8 sync:1;
  120. u8 sync_after_ai:1;
  121. u8 sync_out_after_pci:1;
  122. u8:3;
  123. } __attribute__ ((packed));
  124. struct qdio_dev_perf_stat {
  125. unsigned int adapter_int;
  126. unsigned int qdio_int;
  127. unsigned int pci_request_int;
  128. unsigned int tasklet_inbound;
  129. unsigned int tasklet_inbound_resched;
  130. unsigned int tasklet_inbound_resched2;
  131. unsigned int tasklet_outbound;
  132. unsigned int siga_read;
  133. unsigned int siga_write;
  134. unsigned int siga_sync;
  135. unsigned int inbound_call;
  136. unsigned int inbound_handler;
  137. unsigned int stop_polling;
  138. unsigned int inbound_queue_full;
  139. unsigned int outbound_call;
  140. unsigned int outbound_handler;
  141. unsigned int outbound_queue_full;
  142. unsigned int fast_requeue;
  143. unsigned int target_full;
  144. unsigned int eqbs;
  145. unsigned int eqbs_partial;
  146. unsigned int sqbs;
  147. unsigned int sqbs_partial;
  148. unsigned int int_discarded;
  149. } ____cacheline_aligned;
  150. struct qdio_queue_perf_stat {
  151. /*
  152. * Sorted into order-2 buckets: 1, 2-3, 4-7, ... 64-127, 128.
  153. * Since max. 127 SBALs are scanned reuse entry for 128 as queue full
  154. * aka 127 SBALs found.
  155. */
  156. unsigned int nr_sbals[8];
  157. unsigned int nr_sbal_error;
  158. unsigned int nr_sbal_nop;
  159. unsigned int nr_sbal_total;
  160. };
  161. enum qdio_queue_irq_states {
  162. QDIO_QUEUE_IRQS_DISABLED,
  163. };
  164. struct qdio_input_q {
  165. /* input buffer acknowledgement flag */
  166. int polling;
  167. /* first ACK'ed buffer */
  168. int ack_start;
  169. /* how much sbals are acknowledged with qebsm */
  170. int ack_count;
  171. /* last time of noticing incoming data */
  172. u64 timestamp;
  173. /* upper-layer polling flag */
  174. unsigned long queue_irq_state;
  175. /* callback to start upper-layer polling */
  176. void (*queue_start_poll) (struct ccw_device *, int, unsigned long);
  177. };
  178. struct qdio_output_q {
  179. /* PCIs are enabled for the queue */
  180. int pci_out_enabled;
  181. /* cq: use asynchronous output buffers */
  182. int use_cq;
  183. /* cq: aobs used for particual SBAL */
  184. struct qaob **aobs;
  185. /* cq: sbal state related to asynchronous operation */
  186. struct qdio_outbuf_state *sbal_state;
  187. /* timer to check for more outbound work */
  188. struct timer_list timer;
  189. /* used SBALs before tasklet schedule */
  190. int scan_threshold;
  191. };
  192. /*
  193. * Note on cache alignment: grouped slsb and write mostly data at the beginning
  194. * sbal[] is read-only and starts on a new cacheline followed by read mostly.
  195. */
  196. struct qdio_q {
  197. struct slsb slsb;
  198. union {
  199. struct qdio_input_q in;
  200. struct qdio_output_q out;
  201. } u;
  202. /*
  203. * inbound: next buffer the program should check for
  204. * outbound: next buffer to check if adapter processed it
  205. */
  206. int first_to_check;
  207. /* first_to_check of the last time */
  208. int last_move;
  209. /* beginning position for calling the program */
  210. int first_to_kick;
  211. /* number of buffers in use by the adapter */
  212. atomic_t nr_buf_used;
  213. /* error condition during a data transfer */
  214. unsigned int qdio_error;
  215. /* last scan of the queue */
  216. u64 timestamp;
  217. struct tasklet_struct tasklet;
  218. struct qdio_queue_perf_stat q_stats;
  219. struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q] ____cacheline_aligned;
  220. /* queue number */
  221. int nr;
  222. /* bitmask of queue number */
  223. int mask;
  224. /* input or output queue */
  225. int is_input_q;
  226. /* list of thinint input queues */
  227. struct list_head entry;
  228. /* upper-layer program handler */
  229. qdio_handler_t (*handler);
  230. struct dentry *debugfs_q;
  231. struct qdio_irq *irq_ptr;
  232. struct sl *sl;
  233. /*
  234. * A page is allocated under this pointer and used for slib and sl.
  235. * slib is 2048 bytes big and sl points to offset PAGE_SIZE / 2.
  236. */
  237. struct slib *slib;
  238. } __attribute__ ((aligned(256)));
  239. struct qdio_irq {
  240. struct qib qib;
  241. u32 *dsci; /* address of device state change indicator */
  242. struct ccw_device *cdev;
  243. struct dentry *debugfs_dev;
  244. struct dentry *debugfs_perf;
  245. unsigned long int_parm;
  246. struct subchannel_id schid;
  247. unsigned long sch_token; /* QEBSM facility */
  248. enum qdio_irq_states state;
  249. struct siga_flag siga_flag; /* siga sync information from qdioac */
  250. int nr_input_qs;
  251. int nr_output_qs;
  252. struct ccw1 ccw;
  253. struct ciw equeue;
  254. struct ciw aqueue;
  255. struct qdio_ssqd_desc ssqd_desc;
  256. void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *);
  257. int perf_stat_enabled;
  258. struct qdr *qdr;
  259. unsigned long chsc_page;
  260. struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
  261. struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
  262. debug_info_t *debug_area;
  263. struct mutex setup_mutex;
  264. struct qdio_dev_perf_stat perf_stat;
  265. };
  266. /* helper functions */
  267. #define queue_type(q) q->irq_ptr->qib.qfmt
  268. #define SCH_NO(q) (q->irq_ptr->schid.sch_no)
  269. #define is_thinint_irq(irq) \
  270. (irq->qib.qfmt == QDIO_IQDIO_QFMT || \
  271. css_general_characteristics.aif_osa)
  272. #define qperf(__qdev, __attr) ((__qdev)->perf_stat.(__attr))
  273. #define qperf_inc(__q, __attr) \
  274. ({ \
  275. struct qdio_irq *qdev = (__q)->irq_ptr; \
  276. if (qdev->perf_stat_enabled) \
  277. (qdev->perf_stat.__attr)++; \
  278. })
  279. static inline void account_sbals_error(struct qdio_q *q, int count)
  280. {
  281. q->q_stats.nr_sbal_error += count;
  282. q->q_stats.nr_sbal_total += count;
  283. }
  284. /* the highest iqdio queue is used for multicast */
  285. static inline int multicast_outbound(struct qdio_q *q)
  286. {
  287. return (q->irq_ptr->nr_output_qs > 1) &&
  288. (q->nr == q->irq_ptr->nr_output_qs - 1);
  289. }
  290. #define pci_out_supported(q) \
  291. (q->irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)
  292. #define is_qebsm(q) (q->irq_ptr->sch_token != 0)
  293. #define need_siga_in(q) (q->irq_ptr->siga_flag.input)
  294. #define need_siga_out(q) (q->irq_ptr->siga_flag.output)
  295. #define need_siga_sync(q) (unlikely(q->irq_ptr->siga_flag.sync))
  296. #define need_siga_sync_after_ai(q) \
  297. (unlikely(q->irq_ptr->siga_flag.sync_after_ai))
  298. #define need_siga_sync_out_after_pci(q) \
  299. (unlikely(q->irq_ptr->siga_flag.sync_out_after_pci))
  300. #define for_each_input_queue(irq_ptr, q, i) \
  301. for (i = 0, q = irq_ptr->input_qs[0]; \
  302. i < irq_ptr->nr_input_qs; \
  303. q = irq_ptr->input_qs[++i])
  304. #define for_each_output_queue(irq_ptr, q, i) \
  305. for (i = 0, q = irq_ptr->output_qs[0]; \
  306. i < irq_ptr->nr_output_qs; \
  307. q = irq_ptr->output_qs[++i])
  308. #define prev_buf(bufnr) \
  309. ((bufnr + QDIO_MAX_BUFFERS_MASK) & QDIO_MAX_BUFFERS_MASK)
  310. #define next_buf(bufnr) \
  311. ((bufnr + 1) & QDIO_MAX_BUFFERS_MASK)
  312. #define add_buf(bufnr, inc) \
  313. ((bufnr + inc) & QDIO_MAX_BUFFERS_MASK)
  314. #define sub_buf(bufnr, dec) \
  315. ((bufnr - dec) & QDIO_MAX_BUFFERS_MASK)
  316. #define queue_irqs_enabled(q) \
  317. (test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) == 0)
  318. #define queue_irqs_disabled(q) \
  319. (test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) != 0)
  320. extern u64 last_ai_time;
  321. /* prototypes for thin interrupt */
  322. void qdio_setup_thinint(struct qdio_irq *irq_ptr);
  323. int qdio_establish_thinint(struct qdio_irq *irq_ptr);
  324. void qdio_shutdown_thinint(struct qdio_irq *irq_ptr);
  325. void tiqdio_add_input_queues(struct qdio_irq *irq_ptr);
  326. void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr);
  327. void tiqdio_inbound_processing(unsigned long q);
  328. int tiqdio_allocate_memory(void);
  329. void tiqdio_free_memory(void);
  330. int tiqdio_register_thinints(void);
  331. void tiqdio_unregister_thinints(void);
  332. void clear_nonshared_ind(struct qdio_irq *);
  333. int test_nonshared_ind(struct qdio_irq *);
  334. /* prototypes for setup */
  335. void qdio_inbound_processing(unsigned long data);
  336. void qdio_outbound_processing(unsigned long data);
  337. void qdio_outbound_timer(unsigned long data);
  338. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  339. struct irb *irb);
  340. int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs,
  341. int nr_output_qs);
  342. void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr);
  343. int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
  344. struct subchannel_id *schid,
  345. struct qdio_ssqd_desc *data);
  346. int qdio_setup_irq(struct qdio_initialize *init_data);
  347. void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
  348. struct ccw_device *cdev);
  349. void qdio_release_memory(struct qdio_irq *irq_ptr);
  350. int qdio_setup_create_sysfs(struct ccw_device *cdev);
  351. void qdio_setup_destroy_sysfs(struct ccw_device *cdev);
  352. int qdio_setup_init(void);
  353. void qdio_setup_exit(void);
  354. int qdio_enable_async_operation(struct qdio_output_q *q);
  355. void qdio_disable_async_operation(struct qdio_output_q *q);
  356. struct qaob *qdio_allocate_aob(void);
  357. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  358. unsigned char *state);
  359. #endif /* _CIO_QDIO_H */