pinctrl-samsung.c 32 KB

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  1. /*
  2. * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. * Copyright (c) 2012 Linaro Ltd
  7. * http://www.linaro.org
  8. *
  9. * Author: Thomas Abraham <thomas.ab@samsung.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This driver implements the Samsung pinctrl driver. It supports setting up of
  17. * pinmux and pinconf configurations. The gpiolib interface is also included.
  18. * External interrupt (gpio and wakeup) support are not included in this driver
  19. * but provides extensions to which platform specific implementation of the gpio
  20. * and wakeup interrupts can be hooked to.
  21. */
  22. #include <linux/module.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <linux/slab.h>
  26. #include <linux/err.h>
  27. #include <linux/gpio.h>
  28. #include <linux/irqdomain.h>
  29. #include <linux/spinlock.h>
  30. #include <linux/syscore_ops.h>
  31. #include "core.h"
  32. #include "pinctrl-samsung.h"
  33. #define GROUP_SUFFIX "-grp"
  34. #define GSUFFIX_LEN sizeof(GROUP_SUFFIX)
  35. #define FUNCTION_SUFFIX "-mux"
  36. #define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX)
  37. /* list of all possible config options supported */
  38. static struct pin_config {
  39. char *prop_cfg;
  40. unsigned int cfg_type;
  41. } pcfgs[] = {
  42. { "samsung,pin-pud", PINCFG_TYPE_PUD },
  43. { "samsung,pin-drv", PINCFG_TYPE_DRV },
  44. { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
  45. { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
  46. };
  47. /* Global list of devices (struct samsung_pinctrl_drv_data) */
  48. static LIST_HEAD(drvdata_list);
  49. static unsigned int pin_base;
  50. static inline struct samsung_pin_bank *gc_to_pin_bank(struct gpio_chip *gc)
  51. {
  52. return container_of(gc, struct samsung_pin_bank, gpio_chip);
  53. }
  54. /* check if the selector is a valid pin group selector */
  55. static int samsung_get_group_count(struct pinctrl_dev *pctldev)
  56. {
  57. struct samsung_pinctrl_drv_data *drvdata;
  58. drvdata = pinctrl_dev_get_drvdata(pctldev);
  59. return drvdata->nr_groups;
  60. }
  61. /* return the name of the group selected by the group selector */
  62. static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
  63. unsigned selector)
  64. {
  65. struct samsung_pinctrl_drv_data *drvdata;
  66. drvdata = pinctrl_dev_get_drvdata(pctldev);
  67. return drvdata->pin_groups[selector].name;
  68. }
  69. /* return the pin numbers associated with the specified group */
  70. static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
  71. unsigned selector, const unsigned **pins, unsigned *num_pins)
  72. {
  73. struct samsung_pinctrl_drv_data *drvdata;
  74. drvdata = pinctrl_dev_get_drvdata(pctldev);
  75. *pins = drvdata->pin_groups[selector].pins;
  76. *num_pins = drvdata->pin_groups[selector].num_pins;
  77. return 0;
  78. }
  79. /* create pinctrl_map entries by parsing device tree nodes */
  80. static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
  81. struct device_node *np, struct pinctrl_map **maps,
  82. unsigned *nmaps)
  83. {
  84. struct device *dev = pctldev->dev;
  85. struct pinctrl_map *map;
  86. unsigned long *cfg = NULL;
  87. char *gname, *fname;
  88. int cfg_cnt = 0, map_cnt = 0, idx = 0;
  89. /* count the number of config options specfied in the node */
  90. for (idx = 0; idx < ARRAY_SIZE(pcfgs); idx++) {
  91. if (of_find_property(np, pcfgs[idx].prop_cfg, NULL))
  92. cfg_cnt++;
  93. }
  94. /*
  95. * Find out the number of map entries to create. All the config options
  96. * can be accomadated into a single config map entry.
  97. */
  98. if (cfg_cnt)
  99. map_cnt = 1;
  100. if (of_find_property(np, "samsung,pin-function", NULL))
  101. map_cnt++;
  102. if (!map_cnt) {
  103. dev_err(dev, "node %s does not have either config or function "
  104. "configurations\n", np->name);
  105. return -EINVAL;
  106. }
  107. /* Allocate memory for pin-map entries */
  108. map = kzalloc(sizeof(*map) * map_cnt, GFP_KERNEL);
  109. if (!map) {
  110. dev_err(dev, "could not alloc memory for pin-maps\n");
  111. return -ENOMEM;
  112. }
  113. *nmaps = 0;
  114. /*
  115. * Allocate memory for pin group name. The pin group name is derived
  116. * from the node name from which these map entries are be created.
  117. */
  118. gname = kzalloc(strlen(np->name) + GSUFFIX_LEN, GFP_KERNEL);
  119. if (!gname) {
  120. dev_err(dev, "failed to alloc memory for group name\n");
  121. goto free_map;
  122. }
  123. sprintf(gname, "%s%s", np->name, GROUP_SUFFIX);
  124. /*
  125. * don't have config options? then skip over to creating function
  126. * map entries.
  127. */
  128. if (!cfg_cnt)
  129. goto skip_cfgs;
  130. /* Allocate memory for config entries */
  131. cfg = kzalloc(sizeof(*cfg) * cfg_cnt, GFP_KERNEL);
  132. if (!cfg) {
  133. dev_err(dev, "failed to alloc memory for configs\n");
  134. goto free_gname;
  135. }
  136. /* Prepare a list of config settings */
  137. for (idx = 0, cfg_cnt = 0; idx < ARRAY_SIZE(pcfgs); idx++) {
  138. u32 value;
  139. if (!of_property_read_u32(np, pcfgs[idx].prop_cfg, &value))
  140. cfg[cfg_cnt++] =
  141. PINCFG_PACK(pcfgs[idx].cfg_type, value);
  142. }
  143. /* create the config map entry */
  144. map[*nmaps].data.configs.group_or_pin = gname;
  145. map[*nmaps].data.configs.configs = cfg;
  146. map[*nmaps].data.configs.num_configs = cfg_cnt;
  147. map[*nmaps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
  148. *nmaps += 1;
  149. skip_cfgs:
  150. /* create the function map entry */
  151. if (of_find_property(np, "samsung,pin-function", NULL)) {
  152. fname = kzalloc(strlen(np->name) + FSUFFIX_LEN, GFP_KERNEL);
  153. if (!fname) {
  154. dev_err(dev, "failed to alloc memory for func name\n");
  155. goto free_cfg;
  156. }
  157. sprintf(fname, "%s%s", np->name, FUNCTION_SUFFIX);
  158. map[*nmaps].data.mux.group = gname;
  159. map[*nmaps].data.mux.function = fname;
  160. map[*nmaps].type = PIN_MAP_TYPE_MUX_GROUP;
  161. *nmaps += 1;
  162. }
  163. *maps = map;
  164. return 0;
  165. free_cfg:
  166. kfree(cfg);
  167. free_gname:
  168. kfree(gname);
  169. free_map:
  170. kfree(map);
  171. return -ENOMEM;
  172. }
  173. /* free the memory allocated to hold the pin-map table */
  174. static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
  175. struct pinctrl_map *map, unsigned num_maps)
  176. {
  177. int idx;
  178. for (idx = 0; idx < num_maps; idx++) {
  179. if (map[idx].type == PIN_MAP_TYPE_MUX_GROUP) {
  180. kfree(map[idx].data.mux.function);
  181. if (!idx)
  182. kfree(map[idx].data.mux.group);
  183. } else if (map->type == PIN_MAP_TYPE_CONFIGS_GROUP) {
  184. kfree(map[idx].data.configs.configs);
  185. if (!idx)
  186. kfree(map[idx].data.configs.group_or_pin);
  187. }
  188. };
  189. kfree(map);
  190. }
  191. /* list of pinctrl callbacks for the pinctrl core */
  192. static const struct pinctrl_ops samsung_pctrl_ops = {
  193. .get_groups_count = samsung_get_group_count,
  194. .get_group_name = samsung_get_group_name,
  195. .get_group_pins = samsung_get_group_pins,
  196. .dt_node_to_map = samsung_dt_node_to_map,
  197. .dt_free_map = samsung_dt_free_map,
  198. };
  199. /* check if the selector is a valid pin function selector */
  200. static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
  201. {
  202. struct samsung_pinctrl_drv_data *drvdata;
  203. drvdata = pinctrl_dev_get_drvdata(pctldev);
  204. return drvdata->nr_functions;
  205. }
  206. /* return the name of the pin function specified */
  207. static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
  208. unsigned selector)
  209. {
  210. struct samsung_pinctrl_drv_data *drvdata;
  211. drvdata = pinctrl_dev_get_drvdata(pctldev);
  212. return drvdata->pmx_functions[selector].name;
  213. }
  214. /* return the groups associated for the specified function selector */
  215. static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
  216. unsigned selector, const char * const **groups,
  217. unsigned * const num_groups)
  218. {
  219. struct samsung_pinctrl_drv_data *drvdata;
  220. drvdata = pinctrl_dev_get_drvdata(pctldev);
  221. *groups = drvdata->pmx_functions[selector].groups;
  222. *num_groups = drvdata->pmx_functions[selector].num_groups;
  223. return 0;
  224. }
  225. /*
  226. * given a pin number that is local to a pin controller, find out the pin bank
  227. * and the register base of the pin bank.
  228. */
  229. static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
  230. unsigned pin, void __iomem **reg, u32 *offset,
  231. struct samsung_pin_bank **bank)
  232. {
  233. struct samsung_pin_bank *b;
  234. b = drvdata->ctrl->pin_banks;
  235. while ((pin >= b->pin_base) &&
  236. ((b->pin_base + b->nr_pins - 1) < pin))
  237. b++;
  238. *reg = drvdata->virt_base + b->pctl_offset;
  239. *offset = pin - b->pin_base;
  240. if (bank)
  241. *bank = b;
  242. }
  243. /* enable or disable a pinmux function */
  244. static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
  245. unsigned group, bool enable)
  246. {
  247. struct samsung_pinctrl_drv_data *drvdata;
  248. const unsigned int *pins;
  249. struct samsung_pin_bank *bank;
  250. void __iomem *reg;
  251. u32 mask, shift, data, pin_offset, cnt;
  252. unsigned long flags;
  253. drvdata = pinctrl_dev_get_drvdata(pctldev);
  254. pins = drvdata->pin_groups[group].pins;
  255. /*
  256. * for each pin in the pin group selected, program the correspoding pin
  257. * pin function number in the config register.
  258. */
  259. for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) {
  260. struct samsung_pin_bank_type *type;
  261. pin_to_reg_bank(drvdata, pins[cnt] - drvdata->ctrl->base,
  262. &reg, &pin_offset, &bank);
  263. type = bank->type;
  264. mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
  265. shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
  266. if (shift >= 32) {
  267. /* Some banks have two config registers */
  268. shift -= 32;
  269. reg += 4;
  270. }
  271. spin_lock_irqsave(&bank->slock, flags);
  272. data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
  273. data &= ~(mask << shift);
  274. if (enable)
  275. data |= drvdata->pin_groups[group].func << shift;
  276. writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
  277. spin_unlock_irqrestore(&bank->slock, flags);
  278. }
  279. }
  280. /* enable a specified pinmux by writing to registers */
  281. static int samsung_pinmux_enable(struct pinctrl_dev *pctldev, unsigned selector,
  282. unsigned group)
  283. {
  284. samsung_pinmux_setup(pctldev, selector, group, true);
  285. return 0;
  286. }
  287. /* disable a specified pinmux by writing to registers */
  288. static void samsung_pinmux_disable(struct pinctrl_dev *pctldev,
  289. unsigned selector, unsigned group)
  290. {
  291. samsung_pinmux_setup(pctldev, selector, group, false);
  292. }
  293. /*
  294. * The calls to gpio_direction_output() and gpio_direction_input()
  295. * leads to this function call (via the pinctrl_gpio_direction_{input|output}()
  296. * function called from the gpiolib interface).
  297. */
  298. static int samsung_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
  299. struct pinctrl_gpio_range *range, unsigned offset, bool input)
  300. {
  301. struct samsung_pin_bank_type *type;
  302. struct samsung_pin_bank *bank;
  303. struct samsung_pinctrl_drv_data *drvdata;
  304. void __iomem *reg;
  305. u32 data, pin_offset, mask, shift;
  306. unsigned long flags;
  307. bank = gc_to_pin_bank(range->gc);
  308. type = bank->type;
  309. drvdata = pinctrl_dev_get_drvdata(pctldev);
  310. pin_offset = offset - bank->pin_base;
  311. reg = drvdata->virt_base + bank->pctl_offset +
  312. type->reg_offset[PINCFG_TYPE_FUNC];
  313. mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
  314. shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
  315. if (shift >= 32) {
  316. /* Some banks have two config registers */
  317. shift -= 32;
  318. reg += 4;
  319. }
  320. spin_lock_irqsave(&bank->slock, flags);
  321. data = readl(reg);
  322. data &= ~(mask << shift);
  323. if (!input)
  324. data |= FUNC_OUTPUT << shift;
  325. writel(data, reg);
  326. spin_unlock_irqrestore(&bank->slock, flags);
  327. return 0;
  328. }
  329. /* list of pinmux callbacks for the pinmux vertical in pinctrl core */
  330. static const struct pinmux_ops samsung_pinmux_ops = {
  331. .get_functions_count = samsung_get_functions_count,
  332. .get_function_name = samsung_pinmux_get_fname,
  333. .get_function_groups = samsung_pinmux_get_groups,
  334. .enable = samsung_pinmux_enable,
  335. .disable = samsung_pinmux_disable,
  336. .gpio_set_direction = samsung_pinmux_gpio_set_direction,
  337. };
  338. /* set or get the pin config settings for a specified pin */
  339. static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
  340. unsigned long *config, bool set)
  341. {
  342. struct samsung_pinctrl_drv_data *drvdata;
  343. struct samsung_pin_bank_type *type;
  344. struct samsung_pin_bank *bank;
  345. void __iomem *reg_base;
  346. enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
  347. u32 data, width, pin_offset, mask, shift;
  348. u32 cfg_value, cfg_reg;
  349. unsigned long flags;
  350. drvdata = pinctrl_dev_get_drvdata(pctldev);
  351. pin_to_reg_bank(drvdata, pin - drvdata->ctrl->base, &reg_base,
  352. &pin_offset, &bank);
  353. type = bank->type;
  354. if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
  355. return -EINVAL;
  356. width = type->fld_width[cfg_type];
  357. cfg_reg = type->reg_offset[cfg_type];
  358. spin_lock_irqsave(&bank->slock, flags);
  359. mask = (1 << width) - 1;
  360. shift = pin_offset * width;
  361. data = readl(reg_base + cfg_reg);
  362. if (set) {
  363. cfg_value = PINCFG_UNPACK_VALUE(*config);
  364. data &= ~(mask << shift);
  365. data |= (cfg_value << shift);
  366. writel(data, reg_base + cfg_reg);
  367. } else {
  368. data >>= shift;
  369. data &= mask;
  370. *config = PINCFG_PACK(cfg_type, data);
  371. }
  372. spin_unlock_irqrestore(&bank->slock, flags);
  373. return 0;
  374. }
  375. /* set the pin config settings for a specified pin */
  376. static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
  377. unsigned long *configs, unsigned num_configs)
  378. {
  379. int i, ret;
  380. for (i = 0; i < num_configs; i++) {
  381. ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true);
  382. if (ret < 0)
  383. return ret;
  384. } /* for each config */
  385. return 0;
  386. }
  387. /* get the pin config settings for a specified pin */
  388. static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
  389. unsigned long *config)
  390. {
  391. return samsung_pinconf_rw(pctldev, pin, config, false);
  392. }
  393. /* set the pin config settings for a specified pin group */
  394. static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
  395. unsigned group, unsigned long *configs,
  396. unsigned num_configs)
  397. {
  398. struct samsung_pinctrl_drv_data *drvdata;
  399. const unsigned int *pins;
  400. unsigned int cnt;
  401. drvdata = pinctrl_dev_get_drvdata(pctldev);
  402. pins = drvdata->pin_groups[group].pins;
  403. for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
  404. samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs);
  405. return 0;
  406. }
  407. /* get the pin config settings for a specified pin group */
  408. static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
  409. unsigned int group, unsigned long *config)
  410. {
  411. struct samsung_pinctrl_drv_data *drvdata;
  412. const unsigned int *pins;
  413. drvdata = pinctrl_dev_get_drvdata(pctldev);
  414. pins = drvdata->pin_groups[group].pins;
  415. samsung_pinconf_get(pctldev, pins[0], config);
  416. return 0;
  417. }
  418. /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
  419. static const struct pinconf_ops samsung_pinconf_ops = {
  420. .pin_config_get = samsung_pinconf_get,
  421. .pin_config_set = samsung_pinconf_set,
  422. .pin_config_group_get = samsung_pinconf_group_get,
  423. .pin_config_group_set = samsung_pinconf_group_set,
  424. };
  425. /* gpiolib gpio_set callback function */
  426. static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
  427. {
  428. struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
  429. struct samsung_pin_bank_type *type = bank->type;
  430. unsigned long flags;
  431. void __iomem *reg;
  432. u32 data;
  433. reg = bank->drvdata->virt_base + bank->pctl_offset;
  434. spin_lock_irqsave(&bank->slock, flags);
  435. data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
  436. data &= ~(1 << offset);
  437. if (value)
  438. data |= 1 << offset;
  439. writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
  440. spin_unlock_irqrestore(&bank->slock, flags);
  441. }
  442. /* gpiolib gpio_get callback function */
  443. static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
  444. {
  445. void __iomem *reg;
  446. u32 data;
  447. struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
  448. struct samsung_pin_bank_type *type = bank->type;
  449. reg = bank->drvdata->virt_base + bank->pctl_offset;
  450. data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
  451. data >>= offset;
  452. data &= 1;
  453. return data;
  454. }
  455. /*
  456. * gpiolib gpio_direction_input callback function. The setting of the pin
  457. * mux function as 'gpio input' will be handled by the pinctrl susbsystem
  458. * interface.
  459. */
  460. static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
  461. {
  462. return pinctrl_gpio_direction_input(gc->base + offset);
  463. }
  464. /*
  465. * gpiolib gpio_direction_output callback function. The setting of the pin
  466. * mux function as 'gpio output' will be handled by the pinctrl susbsystem
  467. * interface.
  468. */
  469. static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
  470. int value)
  471. {
  472. samsung_gpio_set(gc, offset, value);
  473. return pinctrl_gpio_direction_output(gc->base + offset);
  474. }
  475. /*
  476. * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
  477. * and a virtual IRQ, if not already present.
  478. */
  479. static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
  480. {
  481. struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
  482. unsigned int virq;
  483. if (!bank->irq_domain)
  484. return -ENXIO;
  485. virq = irq_create_mapping(bank->irq_domain, offset);
  486. return (virq) ? : -ENXIO;
  487. }
  488. /*
  489. * Parse the pin names listed in the 'samsung,pins' property and convert it
  490. * into a list of gpio numbers are create a pin group from it.
  491. */
  492. static int samsung_pinctrl_parse_dt_pins(struct platform_device *pdev,
  493. struct device_node *cfg_np,
  494. struct pinctrl_desc *pctl,
  495. unsigned int **pin_list,
  496. unsigned int *npins)
  497. {
  498. struct device *dev = &pdev->dev;
  499. struct property *prop;
  500. struct pinctrl_pin_desc const *pdesc = pctl->pins;
  501. unsigned int idx = 0, cnt;
  502. const char *pin_name;
  503. *npins = of_property_count_strings(cfg_np, "samsung,pins");
  504. if (IS_ERR_VALUE(*npins)) {
  505. dev_err(dev, "invalid pin list in %s node", cfg_np->name);
  506. return -EINVAL;
  507. }
  508. *pin_list = devm_kzalloc(dev, *npins * sizeof(**pin_list), GFP_KERNEL);
  509. if (!*pin_list) {
  510. dev_err(dev, "failed to allocate memory for pin list\n");
  511. return -ENOMEM;
  512. }
  513. of_property_for_each_string(cfg_np, "samsung,pins", prop, pin_name) {
  514. for (cnt = 0; cnt < pctl->npins; cnt++) {
  515. if (pdesc[cnt].name) {
  516. if (!strcmp(pin_name, pdesc[cnt].name)) {
  517. (*pin_list)[idx++] = pdesc[cnt].number;
  518. break;
  519. }
  520. }
  521. }
  522. if (cnt == pctl->npins) {
  523. dev_err(dev, "pin %s not valid in %s node\n",
  524. pin_name, cfg_np->name);
  525. devm_kfree(dev, *pin_list);
  526. return -EINVAL;
  527. }
  528. }
  529. return 0;
  530. }
  531. /*
  532. * Parse the information about all the available pin groups and pin functions
  533. * from device node of the pin-controller. A pin group is formed with all
  534. * the pins listed in the "samsung,pins" property.
  535. */
  536. static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
  537. struct samsung_pinctrl_drv_data *drvdata)
  538. {
  539. struct device *dev = &pdev->dev;
  540. struct device_node *dev_np = dev->of_node;
  541. struct device_node *cfg_np;
  542. struct samsung_pin_group *groups, *grp;
  543. struct samsung_pmx_func *functions, *func;
  544. unsigned *pin_list;
  545. unsigned int npins, grp_cnt, func_idx = 0;
  546. char *gname, *fname;
  547. int ret;
  548. grp_cnt = of_get_child_count(dev_np);
  549. if (!grp_cnt)
  550. return -EINVAL;
  551. groups = devm_kzalloc(dev, grp_cnt * sizeof(*groups), GFP_KERNEL);
  552. if (!groups) {
  553. dev_err(dev, "failed allocate memory for ping group list\n");
  554. return -EINVAL;
  555. }
  556. grp = groups;
  557. functions = devm_kzalloc(dev, grp_cnt * sizeof(*functions), GFP_KERNEL);
  558. if (!functions) {
  559. dev_err(dev, "failed to allocate memory for function list\n");
  560. return -EINVAL;
  561. }
  562. func = functions;
  563. /*
  564. * Iterate over all the child nodes of the pin controller node
  565. * and create pin groups and pin function lists.
  566. */
  567. for_each_child_of_node(dev_np, cfg_np) {
  568. u32 function;
  569. if (!of_find_property(cfg_np, "samsung,pins", NULL))
  570. continue;
  571. ret = samsung_pinctrl_parse_dt_pins(pdev, cfg_np,
  572. &drvdata->pctl, &pin_list, &npins);
  573. if (ret)
  574. return ret;
  575. /* derive pin group name from the node name */
  576. gname = devm_kzalloc(dev, strlen(cfg_np->name) + GSUFFIX_LEN,
  577. GFP_KERNEL);
  578. if (!gname) {
  579. dev_err(dev, "failed to alloc memory for group name\n");
  580. return -ENOMEM;
  581. }
  582. sprintf(gname, "%s%s", cfg_np->name, GROUP_SUFFIX);
  583. grp->name = gname;
  584. grp->pins = pin_list;
  585. grp->num_pins = npins;
  586. of_property_read_u32(cfg_np, "samsung,pin-function", &function);
  587. grp->func = function;
  588. grp++;
  589. if (!of_find_property(cfg_np, "samsung,pin-function", NULL))
  590. continue;
  591. /* derive function name from the node name */
  592. fname = devm_kzalloc(dev, strlen(cfg_np->name) + FSUFFIX_LEN,
  593. GFP_KERNEL);
  594. if (!fname) {
  595. dev_err(dev, "failed to alloc memory for func name\n");
  596. return -ENOMEM;
  597. }
  598. sprintf(fname, "%s%s", cfg_np->name, FUNCTION_SUFFIX);
  599. func->name = fname;
  600. func->groups = devm_kzalloc(dev, sizeof(char *), GFP_KERNEL);
  601. if (!func->groups) {
  602. dev_err(dev, "failed to alloc memory for group list "
  603. "in pin function");
  604. return -ENOMEM;
  605. }
  606. func->groups[0] = gname;
  607. func->num_groups = 1;
  608. func++;
  609. func_idx++;
  610. }
  611. drvdata->pin_groups = groups;
  612. drvdata->nr_groups = grp_cnt;
  613. drvdata->pmx_functions = functions;
  614. drvdata->nr_functions = func_idx;
  615. return 0;
  616. }
  617. /* register the pinctrl interface with the pinctrl subsystem */
  618. static int samsung_pinctrl_register(struct platform_device *pdev,
  619. struct samsung_pinctrl_drv_data *drvdata)
  620. {
  621. struct pinctrl_desc *ctrldesc = &drvdata->pctl;
  622. struct pinctrl_pin_desc *pindesc, *pdesc;
  623. struct samsung_pin_bank *pin_bank;
  624. char *pin_names;
  625. int pin, bank, ret;
  626. ctrldesc->name = "samsung-pinctrl";
  627. ctrldesc->owner = THIS_MODULE;
  628. ctrldesc->pctlops = &samsung_pctrl_ops;
  629. ctrldesc->pmxops = &samsung_pinmux_ops;
  630. ctrldesc->confops = &samsung_pinconf_ops;
  631. pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
  632. drvdata->ctrl->nr_pins, GFP_KERNEL);
  633. if (!pindesc) {
  634. dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n");
  635. return -ENOMEM;
  636. }
  637. ctrldesc->pins = pindesc;
  638. ctrldesc->npins = drvdata->ctrl->nr_pins;
  639. /* dynamically populate the pin number and pin name for pindesc */
  640. for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
  641. pdesc->number = pin + drvdata->ctrl->base;
  642. /*
  643. * allocate space for storing the dynamically generated names for all
  644. * the pins which belong to this pin-controller.
  645. */
  646. pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH *
  647. drvdata->ctrl->nr_pins, GFP_KERNEL);
  648. if (!pin_names) {
  649. dev_err(&pdev->dev, "mem alloc for pin names failed\n");
  650. return -ENOMEM;
  651. }
  652. /* for each pin, the name of the pin is pin-bank name + pin number */
  653. for (bank = 0; bank < drvdata->ctrl->nr_banks; bank++) {
  654. pin_bank = &drvdata->ctrl->pin_banks[bank];
  655. for (pin = 0; pin < pin_bank->nr_pins; pin++) {
  656. sprintf(pin_names, "%s-%d", pin_bank->name, pin);
  657. pdesc = pindesc + pin_bank->pin_base + pin;
  658. pdesc->name = pin_names;
  659. pin_names += PIN_NAME_LENGTH;
  660. }
  661. }
  662. ret = samsung_pinctrl_parse_dt(pdev, drvdata);
  663. if (ret)
  664. return ret;
  665. drvdata->pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, drvdata);
  666. if (!drvdata->pctl_dev) {
  667. dev_err(&pdev->dev, "could not register pinctrl driver\n");
  668. return -EINVAL;
  669. }
  670. for (bank = 0; bank < drvdata->ctrl->nr_banks; ++bank) {
  671. pin_bank = &drvdata->ctrl->pin_banks[bank];
  672. pin_bank->grange.name = pin_bank->name;
  673. pin_bank->grange.id = bank;
  674. pin_bank->grange.pin_base = pin_bank->pin_base;
  675. pin_bank->grange.base = pin_bank->gpio_chip.base;
  676. pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
  677. pin_bank->grange.gc = &pin_bank->gpio_chip;
  678. pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
  679. }
  680. return 0;
  681. }
  682. static const struct gpio_chip samsung_gpiolib_chip = {
  683. .set = samsung_gpio_set,
  684. .get = samsung_gpio_get,
  685. .direction_input = samsung_gpio_direction_input,
  686. .direction_output = samsung_gpio_direction_output,
  687. .to_irq = samsung_gpio_to_irq,
  688. .owner = THIS_MODULE,
  689. };
  690. /* register the gpiolib interface with the gpiolib subsystem */
  691. static int samsung_gpiolib_register(struct platform_device *pdev,
  692. struct samsung_pinctrl_drv_data *drvdata)
  693. {
  694. struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
  695. struct samsung_pin_bank *bank = ctrl->pin_banks;
  696. struct gpio_chip *gc;
  697. int ret;
  698. int i;
  699. for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
  700. bank->gpio_chip = samsung_gpiolib_chip;
  701. gc = &bank->gpio_chip;
  702. gc->base = ctrl->base + bank->pin_base;
  703. gc->ngpio = bank->nr_pins;
  704. gc->dev = &pdev->dev;
  705. gc->of_node = bank->of_node;
  706. gc->label = bank->name;
  707. ret = gpiochip_add(gc);
  708. if (ret) {
  709. dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
  710. gc->label, ret);
  711. goto fail;
  712. }
  713. }
  714. return 0;
  715. fail:
  716. for (--i, --bank; i >= 0; --i, --bank)
  717. if (gpiochip_remove(&bank->gpio_chip))
  718. dev_err(&pdev->dev, "gpio chip %s remove failed\n",
  719. bank->gpio_chip.label);
  720. return ret;
  721. }
  722. /* unregister the gpiolib interface with the gpiolib subsystem */
  723. static int samsung_gpiolib_unregister(struct platform_device *pdev,
  724. struct samsung_pinctrl_drv_data *drvdata)
  725. {
  726. struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
  727. struct samsung_pin_bank *bank = ctrl->pin_banks;
  728. int ret = 0;
  729. int i;
  730. for (i = 0; !ret && i < ctrl->nr_banks; ++i, ++bank)
  731. ret = gpiochip_remove(&bank->gpio_chip);
  732. if (ret)
  733. dev_err(&pdev->dev, "gpio chip remove failed\n");
  734. return ret;
  735. }
  736. static const struct of_device_id samsung_pinctrl_dt_match[];
  737. /* retrieve the soc specific data */
  738. static struct samsung_pin_ctrl *samsung_pinctrl_get_soc_data(
  739. struct samsung_pinctrl_drv_data *d,
  740. struct platform_device *pdev)
  741. {
  742. int id;
  743. const struct of_device_id *match;
  744. struct device_node *node = pdev->dev.of_node;
  745. struct device_node *np;
  746. struct samsung_pin_ctrl *ctrl;
  747. struct samsung_pin_bank *bank;
  748. int i;
  749. id = of_alias_get_id(node, "pinctrl");
  750. if (id < 0) {
  751. dev_err(&pdev->dev, "failed to get alias id\n");
  752. return NULL;
  753. }
  754. match = of_match_node(samsung_pinctrl_dt_match, node);
  755. ctrl = (struct samsung_pin_ctrl *)match->data + id;
  756. bank = ctrl->pin_banks;
  757. for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
  758. spin_lock_init(&bank->slock);
  759. bank->drvdata = d;
  760. bank->pin_base = ctrl->nr_pins;
  761. ctrl->nr_pins += bank->nr_pins;
  762. }
  763. for_each_child_of_node(node, np) {
  764. if (!of_find_property(np, "gpio-controller", NULL))
  765. continue;
  766. bank = ctrl->pin_banks;
  767. for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
  768. if (!strcmp(bank->name, np->name)) {
  769. bank->of_node = np;
  770. break;
  771. }
  772. }
  773. }
  774. ctrl->base = pin_base;
  775. pin_base += ctrl->nr_pins;
  776. return ctrl;
  777. }
  778. static int samsung_pinctrl_probe(struct platform_device *pdev)
  779. {
  780. struct samsung_pinctrl_drv_data *drvdata;
  781. struct device *dev = &pdev->dev;
  782. struct samsung_pin_ctrl *ctrl;
  783. struct resource *res;
  784. int ret;
  785. if (!dev->of_node) {
  786. dev_err(dev, "device tree node not found\n");
  787. return -ENODEV;
  788. }
  789. drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
  790. if (!drvdata) {
  791. dev_err(dev, "failed to allocate memory for driver's "
  792. "private data\n");
  793. return -ENOMEM;
  794. }
  795. ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
  796. if (!ctrl) {
  797. dev_err(&pdev->dev, "driver data not available\n");
  798. return -EINVAL;
  799. }
  800. drvdata->ctrl = ctrl;
  801. drvdata->dev = dev;
  802. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  803. drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res);
  804. if (IS_ERR(drvdata->virt_base))
  805. return PTR_ERR(drvdata->virt_base);
  806. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  807. if (res)
  808. drvdata->irq = res->start;
  809. ret = samsung_gpiolib_register(pdev, drvdata);
  810. if (ret)
  811. return ret;
  812. ret = samsung_pinctrl_register(pdev, drvdata);
  813. if (ret) {
  814. samsung_gpiolib_unregister(pdev, drvdata);
  815. return ret;
  816. }
  817. if (ctrl->eint_gpio_init)
  818. ctrl->eint_gpio_init(drvdata);
  819. if (ctrl->eint_wkup_init)
  820. ctrl->eint_wkup_init(drvdata);
  821. platform_set_drvdata(pdev, drvdata);
  822. /* Add to the global list */
  823. list_add_tail(&drvdata->node, &drvdata_list);
  824. return 0;
  825. }
  826. #ifdef CONFIG_PM
  827. /**
  828. * samsung_pinctrl_suspend_dev - save pinctrl state for suspend for a device
  829. *
  830. * Save data for all banks handled by this device.
  831. */
  832. static void samsung_pinctrl_suspend_dev(
  833. struct samsung_pinctrl_drv_data *drvdata)
  834. {
  835. struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
  836. void __iomem *virt_base = drvdata->virt_base;
  837. int i;
  838. for (i = 0; i < ctrl->nr_banks; i++) {
  839. struct samsung_pin_bank *bank = &ctrl->pin_banks[i];
  840. void __iomem *reg = virt_base + bank->pctl_offset;
  841. u8 *offs = bank->type->reg_offset;
  842. u8 *widths = bank->type->fld_width;
  843. enum pincfg_type type;
  844. /* Registers without a powerdown config aren't lost */
  845. if (!widths[PINCFG_TYPE_CON_PDN])
  846. continue;
  847. for (type = 0; type < PINCFG_TYPE_NUM; type++)
  848. if (widths[type])
  849. bank->pm_save[type] = readl(reg + offs[type]);
  850. if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
  851. /* Some banks have two config registers */
  852. bank->pm_save[PINCFG_TYPE_NUM] =
  853. readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
  854. pr_debug("Save %s @ %p (con %#010x %08x)\n",
  855. bank->name, reg,
  856. bank->pm_save[PINCFG_TYPE_FUNC],
  857. bank->pm_save[PINCFG_TYPE_NUM]);
  858. } else {
  859. pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
  860. reg, bank->pm_save[PINCFG_TYPE_FUNC]);
  861. }
  862. }
  863. if (ctrl->suspend)
  864. ctrl->suspend(drvdata);
  865. }
  866. /**
  867. * samsung_pinctrl_resume_dev - restore pinctrl state from suspend for a device
  868. *
  869. * Restore one of the banks that was saved during suspend.
  870. *
  871. * We don't bother doing anything complicated to avoid glitching lines since
  872. * we're called before pad retention is turned off.
  873. */
  874. static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
  875. {
  876. struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
  877. void __iomem *virt_base = drvdata->virt_base;
  878. int i;
  879. if (ctrl->resume)
  880. ctrl->resume(drvdata);
  881. for (i = 0; i < ctrl->nr_banks; i++) {
  882. struct samsung_pin_bank *bank = &ctrl->pin_banks[i];
  883. void __iomem *reg = virt_base + bank->pctl_offset;
  884. u8 *offs = bank->type->reg_offset;
  885. u8 *widths = bank->type->fld_width;
  886. enum pincfg_type type;
  887. /* Registers without a powerdown config aren't lost */
  888. if (!widths[PINCFG_TYPE_CON_PDN])
  889. continue;
  890. if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
  891. /* Some banks have two config registers */
  892. pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
  893. bank->name, reg,
  894. readl(reg + offs[PINCFG_TYPE_FUNC]),
  895. readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
  896. bank->pm_save[PINCFG_TYPE_FUNC],
  897. bank->pm_save[PINCFG_TYPE_NUM]);
  898. writel(bank->pm_save[PINCFG_TYPE_NUM],
  899. reg + offs[PINCFG_TYPE_FUNC] + 4);
  900. } else {
  901. pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
  902. reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
  903. bank->pm_save[PINCFG_TYPE_FUNC]);
  904. }
  905. for (type = 0; type < PINCFG_TYPE_NUM; type++)
  906. if (widths[type])
  907. writel(bank->pm_save[type], reg + offs[type]);
  908. }
  909. }
  910. /**
  911. * samsung_pinctrl_suspend - save pinctrl state for suspend
  912. *
  913. * Save data for all banks across all devices.
  914. */
  915. static int samsung_pinctrl_suspend(void)
  916. {
  917. struct samsung_pinctrl_drv_data *drvdata;
  918. list_for_each_entry(drvdata, &drvdata_list, node) {
  919. samsung_pinctrl_suspend_dev(drvdata);
  920. }
  921. return 0;
  922. }
  923. /**
  924. * samsung_pinctrl_resume - restore pinctrl state for suspend
  925. *
  926. * Restore data for all banks across all devices.
  927. */
  928. static void samsung_pinctrl_resume(void)
  929. {
  930. struct samsung_pinctrl_drv_data *drvdata;
  931. list_for_each_entry_reverse(drvdata, &drvdata_list, node) {
  932. samsung_pinctrl_resume_dev(drvdata);
  933. }
  934. }
  935. #else
  936. #define samsung_pinctrl_suspend NULL
  937. #define samsung_pinctrl_resume NULL
  938. #endif
  939. static struct syscore_ops samsung_pinctrl_syscore_ops = {
  940. .suspend = samsung_pinctrl_suspend,
  941. .resume = samsung_pinctrl_resume,
  942. };
  943. static const struct of_device_id samsung_pinctrl_dt_match[] = {
  944. #ifdef CONFIG_PINCTRL_EXYNOS
  945. { .compatible = "samsung,exynos4210-pinctrl",
  946. .data = (void *)exynos4210_pin_ctrl },
  947. { .compatible = "samsung,exynos4x12-pinctrl",
  948. .data = (void *)exynos4x12_pin_ctrl },
  949. { .compatible = "samsung,exynos5250-pinctrl",
  950. .data = (void *)exynos5250_pin_ctrl },
  951. { .compatible = "samsung,exynos5420-pinctrl",
  952. .data = (void *)exynos5420_pin_ctrl },
  953. { .compatible = "samsung,s5pv210-pinctrl",
  954. .data = (void *)s5pv210_pin_ctrl },
  955. #endif
  956. #ifdef CONFIG_PINCTRL_S3C64XX
  957. { .compatible = "samsung,s3c64xx-pinctrl",
  958. .data = s3c64xx_pin_ctrl },
  959. #endif
  960. #ifdef CONFIG_PINCTRL_S3C24XX
  961. { .compatible = "samsung,s3c2412-pinctrl",
  962. .data = s3c2412_pin_ctrl },
  963. { .compatible = "samsung,s3c2416-pinctrl",
  964. .data = s3c2416_pin_ctrl },
  965. { .compatible = "samsung,s3c2440-pinctrl",
  966. .data = s3c2440_pin_ctrl },
  967. { .compatible = "samsung,s3c2450-pinctrl",
  968. .data = s3c2450_pin_ctrl },
  969. #endif
  970. {},
  971. };
  972. MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);
  973. static struct platform_driver samsung_pinctrl_driver = {
  974. .probe = samsung_pinctrl_probe,
  975. .driver = {
  976. .name = "samsung-pinctrl",
  977. .owner = THIS_MODULE,
  978. .of_match_table = of_match_ptr(samsung_pinctrl_dt_match),
  979. },
  980. };
  981. static int __init samsung_pinctrl_drv_register(void)
  982. {
  983. /*
  984. * Register syscore ops for save/restore of registers across suspend.
  985. * It's important to ensure that this driver is running at an earlier
  986. * initcall level than any arch-specific init calls that install syscore
  987. * ops that turn off pad retention (like exynos_pm_resume).
  988. */
  989. register_syscore_ops(&samsung_pinctrl_syscore_ops);
  990. return platform_driver_register(&samsung_pinctrl_driver);
  991. }
  992. postcore_initcall(samsung_pinctrl_drv_register);
  993. static void __exit samsung_pinctrl_drv_unregister(void)
  994. {
  995. platform_driver_unregister(&samsung_pinctrl_driver);
  996. }
  997. module_exit(samsung_pinctrl_drv_unregister);
  998. MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
  999. MODULE_DESCRIPTION("Samsung pinctrl driver");
  1000. MODULE_LICENSE("GPL v2");