qlcnic_main.c 99 KB

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  1. /*
  2. * QLogic qlcnic NIC Driver
  3. * Copyright (c) 2009-2013 QLogic Corporation
  4. *
  5. * See LICENSE.qlcnic for copyright and licensing details.
  6. */
  7. #include <linux/vmalloc.h>
  8. #include <linux/interrupt.h>
  9. #include "qlcnic.h"
  10. #include "qlcnic_sriov.h"
  11. #include "qlcnic_hw.h"
  12. #include <linux/swab.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/if_vlan.h>
  15. #include <net/ip.h>
  16. #include <linux/ipv6.h>
  17. #include <linux/inetdevice.h>
  18. #include <linux/aer.h>
  19. #include <linux/log2.h>
  20. #include <linux/pci.h>
  21. MODULE_DESCRIPTION("QLogic 1/10 GbE Converged/Intelligent Ethernet Driver");
  22. MODULE_LICENSE("GPL");
  23. MODULE_VERSION(QLCNIC_LINUX_VERSIONID);
  24. MODULE_FIRMWARE(QLCNIC_UNIFIED_ROMIMAGE_NAME);
  25. char qlcnic_driver_name[] = "qlcnic";
  26. static const char qlcnic_driver_string[] = "QLogic 1/10 GbE "
  27. "Converged/Intelligent Ethernet Driver v" QLCNIC_LINUX_VERSIONID;
  28. static int qlcnic_mac_learn;
  29. module_param(qlcnic_mac_learn, int, 0444);
  30. MODULE_PARM_DESC(qlcnic_mac_learn,
  31. "Mac Filter (0=learning is disabled, 1=Driver learning is enabled, 2=FDB learning is enabled)");
  32. int qlcnic_use_msi = 1;
  33. MODULE_PARM_DESC(use_msi, "MSI interrupt (0=disabled, 1=enabled)");
  34. module_param_named(use_msi, qlcnic_use_msi, int, 0444);
  35. int qlcnic_use_msi_x = 1;
  36. MODULE_PARM_DESC(use_msi_x, "MSI-X interrupt (0=disabled, 1=enabled)");
  37. module_param_named(use_msi_x, qlcnic_use_msi_x, int, 0444);
  38. int qlcnic_auto_fw_reset = 1;
  39. MODULE_PARM_DESC(auto_fw_reset, "Auto firmware reset (0=disabled, 1=enabled)");
  40. module_param_named(auto_fw_reset, qlcnic_auto_fw_reset, int, 0644);
  41. int qlcnic_load_fw_file;
  42. MODULE_PARM_DESC(load_fw_file, "Load firmware from (0=flash, 1=file)");
  43. module_param_named(load_fw_file, qlcnic_load_fw_file, int, 0444);
  44. static int qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  45. static void qlcnic_remove(struct pci_dev *pdev);
  46. static int qlcnic_open(struct net_device *netdev);
  47. static int qlcnic_close(struct net_device *netdev);
  48. static void qlcnic_tx_timeout(struct net_device *netdev);
  49. static void qlcnic_attach_work(struct work_struct *work);
  50. static void qlcnic_fwinit_work(struct work_struct *work);
  51. #ifdef CONFIG_NET_POLL_CONTROLLER
  52. static void qlcnic_poll_controller(struct net_device *netdev);
  53. #endif
  54. static void qlcnic_idc_debug_info(struct qlcnic_adapter *adapter, u8 encoding);
  55. static int qlcnic_can_start_firmware(struct qlcnic_adapter *adapter);
  56. static irqreturn_t qlcnic_tmp_intr(int irq, void *data);
  57. static irqreturn_t qlcnic_intr(int irq, void *data);
  58. static irqreturn_t qlcnic_msi_intr(int irq, void *data);
  59. static irqreturn_t qlcnic_msix_intr(int irq, void *data);
  60. static irqreturn_t qlcnic_msix_tx_intr(int irq, void *data);
  61. static struct net_device_stats *qlcnic_get_stats(struct net_device *netdev);
  62. static int qlcnic_start_firmware(struct qlcnic_adapter *);
  63. static void qlcnic_free_lb_filters_mem(struct qlcnic_adapter *adapter);
  64. static void qlcnic_dev_set_npar_ready(struct qlcnic_adapter *);
  65. static int qlcnicvf_start_firmware(struct qlcnic_adapter *);
  66. static int qlcnic_vlan_rx_add(struct net_device *, __be16, u16);
  67. static int qlcnic_vlan_rx_del(struct net_device *, __be16, u16);
  68. static u32 qlcnic_vlan_tx_check(struct qlcnic_adapter *adapter)
  69. {
  70. struct qlcnic_hardware_context *ahw = adapter->ahw;
  71. if (adapter->pdev->device == PCI_DEVICE_ID_QLOGIC_QLE824X)
  72. return ahw->capabilities & QLCNIC_FW_CAPABILITY_FVLANTX;
  73. else
  74. return 1;
  75. }
  76. /* PCI Device ID Table */
  77. #define ENTRY(device) \
  78. {PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, (device)), \
  79. .class = PCI_CLASS_NETWORK_ETHERNET << 8, .class_mask = ~0}
  80. static DEFINE_PCI_DEVICE_TABLE(qlcnic_pci_tbl) = {
  81. ENTRY(PCI_DEVICE_ID_QLOGIC_QLE824X),
  82. ENTRY(PCI_DEVICE_ID_QLOGIC_QLE834X),
  83. ENTRY(PCI_DEVICE_ID_QLOGIC_VF_QLE834X),
  84. ENTRY(PCI_DEVICE_ID_QLOGIC_QLE844X),
  85. ENTRY(PCI_DEVICE_ID_QLOGIC_VF_QLE844X),
  86. {0,}
  87. };
  88. MODULE_DEVICE_TABLE(pci, qlcnic_pci_tbl);
  89. inline void qlcnic_update_cmd_producer(struct qlcnic_host_tx_ring *tx_ring)
  90. {
  91. writel(tx_ring->producer, tx_ring->crb_cmd_producer);
  92. }
  93. static const u32 msi_tgt_status[8] = {
  94. ISR_INT_TARGET_STATUS, ISR_INT_TARGET_STATUS_F1,
  95. ISR_INT_TARGET_STATUS_F2, ISR_INT_TARGET_STATUS_F3,
  96. ISR_INT_TARGET_STATUS_F4, ISR_INT_TARGET_STATUS_F5,
  97. ISR_INT_TARGET_STATUS_F6, ISR_INT_TARGET_STATUS_F7
  98. };
  99. static const u32 qlcnic_reg_tbl[] = {
  100. 0x1B20A8, /* PEG_HALT_STAT1 */
  101. 0x1B20AC, /* PEG_HALT_STAT2 */
  102. 0x1B20B0, /* FW_HEARTBEAT */
  103. 0x1B2100, /* LOCK ID */
  104. 0x1B2128, /* FW_CAPABILITIES */
  105. 0x1B2138, /* drv active */
  106. 0x1B2140, /* dev state */
  107. 0x1B2144, /* drv state */
  108. 0x1B2148, /* drv scratch */
  109. 0x1B214C, /* dev partition info */
  110. 0x1B2174, /* drv idc ver */
  111. 0x1B2150, /* fw version major */
  112. 0x1B2154, /* fw version minor */
  113. 0x1B2158, /* fw version sub */
  114. 0x1B219C, /* npar state */
  115. 0x1B21FC, /* FW_IMG_VALID */
  116. 0x1B2250, /* CMD_PEG_STATE */
  117. 0x1B233C, /* RCV_PEG_STATE */
  118. 0x1B23B4, /* ASIC TEMP */
  119. 0x1B216C, /* FW api */
  120. 0x1B2170, /* drv op mode */
  121. 0x13C010, /* flash lock */
  122. 0x13C014, /* flash unlock */
  123. };
  124. static const struct qlcnic_board_info qlcnic_boards[] = {
  125. { PCI_VENDOR_ID_QLOGIC,
  126. PCI_DEVICE_ID_QLOGIC_QLE844X,
  127. 0x0,
  128. 0x0,
  129. "8400 series 10GbE Converged Network Adapter (TCP/IP Networking)" },
  130. { PCI_VENDOR_ID_QLOGIC,
  131. PCI_DEVICE_ID_QLOGIC_QLE834X,
  132. PCI_VENDOR_ID_QLOGIC,
  133. 0x24e,
  134. "8300 Series Dual Port 10GbE Converged Network Adapter "
  135. "(TCP/IP Networking)" },
  136. { PCI_VENDOR_ID_QLOGIC,
  137. PCI_DEVICE_ID_QLOGIC_QLE834X,
  138. PCI_VENDOR_ID_QLOGIC,
  139. 0x243,
  140. "8300 Series Single Port 10GbE Converged Network Adapter "
  141. "(TCP/IP Networking)" },
  142. { PCI_VENDOR_ID_QLOGIC,
  143. PCI_DEVICE_ID_QLOGIC_QLE834X,
  144. PCI_VENDOR_ID_QLOGIC,
  145. 0x24a,
  146. "8300 Series Dual Port 10GbE Converged Network Adapter "
  147. "(TCP/IP Networking)" },
  148. { PCI_VENDOR_ID_QLOGIC,
  149. PCI_DEVICE_ID_QLOGIC_QLE834X,
  150. PCI_VENDOR_ID_QLOGIC,
  151. 0x246,
  152. "8300 Series Dual Port 10GbE Converged Network Adapter "
  153. "(TCP/IP Networking)" },
  154. { PCI_VENDOR_ID_QLOGIC,
  155. PCI_DEVICE_ID_QLOGIC_QLE834X,
  156. PCI_VENDOR_ID_QLOGIC,
  157. 0x252,
  158. "8300 Series Dual Port 10GbE Converged Network Adapter "
  159. "(TCP/IP Networking)" },
  160. { PCI_VENDOR_ID_QLOGIC,
  161. PCI_DEVICE_ID_QLOGIC_QLE834X,
  162. PCI_VENDOR_ID_QLOGIC,
  163. 0x26e,
  164. "8300 Series Dual Port 10GbE Converged Network Adapter "
  165. "(TCP/IP Networking)" },
  166. { PCI_VENDOR_ID_QLOGIC,
  167. PCI_DEVICE_ID_QLOGIC_QLE834X,
  168. PCI_VENDOR_ID_QLOGIC,
  169. 0x260,
  170. "8300 Series Dual Port 10GbE Converged Network Adapter "
  171. "(TCP/IP Networking)" },
  172. { PCI_VENDOR_ID_QLOGIC,
  173. PCI_DEVICE_ID_QLOGIC_QLE834X,
  174. PCI_VENDOR_ID_QLOGIC,
  175. 0x266,
  176. "8300 Series Single Port 10GbE Converged Network Adapter "
  177. "(TCP/IP Networking)" },
  178. { PCI_VENDOR_ID_QLOGIC,
  179. PCI_DEVICE_ID_QLOGIC_QLE834X,
  180. PCI_VENDOR_ID_QLOGIC,
  181. 0x269,
  182. "8300 Series Dual Port 10GbE Converged Network Adapter "
  183. "(TCP/IP Networking)" },
  184. { PCI_VENDOR_ID_QLOGIC,
  185. PCI_DEVICE_ID_QLOGIC_QLE834X,
  186. PCI_VENDOR_ID_QLOGIC,
  187. 0x271,
  188. "8300 Series Dual Port 10GbE Converged Network Adapter "
  189. "(TCP/IP Networking)" },
  190. { PCI_VENDOR_ID_QLOGIC,
  191. PCI_DEVICE_ID_QLOGIC_QLE834X,
  192. 0x0, 0x0, "8300 Series 1/10GbE Controller" },
  193. { PCI_VENDOR_ID_QLOGIC,
  194. PCI_DEVICE_ID_QLOGIC_QLE824X,
  195. PCI_VENDOR_ID_QLOGIC,
  196. 0x203,
  197. "8200 Series Single Port 10GbE Converged Network Adapter"
  198. "(TCP/IP Networking)" },
  199. { PCI_VENDOR_ID_QLOGIC,
  200. PCI_DEVICE_ID_QLOGIC_QLE824X,
  201. PCI_VENDOR_ID_QLOGIC,
  202. 0x207,
  203. "8200 Series Dual Port 10GbE Converged Network Adapter"
  204. "(TCP/IP Networking)" },
  205. { PCI_VENDOR_ID_QLOGIC,
  206. PCI_DEVICE_ID_QLOGIC_QLE824X,
  207. PCI_VENDOR_ID_QLOGIC,
  208. 0x20b,
  209. "3200 Series Dual Port 10Gb Intelligent Ethernet Adapter" },
  210. { PCI_VENDOR_ID_QLOGIC,
  211. PCI_DEVICE_ID_QLOGIC_QLE824X,
  212. PCI_VENDOR_ID_QLOGIC,
  213. 0x20c,
  214. "3200 Series Quad Port 1Gb Intelligent Ethernet Adapter" },
  215. { PCI_VENDOR_ID_QLOGIC,
  216. PCI_DEVICE_ID_QLOGIC_QLE824X,
  217. PCI_VENDOR_ID_QLOGIC,
  218. 0x20f,
  219. "3200 Series Single Port 10Gb Intelligent Ethernet Adapter" },
  220. { PCI_VENDOR_ID_QLOGIC,
  221. PCI_DEVICE_ID_QLOGIC_QLE824X,
  222. 0x103c, 0x3733,
  223. "NC523SFP 10Gb 2-port Server Adapter" },
  224. { PCI_VENDOR_ID_QLOGIC,
  225. PCI_DEVICE_ID_QLOGIC_QLE824X,
  226. 0x103c, 0x3346,
  227. "CN1000Q Dual Port Converged Network Adapter" },
  228. { PCI_VENDOR_ID_QLOGIC,
  229. PCI_DEVICE_ID_QLOGIC_QLE824X,
  230. PCI_VENDOR_ID_QLOGIC,
  231. 0x210,
  232. "QME8242-k 10GbE Dual Port Mezzanine Card" },
  233. { PCI_VENDOR_ID_QLOGIC,
  234. PCI_DEVICE_ID_QLOGIC_QLE824X,
  235. 0x0, 0x0, "cLOM8214 1/10GbE Controller" },
  236. };
  237. #define NUM_SUPPORTED_BOARDS ARRAY_SIZE(qlcnic_boards)
  238. static const
  239. struct qlcnic_legacy_intr_set legacy_intr[] = QLCNIC_LEGACY_INTR_CONFIG;
  240. int qlcnic_alloc_sds_rings(struct qlcnic_recv_context *recv_ctx, int count)
  241. {
  242. int size = sizeof(struct qlcnic_host_sds_ring) * count;
  243. recv_ctx->sds_rings = kzalloc(size, GFP_KERNEL);
  244. return recv_ctx->sds_rings == NULL;
  245. }
  246. void qlcnic_free_sds_rings(struct qlcnic_recv_context *recv_ctx)
  247. {
  248. if (recv_ctx->sds_rings != NULL)
  249. kfree(recv_ctx->sds_rings);
  250. recv_ctx->sds_rings = NULL;
  251. }
  252. int qlcnic_read_mac_addr(struct qlcnic_adapter *adapter)
  253. {
  254. struct net_device *netdev = adapter->netdev;
  255. struct pci_dev *pdev = adapter->pdev;
  256. u8 mac_addr[ETH_ALEN];
  257. int ret;
  258. ret = qlcnic_get_mac_address(adapter, mac_addr,
  259. adapter->ahw->pci_func);
  260. if (ret)
  261. return ret;
  262. memcpy(netdev->dev_addr, mac_addr, ETH_ALEN);
  263. memcpy(adapter->mac_addr, netdev->dev_addr, netdev->addr_len);
  264. /* set station address */
  265. if (!is_valid_ether_addr(netdev->dev_addr))
  266. dev_warn(&pdev->dev, "Bad MAC address %pM.\n",
  267. netdev->dev_addr);
  268. return 0;
  269. }
  270. static void qlcnic_delete_adapter_mac(struct qlcnic_adapter *adapter)
  271. {
  272. struct qlcnic_mac_list_s *cur;
  273. struct list_head *head;
  274. list_for_each(head, &adapter->mac_list) {
  275. cur = list_entry(head, struct qlcnic_mac_list_s, list);
  276. if (!memcmp(adapter->mac_addr, cur->mac_addr, ETH_ALEN)) {
  277. qlcnic_sre_macaddr_change(adapter, cur->mac_addr,
  278. 0, QLCNIC_MAC_DEL);
  279. list_del(&cur->list);
  280. kfree(cur);
  281. return;
  282. }
  283. }
  284. }
  285. static int qlcnic_set_mac(struct net_device *netdev, void *p)
  286. {
  287. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  288. struct sockaddr *addr = p;
  289. if (qlcnic_sriov_vf_check(adapter))
  290. return -EINVAL;
  291. if ((adapter->flags & QLCNIC_MAC_OVERRIDE_DISABLED))
  292. return -EOPNOTSUPP;
  293. if (!is_valid_ether_addr(addr->sa_data))
  294. return -EINVAL;
  295. if (!memcmp(adapter->mac_addr, addr->sa_data, ETH_ALEN))
  296. return 0;
  297. if (test_bit(__QLCNIC_DEV_UP, &adapter->state)) {
  298. netif_device_detach(netdev);
  299. qlcnic_napi_disable(adapter);
  300. }
  301. qlcnic_delete_adapter_mac(adapter);
  302. memcpy(adapter->mac_addr, addr->sa_data, netdev->addr_len);
  303. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  304. qlcnic_set_multi(adapter->netdev);
  305. if (test_bit(__QLCNIC_DEV_UP, &adapter->state)) {
  306. netif_device_attach(netdev);
  307. qlcnic_napi_enable(adapter);
  308. }
  309. return 0;
  310. }
  311. static int qlcnic_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],
  312. struct net_device *netdev, const unsigned char *addr)
  313. {
  314. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  315. int err = -EOPNOTSUPP;
  316. if (!adapter->fdb_mac_learn)
  317. return ndo_dflt_fdb_del(ndm, tb, netdev, addr);
  318. if (adapter->flags & QLCNIC_ESWITCH_ENABLED) {
  319. if (is_unicast_ether_addr(addr)) {
  320. err = dev_uc_del(netdev, addr);
  321. if (!err)
  322. err = qlcnic_nic_del_mac(adapter, addr);
  323. } else if (is_multicast_ether_addr(addr)) {
  324. err = dev_mc_del(netdev, addr);
  325. } else {
  326. err = -EINVAL;
  327. }
  328. }
  329. return err;
  330. }
  331. static int qlcnic_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
  332. struct net_device *netdev,
  333. const unsigned char *addr, u16 flags)
  334. {
  335. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  336. int err = 0;
  337. if (!adapter->fdb_mac_learn)
  338. return ndo_dflt_fdb_add(ndm, tb, netdev, addr, flags);
  339. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED)) {
  340. pr_info("%s: FDB e-switch is not enabled\n", __func__);
  341. return -EOPNOTSUPP;
  342. }
  343. if (ether_addr_equal(addr, adapter->mac_addr))
  344. return err;
  345. if (is_unicast_ether_addr(addr)) {
  346. if (netdev_uc_count(netdev) < adapter->ahw->max_uc_count)
  347. err = dev_uc_add_excl(netdev, addr);
  348. else
  349. err = -ENOMEM;
  350. } else if (is_multicast_ether_addr(addr)) {
  351. err = dev_mc_add_excl(netdev, addr);
  352. } else {
  353. err = -EINVAL;
  354. }
  355. return err;
  356. }
  357. static int qlcnic_fdb_dump(struct sk_buff *skb, struct netlink_callback *ncb,
  358. struct net_device *netdev, int idx)
  359. {
  360. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  361. if (!adapter->fdb_mac_learn)
  362. return ndo_dflt_fdb_dump(skb, ncb, netdev, idx);
  363. if (adapter->flags & QLCNIC_ESWITCH_ENABLED)
  364. idx = ndo_dflt_fdb_dump(skb, ncb, netdev, idx);
  365. return idx;
  366. }
  367. static void qlcnic_82xx_cancel_idc_work(struct qlcnic_adapter *adapter)
  368. {
  369. while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  370. usleep_range(10000, 11000);
  371. cancel_delayed_work_sync(&adapter->fw_work);
  372. }
  373. static int qlcnic_get_phys_port_id(struct net_device *netdev,
  374. struct netdev_phys_port_id *ppid)
  375. {
  376. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  377. struct qlcnic_hardware_context *ahw = adapter->ahw;
  378. if (!(adapter->flags & QLCNIC_HAS_PHYS_PORT_ID))
  379. return -EOPNOTSUPP;
  380. ppid->id_len = sizeof(ahw->phys_port_id);
  381. memcpy(ppid->id, ahw->phys_port_id, ppid->id_len);
  382. return 0;
  383. }
  384. static const struct net_device_ops qlcnic_netdev_ops = {
  385. .ndo_open = qlcnic_open,
  386. .ndo_stop = qlcnic_close,
  387. .ndo_start_xmit = qlcnic_xmit_frame,
  388. .ndo_get_stats = qlcnic_get_stats,
  389. .ndo_validate_addr = eth_validate_addr,
  390. .ndo_set_rx_mode = qlcnic_set_multi,
  391. .ndo_set_mac_address = qlcnic_set_mac,
  392. .ndo_change_mtu = qlcnic_change_mtu,
  393. .ndo_fix_features = qlcnic_fix_features,
  394. .ndo_set_features = qlcnic_set_features,
  395. .ndo_tx_timeout = qlcnic_tx_timeout,
  396. .ndo_vlan_rx_add_vid = qlcnic_vlan_rx_add,
  397. .ndo_vlan_rx_kill_vid = qlcnic_vlan_rx_del,
  398. .ndo_fdb_add = qlcnic_fdb_add,
  399. .ndo_fdb_del = qlcnic_fdb_del,
  400. .ndo_fdb_dump = qlcnic_fdb_dump,
  401. .ndo_get_phys_port_id = qlcnic_get_phys_port_id,
  402. #ifdef CONFIG_NET_POLL_CONTROLLER
  403. .ndo_poll_controller = qlcnic_poll_controller,
  404. #endif
  405. #ifdef CONFIG_QLCNIC_SRIOV
  406. .ndo_set_vf_mac = qlcnic_sriov_set_vf_mac,
  407. .ndo_set_vf_tx_rate = qlcnic_sriov_set_vf_tx_rate,
  408. .ndo_get_vf_config = qlcnic_sriov_get_vf_config,
  409. .ndo_set_vf_vlan = qlcnic_sriov_set_vf_vlan,
  410. .ndo_set_vf_spoofchk = qlcnic_sriov_set_vf_spoofchk,
  411. #endif
  412. };
  413. static const struct net_device_ops qlcnic_netdev_failed_ops = {
  414. .ndo_open = qlcnic_open,
  415. };
  416. static struct qlcnic_nic_template qlcnic_ops = {
  417. .config_bridged_mode = qlcnic_config_bridged_mode,
  418. .config_led = qlcnic_82xx_config_led,
  419. .start_firmware = qlcnic_82xx_start_firmware,
  420. .request_reset = qlcnic_82xx_dev_request_reset,
  421. .cancel_idc_work = qlcnic_82xx_cancel_idc_work,
  422. .napi_add = qlcnic_82xx_napi_add,
  423. .napi_del = qlcnic_82xx_napi_del,
  424. .config_ipaddr = qlcnic_82xx_config_ipaddr,
  425. .shutdown = qlcnic_82xx_shutdown,
  426. .resume = qlcnic_82xx_resume,
  427. .clear_legacy_intr = qlcnic_82xx_clear_legacy_intr,
  428. };
  429. struct qlcnic_nic_template qlcnic_vf_ops = {
  430. .config_bridged_mode = qlcnicvf_config_bridged_mode,
  431. .config_led = qlcnicvf_config_led,
  432. .start_firmware = qlcnicvf_start_firmware
  433. };
  434. static struct qlcnic_hardware_ops qlcnic_hw_ops = {
  435. .read_crb = qlcnic_82xx_read_crb,
  436. .write_crb = qlcnic_82xx_write_crb,
  437. .read_reg = qlcnic_82xx_hw_read_wx_2M,
  438. .write_reg = qlcnic_82xx_hw_write_wx_2M,
  439. .get_mac_address = qlcnic_82xx_get_mac_address,
  440. .setup_intr = qlcnic_82xx_setup_intr,
  441. .alloc_mbx_args = qlcnic_82xx_alloc_mbx_args,
  442. .mbx_cmd = qlcnic_82xx_issue_cmd,
  443. .get_func_no = qlcnic_82xx_get_func_no,
  444. .api_lock = qlcnic_82xx_api_lock,
  445. .api_unlock = qlcnic_82xx_api_unlock,
  446. .add_sysfs = qlcnic_82xx_add_sysfs,
  447. .remove_sysfs = qlcnic_82xx_remove_sysfs,
  448. .process_lb_rcv_ring_diag = qlcnic_82xx_process_rcv_ring_diag,
  449. .create_rx_ctx = qlcnic_82xx_fw_cmd_create_rx_ctx,
  450. .create_tx_ctx = qlcnic_82xx_fw_cmd_create_tx_ctx,
  451. .del_rx_ctx = qlcnic_82xx_fw_cmd_del_rx_ctx,
  452. .del_tx_ctx = qlcnic_82xx_fw_cmd_del_tx_ctx,
  453. .setup_link_event = qlcnic_82xx_linkevent_request,
  454. .get_nic_info = qlcnic_82xx_get_nic_info,
  455. .get_pci_info = qlcnic_82xx_get_pci_info,
  456. .set_nic_info = qlcnic_82xx_set_nic_info,
  457. .change_macvlan = qlcnic_82xx_sre_macaddr_change,
  458. .napi_enable = qlcnic_82xx_napi_enable,
  459. .napi_disable = qlcnic_82xx_napi_disable,
  460. .config_intr_coal = qlcnic_82xx_config_intr_coalesce,
  461. .config_rss = qlcnic_82xx_config_rss,
  462. .config_hw_lro = qlcnic_82xx_config_hw_lro,
  463. .config_loopback = qlcnic_82xx_set_lb_mode,
  464. .clear_loopback = qlcnic_82xx_clear_lb_mode,
  465. .config_promisc_mode = qlcnic_82xx_nic_set_promisc,
  466. .change_l2_filter = qlcnic_82xx_change_filter,
  467. .get_board_info = qlcnic_82xx_get_board_info,
  468. .set_mac_filter_count = qlcnic_82xx_set_mac_filter_count,
  469. .free_mac_list = qlcnic_82xx_free_mac_list,
  470. .read_phys_port_id = qlcnic_82xx_read_phys_port_id,
  471. .io_error_detected = qlcnic_82xx_io_error_detected,
  472. .io_slot_reset = qlcnic_82xx_io_slot_reset,
  473. .io_resume = qlcnic_82xx_io_resume,
  474. };
  475. static void qlcnic_get_multiq_capability(struct qlcnic_adapter *adapter)
  476. {
  477. struct qlcnic_hardware_context *ahw = adapter->ahw;
  478. int num_tx_q;
  479. if (ahw->msix_supported &&
  480. (ahw->extra_capability[0] & QLCNIC_FW_CAPABILITY_2_MULTI_TX)) {
  481. num_tx_q = min_t(int, QLCNIC_DEF_NUM_TX_RINGS,
  482. num_online_cpus());
  483. if (num_tx_q > 1) {
  484. test_and_set_bit(__QLCNIC_MULTI_TX_UNIQUE,
  485. &adapter->state);
  486. adapter->max_drv_tx_rings = num_tx_q;
  487. }
  488. } else {
  489. adapter->max_drv_tx_rings = 1;
  490. }
  491. }
  492. int qlcnic_enable_msix(struct qlcnic_adapter *adapter, u32 num_msix)
  493. {
  494. struct pci_dev *pdev = adapter->pdev;
  495. int max_tx_rings, max_sds_rings, tx_vector;
  496. int err = -1, i;
  497. if (adapter->flags & QLCNIC_TX_INTR_SHARED) {
  498. max_tx_rings = 0;
  499. tx_vector = 0;
  500. } else {
  501. max_tx_rings = adapter->max_drv_tx_rings;
  502. tx_vector = 1;
  503. }
  504. if (!adapter->msix_entries) {
  505. adapter->msix_entries = kcalloc(num_msix,
  506. sizeof(struct msix_entry),
  507. GFP_KERNEL);
  508. if (!adapter->msix_entries)
  509. return -ENOMEM;
  510. }
  511. adapter->max_sds_rings = 1;
  512. adapter->flags &= ~(QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED);
  513. if (adapter->ahw->msix_supported) {
  514. enable_msix:
  515. for (i = 0; i < num_msix; i++)
  516. adapter->msix_entries[i].entry = i;
  517. err = pci_enable_msix(pdev, adapter->msix_entries, num_msix);
  518. if (err == 0) {
  519. adapter->flags |= QLCNIC_MSIX_ENABLED;
  520. if (qlcnic_83xx_check(adapter)) {
  521. adapter->ahw->num_msix = num_msix;
  522. /* subtract mail box and tx ring vectors */
  523. adapter->max_sds_rings = num_msix -
  524. max_tx_rings - 1;
  525. } else {
  526. adapter->ahw->num_msix = num_msix;
  527. if (qlcnic_check_multi_tx(adapter) &&
  528. !adapter->ahw->diag_test &&
  529. (adapter->max_drv_tx_rings > 1))
  530. max_sds_rings = num_msix - max_tx_rings;
  531. else
  532. max_sds_rings = num_msix;
  533. adapter->max_sds_rings = max_sds_rings;
  534. }
  535. dev_info(&pdev->dev, "using msi-x interrupts\n");
  536. return err;
  537. } else if (err > 0) {
  538. dev_info(&pdev->dev,
  539. "Unable to allocate %d MSI-X interrupt vectors\n",
  540. num_msix);
  541. if (qlcnic_83xx_check(adapter)) {
  542. if (err < (QLC_83XX_MINIMUM_VECTOR - tx_vector))
  543. return err;
  544. err -= (max_tx_rings + 1);
  545. num_msix = rounddown_pow_of_two(err);
  546. num_msix += (max_tx_rings + 1);
  547. } else {
  548. num_msix = rounddown_pow_of_two(err);
  549. if (qlcnic_check_multi_tx(adapter))
  550. num_msix += max_tx_rings;
  551. }
  552. if (num_msix) {
  553. dev_info(&pdev->dev,
  554. "Trying to allocate %d MSI-X interrupt vectors\n",
  555. num_msix);
  556. goto enable_msix;
  557. }
  558. } else {
  559. dev_info(&pdev->dev,
  560. "Unable to allocate %d MSI-X interrupt vectors\n",
  561. num_msix);
  562. }
  563. }
  564. return err;
  565. }
  566. static int qlcnic_enable_msi_legacy(struct qlcnic_adapter *adapter)
  567. {
  568. int err = 0;
  569. u32 offset, mask_reg;
  570. const struct qlcnic_legacy_intr_set *legacy_intrp;
  571. struct qlcnic_hardware_context *ahw = adapter->ahw;
  572. struct pci_dev *pdev = adapter->pdev;
  573. if (qlcnic_use_msi && !pci_enable_msi(pdev)) {
  574. adapter->flags |= QLCNIC_MSI_ENABLED;
  575. offset = msi_tgt_status[adapter->ahw->pci_func];
  576. adapter->tgt_status_reg = qlcnic_get_ioaddr(adapter->ahw,
  577. offset);
  578. dev_info(&pdev->dev, "using msi interrupts\n");
  579. adapter->msix_entries[0].vector = pdev->irq;
  580. return err;
  581. }
  582. if (qlcnic_use_msi || qlcnic_use_msi_x)
  583. return -EOPNOTSUPP;
  584. legacy_intrp = &legacy_intr[adapter->ahw->pci_func];
  585. adapter->ahw->int_vec_bit = legacy_intrp->int_vec_bit;
  586. offset = legacy_intrp->tgt_status_reg;
  587. adapter->tgt_status_reg = qlcnic_get_ioaddr(ahw, offset);
  588. mask_reg = legacy_intrp->tgt_mask_reg;
  589. adapter->tgt_mask_reg = qlcnic_get_ioaddr(ahw, mask_reg);
  590. adapter->isr_int_vec = qlcnic_get_ioaddr(ahw, ISR_INT_VECTOR);
  591. adapter->crb_int_state_reg = qlcnic_get_ioaddr(ahw, ISR_INT_STATE_REG);
  592. dev_info(&pdev->dev, "using legacy interrupts\n");
  593. adapter->msix_entries[0].vector = pdev->irq;
  594. return err;
  595. }
  596. int qlcnic_82xx_setup_intr(struct qlcnic_adapter *adapter, u8 num_intr, int txq)
  597. {
  598. struct qlcnic_hardware_context *ahw = adapter->ahw;
  599. int num_msix, err = 0;
  600. if (!num_intr)
  601. num_intr = QLCNIC_DEF_NUM_STS_DESC_RINGS;
  602. if (ahw->msix_supported) {
  603. num_msix = rounddown_pow_of_two(min_t(int, num_online_cpus(),
  604. num_intr));
  605. if (qlcnic_check_multi_tx(adapter)) {
  606. if (txq)
  607. adapter->max_drv_tx_rings = txq;
  608. num_msix += adapter->max_drv_tx_rings;
  609. }
  610. } else {
  611. num_msix = 1;
  612. }
  613. err = qlcnic_enable_msix(adapter, num_msix);
  614. if (err == -ENOMEM)
  615. return err;
  616. if (!(adapter->flags & QLCNIC_MSIX_ENABLED)) {
  617. qlcnic_disable_multi_tx(adapter);
  618. err = qlcnic_enable_msi_legacy(adapter);
  619. if (!err)
  620. return err;
  621. }
  622. return 0;
  623. }
  624. int qlcnic_82xx_mq_intrpt(struct qlcnic_adapter *adapter, int op_type)
  625. {
  626. struct qlcnic_hardware_context *ahw = adapter->ahw;
  627. int err, i;
  628. if (qlcnic_check_multi_tx(adapter) &&
  629. !ahw->diag_test &&
  630. (adapter->flags & QLCNIC_MSIX_ENABLED)) {
  631. ahw->intr_tbl = vzalloc(ahw->num_msix *
  632. sizeof(struct qlcnic_intrpt_config));
  633. if (!ahw->intr_tbl)
  634. return -ENOMEM;
  635. for (i = 0; i < ahw->num_msix; i++) {
  636. ahw->intr_tbl[i].type = QLCNIC_INTRPT_MSIX;
  637. ahw->intr_tbl[i].id = i;
  638. ahw->intr_tbl[i].src = 0;
  639. }
  640. err = qlcnic_82xx_config_intrpt(adapter, 1);
  641. if (err)
  642. dev_err(&adapter->pdev->dev,
  643. "Failed to configure Interrupt for %d vector\n",
  644. ahw->num_msix);
  645. return err;
  646. }
  647. return 0;
  648. }
  649. void qlcnic_teardown_intr(struct qlcnic_adapter *adapter)
  650. {
  651. if (adapter->flags & QLCNIC_MSIX_ENABLED)
  652. pci_disable_msix(adapter->pdev);
  653. if (adapter->flags & QLCNIC_MSI_ENABLED)
  654. pci_disable_msi(adapter->pdev);
  655. kfree(adapter->msix_entries);
  656. adapter->msix_entries = NULL;
  657. if (adapter->ahw->intr_tbl) {
  658. vfree(adapter->ahw->intr_tbl);
  659. adapter->ahw->intr_tbl = NULL;
  660. }
  661. }
  662. static void qlcnic_cleanup_pci_map(struct qlcnic_hardware_context *ahw)
  663. {
  664. if (ahw->pci_base0 != NULL)
  665. iounmap(ahw->pci_base0);
  666. }
  667. static int qlcnic_get_act_pci_func(struct qlcnic_adapter *adapter)
  668. {
  669. struct qlcnic_pci_info *pci_info;
  670. int ret;
  671. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED)) {
  672. switch (adapter->ahw->port_type) {
  673. case QLCNIC_GBE:
  674. adapter->ahw->act_pci_func = QLCNIC_NIU_MAX_GBE_PORTS;
  675. break;
  676. case QLCNIC_XGBE:
  677. adapter->ahw->act_pci_func = QLCNIC_NIU_MAX_XG_PORTS;
  678. break;
  679. }
  680. return 0;
  681. }
  682. if (adapter->ahw->op_mode == QLCNIC_MGMT_FUNC)
  683. return 0;
  684. pci_info = kcalloc(QLCNIC_MAX_PCI_FUNC, sizeof(*pci_info), GFP_KERNEL);
  685. if (!pci_info)
  686. return -ENOMEM;
  687. ret = qlcnic_get_pci_info(adapter, pci_info);
  688. kfree(pci_info);
  689. return ret;
  690. }
  691. static bool qlcnic_port_eswitch_cfg_capability(struct qlcnic_adapter *adapter)
  692. {
  693. bool ret = false;
  694. if (qlcnic_84xx_check(adapter)) {
  695. ret = true;
  696. } else if (qlcnic_83xx_check(adapter)) {
  697. if (adapter->ahw->extra_capability[0] &
  698. QLCNIC_FW_CAPABILITY_2_PER_PORT_ESWITCH_CFG)
  699. ret = true;
  700. else
  701. ret = false;
  702. }
  703. return ret;
  704. }
  705. int qlcnic_init_pci_info(struct qlcnic_adapter *adapter)
  706. {
  707. struct qlcnic_pci_info *pci_info;
  708. int i, ret = 0, j = 0;
  709. u16 act_pci_func;
  710. u8 pfn;
  711. pci_info = kcalloc(QLCNIC_MAX_PCI_FUNC, sizeof(*pci_info), GFP_KERNEL);
  712. if (!pci_info)
  713. return -ENOMEM;
  714. ret = qlcnic_get_pci_info(adapter, pci_info);
  715. if (ret)
  716. goto err_pci_info;
  717. act_pci_func = adapter->ahw->act_pci_func;
  718. adapter->npars = kzalloc(sizeof(struct qlcnic_npar_info) *
  719. act_pci_func, GFP_KERNEL);
  720. if (!adapter->npars) {
  721. ret = -ENOMEM;
  722. goto err_pci_info;
  723. }
  724. adapter->eswitch = kzalloc(sizeof(struct qlcnic_eswitch) *
  725. QLCNIC_NIU_MAX_XG_PORTS, GFP_KERNEL);
  726. if (!adapter->eswitch) {
  727. ret = -ENOMEM;
  728. goto err_npars;
  729. }
  730. for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++) {
  731. pfn = pci_info[i].id;
  732. if (pfn >= QLCNIC_MAX_PCI_FUNC) {
  733. ret = QL_STATUS_INVALID_PARAM;
  734. goto err_eswitch;
  735. }
  736. if (!pci_info[i].active ||
  737. (pci_info[i].type != QLCNIC_TYPE_NIC))
  738. continue;
  739. if (qlcnic_port_eswitch_cfg_capability(adapter)) {
  740. if (!qlcnic_83xx_enable_port_eswitch(adapter, pfn))
  741. adapter->npars[j].eswitch_status = true;
  742. else
  743. continue;
  744. } else {
  745. adapter->npars[j].eswitch_status = true;
  746. }
  747. adapter->npars[j].pci_func = pfn;
  748. adapter->npars[j].active = (u8)pci_info[i].active;
  749. adapter->npars[j].type = (u8)pci_info[i].type;
  750. adapter->npars[j].phy_port = (u8)pci_info[i].default_port;
  751. adapter->npars[j].min_bw = pci_info[i].tx_min_bw;
  752. adapter->npars[j].max_bw = pci_info[i].tx_max_bw;
  753. j++;
  754. }
  755. if (qlcnic_82xx_check(adapter)) {
  756. for (i = 0; i < QLCNIC_NIU_MAX_XG_PORTS; i++)
  757. adapter->eswitch[i].flags |= QLCNIC_SWITCH_ENABLE;
  758. } else if (!qlcnic_port_eswitch_cfg_capability(adapter)) {
  759. for (i = 0; i < QLCNIC_NIU_MAX_XG_PORTS; i++)
  760. qlcnic_enable_eswitch(adapter, i, 1);
  761. }
  762. kfree(pci_info);
  763. return 0;
  764. err_eswitch:
  765. kfree(adapter->eswitch);
  766. adapter->eswitch = NULL;
  767. err_npars:
  768. kfree(adapter->npars);
  769. adapter->npars = NULL;
  770. err_pci_info:
  771. kfree(pci_info);
  772. return ret;
  773. }
  774. static int
  775. qlcnic_set_function_modes(struct qlcnic_adapter *adapter)
  776. {
  777. u8 id;
  778. int ret;
  779. u32 data = QLCNIC_MGMT_FUNC;
  780. struct qlcnic_hardware_context *ahw = adapter->ahw;
  781. ret = qlcnic_api_lock(adapter);
  782. if (ret)
  783. goto err_lock;
  784. id = ahw->pci_func;
  785. data = QLC_SHARED_REG_RD32(adapter, QLCNIC_DRV_OP_MODE);
  786. data = (data & ~QLC_DEV_SET_DRV(0xf, id)) |
  787. QLC_DEV_SET_DRV(QLCNIC_MGMT_FUNC, id);
  788. QLC_SHARED_REG_WR32(adapter, QLCNIC_DRV_OP_MODE, data);
  789. qlcnic_api_unlock(adapter);
  790. err_lock:
  791. return ret;
  792. }
  793. static void qlcnic_check_vf(struct qlcnic_adapter *adapter,
  794. const struct pci_device_id *ent)
  795. {
  796. u32 op_mode, priv_level;
  797. /* Determine FW API version */
  798. adapter->ahw->fw_hal_version = QLC_SHARED_REG_RD32(adapter,
  799. QLCNIC_FW_API);
  800. /* Find PCI function number */
  801. qlcnic_get_func_no(adapter);
  802. /* Determine function privilege level */
  803. op_mode = QLC_SHARED_REG_RD32(adapter, QLCNIC_DRV_OP_MODE);
  804. if (op_mode == QLC_DEV_DRV_DEFAULT)
  805. priv_level = QLCNIC_MGMT_FUNC;
  806. else
  807. priv_level = QLC_DEV_GET_DRV(op_mode, adapter->ahw->pci_func);
  808. if (priv_level == QLCNIC_NON_PRIV_FUNC) {
  809. adapter->ahw->op_mode = QLCNIC_NON_PRIV_FUNC;
  810. dev_info(&adapter->pdev->dev,
  811. "HAL Version: %d Non Privileged function\n",
  812. adapter->ahw->fw_hal_version);
  813. adapter->nic_ops = &qlcnic_vf_ops;
  814. } else
  815. adapter->nic_ops = &qlcnic_ops;
  816. }
  817. #define QLCNIC_82XX_BAR0_LENGTH 0x00200000UL
  818. #define QLCNIC_83XX_BAR0_LENGTH 0x4000
  819. static void qlcnic_get_bar_length(u32 dev_id, ulong *bar)
  820. {
  821. switch (dev_id) {
  822. case PCI_DEVICE_ID_QLOGIC_QLE824X:
  823. *bar = QLCNIC_82XX_BAR0_LENGTH;
  824. break;
  825. case PCI_DEVICE_ID_QLOGIC_QLE834X:
  826. case PCI_DEVICE_ID_QLOGIC_QLE844X:
  827. case PCI_DEVICE_ID_QLOGIC_VF_QLE834X:
  828. case PCI_DEVICE_ID_QLOGIC_VF_QLE844X:
  829. *bar = QLCNIC_83XX_BAR0_LENGTH;
  830. break;
  831. default:
  832. *bar = 0;
  833. }
  834. }
  835. static int qlcnic_setup_pci_map(struct pci_dev *pdev,
  836. struct qlcnic_hardware_context *ahw)
  837. {
  838. u32 offset;
  839. void __iomem *mem_ptr0 = NULL;
  840. unsigned long mem_len, pci_len0 = 0, bar0_len;
  841. /* remap phys address */
  842. mem_len = pci_resource_len(pdev, 0);
  843. qlcnic_get_bar_length(pdev->device, &bar0_len);
  844. if (mem_len >= bar0_len) {
  845. mem_ptr0 = pci_ioremap_bar(pdev, 0);
  846. if (mem_ptr0 == NULL) {
  847. dev_err(&pdev->dev, "failed to map PCI bar 0\n");
  848. return -EIO;
  849. }
  850. pci_len0 = mem_len;
  851. } else {
  852. return -EIO;
  853. }
  854. dev_info(&pdev->dev, "%dKB memory map\n", (int)(mem_len >> 10));
  855. ahw->pci_base0 = mem_ptr0;
  856. ahw->pci_len0 = pci_len0;
  857. offset = QLCNIC_PCIX_PS_REG(PCIX_OCM_WINDOW_REG(ahw->pci_func));
  858. qlcnic_get_ioaddr(ahw, offset);
  859. return 0;
  860. }
  861. static bool qlcnic_validate_subsystem_id(struct qlcnic_adapter *adapter,
  862. int index)
  863. {
  864. struct pci_dev *pdev = adapter->pdev;
  865. unsigned short subsystem_vendor;
  866. bool ret = true;
  867. subsystem_vendor = pdev->subsystem_vendor;
  868. if (pdev->device == PCI_DEVICE_ID_QLOGIC_QLE824X ||
  869. pdev->device == PCI_DEVICE_ID_QLOGIC_QLE834X) {
  870. if (qlcnic_boards[index].sub_vendor == subsystem_vendor &&
  871. qlcnic_boards[index].sub_device == pdev->subsystem_device)
  872. ret = true;
  873. else
  874. ret = false;
  875. }
  876. return ret;
  877. }
  878. static void qlcnic_get_board_name(struct qlcnic_adapter *adapter, char *name)
  879. {
  880. struct pci_dev *pdev = adapter->pdev;
  881. int i, found = 0;
  882. for (i = 0; i < NUM_SUPPORTED_BOARDS; ++i) {
  883. if (qlcnic_boards[i].vendor == pdev->vendor &&
  884. qlcnic_boards[i].device == pdev->device &&
  885. qlcnic_validate_subsystem_id(adapter, i)) {
  886. found = 1;
  887. break;
  888. }
  889. }
  890. if (!found)
  891. sprintf(name, "%pM Gigabit Ethernet", adapter->mac_addr);
  892. else
  893. sprintf(name, "%pM: %s" , adapter->mac_addr,
  894. qlcnic_boards[i].short_name);
  895. }
  896. static void
  897. qlcnic_check_options(struct qlcnic_adapter *adapter)
  898. {
  899. int err;
  900. u32 fw_major, fw_minor, fw_build, prev_fw_version;
  901. struct pci_dev *pdev = adapter->pdev;
  902. struct qlcnic_hardware_context *ahw = adapter->ahw;
  903. struct qlcnic_fw_dump *fw_dump = &ahw->fw_dump;
  904. prev_fw_version = adapter->fw_version;
  905. fw_major = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  906. fw_minor = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_MINOR);
  907. fw_build = QLC_SHARED_REG_RD32(adapter, QLCNIC_FW_VERSION_SUB);
  908. adapter->fw_version = QLCNIC_VERSION_CODE(fw_major, fw_minor, fw_build);
  909. err = qlcnic_get_board_info(adapter);
  910. if (err) {
  911. dev_err(&pdev->dev, "Error getting board config info.\n");
  912. return;
  913. }
  914. if (ahw->op_mode != QLCNIC_NON_PRIV_FUNC) {
  915. if (fw_dump->tmpl_hdr == NULL ||
  916. adapter->fw_version > prev_fw_version) {
  917. if (fw_dump->tmpl_hdr)
  918. vfree(fw_dump->tmpl_hdr);
  919. if (!qlcnic_fw_cmd_get_minidump_temp(adapter))
  920. dev_info(&pdev->dev,
  921. "Supports FW dump capability\n");
  922. }
  923. }
  924. dev_info(&pdev->dev, "Driver v%s, firmware v%d.%d.%d\n",
  925. QLCNIC_LINUX_VERSIONID, fw_major, fw_minor, fw_build);
  926. if (adapter->ahw->port_type == QLCNIC_XGBE) {
  927. if (adapter->flags & QLCNIC_ESWITCH_ENABLED) {
  928. adapter->num_rxd = DEFAULT_RCV_DESCRIPTORS_VF;
  929. adapter->max_rxd = MAX_RCV_DESCRIPTORS_VF;
  930. } else {
  931. adapter->num_rxd = DEFAULT_RCV_DESCRIPTORS_10G;
  932. adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
  933. }
  934. adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  935. adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  936. } else if (adapter->ahw->port_type == QLCNIC_GBE) {
  937. adapter->num_rxd = DEFAULT_RCV_DESCRIPTORS_1G;
  938. adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_1G;
  939. adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_1G;
  940. adapter->max_rxd = MAX_RCV_DESCRIPTORS_1G;
  941. }
  942. adapter->ahw->msix_supported = !!qlcnic_use_msi_x;
  943. adapter->num_txd = MAX_CMD_DESCRIPTORS;
  944. adapter->max_rds_rings = MAX_RDS_RINGS;
  945. }
  946. static int
  947. qlcnic_initialize_nic(struct qlcnic_adapter *adapter)
  948. {
  949. struct qlcnic_info nic_info;
  950. int err = 0;
  951. memset(&nic_info, 0, sizeof(struct qlcnic_info));
  952. err = qlcnic_get_nic_info(adapter, &nic_info, adapter->ahw->pci_func);
  953. if (err)
  954. return err;
  955. adapter->ahw->physical_port = (u8)nic_info.phys_port;
  956. adapter->ahw->switch_mode = nic_info.switch_mode;
  957. adapter->ahw->max_tx_ques = nic_info.max_tx_ques;
  958. adapter->ahw->max_rx_ques = nic_info.max_rx_ques;
  959. adapter->ahw->capabilities = nic_info.capabilities;
  960. if (adapter->ahw->capabilities & QLCNIC_FW_CAPABILITY_MORE_CAPS) {
  961. u32 temp;
  962. temp = QLCRD32(adapter, CRB_FW_CAPABILITIES_2, &err);
  963. if (err == -EIO)
  964. return err;
  965. adapter->ahw->extra_capability[0] = temp;
  966. }
  967. adapter->ahw->max_mac_filters = nic_info.max_mac_filters;
  968. adapter->ahw->max_mtu = nic_info.max_mtu;
  969. /* Disable NPAR for 83XX */
  970. if (qlcnic_83xx_check(adapter))
  971. return err;
  972. if (adapter->ahw->capabilities & BIT_6)
  973. adapter->flags |= QLCNIC_ESWITCH_ENABLED;
  974. else
  975. adapter->flags &= ~QLCNIC_ESWITCH_ENABLED;
  976. return err;
  977. }
  978. void qlcnic_set_vlan_config(struct qlcnic_adapter *adapter,
  979. struct qlcnic_esw_func_cfg *esw_cfg)
  980. {
  981. if (esw_cfg->discard_tagged)
  982. adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
  983. else
  984. adapter->flags |= QLCNIC_TAGGING_ENABLED;
  985. if (esw_cfg->vlan_id) {
  986. adapter->rx_pvid = esw_cfg->vlan_id;
  987. adapter->tx_pvid = esw_cfg->vlan_id;
  988. } else {
  989. adapter->rx_pvid = 0;
  990. adapter->tx_pvid = 0;
  991. }
  992. }
  993. static int
  994. qlcnic_vlan_rx_add(struct net_device *netdev, __be16 proto, u16 vid)
  995. {
  996. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  997. int err;
  998. if (qlcnic_sriov_vf_check(adapter)) {
  999. err = qlcnic_sriov_cfg_vf_guest_vlan(adapter, vid, 1);
  1000. if (err) {
  1001. netdev_err(netdev,
  1002. "Cannot add VLAN filter for VLAN id %d, err=%d",
  1003. vid, err);
  1004. return err;
  1005. }
  1006. }
  1007. set_bit(vid, adapter->vlans);
  1008. return 0;
  1009. }
  1010. static int
  1011. qlcnic_vlan_rx_del(struct net_device *netdev, __be16 proto, u16 vid)
  1012. {
  1013. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  1014. int err;
  1015. if (qlcnic_sriov_vf_check(adapter)) {
  1016. err = qlcnic_sriov_cfg_vf_guest_vlan(adapter, vid, 0);
  1017. if (err) {
  1018. netdev_err(netdev,
  1019. "Cannot delete VLAN filter for VLAN id %d, err=%d",
  1020. vid, err);
  1021. return err;
  1022. }
  1023. }
  1024. qlcnic_restore_indev_addr(netdev, NETDEV_DOWN);
  1025. clear_bit(vid, adapter->vlans);
  1026. return 0;
  1027. }
  1028. void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *adapter,
  1029. struct qlcnic_esw_func_cfg *esw_cfg)
  1030. {
  1031. adapter->flags &= ~(QLCNIC_MACSPOOF | QLCNIC_MAC_OVERRIDE_DISABLED |
  1032. QLCNIC_PROMISC_DISABLED);
  1033. if (esw_cfg->mac_anti_spoof)
  1034. adapter->flags |= QLCNIC_MACSPOOF;
  1035. if (!esw_cfg->mac_override)
  1036. adapter->flags |= QLCNIC_MAC_OVERRIDE_DISABLED;
  1037. if (!esw_cfg->promisc_mode)
  1038. adapter->flags |= QLCNIC_PROMISC_DISABLED;
  1039. }
  1040. int qlcnic_set_eswitch_port_config(struct qlcnic_adapter *adapter)
  1041. {
  1042. struct qlcnic_esw_func_cfg esw_cfg;
  1043. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED))
  1044. return 0;
  1045. esw_cfg.pci_func = adapter->ahw->pci_func;
  1046. if (qlcnic_get_eswitch_port_config(adapter, &esw_cfg))
  1047. return -EIO;
  1048. qlcnic_set_vlan_config(adapter, &esw_cfg);
  1049. qlcnic_set_eswitch_port_features(adapter, &esw_cfg);
  1050. qlcnic_set_netdev_features(adapter, &esw_cfg);
  1051. return 0;
  1052. }
  1053. void qlcnic_set_netdev_features(struct qlcnic_adapter *adapter,
  1054. struct qlcnic_esw_func_cfg *esw_cfg)
  1055. {
  1056. struct net_device *netdev = adapter->netdev;
  1057. if (qlcnic_83xx_check(adapter))
  1058. return;
  1059. adapter->offload_flags = esw_cfg->offload_flags;
  1060. adapter->flags |= QLCNIC_APP_CHANGED_FLAGS;
  1061. netdev_update_features(netdev);
  1062. adapter->flags &= ~QLCNIC_APP_CHANGED_FLAGS;
  1063. }
  1064. static int
  1065. qlcnic_check_eswitch_mode(struct qlcnic_adapter *adapter)
  1066. {
  1067. u32 op_mode, priv_level;
  1068. int err = 0;
  1069. err = qlcnic_initialize_nic(adapter);
  1070. if (err)
  1071. return err;
  1072. if (adapter->flags & QLCNIC_ADAPTER_INITIALIZED)
  1073. return 0;
  1074. op_mode = QLC_SHARED_REG_RD32(adapter, QLCNIC_DRV_OP_MODE);
  1075. priv_level = QLC_DEV_GET_DRV(op_mode, adapter->ahw->pci_func);
  1076. if (op_mode == QLC_DEV_DRV_DEFAULT)
  1077. priv_level = QLCNIC_MGMT_FUNC;
  1078. else
  1079. priv_level = QLC_DEV_GET_DRV(op_mode, adapter->ahw->pci_func);
  1080. if (adapter->flags & QLCNIC_ESWITCH_ENABLED) {
  1081. if (priv_level == QLCNIC_MGMT_FUNC) {
  1082. adapter->ahw->op_mode = QLCNIC_MGMT_FUNC;
  1083. err = qlcnic_init_pci_info(adapter);
  1084. if (err)
  1085. return err;
  1086. /* Set privilege level for other functions */
  1087. qlcnic_set_function_modes(adapter);
  1088. dev_info(&adapter->pdev->dev,
  1089. "HAL Version: %d, Management function\n",
  1090. adapter->ahw->fw_hal_version);
  1091. } else if (priv_level == QLCNIC_PRIV_FUNC) {
  1092. adapter->ahw->op_mode = QLCNIC_PRIV_FUNC;
  1093. dev_info(&adapter->pdev->dev,
  1094. "HAL Version: %d, Privileged function\n",
  1095. adapter->ahw->fw_hal_version);
  1096. }
  1097. }
  1098. adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
  1099. return err;
  1100. }
  1101. int qlcnic_set_default_offload_settings(struct qlcnic_adapter *adapter)
  1102. {
  1103. struct qlcnic_esw_func_cfg esw_cfg;
  1104. struct qlcnic_npar_info *npar;
  1105. u8 i;
  1106. if (adapter->need_fw_reset)
  1107. return 0;
  1108. for (i = 0; i < adapter->ahw->act_pci_func; i++) {
  1109. if (!adapter->npars[i].eswitch_status)
  1110. continue;
  1111. memset(&esw_cfg, 0, sizeof(struct qlcnic_esw_func_cfg));
  1112. esw_cfg.pci_func = adapter->npars[i].pci_func;
  1113. esw_cfg.mac_override = BIT_0;
  1114. esw_cfg.promisc_mode = BIT_0;
  1115. if (qlcnic_82xx_check(adapter)) {
  1116. esw_cfg.offload_flags = BIT_0;
  1117. if (QLCNIC_IS_TSO_CAPABLE(adapter))
  1118. esw_cfg.offload_flags |= (BIT_1 | BIT_2);
  1119. }
  1120. if (qlcnic_config_switch_port(adapter, &esw_cfg))
  1121. return -EIO;
  1122. npar = &adapter->npars[i];
  1123. npar->pvid = esw_cfg.vlan_id;
  1124. npar->mac_override = esw_cfg.mac_override;
  1125. npar->mac_anti_spoof = esw_cfg.mac_anti_spoof;
  1126. npar->discard_tagged = esw_cfg.discard_tagged;
  1127. npar->promisc_mode = esw_cfg.promisc_mode;
  1128. npar->offload_flags = esw_cfg.offload_flags;
  1129. }
  1130. return 0;
  1131. }
  1132. static int
  1133. qlcnic_reset_eswitch_config(struct qlcnic_adapter *adapter,
  1134. struct qlcnic_npar_info *npar, int pci_func)
  1135. {
  1136. struct qlcnic_esw_func_cfg esw_cfg;
  1137. esw_cfg.op_mode = QLCNIC_PORT_DEFAULTS;
  1138. esw_cfg.pci_func = pci_func;
  1139. esw_cfg.vlan_id = npar->pvid;
  1140. esw_cfg.mac_override = npar->mac_override;
  1141. esw_cfg.discard_tagged = npar->discard_tagged;
  1142. esw_cfg.mac_anti_spoof = npar->mac_anti_spoof;
  1143. esw_cfg.offload_flags = npar->offload_flags;
  1144. esw_cfg.promisc_mode = npar->promisc_mode;
  1145. if (qlcnic_config_switch_port(adapter, &esw_cfg))
  1146. return -EIO;
  1147. esw_cfg.op_mode = QLCNIC_ADD_VLAN;
  1148. if (qlcnic_config_switch_port(adapter, &esw_cfg))
  1149. return -EIO;
  1150. return 0;
  1151. }
  1152. int qlcnic_reset_npar_config(struct qlcnic_adapter *adapter)
  1153. {
  1154. int i, err;
  1155. struct qlcnic_npar_info *npar;
  1156. struct qlcnic_info nic_info;
  1157. u8 pci_func;
  1158. if (qlcnic_82xx_check(adapter))
  1159. if (!adapter->need_fw_reset)
  1160. return 0;
  1161. /* Set the NPAR config data after FW reset */
  1162. for (i = 0; i < adapter->ahw->act_pci_func; i++) {
  1163. npar = &adapter->npars[i];
  1164. pci_func = npar->pci_func;
  1165. if (!adapter->npars[i].eswitch_status)
  1166. continue;
  1167. memset(&nic_info, 0, sizeof(struct qlcnic_info));
  1168. err = qlcnic_get_nic_info(adapter, &nic_info, pci_func);
  1169. if (err)
  1170. return err;
  1171. nic_info.min_tx_bw = npar->min_bw;
  1172. nic_info.max_tx_bw = npar->max_bw;
  1173. err = qlcnic_set_nic_info(adapter, &nic_info);
  1174. if (err)
  1175. return err;
  1176. if (npar->enable_pm) {
  1177. err = qlcnic_config_port_mirroring(adapter,
  1178. npar->dest_npar, 1,
  1179. pci_func);
  1180. if (err)
  1181. return err;
  1182. }
  1183. err = qlcnic_reset_eswitch_config(adapter, npar, pci_func);
  1184. if (err)
  1185. return err;
  1186. }
  1187. return 0;
  1188. }
  1189. static int qlcnic_check_npar_opertional(struct qlcnic_adapter *adapter)
  1190. {
  1191. u8 npar_opt_timeo = QLCNIC_DEV_NPAR_OPER_TIMEO;
  1192. u32 npar_state;
  1193. if (adapter->ahw->op_mode == QLCNIC_MGMT_FUNC)
  1194. return 0;
  1195. npar_state = QLC_SHARED_REG_RD32(adapter,
  1196. QLCNIC_CRB_DEV_NPAR_STATE);
  1197. while (npar_state != QLCNIC_DEV_NPAR_OPER && --npar_opt_timeo) {
  1198. msleep(1000);
  1199. npar_state = QLC_SHARED_REG_RD32(adapter,
  1200. QLCNIC_CRB_DEV_NPAR_STATE);
  1201. }
  1202. if (!npar_opt_timeo) {
  1203. dev_err(&adapter->pdev->dev,
  1204. "Waiting for NPAR state to operational timeout\n");
  1205. return -EIO;
  1206. }
  1207. return 0;
  1208. }
  1209. static int
  1210. qlcnic_set_mgmt_operations(struct qlcnic_adapter *adapter)
  1211. {
  1212. int err;
  1213. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED) ||
  1214. adapter->ahw->op_mode != QLCNIC_MGMT_FUNC)
  1215. return 0;
  1216. err = qlcnic_set_default_offload_settings(adapter);
  1217. if (err)
  1218. return err;
  1219. err = qlcnic_reset_npar_config(adapter);
  1220. if (err)
  1221. return err;
  1222. qlcnic_dev_set_npar_ready(adapter);
  1223. return err;
  1224. }
  1225. int qlcnic_82xx_start_firmware(struct qlcnic_adapter *adapter)
  1226. {
  1227. int err;
  1228. err = qlcnic_can_start_firmware(adapter);
  1229. if (err < 0)
  1230. return err;
  1231. else if (!err)
  1232. goto check_fw_status;
  1233. if (qlcnic_load_fw_file)
  1234. qlcnic_request_firmware(adapter);
  1235. else {
  1236. err = qlcnic_check_flash_fw_ver(adapter);
  1237. if (err)
  1238. goto err_out;
  1239. adapter->ahw->fw_type = QLCNIC_FLASH_ROMIMAGE;
  1240. }
  1241. err = qlcnic_need_fw_reset(adapter);
  1242. if (err == 0)
  1243. goto check_fw_status;
  1244. err = qlcnic_pinit_from_rom(adapter);
  1245. if (err)
  1246. goto err_out;
  1247. err = qlcnic_load_firmware(adapter);
  1248. if (err)
  1249. goto err_out;
  1250. qlcnic_release_firmware(adapter);
  1251. QLCWR32(adapter, CRB_DRIVER_VERSION, QLCNIC_DRIVER_VERSION);
  1252. check_fw_status:
  1253. err = qlcnic_check_fw_status(adapter);
  1254. if (err)
  1255. goto err_out;
  1256. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_STATE, QLCNIC_DEV_READY);
  1257. qlcnic_idc_debug_info(adapter, 1);
  1258. err = qlcnic_check_eswitch_mode(adapter);
  1259. if (err) {
  1260. dev_err(&adapter->pdev->dev,
  1261. "Memory allocation failed for eswitch\n");
  1262. goto err_out;
  1263. }
  1264. err = qlcnic_set_mgmt_operations(adapter);
  1265. if (err)
  1266. goto err_out;
  1267. qlcnic_check_options(adapter);
  1268. adapter->need_fw_reset = 0;
  1269. qlcnic_release_firmware(adapter);
  1270. return 0;
  1271. err_out:
  1272. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_STATE, QLCNIC_DEV_FAILED);
  1273. dev_err(&adapter->pdev->dev, "Device state set to failed\n");
  1274. qlcnic_release_firmware(adapter);
  1275. return err;
  1276. }
  1277. static int
  1278. qlcnic_request_irq(struct qlcnic_adapter *adapter)
  1279. {
  1280. irq_handler_t handler;
  1281. struct qlcnic_host_sds_ring *sds_ring;
  1282. struct qlcnic_host_tx_ring *tx_ring;
  1283. int err, ring, num_sds_rings;
  1284. unsigned long flags = 0;
  1285. struct net_device *netdev = adapter->netdev;
  1286. struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
  1287. if (adapter->ahw->diag_test == QLCNIC_INTERRUPT_TEST) {
  1288. if (qlcnic_82xx_check(adapter))
  1289. handler = qlcnic_tmp_intr;
  1290. else
  1291. handler = qlcnic_83xx_tmp_intr;
  1292. if (!QLCNIC_IS_MSI_FAMILY(adapter))
  1293. flags |= IRQF_SHARED;
  1294. } else {
  1295. if (adapter->flags & QLCNIC_MSIX_ENABLED)
  1296. handler = qlcnic_msix_intr;
  1297. else if (adapter->flags & QLCNIC_MSI_ENABLED)
  1298. handler = qlcnic_msi_intr;
  1299. else {
  1300. flags |= IRQF_SHARED;
  1301. if (qlcnic_82xx_check(adapter))
  1302. handler = qlcnic_intr;
  1303. else
  1304. handler = qlcnic_83xx_intr;
  1305. }
  1306. }
  1307. adapter->irq = netdev->irq;
  1308. if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST) {
  1309. if (qlcnic_82xx_check(adapter) ||
  1310. (qlcnic_83xx_check(adapter) &&
  1311. (adapter->flags & QLCNIC_MSIX_ENABLED))) {
  1312. num_sds_rings = adapter->max_sds_rings;
  1313. for (ring = 0; ring < num_sds_rings; ring++) {
  1314. sds_ring = &recv_ctx->sds_rings[ring];
  1315. if (qlcnic_82xx_check(adapter) &&
  1316. !qlcnic_check_multi_tx(adapter) &&
  1317. (ring == (num_sds_rings - 1))) {
  1318. if (!(adapter->flags &
  1319. QLCNIC_MSIX_ENABLED))
  1320. snprintf(sds_ring->name,
  1321. sizeof(sds_ring->name),
  1322. "qlcnic");
  1323. else
  1324. snprintf(sds_ring->name,
  1325. sizeof(sds_ring->name),
  1326. "%s-tx-0-rx-%d",
  1327. netdev->name, ring);
  1328. } else {
  1329. snprintf(sds_ring->name,
  1330. sizeof(sds_ring->name),
  1331. "%s-rx-%d",
  1332. netdev->name, ring);
  1333. }
  1334. err = request_irq(sds_ring->irq, handler, flags,
  1335. sds_ring->name, sds_ring);
  1336. if (err)
  1337. return err;
  1338. }
  1339. }
  1340. if ((qlcnic_82xx_check(adapter) &&
  1341. qlcnic_check_multi_tx(adapter)) ||
  1342. (qlcnic_83xx_check(adapter) &&
  1343. (adapter->flags & QLCNIC_MSIX_ENABLED) &&
  1344. !(adapter->flags & QLCNIC_TX_INTR_SHARED))) {
  1345. handler = qlcnic_msix_tx_intr;
  1346. for (ring = 0; ring < adapter->max_drv_tx_rings;
  1347. ring++) {
  1348. tx_ring = &adapter->tx_ring[ring];
  1349. snprintf(tx_ring->name, sizeof(tx_ring->name),
  1350. "%s-tx-%d", netdev->name, ring);
  1351. err = request_irq(tx_ring->irq, handler, flags,
  1352. tx_ring->name, tx_ring);
  1353. if (err)
  1354. return err;
  1355. }
  1356. }
  1357. }
  1358. return 0;
  1359. }
  1360. static void
  1361. qlcnic_free_irq(struct qlcnic_adapter *adapter)
  1362. {
  1363. int ring;
  1364. struct qlcnic_host_sds_ring *sds_ring;
  1365. struct qlcnic_host_tx_ring *tx_ring;
  1366. struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
  1367. if (adapter->ahw->diag_test != QLCNIC_LOOPBACK_TEST) {
  1368. if (qlcnic_82xx_check(adapter) ||
  1369. (qlcnic_83xx_check(adapter) &&
  1370. (adapter->flags & QLCNIC_MSIX_ENABLED))) {
  1371. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  1372. sds_ring = &recv_ctx->sds_rings[ring];
  1373. free_irq(sds_ring->irq, sds_ring);
  1374. }
  1375. }
  1376. if ((qlcnic_83xx_check(adapter) &&
  1377. !(adapter->flags & QLCNIC_TX_INTR_SHARED)) ||
  1378. (qlcnic_82xx_check(adapter) &&
  1379. qlcnic_check_multi_tx(adapter))) {
  1380. for (ring = 0; ring < adapter->max_drv_tx_rings;
  1381. ring++) {
  1382. tx_ring = &adapter->tx_ring[ring];
  1383. if (tx_ring->irq)
  1384. free_irq(tx_ring->irq, tx_ring);
  1385. }
  1386. }
  1387. }
  1388. }
  1389. static void qlcnic_get_lro_mss_capability(struct qlcnic_adapter *adapter)
  1390. {
  1391. u32 capab = 0;
  1392. if (qlcnic_82xx_check(adapter)) {
  1393. if (adapter->ahw->extra_capability[0] &
  1394. QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG)
  1395. adapter->flags |= QLCNIC_FW_LRO_MSS_CAP;
  1396. } else {
  1397. capab = adapter->ahw->capabilities;
  1398. if (QLC_83XX_GET_FW_LRO_MSS_CAPABILITY(capab))
  1399. adapter->flags |= QLCNIC_FW_LRO_MSS_CAP;
  1400. }
  1401. }
  1402. int __qlcnic_up(struct qlcnic_adapter *adapter, struct net_device *netdev)
  1403. {
  1404. int ring;
  1405. struct qlcnic_host_rds_ring *rds_ring;
  1406. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  1407. return -EIO;
  1408. if (test_bit(__QLCNIC_DEV_UP, &adapter->state))
  1409. return 0;
  1410. if (qlcnic_set_eswitch_port_config(adapter))
  1411. return -EIO;
  1412. qlcnic_get_lro_mss_capability(adapter);
  1413. if (qlcnic_fw_create_ctx(adapter))
  1414. return -EIO;
  1415. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  1416. rds_ring = &adapter->recv_ctx->rds_rings[ring];
  1417. qlcnic_post_rx_buffers(adapter, rds_ring, ring);
  1418. }
  1419. qlcnic_set_multi(netdev);
  1420. qlcnic_fw_cmd_set_mtu(adapter, netdev->mtu);
  1421. adapter->ahw->linkup = 0;
  1422. if (adapter->max_sds_rings > 1)
  1423. qlcnic_config_rss(adapter, 1);
  1424. qlcnic_config_intr_coalesce(adapter);
  1425. if (netdev->features & NETIF_F_LRO)
  1426. qlcnic_config_hw_lro(adapter, QLCNIC_LRO_ENABLED);
  1427. set_bit(__QLCNIC_DEV_UP, &adapter->state);
  1428. qlcnic_napi_enable(adapter);
  1429. qlcnic_linkevent_request(adapter, 1);
  1430. adapter->ahw->reset_context = 0;
  1431. return 0;
  1432. }
  1433. int qlcnic_up(struct qlcnic_adapter *adapter, struct net_device *netdev)
  1434. {
  1435. int err = 0;
  1436. rtnl_lock();
  1437. if (netif_running(netdev))
  1438. err = __qlcnic_up(adapter, netdev);
  1439. rtnl_unlock();
  1440. return err;
  1441. }
  1442. void __qlcnic_down(struct qlcnic_adapter *adapter, struct net_device *netdev)
  1443. {
  1444. int ring;
  1445. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  1446. return;
  1447. if (!test_and_clear_bit(__QLCNIC_DEV_UP, &adapter->state))
  1448. return;
  1449. if (qlcnic_sriov_vf_check(adapter))
  1450. qlcnic_sriov_cleanup_async_list(&adapter->ahw->sriov->bc);
  1451. smp_mb();
  1452. netif_carrier_off(netdev);
  1453. adapter->ahw->linkup = 0;
  1454. netif_tx_disable(netdev);
  1455. qlcnic_free_mac_list(adapter);
  1456. if (adapter->fhash.fnum)
  1457. qlcnic_delete_lb_filters(adapter);
  1458. qlcnic_nic_set_promisc(adapter, QLCNIC_NIU_NON_PROMISC_MODE);
  1459. qlcnic_napi_disable(adapter);
  1460. qlcnic_fw_destroy_ctx(adapter);
  1461. adapter->flags &= ~QLCNIC_FW_LRO_MSS_CAP;
  1462. qlcnic_reset_rx_buffers_list(adapter);
  1463. for (ring = 0; ring < adapter->max_drv_tx_rings; ring++)
  1464. qlcnic_release_tx_buffers(adapter, &adapter->tx_ring[ring]);
  1465. }
  1466. /* Usage: During suspend and firmware recovery module */
  1467. void qlcnic_down(struct qlcnic_adapter *adapter, struct net_device *netdev)
  1468. {
  1469. rtnl_lock();
  1470. if (netif_running(netdev))
  1471. __qlcnic_down(adapter, netdev);
  1472. rtnl_unlock();
  1473. }
  1474. int
  1475. qlcnic_attach(struct qlcnic_adapter *adapter)
  1476. {
  1477. struct net_device *netdev = adapter->netdev;
  1478. struct pci_dev *pdev = adapter->pdev;
  1479. int err;
  1480. if (adapter->is_up == QLCNIC_ADAPTER_UP_MAGIC)
  1481. return 0;
  1482. err = qlcnic_napi_add(adapter, netdev);
  1483. if (err)
  1484. return err;
  1485. err = qlcnic_alloc_sw_resources(adapter);
  1486. if (err) {
  1487. dev_err(&pdev->dev, "Error in setting sw resources\n");
  1488. goto err_out_napi_del;
  1489. }
  1490. err = qlcnic_alloc_hw_resources(adapter);
  1491. if (err) {
  1492. dev_err(&pdev->dev, "Error in setting hw resources\n");
  1493. goto err_out_free_sw;
  1494. }
  1495. err = qlcnic_request_irq(adapter);
  1496. if (err) {
  1497. dev_err(&pdev->dev, "failed to setup interrupt\n");
  1498. goto err_out_free_hw;
  1499. }
  1500. qlcnic_create_sysfs_entries(adapter);
  1501. adapter->is_up = QLCNIC_ADAPTER_UP_MAGIC;
  1502. return 0;
  1503. err_out_free_hw:
  1504. qlcnic_free_hw_resources(adapter);
  1505. err_out_free_sw:
  1506. qlcnic_free_sw_resources(adapter);
  1507. err_out_napi_del:
  1508. qlcnic_napi_del(adapter);
  1509. return err;
  1510. }
  1511. void qlcnic_detach(struct qlcnic_adapter *adapter)
  1512. {
  1513. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  1514. return;
  1515. qlcnic_remove_sysfs_entries(adapter);
  1516. qlcnic_free_hw_resources(adapter);
  1517. qlcnic_release_rx_buffers(adapter);
  1518. qlcnic_free_irq(adapter);
  1519. qlcnic_napi_del(adapter);
  1520. qlcnic_free_sw_resources(adapter);
  1521. adapter->is_up = 0;
  1522. }
  1523. void qlcnic_diag_free_res(struct net_device *netdev, int max_sds_rings)
  1524. {
  1525. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  1526. struct qlcnic_host_sds_ring *sds_ring;
  1527. int max_tx_rings = adapter->max_drv_tx_rings;
  1528. int ring;
  1529. clear_bit(__QLCNIC_DEV_UP, &adapter->state);
  1530. if (adapter->ahw->diag_test == QLCNIC_INTERRUPT_TEST) {
  1531. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  1532. sds_ring = &adapter->recv_ctx->sds_rings[ring];
  1533. qlcnic_disable_int(sds_ring);
  1534. }
  1535. }
  1536. qlcnic_fw_destroy_ctx(adapter);
  1537. qlcnic_detach(adapter);
  1538. adapter->ahw->diag_test = 0;
  1539. adapter->max_sds_rings = max_sds_rings;
  1540. adapter->max_drv_tx_rings = max_tx_rings;
  1541. if (qlcnic_attach(adapter))
  1542. goto out;
  1543. if (netif_running(netdev))
  1544. __qlcnic_up(adapter, netdev);
  1545. out:
  1546. netif_device_attach(netdev);
  1547. }
  1548. static int qlcnic_alloc_adapter_resources(struct qlcnic_adapter *adapter)
  1549. {
  1550. struct qlcnic_hardware_context *ahw = adapter->ahw;
  1551. int err = 0;
  1552. adapter->recv_ctx = kzalloc(sizeof(struct qlcnic_recv_context),
  1553. GFP_KERNEL);
  1554. if (!adapter->recv_ctx) {
  1555. err = -ENOMEM;
  1556. goto err_out;
  1557. }
  1558. /* Initialize interrupt coalesce parameters */
  1559. ahw->coal.flag = QLCNIC_INTR_DEFAULT;
  1560. ahw->coal.type = QLCNIC_INTR_COAL_TYPE_RX;
  1561. ahw->coal.rx_time_us = QLCNIC_DEF_INTR_COALESCE_RX_TIME_US;
  1562. ahw->coal.rx_packets = QLCNIC_DEF_INTR_COALESCE_RX_PACKETS;
  1563. if (qlcnic_83xx_check(adapter)) {
  1564. ahw->coal.tx_time_us = QLCNIC_DEF_INTR_COALESCE_TX_TIME_US;
  1565. ahw->coal.tx_packets = QLCNIC_DEF_INTR_COALESCE_TX_PACKETS;
  1566. }
  1567. /* clear stats */
  1568. memset(&adapter->stats, 0, sizeof(adapter->stats));
  1569. err_out:
  1570. return err;
  1571. }
  1572. static void qlcnic_free_adapter_resources(struct qlcnic_adapter *adapter)
  1573. {
  1574. kfree(adapter->recv_ctx);
  1575. adapter->recv_ctx = NULL;
  1576. if (adapter->ahw->fw_dump.tmpl_hdr) {
  1577. vfree(adapter->ahw->fw_dump.tmpl_hdr);
  1578. adapter->ahw->fw_dump.tmpl_hdr = NULL;
  1579. }
  1580. kfree(adapter->ahw->reset.buff);
  1581. adapter->ahw->fw_dump.tmpl_hdr = NULL;
  1582. }
  1583. int qlcnic_diag_alloc_res(struct net_device *netdev, int test)
  1584. {
  1585. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  1586. struct qlcnic_host_sds_ring *sds_ring;
  1587. struct qlcnic_host_rds_ring *rds_ring;
  1588. int ring;
  1589. int ret;
  1590. netif_device_detach(netdev);
  1591. if (netif_running(netdev))
  1592. __qlcnic_down(adapter, netdev);
  1593. qlcnic_detach(adapter);
  1594. adapter->max_sds_rings = 1;
  1595. adapter->ahw->diag_test = test;
  1596. adapter->ahw->linkup = 0;
  1597. adapter->max_drv_tx_rings = 1;
  1598. ret = qlcnic_attach(adapter);
  1599. if (ret) {
  1600. netif_device_attach(netdev);
  1601. return ret;
  1602. }
  1603. ret = qlcnic_fw_create_ctx(adapter);
  1604. if (ret) {
  1605. qlcnic_detach(adapter);
  1606. netif_device_attach(netdev);
  1607. return ret;
  1608. }
  1609. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  1610. rds_ring = &adapter->recv_ctx->rds_rings[ring];
  1611. qlcnic_post_rx_buffers(adapter, rds_ring, ring);
  1612. }
  1613. if (adapter->ahw->diag_test == QLCNIC_INTERRUPT_TEST) {
  1614. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  1615. sds_ring = &adapter->recv_ctx->sds_rings[ring];
  1616. qlcnic_enable_int(sds_ring);
  1617. }
  1618. }
  1619. if (adapter->ahw->diag_test == QLCNIC_LOOPBACK_TEST) {
  1620. adapter->ahw->loopback_state = 0;
  1621. qlcnic_linkevent_request(adapter, 1);
  1622. }
  1623. set_bit(__QLCNIC_DEV_UP, &adapter->state);
  1624. return 0;
  1625. }
  1626. /* Reset context in hardware only */
  1627. static int
  1628. qlcnic_reset_hw_context(struct qlcnic_adapter *adapter)
  1629. {
  1630. struct net_device *netdev = adapter->netdev;
  1631. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  1632. return -EBUSY;
  1633. netif_device_detach(netdev);
  1634. qlcnic_down(adapter, netdev);
  1635. qlcnic_up(adapter, netdev);
  1636. netif_device_attach(netdev);
  1637. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  1638. dev_err(&adapter->pdev->dev, "%s:\n", __func__);
  1639. return 0;
  1640. }
  1641. int
  1642. qlcnic_reset_context(struct qlcnic_adapter *adapter)
  1643. {
  1644. int err = 0;
  1645. struct net_device *netdev = adapter->netdev;
  1646. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  1647. return -EBUSY;
  1648. if (adapter->is_up == QLCNIC_ADAPTER_UP_MAGIC) {
  1649. netif_device_detach(netdev);
  1650. if (netif_running(netdev))
  1651. __qlcnic_down(adapter, netdev);
  1652. qlcnic_detach(adapter);
  1653. if (netif_running(netdev)) {
  1654. err = qlcnic_attach(adapter);
  1655. if (!err) {
  1656. __qlcnic_up(adapter, netdev);
  1657. qlcnic_restore_indev_addr(netdev, NETDEV_UP);
  1658. }
  1659. }
  1660. netif_device_attach(netdev);
  1661. }
  1662. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  1663. return err;
  1664. }
  1665. void qlcnic_82xx_set_mac_filter_count(struct qlcnic_adapter *adapter)
  1666. {
  1667. struct qlcnic_hardware_context *ahw = adapter->ahw;
  1668. u16 act_pci_fn = ahw->act_pci_func;
  1669. u16 count;
  1670. ahw->max_mc_count = QLCNIC_MAX_MC_COUNT;
  1671. if (act_pci_fn <= 2)
  1672. count = (QLCNIC_MAX_UC_COUNT - QLCNIC_MAX_MC_COUNT) /
  1673. act_pci_fn;
  1674. else
  1675. count = (QLCNIC_LB_MAX_FILTERS - QLCNIC_MAX_MC_COUNT) /
  1676. act_pci_fn;
  1677. ahw->max_uc_count = count;
  1678. }
  1679. int
  1680. qlcnic_setup_netdev(struct qlcnic_adapter *adapter, struct net_device *netdev,
  1681. int pci_using_dac)
  1682. {
  1683. int err;
  1684. struct pci_dev *pdev = adapter->pdev;
  1685. adapter->rx_csum = 1;
  1686. adapter->ahw->mc_enabled = 0;
  1687. qlcnic_set_mac_filter_count(adapter);
  1688. netdev->netdev_ops = &qlcnic_netdev_ops;
  1689. netdev->watchdog_timeo = QLCNIC_WATCHDOG_TIMEOUTVALUE * HZ;
  1690. qlcnic_change_mtu(netdev, netdev->mtu);
  1691. if (qlcnic_sriov_vf_check(adapter))
  1692. SET_ETHTOOL_OPS(netdev, &qlcnic_sriov_vf_ethtool_ops);
  1693. else
  1694. SET_ETHTOOL_OPS(netdev, &qlcnic_ethtool_ops);
  1695. netdev->features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  1696. NETIF_F_IPV6_CSUM | NETIF_F_GRO |
  1697. NETIF_F_HW_VLAN_CTAG_RX);
  1698. netdev->vlan_features |= (NETIF_F_SG | NETIF_F_IP_CSUM |
  1699. NETIF_F_IPV6_CSUM);
  1700. if (QLCNIC_IS_TSO_CAPABLE(adapter)) {
  1701. netdev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
  1702. netdev->vlan_features |= (NETIF_F_TSO | NETIF_F_TSO6);
  1703. }
  1704. if (pci_using_dac) {
  1705. netdev->features |= NETIF_F_HIGHDMA;
  1706. netdev->vlan_features |= NETIF_F_HIGHDMA;
  1707. }
  1708. if (qlcnic_vlan_tx_check(adapter))
  1709. netdev->features |= (NETIF_F_HW_VLAN_CTAG_TX);
  1710. if (qlcnic_sriov_vf_check(adapter))
  1711. netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
  1712. if (adapter->ahw->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
  1713. netdev->features |= NETIF_F_LRO;
  1714. netdev->hw_features = netdev->features;
  1715. netdev->priv_flags |= IFF_UNICAST_FLT;
  1716. netdev->irq = adapter->msix_entries[0].vector;
  1717. err = qlcnic_set_real_num_queues(adapter, netdev);
  1718. if (err)
  1719. return err;
  1720. err = register_netdev(netdev);
  1721. if (err) {
  1722. dev_err(&pdev->dev, "failed to register net device\n");
  1723. return err;
  1724. }
  1725. qlcnic_dcb_init_dcbnl_ops(adapter);
  1726. return 0;
  1727. }
  1728. static int qlcnic_set_dma_mask(struct pci_dev *pdev, int *pci_using_dac)
  1729. {
  1730. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
  1731. !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
  1732. *pci_using_dac = 1;
  1733. else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) &&
  1734. !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
  1735. *pci_using_dac = 0;
  1736. else {
  1737. dev_err(&pdev->dev, "Unable to set DMA mask, aborting\n");
  1738. return -EIO;
  1739. }
  1740. return 0;
  1741. }
  1742. void qlcnic_free_tx_rings(struct qlcnic_adapter *adapter)
  1743. {
  1744. int ring;
  1745. struct qlcnic_host_tx_ring *tx_ring;
  1746. for (ring = 0; ring < adapter->max_drv_tx_rings; ring++) {
  1747. tx_ring = &adapter->tx_ring[ring];
  1748. if (tx_ring && tx_ring->cmd_buf_arr != NULL) {
  1749. vfree(tx_ring->cmd_buf_arr);
  1750. tx_ring->cmd_buf_arr = NULL;
  1751. }
  1752. }
  1753. if (adapter->tx_ring != NULL)
  1754. kfree(adapter->tx_ring);
  1755. }
  1756. int qlcnic_alloc_tx_rings(struct qlcnic_adapter *adapter,
  1757. struct net_device *netdev)
  1758. {
  1759. int ring, vector, index;
  1760. struct qlcnic_host_tx_ring *tx_ring;
  1761. struct qlcnic_cmd_buffer *cmd_buf_arr;
  1762. tx_ring = kcalloc(adapter->max_drv_tx_rings,
  1763. sizeof(struct qlcnic_host_tx_ring), GFP_KERNEL);
  1764. if (tx_ring == NULL)
  1765. return -ENOMEM;
  1766. adapter->tx_ring = tx_ring;
  1767. for (ring = 0; ring < adapter->max_drv_tx_rings; ring++) {
  1768. tx_ring = &adapter->tx_ring[ring];
  1769. tx_ring->num_desc = adapter->num_txd;
  1770. tx_ring->txq = netdev_get_tx_queue(netdev, ring);
  1771. cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring));
  1772. if (cmd_buf_arr == NULL) {
  1773. qlcnic_free_tx_rings(adapter);
  1774. return -ENOMEM;
  1775. }
  1776. memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
  1777. tx_ring->cmd_buf_arr = cmd_buf_arr;
  1778. }
  1779. if (qlcnic_83xx_check(adapter) ||
  1780. (qlcnic_82xx_check(adapter) && qlcnic_check_multi_tx(adapter))) {
  1781. for (ring = 0; ring < adapter->max_drv_tx_rings; ring++) {
  1782. tx_ring = &adapter->tx_ring[ring];
  1783. tx_ring->adapter = adapter;
  1784. if (adapter->flags & QLCNIC_MSIX_ENABLED) {
  1785. index = adapter->max_sds_rings + ring;
  1786. vector = adapter->msix_entries[index].vector;
  1787. tx_ring->irq = vector;
  1788. }
  1789. }
  1790. }
  1791. return 0;
  1792. }
  1793. void qlcnic_set_drv_version(struct qlcnic_adapter *adapter)
  1794. {
  1795. struct qlcnic_hardware_context *ahw = adapter->ahw;
  1796. u32 fw_cmd = 0;
  1797. if (qlcnic_82xx_check(adapter))
  1798. fw_cmd = QLCNIC_CMD_82XX_SET_DRV_VER;
  1799. else if (qlcnic_83xx_check(adapter))
  1800. fw_cmd = QLCNIC_CMD_83XX_SET_DRV_VER;
  1801. if ((ahw->capabilities & QLCNIC_FW_CAPABILITY_MORE_CAPS) &&
  1802. (ahw->extra_capability[0] & QLCNIC_FW_CAPABILITY_SET_DRV_VER))
  1803. qlcnic_fw_cmd_set_drv_version(adapter, fw_cmd);
  1804. }
  1805. static int qlcnic_register_dcb(struct qlcnic_adapter *adapter)
  1806. {
  1807. return __qlcnic_register_dcb(adapter);
  1808. }
  1809. void qlcnic_clear_dcb_ops(struct qlcnic_adapter *adapter)
  1810. {
  1811. kfree(adapter->dcb);
  1812. adapter->dcb = NULL;
  1813. }
  1814. static int
  1815. qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1816. {
  1817. struct net_device *netdev = NULL;
  1818. struct qlcnic_adapter *adapter = NULL;
  1819. struct qlcnic_hardware_context *ahw;
  1820. int err, pci_using_dac = -1;
  1821. char board_name[QLCNIC_MAX_BOARD_NAME_LEN + 19]; /* MAC + ": " + name */
  1822. if (pdev->is_virtfn)
  1823. return -ENODEV;
  1824. err = pci_enable_device(pdev);
  1825. if (err)
  1826. return err;
  1827. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
  1828. err = -ENODEV;
  1829. goto err_out_disable_pdev;
  1830. }
  1831. err = qlcnic_set_dma_mask(pdev, &pci_using_dac);
  1832. if (err)
  1833. goto err_out_disable_pdev;
  1834. err = pci_request_regions(pdev, qlcnic_driver_name);
  1835. if (err)
  1836. goto err_out_disable_pdev;
  1837. pci_set_master(pdev);
  1838. pci_enable_pcie_error_reporting(pdev);
  1839. ahw = kzalloc(sizeof(struct qlcnic_hardware_context), GFP_KERNEL);
  1840. if (!ahw) {
  1841. err = -ENOMEM;
  1842. goto err_out_free_res;
  1843. }
  1844. switch (ent->device) {
  1845. case PCI_DEVICE_ID_QLOGIC_QLE824X:
  1846. ahw->hw_ops = &qlcnic_hw_ops;
  1847. ahw->reg_tbl = (u32 *) qlcnic_reg_tbl;
  1848. break;
  1849. case PCI_DEVICE_ID_QLOGIC_QLE834X:
  1850. case PCI_DEVICE_ID_QLOGIC_QLE844X:
  1851. qlcnic_83xx_register_map(ahw);
  1852. break;
  1853. case PCI_DEVICE_ID_QLOGIC_VF_QLE834X:
  1854. case PCI_DEVICE_ID_QLOGIC_VF_QLE844X:
  1855. qlcnic_sriov_vf_register_map(ahw);
  1856. break;
  1857. default:
  1858. goto err_out_free_hw_res;
  1859. }
  1860. err = qlcnic_setup_pci_map(pdev, ahw);
  1861. if (err)
  1862. goto err_out_free_hw_res;
  1863. netdev = alloc_etherdev_mq(sizeof(struct qlcnic_adapter),
  1864. QLCNIC_MAX_TX_RINGS);
  1865. if (!netdev) {
  1866. err = -ENOMEM;
  1867. goto err_out_iounmap;
  1868. }
  1869. SET_NETDEV_DEV(netdev, &pdev->dev);
  1870. adapter = netdev_priv(netdev);
  1871. adapter->netdev = netdev;
  1872. adapter->pdev = pdev;
  1873. adapter->ahw = ahw;
  1874. adapter->qlcnic_wq = create_singlethread_workqueue("qlcnic");
  1875. if (adapter->qlcnic_wq == NULL) {
  1876. err = -ENOMEM;
  1877. dev_err(&pdev->dev, "Failed to create workqueue\n");
  1878. goto err_out_free_netdev;
  1879. }
  1880. err = qlcnic_alloc_adapter_resources(adapter);
  1881. if (err)
  1882. goto err_out_free_netdev;
  1883. adapter->dev_rst_time = jiffies;
  1884. adapter->ahw->revision_id = pdev->revision;
  1885. if (qlcnic_mac_learn == FDB_MAC_LEARN)
  1886. adapter->fdb_mac_learn = true;
  1887. else if (qlcnic_mac_learn == DRV_MAC_LEARN)
  1888. adapter->drv_mac_learn = true;
  1889. rwlock_init(&adapter->ahw->crb_lock);
  1890. mutex_init(&adapter->ahw->mem_lock);
  1891. INIT_LIST_HEAD(&adapter->mac_list);
  1892. qlcnic_register_dcb(adapter);
  1893. if (qlcnic_82xx_check(adapter)) {
  1894. qlcnic_check_vf(adapter, ent);
  1895. adapter->portnum = adapter->ahw->pci_func;
  1896. err = qlcnic_start_firmware(adapter);
  1897. if (err) {
  1898. dev_err(&pdev->dev, "Loading fw failed.Please Reboot\n");
  1899. goto err_out_free_hw;
  1900. }
  1901. qlcnic_get_multiq_capability(adapter);
  1902. if ((adapter->ahw->act_pci_func > 2) &&
  1903. qlcnic_check_multi_tx(adapter)) {
  1904. adapter->max_drv_tx_rings = QLCNIC_DEF_NUM_TX_RINGS;
  1905. dev_info(&adapter->pdev->dev,
  1906. "vNIC mode enabled, Set max TX rings = %d\n",
  1907. adapter->max_drv_tx_rings);
  1908. }
  1909. if (!qlcnic_check_multi_tx(adapter)) {
  1910. clear_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
  1911. adapter->max_drv_tx_rings = 1;
  1912. }
  1913. err = qlcnic_setup_idc_param(adapter);
  1914. if (err)
  1915. goto err_out_free_hw;
  1916. adapter->flags |= QLCNIC_NEED_FLR;
  1917. if (adapter->dcb && qlcnic_dcb_attach(adapter))
  1918. qlcnic_clear_dcb_ops(adapter);
  1919. } else if (qlcnic_83xx_check(adapter)) {
  1920. adapter->max_drv_tx_rings = 1;
  1921. qlcnic_83xx_check_vf(adapter, ent);
  1922. adapter->portnum = adapter->ahw->pci_func;
  1923. err = qlcnic_83xx_init(adapter, pci_using_dac);
  1924. if (err) {
  1925. dev_err(&pdev->dev, "%s: failed\n", __func__);
  1926. goto err_out_free_hw;
  1927. }
  1928. if (qlcnic_sriov_vf_check(adapter))
  1929. return 0;
  1930. } else {
  1931. dev_err(&pdev->dev,
  1932. "%s: failed. Please Reboot\n", __func__);
  1933. goto err_out_free_hw;
  1934. }
  1935. if (qlcnic_read_mac_addr(adapter))
  1936. dev_warn(&pdev->dev, "failed to read mac addr\n");
  1937. qlcnic_read_phys_port_id(adapter);
  1938. if (adapter->portnum == 0) {
  1939. qlcnic_get_board_name(adapter, board_name);
  1940. pr_info("%s: %s Board Chip rev 0x%x\n",
  1941. module_name(THIS_MODULE),
  1942. board_name, adapter->ahw->revision_id);
  1943. }
  1944. if (qlcnic_83xx_check(adapter) && !qlcnic_use_msi_x &&
  1945. !!qlcnic_use_msi)
  1946. dev_warn(&pdev->dev,
  1947. "Device does not support MSI interrupts\n");
  1948. if (qlcnic_82xx_check(adapter)) {
  1949. err = qlcnic_setup_intr(adapter, 0, 0);
  1950. if (err) {
  1951. dev_err(&pdev->dev, "Failed to setup interrupt\n");
  1952. goto err_out_disable_msi;
  1953. }
  1954. }
  1955. err = qlcnic_get_act_pci_func(adapter);
  1956. if (err)
  1957. goto err_out_disable_mbx_intr;
  1958. err = qlcnic_setup_netdev(adapter, netdev, pci_using_dac);
  1959. if (err)
  1960. goto err_out_disable_mbx_intr;
  1961. if (adapter->portnum == 0)
  1962. qlcnic_set_drv_version(adapter);
  1963. pci_set_drvdata(pdev, adapter);
  1964. if (qlcnic_82xx_check(adapter))
  1965. qlcnic_schedule_work(adapter, qlcnic_fw_poll_work,
  1966. FW_POLL_DELAY);
  1967. switch (adapter->ahw->port_type) {
  1968. case QLCNIC_GBE:
  1969. dev_info(&adapter->pdev->dev, "%s: GbE port initialized\n",
  1970. adapter->netdev->name);
  1971. break;
  1972. case QLCNIC_XGBE:
  1973. dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
  1974. adapter->netdev->name);
  1975. break;
  1976. }
  1977. if (adapter->drv_mac_learn)
  1978. qlcnic_alloc_lb_filters_mem(adapter);
  1979. qlcnic_add_sysfs(adapter);
  1980. return 0;
  1981. err_out_disable_mbx_intr:
  1982. if (qlcnic_83xx_check(adapter))
  1983. qlcnic_83xx_free_mbx_intr(adapter);
  1984. err_out_disable_msi:
  1985. qlcnic_teardown_intr(adapter);
  1986. qlcnic_cancel_idc_work(adapter);
  1987. qlcnic_clr_all_drv_state(adapter, 0);
  1988. err_out_free_hw:
  1989. qlcnic_free_adapter_resources(adapter);
  1990. err_out_free_netdev:
  1991. free_netdev(netdev);
  1992. err_out_iounmap:
  1993. qlcnic_cleanup_pci_map(ahw);
  1994. err_out_free_hw_res:
  1995. kfree(ahw);
  1996. err_out_free_res:
  1997. pci_release_regions(pdev);
  1998. err_out_disable_pdev:
  1999. pci_set_drvdata(pdev, NULL);
  2000. pci_disable_device(pdev);
  2001. return err;
  2002. }
  2003. static void qlcnic_remove(struct pci_dev *pdev)
  2004. {
  2005. struct qlcnic_adapter *adapter;
  2006. struct net_device *netdev;
  2007. struct qlcnic_hardware_context *ahw;
  2008. adapter = pci_get_drvdata(pdev);
  2009. if (adapter == NULL)
  2010. return;
  2011. netdev = adapter->netdev;
  2012. qlcnic_sriov_pf_disable(adapter);
  2013. qlcnic_cancel_idc_work(adapter);
  2014. ahw = adapter->ahw;
  2015. qlcnic_dcb_free(adapter);
  2016. unregister_netdev(netdev);
  2017. qlcnic_sriov_cleanup(adapter);
  2018. if (qlcnic_83xx_check(adapter)) {
  2019. qlcnic_83xx_register_nic_idc_func(adapter, 0);
  2020. cancel_delayed_work_sync(&adapter->idc_aen_work);
  2021. qlcnic_83xx_free_mbx_intr(adapter);
  2022. qlcnic_83xx_detach_mailbox_work(adapter);
  2023. qlcnic_83xx_free_mailbox(ahw->mailbox);
  2024. kfree(ahw->fw_info);
  2025. }
  2026. qlcnic_detach(adapter);
  2027. if (adapter->npars != NULL)
  2028. kfree(adapter->npars);
  2029. if (adapter->eswitch != NULL)
  2030. kfree(adapter->eswitch);
  2031. if (qlcnic_82xx_check(adapter))
  2032. qlcnic_clr_all_drv_state(adapter, 0);
  2033. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  2034. qlcnic_free_lb_filters_mem(adapter);
  2035. qlcnic_teardown_intr(adapter);
  2036. qlcnic_remove_sysfs(adapter);
  2037. qlcnic_cleanup_pci_map(adapter->ahw);
  2038. qlcnic_release_firmware(adapter);
  2039. pci_disable_pcie_error_reporting(pdev);
  2040. pci_release_regions(pdev);
  2041. pci_disable_device(pdev);
  2042. pci_set_drvdata(pdev, NULL);
  2043. if (adapter->qlcnic_wq) {
  2044. destroy_workqueue(adapter->qlcnic_wq);
  2045. adapter->qlcnic_wq = NULL;
  2046. }
  2047. qlcnic_free_adapter_resources(adapter);
  2048. kfree(ahw);
  2049. free_netdev(netdev);
  2050. }
  2051. static void qlcnic_shutdown(struct pci_dev *pdev)
  2052. {
  2053. if (__qlcnic_shutdown(pdev))
  2054. return;
  2055. pci_disable_device(pdev);
  2056. }
  2057. #ifdef CONFIG_PM
  2058. static int qlcnic_suspend(struct pci_dev *pdev, pm_message_t state)
  2059. {
  2060. int retval;
  2061. retval = __qlcnic_shutdown(pdev);
  2062. if (retval)
  2063. return retval;
  2064. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2065. return 0;
  2066. }
  2067. static int qlcnic_resume(struct pci_dev *pdev)
  2068. {
  2069. struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
  2070. int err;
  2071. err = pci_enable_device(pdev);
  2072. if (err)
  2073. return err;
  2074. pci_set_power_state(pdev, PCI_D0);
  2075. pci_set_master(pdev);
  2076. pci_restore_state(pdev);
  2077. return __qlcnic_resume(adapter);
  2078. }
  2079. #endif
  2080. static int qlcnic_open(struct net_device *netdev)
  2081. {
  2082. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  2083. int err;
  2084. netif_carrier_off(netdev);
  2085. err = qlcnic_attach(adapter);
  2086. if (err)
  2087. return err;
  2088. err = __qlcnic_up(adapter, netdev);
  2089. if (err)
  2090. goto err_out;
  2091. netif_tx_start_all_queues(netdev);
  2092. return 0;
  2093. err_out:
  2094. qlcnic_detach(adapter);
  2095. return err;
  2096. }
  2097. /*
  2098. * qlcnic_close - Disables a network interface entry point
  2099. */
  2100. static int qlcnic_close(struct net_device *netdev)
  2101. {
  2102. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  2103. __qlcnic_down(adapter, netdev);
  2104. return 0;
  2105. }
  2106. void qlcnic_alloc_lb_filters_mem(struct qlcnic_adapter *adapter)
  2107. {
  2108. void *head;
  2109. int i;
  2110. struct net_device *netdev = adapter->netdev;
  2111. u32 filter_size = 0;
  2112. u16 act_pci_func = 0;
  2113. if (adapter->fhash.fmax && adapter->fhash.fhead)
  2114. return;
  2115. act_pci_func = adapter->ahw->act_pci_func;
  2116. spin_lock_init(&adapter->mac_learn_lock);
  2117. spin_lock_init(&adapter->rx_mac_learn_lock);
  2118. if (qlcnic_82xx_check(adapter)) {
  2119. filter_size = QLCNIC_LB_MAX_FILTERS;
  2120. adapter->fhash.fbucket_size = QLCNIC_LB_BUCKET_SIZE;
  2121. } else {
  2122. filter_size = QLC_83XX_LB_MAX_FILTERS;
  2123. adapter->fhash.fbucket_size = QLC_83XX_LB_BUCKET_SIZE;
  2124. }
  2125. head = kcalloc(adapter->fhash.fbucket_size,
  2126. sizeof(struct hlist_head), GFP_ATOMIC);
  2127. if (!head)
  2128. return;
  2129. adapter->fhash.fmax = (filter_size / act_pci_func);
  2130. adapter->fhash.fhead = head;
  2131. netdev_info(netdev, "active nic func = %d, mac filter size=%d\n",
  2132. act_pci_func, adapter->fhash.fmax);
  2133. for (i = 0; i < adapter->fhash.fbucket_size; i++)
  2134. INIT_HLIST_HEAD(&adapter->fhash.fhead[i]);
  2135. adapter->rx_fhash.fbucket_size = adapter->fhash.fbucket_size;
  2136. head = kcalloc(adapter->rx_fhash.fbucket_size,
  2137. sizeof(struct hlist_head), GFP_ATOMIC);
  2138. if (!head)
  2139. return;
  2140. adapter->rx_fhash.fmax = (filter_size / act_pci_func);
  2141. adapter->rx_fhash.fhead = head;
  2142. for (i = 0; i < adapter->rx_fhash.fbucket_size; i++)
  2143. INIT_HLIST_HEAD(&adapter->rx_fhash.fhead[i]);
  2144. }
  2145. static void qlcnic_free_lb_filters_mem(struct qlcnic_adapter *adapter)
  2146. {
  2147. if (adapter->fhash.fmax && adapter->fhash.fhead)
  2148. kfree(adapter->fhash.fhead);
  2149. adapter->fhash.fhead = NULL;
  2150. adapter->fhash.fmax = 0;
  2151. if (adapter->rx_fhash.fmax && adapter->rx_fhash.fhead)
  2152. kfree(adapter->rx_fhash.fhead);
  2153. adapter->rx_fhash.fmax = 0;
  2154. adapter->rx_fhash.fhead = NULL;
  2155. }
  2156. int qlcnic_check_temp(struct qlcnic_adapter *adapter)
  2157. {
  2158. struct net_device *netdev = adapter->netdev;
  2159. u32 temp_state, temp_val, temp = 0;
  2160. int rv = 0;
  2161. if (qlcnic_83xx_check(adapter))
  2162. temp = QLCRDX(adapter->ahw, QLC_83XX_ASIC_TEMP);
  2163. if (qlcnic_82xx_check(adapter))
  2164. temp = QLC_SHARED_REG_RD32(adapter, QLCNIC_ASIC_TEMP);
  2165. temp_state = qlcnic_get_temp_state(temp);
  2166. temp_val = qlcnic_get_temp_val(temp);
  2167. if (temp_state == QLCNIC_TEMP_PANIC) {
  2168. dev_err(&netdev->dev,
  2169. "Device temperature %d degrees C exceeds"
  2170. " maximum allowed. Hardware has been shut down.\n",
  2171. temp_val);
  2172. rv = 1;
  2173. } else if (temp_state == QLCNIC_TEMP_WARN) {
  2174. if (adapter->ahw->temp == QLCNIC_TEMP_NORMAL) {
  2175. dev_err(&netdev->dev,
  2176. "Device temperature %d degrees C "
  2177. "exceeds operating range."
  2178. " Immediate action needed.\n",
  2179. temp_val);
  2180. }
  2181. } else {
  2182. if (adapter->ahw->temp == QLCNIC_TEMP_WARN) {
  2183. dev_info(&netdev->dev,
  2184. "Device temperature is now %d degrees C"
  2185. " in normal range.\n", temp_val);
  2186. }
  2187. }
  2188. adapter->ahw->temp = temp_state;
  2189. return rv;
  2190. }
  2191. static void qlcnic_tx_timeout(struct net_device *netdev)
  2192. {
  2193. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  2194. struct qlcnic_host_tx_ring *tx_ring;
  2195. int ring;
  2196. if (test_bit(__QLCNIC_RESETTING, &adapter->state))
  2197. return;
  2198. if (++adapter->tx_timeo_cnt >= QLCNIC_MAX_TX_TIMEOUTS) {
  2199. netdev_info(netdev, "Tx timeout, reset the adapter.\n");
  2200. if (qlcnic_82xx_check(adapter))
  2201. adapter->need_fw_reset = 1;
  2202. else if (qlcnic_83xx_check(adapter))
  2203. qlcnic_83xx_idc_request_reset(adapter,
  2204. QLCNIC_FORCE_FW_DUMP_KEY);
  2205. } else {
  2206. netdev_info(netdev, "Tx timeout, reset adapter context.\n");
  2207. if (qlcnic_82xx_check(adapter)) {
  2208. for (ring = 0; ring < adapter->max_drv_tx_rings;
  2209. ring++) {
  2210. tx_ring = &adapter->tx_ring[ring];
  2211. dev_info(&netdev->dev, "ring=%d\n", ring);
  2212. dev_info(&netdev->dev, "crb_intr_mask=%d\n",
  2213. readl(tx_ring->crb_intr_mask));
  2214. dev_info(&netdev->dev, "producer=%d\n",
  2215. readl(tx_ring->crb_cmd_producer));
  2216. dev_info(&netdev->dev, "sw_consumer = %d\n",
  2217. tx_ring->sw_consumer);
  2218. dev_info(&netdev->dev, "hw_consumer = %d\n",
  2219. le32_to_cpu(*(tx_ring->hw_consumer)));
  2220. dev_info(&netdev->dev, "xmit-on=%llu\n",
  2221. tx_ring->xmit_on);
  2222. dev_info(&netdev->dev, "xmit-off=%llu\n",
  2223. tx_ring->xmit_off);
  2224. }
  2225. }
  2226. adapter->ahw->reset_context = 1;
  2227. }
  2228. }
  2229. static struct net_device_stats *qlcnic_get_stats(struct net_device *netdev)
  2230. {
  2231. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  2232. struct net_device_stats *stats = &netdev->stats;
  2233. stats->rx_packets = adapter->stats.rx_pkts + adapter->stats.lro_pkts;
  2234. stats->tx_packets = adapter->stats.xmitfinished;
  2235. stats->rx_bytes = adapter->stats.rxbytes + adapter->stats.lrobytes;
  2236. stats->tx_bytes = adapter->stats.txbytes;
  2237. stats->rx_dropped = adapter->stats.rxdropped;
  2238. stats->tx_dropped = adapter->stats.txdropped;
  2239. return stats;
  2240. }
  2241. irqreturn_t qlcnic_82xx_clear_legacy_intr(struct qlcnic_adapter *adapter)
  2242. {
  2243. u32 status;
  2244. status = readl(adapter->isr_int_vec);
  2245. if (!(status & adapter->ahw->int_vec_bit))
  2246. return IRQ_NONE;
  2247. /* check interrupt state machine, to be sure */
  2248. status = readl(adapter->crb_int_state_reg);
  2249. if (!ISR_LEGACY_INT_TRIGGERED(status))
  2250. return IRQ_NONE;
  2251. writel(0xffffffff, adapter->tgt_status_reg);
  2252. /* read twice to ensure write is flushed */
  2253. readl(adapter->isr_int_vec);
  2254. readl(adapter->isr_int_vec);
  2255. return IRQ_HANDLED;
  2256. }
  2257. static irqreturn_t qlcnic_tmp_intr(int irq, void *data)
  2258. {
  2259. struct qlcnic_host_sds_ring *sds_ring = data;
  2260. struct qlcnic_adapter *adapter = sds_ring->adapter;
  2261. if (adapter->flags & QLCNIC_MSIX_ENABLED)
  2262. goto done;
  2263. else if (adapter->flags & QLCNIC_MSI_ENABLED) {
  2264. writel(0xffffffff, adapter->tgt_status_reg);
  2265. goto done;
  2266. }
  2267. if (qlcnic_clear_legacy_intr(adapter) == IRQ_NONE)
  2268. return IRQ_NONE;
  2269. done:
  2270. adapter->ahw->diag_cnt++;
  2271. qlcnic_enable_int(sds_ring);
  2272. return IRQ_HANDLED;
  2273. }
  2274. static irqreturn_t qlcnic_intr(int irq, void *data)
  2275. {
  2276. struct qlcnic_host_sds_ring *sds_ring = data;
  2277. struct qlcnic_adapter *adapter = sds_ring->adapter;
  2278. if (qlcnic_clear_legacy_intr(adapter) == IRQ_NONE)
  2279. return IRQ_NONE;
  2280. napi_schedule(&sds_ring->napi);
  2281. return IRQ_HANDLED;
  2282. }
  2283. static irqreturn_t qlcnic_msi_intr(int irq, void *data)
  2284. {
  2285. struct qlcnic_host_sds_ring *sds_ring = data;
  2286. struct qlcnic_adapter *adapter = sds_ring->adapter;
  2287. /* clear interrupt */
  2288. writel(0xffffffff, adapter->tgt_status_reg);
  2289. napi_schedule(&sds_ring->napi);
  2290. return IRQ_HANDLED;
  2291. }
  2292. static irqreturn_t qlcnic_msix_intr(int irq, void *data)
  2293. {
  2294. struct qlcnic_host_sds_ring *sds_ring = data;
  2295. napi_schedule(&sds_ring->napi);
  2296. return IRQ_HANDLED;
  2297. }
  2298. static irqreturn_t qlcnic_msix_tx_intr(int irq, void *data)
  2299. {
  2300. struct qlcnic_host_tx_ring *tx_ring = data;
  2301. napi_schedule(&tx_ring->napi);
  2302. return IRQ_HANDLED;
  2303. }
  2304. #ifdef CONFIG_NET_POLL_CONTROLLER
  2305. static void qlcnic_poll_controller(struct net_device *netdev)
  2306. {
  2307. int ring;
  2308. struct qlcnic_host_sds_ring *sds_ring;
  2309. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  2310. struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
  2311. disable_irq(adapter->irq);
  2312. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  2313. sds_ring = &recv_ctx->sds_rings[ring];
  2314. qlcnic_intr(adapter->irq, sds_ring);
  2315. }
  2316. enable_irq(adapter->irq);
  2317. }
  2318. #endif
  2319. static void
  2320. qlcnic_idc_debug_info(struct qlcnic_adapter *adapter, u8 encoding)
  2321. {
  2322. u32 val;
  2323. val = adapter->portnum & 0xf;
  2324. val |= encoding << 7;
  2325. val |= (jiffies - adapter->dev_rst_time) << 8;
  2326. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DRV_SCRATCH, val);
  2327. adapter->dev_rst_time = jiffies;
  2328. }
  2329. static int
  2330. qlcnic_set_drv_state(struct qlcnic_adapter *adapter, u8 state)
  2331. {
  2332. u32 val;
  2333. WARN_ON(state != QLCNIC_DEV_NEED_RESET &&
  2334. state != QLCNIC_DEV_NEED_QUISCENT);
  2335. if (qlcnic_api_lock(adapter))
  2336. return -EIO;
  2337. val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_STATE);
  2338. if (state == QLCNIC_DEV_NEED_RESET)
  2339. QLC_DEV_SET_RST_RDY(val, adapter->portnum);
  2340. else if (state == QLCNIC_DEV_NEED_QUISCENT)
  2341. QLC_DEV_SET_QSCNT_RDY(val, adapter->portnum);
  2342. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DRV_STATE, val);
  2343. qlcnic_api_unlock(adapter);
  2344. return 0;
  2345. }
  2346. static int
  2347. qlcnic_clr_drv_state(struct qlcnic_adapter *adapter)
  2348. {
  2349. u32 val;
  2350. if (qlcnic_api_lock(adapter))
  2351. return -EBUSY;
  2352. val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_STATE);
  2353. QLC_DEV_CLR_RST_QSCNT(val, adapter->portnum);
  2354. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DRV_STATE, val);
  2355. qlcnic_api_unlock(adapter);
  2356. return 0;
  2357. }
  2358. void qlcnic_clr_all_drv_state(struct qlcnic_adapter *adapter, u8 failed)
  2359. {
  2360. u32 val;
  2361. if (qlcnic_api_lock(adapter))
  2362. goto err;
  2363. val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_ACTIVE);
  2364. QLC_DEV_CLR_REF_CNT(val, adapter->portnum);
  2365. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DRV_ACTIVE, val);
  2366. if (failed) {
  2367. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_STATE,
  2368. QLCNIC_DEV_FAILED);
  2369. dev_info(&adapter->pdev->dev,
  2370. "Device state set to Failed. Please Reboot\n");
  2371. } else if (!(val & 0x11111111))
  2372. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_STATE,
  2373. QLCNIC_DEV_COLD);
  2374. val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_STATE);
  2375. QLC_DEV_CLR_RST_QSCNT(val, adapter->portnum);
  2376. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DRV_STATE, val);
  2377. qlcnic_api_unlock(adapter);
  2378. err:
  2379. adapter->fw_fail_cnt = 0;
  2380. adapter->flags &= ~QLCNIC_FW_HANG;
  2381. clear_bit(__QLCNIC_START_FW, &adapter->state);
  2382. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  2383. }
  2384. /* Grab api lock, before checking state */
  2385. static int
  2386. qlcnic_check_drv_state(struct qlcnic_adapter *adapter)
  2387. {
  2388. int act, state, active_mask;
  2389. struct qlcnic_hardware_context *ahw = adapter->ahw;
  2390. state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_STATE);
  2391. act = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_ACTIVE);
  2392. if (adapter->flags & QLCNIC_FW_RESET_OWNER) {
  2393. active_mask = (~(1 << (ahw->pci_func * 4)));
  2394. act = act & active_mask;
  2395. }
  2396. if (((state & 0x11111111) == (act & 0x11111111)) ||
  2397. ((act & 0x11111111) == ((state >> 1) & 0x11111111)))
  2398. return 0;
  2399. else
  2400. return 1;
  2401. }
  2402. static int qlcnic_check_idc_ver(struct qlcnic_adapter *adapter)
  2403. {
  2404. u32 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_IDC_VER);
  2405. if (val != QLCNIC_DRV_IDC_VER) {
  2406. dev_warn(&adapter->pdev->dev, "IDC Version mismatch, driver's"
  2407. " idc ver = %x; reqd = %x\n", QLCNIC_DRV_IDC_VER, val);
  2408. }
  2409. return 0;
  2410. }
  2411. static int
  2412. qlcnic_can_start_firmware(struct qlcnic_adapter *adapter)
  2413. {
  2414. u32 val, prev_state;
  2415. u8 dev_init_timeo = adapter->dev_init_timeo;
  2416. u8 portnum = adapter->portnum;
  2417. u8 ret;
  2418. if (test_and_clear_bit(__QLCNIC_START_FW, &adapter->state))
  2419. return 1;
  2420. if (qlcnic_api_lock(adapter))
  2421. return -1;
  2422. val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_ACTIVE);
  2423. if (!(val & (1 << (portnum * 4)))) {
  2424. QLC_DEV_SET_REF_CNT(val, portnum);
  2425. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DRV_ACTIVE, val);
  2426. }
  2427. prev_state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE);
  2428. QLCDB(adapter, HW, "Device state = %u\n", prev_state);
  2429. switch (prev_state) {
  2430. case QLCNIC_DEV_COLD:
  2431. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_STATE,
  2432. QLCNIC_DEV_INITIALIZING);
  2433. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DRV_IDC_VER,
  2434. QLCNIC_DRV_IDC_VER);
  2435. qlcnic_idc_debug_info(adapter, 0);
  2436. qlcnic_api_unlock(adapter);
  2437. return 1;
  2438. case QLCNIC_DEV_READY:
  2439. ret = qlcnic_check_idc_ver(adapter);
  2440. qlcnic_api_unlock(adapter);
  2441. return ret;
  2442. case QLCNIC_DEV_NEED_RESET:
  2443. val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_STATE);
  2444. QLC_DEV_SET_RST_RDY(val, portnum);
  2445. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DRV_STATE, val);
  2446. break;
  2447. case QLCNIC_DEV_NEED_QUISCENT:
  2448. val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_STATE);
  2449. QLC_DEV_SET_QSCNT_RDY(val, portnum);
  2450. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DRV_STATE, val);
  2451. break;
  2452. case QLCNIC_DEV_FAILED:
  2453. dev_err(&adapter->pdev->dev, "Device in failed state.\n");
  2454. qlcnic_api_unlock(adapter);
  2455. return -1;
  2456. case QLCNIC_DEV_INITIALIZING:
  2457. case QLCNIC_DEV_QUISCENT:
  2458. break;
  2459. }
  2460. qlcnic_api_unlock(adapter);
  2461. do {
  2462. msleep(1000);
  2463. prev_state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE);
  2464. if (prev_state == QLCNIC_DEV_QUISCENT)
  2465. continue;
  2466. } while ((prev_state != QLCNIC_DEV_READY) && --dev_init_timeo);
  2467. if (!dev_init_timeo) {
  2468. dev_err(&adapter->pdev->dev,
  2469. "Waiting for device to initialize timeout\n");
  2470. return -1;
  2471. }
  2472. if (qlcnic_api_lock(adapter))
  2473. return -1;
  2474. val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DRV_STATE);
  2475. QLC_DEV_CLR_RST_QSCNT(val, portnum);
  2476. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DRV_STATE, val);
  2477. ret = qlcnic_check_idc_ver(adapter);
  2478. qlcnic_api_unlock(adapter);
  2479. return ret;
  2480. }
  2481. static void
  2482. qlcnic_fwinit_work(struct work_struct *work)
  2483. {
  2484. struct qlcnic_adapter *adapter = container_of(work,
  2485. struct qlcnic_adapter, fw_work.work);
  2486. u32 dev_state = 0xf;
  2487. u32 val;
  2488. if (qlcnic_api_lock(adapter))
  2489. goto err_ret;
  2490. dev_state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE);
  2491. if (dev_state == QLCNIC_DEV_QUISCENT ||
  2492. dev_state == QLCNIC_DEV_NEED_QUISCENT) {
  2493. qlcnic_api_unlock(adapter);
  2494. qlcnic_schedule_work(adapter, qlcnic_fwinit_work,
  2495. FW_POLL_DELAY * 2);
  2496. return;
  2497. }
  2498. if (adapter->ahw->op_mode == QLCNIC_NON_PRIV_FUNC) {
  2499. qlcnic_api_unlock(adapter);
  2500. goto wait_npar;
  2501. }
  2502. if (dev_state == QLCNIC_DEV_INITIALIZING ||
  2503. dev_state == QLCNIC_DEV_READY) {
  2504. dev_info(&adapter->pdev->dev, "Detected state change from "
  2505. "DEV_NEED_RESET, skipping ack check\n");
  2506. goto skip_ack_check;
  2507. }
  2508. if (adapter->fw_wait_cnt++ > adapter->reset_ack_timeo) {
  2509. dev_info(&adapter->pdev->dev, "Reset:Failed to get ack %d sec\n",
  2510. adapter->reset_ack_timeo);
  2511. goto skip_ack_check;
  2512. }
  2513. if (!qlcnic_check_drv_state(adapter)) {
  2514. skip_ack_check:
  2515. dev_state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE);
  2516. if (dev_state == QLCNIC_DEV_NEED_RESET) {
  2517. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_STATE,
  2518. QLCNIC_DEV_INITIALIZING);
  2519. set_bit(__QLCNIC_START_FW, &adapter->state);
  2520. QLCDB(adapter, DRV, "Restarting fw\n");
  2521. qlcnic_idc_debug_info(adapter, 0);
  2522. val = QLC_SHARED_REG_RD32(adapter,
  2523. QLCNIC_CRB_DRV_STATE);
  2524. QLC_DEV_SET_RST_RDY(val, adapter->portnum);
  2525. QLC_SHARED_REG_WR32(adapter,
  2526. QLCNIC_CRB_DRV_STATE, val);
  2527. }
  2528. qlcnic_api_unlock(adapter);
  2529. rtnl_lock();
  2530. if (qlcnic_check_fw_dump_state(adapter) &&
  2531. (adapter->flags & QLCNIC_FW_RESET_OWNER)) {
  2532. QLCDB(adapter, DRV, "Take FW dump\n");
  2533. qlcnic_dump_fw(adapter);
  2534. adapter->flags |= QLCNIC_FW_HANG;
  2535. }
  2536. rtnl_unlock();
  2537. adapter->flags &= ~QLCNIC_FW_RESET_OWNER;
  2538. if (!adapter->nic_ops->start_firmware(adapter)) {
  2539. qlcnic_schedule_work(adapter, qlcnic_attach_work, 0);
  2540. adapter->fw_wait_cnt = 0;
  2541. return;
  2542. }
  2543. goto err_ret;
  2544. }
  2545. qlcnic_api_unlock(adapter);
  2546. wait_npar:
  2547. dev_state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE);
  2548. QLCDB(adapter, HW, "Func waiting: Device state=%u\n", dev_state);
  2549. switch (dev_state) {
  2550. case QLCNIC_DEV_READY:
  2551. if (!qlcnic_start_firmware(adapter)) {
  2552. qlcnic_schedule_work(adapter, qlcnic_attach_work, 0);
  2553. adapter->fw_wait_cnt = 0;
  2554. return;
  2555. }
  2556. case QLCNIC_DEV_FAILED:
  2557. break;
  2558. default:
  2559. qlcnic_schedule_work(adapter,
  2560. qlcnic_fwinit_work, FW_POLL_DELAY);
  2561. return;
  2562. }
  2563. err_ret:
  2564. dev_err(&adapter->pdev->dev, "Fwinit work failed state=%u "
  2565. "fw_wait_cnt=%u\n", dev_state, adapter->fw_wait_cnt);
  2566. netif_device_attach(adapter->netdev);
  2567. qlcnic_clr_all_drv_state(adapter, 0);
  2568. }
  2569. static void
  2570. qlcnic_detach_work(struct work_struct *work)
  2571. {
  2572. struct qlcnic_adapter *adapter = container_of(work,
  2573. struct qlcnic_adapter, fw_work.work);
  2574. struct net_device *netdev = adapter->netdev;
  2575. u32 status;
  2576. netif_device_detach(netdev);
  2577. /* Dont grab rtnl lock during Quiscent mode */
  2578. if (adapter->dev_state == QLCNIC_DEV_NEED_QUISCENT) {
  2579. if (netif_running(netdev))
  2580. __qlcnic_down(adapter, netdev);
  2581. } else
  2582. qlcnic_down(adapter, netdev);
  2583. status = QLC_SHARED_REG_RD32(adapter, QLCNIC_PEG_HALT_STATUS1);
  2584. if (status & QLCNIC_RCODE_FATAL_ERROR) {
  2585. dev_err(&adapter->pdev->dev,
  2586. "Detaching the device: peg halt status1=0x%x\n",
  2587. status);
  2588. if (QLCNIC_FWERROR_CODE(status) == QLCNIC_FWERROR_FAN_FAILURE) {
  2589. dev_err(&adapter->pdev->dev,
  2590. "On board active cooling fan failed. "
  2591. "Device has been halted.\n");
  2592. dev_err(&adapter->pdev->dev,
  2593. "Replace the adapter.\n");
  2594. }
  2595. goto err_ret;
  2596. }
  2597. if (adapter->ahw->temp == QLCNIC_TEMP_PANIC) {
  2598. dev_err(&adapter->pdev->dev, "Detaching the device: temp=%d\n",
  2599. adapter->ahw->temp);
  2600. goto err_ret;
  2601. }
  2602. /* Dont ack if this instance is the reset owner */
  2603. if (!(adapter->flags & QLCNIC_FW_RESET_OWNER)) {
  2604. if (qlcnic_set_drv_state(adapter, adapter->dev_state)) {
  2605. dev_err(&adapter->pdev->dev,
  2606. "Failed to set driver state,"
  2607. "detaching the device.\n");
  2608. goto err_ret;
  2609. }
  2610. }
  2611. adapter->fw_wait_cnt = 0;
  2612. qlcnic_schedule_work(adapter, qlcnic_fwinit_work, FW_POLL_DELAY);
  2613. return;
  2614. err_ret:
  2615. netif_device_attach(netdev);
  2616. qlcnic_clr_all_drv_state(adapter, 1);
  2617. }
  2618. /*Transit NPAR state to NON Operational */
  2619. static void
  2620. qlcnic_set_npar_non_operational(struct qlcnic_adapter *adapter)
  2621. {
  2622. u32 state;
  2623. state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_NPAR_STATE);
  2624. if (state == QLCNIC_DEV_NPAR_NON_OPER)
  2625. return;
  2626. if (qlcnic_api_lock(adapter))
  2627. return;
  2628. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_NPAR_STATE,
  2629. QLCNIC_DEV_NPAR_NON_OPER);
  2630. qlcnic_api_unlock(adapter);
  2631. }
  2632. void qlcnic_82xx_dev_request_reset(struct qlcnic_adapter *adapter, u32 key)
  2633. {
  2634. u32 state, xg_val = 0, gb_val = 0;
  2635. qlcnic_xg_set_xg0_mask(xg_val);
  2636. qlcnic_xg_set_xg1_mask(xg_val);
  2637. QLCWR32(adapter, QLCNIC_NIU_XG_PAUSE_CTL, xg_val);
  2638. qlcnic_gb_set_gb0_mask(gb_val);
  2639. qlcnic_gb_set_gb1_mask(gb_val);
  2640. qlcnic_gb_set_gb2_mask(gb_val);
  2641. qlcnic_gb_set_gb3_mask(gb_val);
  2642. QLCWR32(adapter, QLCNIC_NIU_GB_PAUSE_CTL, gb_val);
  2643. dev_info(&adapter->pdev->dev, "Pause control frames disabled"
  2644. " on all ports\n");
  2645. adapter->need_fw_reset = 1;
  2646. if (qlcnic_api_lock(adapter))
  2647. return;
  2648. state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE);
  2649. if (state == QLCNIC_DEV_READY) {
  2650. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_STATE,
  2651. QLCNIC_DEV_NEED_RESET);
  2652. adapter->flags |= QLCNIC_FW_RESET_OWNER;
  2653. QLCDB(adapter, DRV, "NEED_RESET state set\n");
  2654. qlcnic_idc_debug_info(adapter, 0);
  2655. }
  2656. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_NPAR_STATE,
  2657. QLCNIC_DEV_NPAR_NON_OPER);
  2658. qlcnic_api_unlock(adapter);
  2659. }
  2660. /* Transit to NPAR READY state from NPAR NOT READY state */
  2661. static void
  2662. qlcnic_dev_set_npar_ready(struct qlcnic_adapter *adapter)
  2663. {
  2664. if (qlcnic_api_lock(adapter))
  2665. return;
  2666. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_NPAR_STATE,
  2667. QLCNIC_DEV_NPAR_OPER);
  2668. QLCDB(adapter, DRV, "NPAR operational state set\n");
  2669. qlcnic_api_unlock(adapter);
  2670. }
  2671. void qlcnic_schedule_work(struct qlcnic_adapter *adapter,
  2672. work_func_t func, int delay)
  2673. {
  2674. if (test_bit(__QLCNIC_AER, &adapter->state))
  2675. return;
  2676. INIT_DELAYED_WORK(&adapter->fw_work, func);
  2677. queue_delayed_work(adapter->qlcnic_wq, &adapter->fw_work,
  2678. round_jiffies_relative(delay));
  2679. }
  2680. static void
  2681. qlcnic_attach_work(struct work_struct *work)
  2682. {
  2683. struct qlcnic_adapter *adapter = container_of(work,
  2684. struct qlcnic_adapter, fw_work.work);
  2685. struct net_device *netdev = adapter->netdev;
  2686. u32 npar_state;
  2687. if (adapter->ahw->op_mode != QLCNIC_MGMT_FUNC) {
  2688. npar_state = QLC_SHARED_REG_RD32(adapter,
  2689. QLCNIC_CRB_DEV_NPAR_STATE);
  2690. if (adapter->fw_wait_cnt++ > QLCNIC_DEV_NPAR_OPER_TIMEO)
  2691. qlcnic_clr_all_drv_state(adapter, 0);
  2692. else if (npar_state != QLCNIC_DEV_NPAR_OPER)
  2693. qlcnic_schedule_work(adapter, qlcnic_attach_work,
  2694. FW_POLL_DELAY);
  2695. else
  2696. goto attach;
  2697. QLCDB(adapter, DRV, "Waiting for NPAR state to operational\n");
  2698. return;
  2699. }
  2700. attach:
  2701. qlcnic_dcb_get_info(adapter);
  2702. if (netif_running(netdev)) {
  2703. if (qlcnic_up(adapter, netdev))
  2704. goto done;
  2705. qlcnic_restore_indev_addr(netdev, NETDEV_UP);
  2706. }
  2707. done:
  2708. netif_device_attach(netdev);
  2709. adapter->fw_fail_cnt = 0;
  2710. adapter->flags &= ~QLCNIC_FW_HANG;
  2711. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  2712. if (adapter->portnum == 0)
  2713. qlcnic_set_drv_version(adapter);
  2714. if (!qlcnic_clr_drv_state(adapter))
  2715. qlcnic_schedule_work(adapter, qlcnic_fw_poll_work,
  2716. FW_POLL_DELAY);
  2717. }
  2718. static int
  2719. qlcnic_check_health(struct qlcnic_adapter *adapter)
  2720. {
  2721. u32 state = 0, heartbeat;
  2722. u32 peg_status;
  2723. int err = 0;
  2724. if (qlcnic_check_temp(adapter))
  2725. goto detach;
  2726. if (adapter->need_fw_reset)
  2727. qlcnic_dev_request_reset(adapter, 0);
  2728. state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE);
  2729. if (state == QLCNIC_DEV_NEED_RESET) {
  2730. qlcnic_set_npar_non_operational(adapter);
  2731. adapter->need_fw_reset = 1;
  2732. } else if (state == QLCNIC_DEV_NEED_QUISCENT)
  2733. goto detach;
  2734. heartbeat = QLC_SHARED_REG_RD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  2735. if (heartbeat != adapter->heartbeat) {
  2736. adapter->heartbeat = heartbeat;
  2737. adapter->fw_fail_cnt = 0;
  2738. if (adapter->need_fw_reset)
  2739. goto detach;
  2740. if (adapter->ahw->reset_context && qlcnic_auto_fw_reset)
  2741. qlcnic_reset_hw_context(adapter);
  2742. return 0;
  2743. }
  2744. if (++adapter->fw_fail_cnt < FW_FAIL_THRESH)
  2745. return 0;
  2746. adapter->flags |= QLCNIC_FW_HANG;
  2747. qlcnic_dev_request_reset(adapter, 0);
  2748. if (qlcnic_auto_fw_reset)
  2749. clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
  2750. dev_err(&adapter->pdev->dev, "firmware hang detected\n");
  2751. peg_status = QLC_SHARED_REG_RD32(adapter, QLCNIC_PEG_HALT_STATUS1);
  2752. dev_err(&adapter->pdev->dev, "Dumping hw/fw registers\n"
  2753. "PEG_HALT_STATUS1: 0x%x, PEG_HALT_STATUS2: 0x%x,\n"
  2754. "PEG_NET_0_PC: 0x%x, PEG_NET_1_PC: 0x%x,\n"
  2755. "PEG_NET_2_PC: 0x%x, PEG_NET_3_PC: 0x%x,\n"
  2756. "PEG_NET_4_PC: 0x%x\n",
  2757. peg_status,
  2758. QLC_SHARED_REG_RD32(adapter, QLCNIC_PEG_HALT_STATUS2),
  2759. QLCRD32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, &err),
  2760. QLCRD32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, &err),
  2761. QLCRD32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, &err),
  2762. QLCRD32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, &err),
  2763. QLCRD32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, &err));
  2764. if (QLCNIC_FWERROR_CODE(peg_status) == 0x67)
  2765. dev_err(&adapter->pdev->dev,
  2766. "Firmware aborted with error code 0x00006700. "
  2767. "Device is being reset.\n");
  2768. detach:
  2769. adapter->dev_state = (state == QLCNIC_DEV_NEED_QUISCENT) ? state :
  2770. QLCNIC_DEV_NEED_RESET;
  2771. if (qlcnic_auto_fw_reset && !test_and_set_bit(__QLCNIC_RESETTING,
  2772. &adapter->state)) {
  2773. qlcnic_schedule_work(adapter, qlcnic_detach_work, 0);
  2774. QLCDB(adapter, DRV, "fw recovery scheduled.\n");
  2775. }
  2776. return 1;
  2777. }
  2778. void qlcnic_fw_poll_work(struct work_struct *work)
  2779. {
  2780. struct qlcnic_adapter *adapter = container_of(work,
  2781. struct qlcnic_adapter, fw_work.work);
  2782. if (test_bit(__QLCNIC_RESETTING, &adapter->state))
  2783. goto reschedule;
  2784. if (qlcnic_check_health(adapter))
  2785. return;
  2786. if (adapter->fhash.fnum)
  2787. qlcnic_prune_lb_filters(adapter);
  2788. reschedule:
  2789. qlcnic_schedule_work(adapter, qlcnic_fw_poll_work, FW_POLL_DELAY);
  2790. }
  2791. static int qlcnic_is_first_func(struct pci_dev *pdev)
  2792. {
  2793. struct pci_dev *oth_pdev;
  2794. int val = pdev->devfn;
  2795. while (val-- > 0) {
  2796. oth_pdev = pci_get_domain_bus_and_slot(pci_domain_nr
  2797. (pdev->bus), pdev->bus->number,
  2798. PCI_DEVFN(PCI_SLOT(pdev->devfn), val));
  2799. if (!oth_pdev)
  2800. continue;
  2801. if (oth_pdev->current_state != PCI_D3cold) {
  2802. pci_dev_put(oth_pdev);
  2803. return 0;
  2804. }
  2805. pci_dev_put(oth_pdev);
  2806. }
  2807. return 1;
  2808. }
  2809. static int qlcnic_attach_func(struct pci_dev *pdev)
  2810. {
  2811. int err, first_func;
  2812. struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
  2813. struct net_device *netdev = adapter->netdev;
  2814. pdev->error_state = pci_channel_io_normal;
  2815. err = pci_enable_device(pdev);
  2816. if (err)
  2817. return err;
  2818. pci_set_master(pdev);
  2819. pci_restore_state(pdev);
  2820. first_func = qlcnic_is_first_func(pdev);
  2821. if (qlcnic_api_lock(adapter))
  2822. return -EINVAL;
  2823. if (adapter->ahw->op_mode != QLCNIC_NON_PRIV_FUNC && first_func) {
  2824. adapter->need_fw_reset = 1;
  2825. set_bit(__QLCNIC_START_FW, &adapter->state);
  2826. QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_STATE,
  2827. QLCNIC_DEV_INITIALIZING);
  2828. QLCDB(adapter, DRV, "Restarting fw\n");
  2829. }
  2830. qlcnic_api_unlock(adapter);
  2831. err = qlcnic_start_firmware(adapter);
  2832. if (err)
  2833. return err;
  2834. qlcnic_clr_drv_state(adapter);
  2835. kfree(adapter->msix_entries);
  2836. adapter->msix_entries = NULL;
  2837. err = qlcnic_setup_intr(adapter, 0, 0);
  2838. if (err) {
  2839. kfree(adapter->msix_entries);
  2840. netdev_err(netdev, "failed to setup interrupt\n");
  2841. return err;
  2842. }
  2843. if (netif_running(netdev)) {
  2844. err = qlcnic_attach(adapter);
  2845. if (err) {
  2846. qlcnic_clr_all_drv_state(adapter, 1);
  2847. clear_bit(__QLCNIC_AER, &adapter->state);
  2848. netif_device_attach(netdev);
  2849. return err;
  2850. }
  2851. err = qlcnic_up(adapter, netdev);
  2852. if (err)
  2853. goto done;
  2854. qlcnic_restore_indev_addr(netdev, NETDEV_UP);
  2855. }
  2856. done:
  2857. netif_device_attach(netdev);
  2858. return err;
  2859. }
  2860. pci_ers_result_t qlcnic_82xx_io_error_detected(struct pci_dev *pdev,
  2861. pci_channel_state_t state)
  2862. {
  2863. struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
  2864. struct net_device *netdev = adapter->netdev;
  2865. if (state == pci_channel_io_perm_failure)
  2866. return PCI_ERS_RESULT_DISCONNECT;
  2867. if (state == pci_channel_io_normal)
  2868. return PCI_ERS_RESULT_RECOVERED;
  2869. set_bit(__QLCNIC_AER, &adapter->state);
  2870. netif_device_detach(netdev);
  2871. cancel_delayed_work_sync(&adapter->fw_work);
  2872. if (netif_running(netdev))
  2873. qlcnic_down(adapter, netdev);
  2874. qlcnic_detach(adapter);
  2875. qlcnic_teardown_intr(adapter);
  2876. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  2877. pci_save_state(pdev);
  2878. pci_disable_device(pdev);
  2879. return PCI_ERS_RESULT_NEED_RESET;
  2880. }
  2881. pci_ers_result_t qlcnic_82xx_io_slot_reset(struct pci_dev *pdev)
  2882. {
  2883. return qlcnic_attach_func(pdev) ? PCI_ERS_RESULT_DISCONNECT :
  2884. PCI_ERS_RESULT_RECOVERED;
  2885. }
  2886. void qlcnic_82xx_io_resume(struct pci_dev *pdev)
  2887. {
  2888. u32 state;
  2889. struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
  2890. pci_cleanup_aer_uncorrect_error_status(pdev);
  2891. state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE);
  2892. if (state == QLCNIC_DEV_READY && test_and_clear_bit(__QLCNIC_AER,
  2893. &adapter->state))
  2894. qlcnic_schedule_work(adapter, qlcnic_fw_poll_work,
  2895. FW_POLL_DELAY);
  2896. }
  2897. static pci_ers_result_t qlcnic_io_error_detected(struct pci_dev *pdev,
  2898. pci_channel_state_t state)
  2899. {
  2900. struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
  2901. struct qlcnic_hardware_ops *hw_ops = adapter->ahw->hw_ops;
  2902. if (hw_ops->io_error_detected) {
  2903. return hw_ops->io_error_detected(pdev, state);
  2904. } else {
  2905. dev_err(&pdev->dev, "AER error_detected handler not registered.\n");
  2906. return PCI_ERS_RESULT_DISCONNECT;
  2907. }
  2908. }
  2909. static pci_ers_result_t qlcnic_io_slot_reset(struct pci_dev *pdev)
  2910. {
  2911. struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
  2912. struct qlcnic_hardware_ops *hw_ops = adapter->ahw->hw_ops;
  2913. if (hw_ops->io_slot_reset) {
  2914. return hw_ops->io_slot_reset(pdev);
  2915. } else {
  2916. dev_err(&pdev->dev, "AER slot_reset handler not registered.\n");
  2917. return PCI_ERS_RESULT_DISCONNECT;
  2918. }
  2919. }
  2920. static void qlcnic_io_resume(struct pci_dev *pdev)
  2921. {
  2922. struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
  2923. struct qlcnic_hardware_ops *hw_ops = adapter->ahw->hw_ops;
  2924. if (hw_ops->io_resume)
  2925. hw_ops->io_resume(pdev);
  2926. else
  2927. dev_err(&pdev->dev, "AER resume handler not registered.\n");
  2928. }
  2929. static int
  2930. qlcnicvf_start_firmware(struct qlcnic_adapter *adapter)
  2931. {
  2932. int err;
  2933. err = qlcnic_can_start_firmware(adapter);
  2934. if (err)
  2935. return err;
  2936. err = qlcnic_check_npar_opertional(adapter);
  2937. if (err)
  2938. return err;
  2939. err = qlcnic_initialize_nic(adapter);
  2940. if (err)
  2941. return err;
  2942. qlcnic_check_options(adapter);
  2943. err = qlcnic_set_eswitch_port_config(adapter);
  2944. if (err)
  2945. return err;
  2946. adapter->need_fw_reset = 0;
  2947. return err;
  2948. }
  2949. int qlcnic_validate_max_tx_rings(struct qlcnic_adapter *adapter, u32 txq)
  2950. {
  2951. struct net_device *netdev = adapter->netdev;
  2952. u8 max_hw = QLCNIC_MAX_TX_RINGS;
  2953. u32 max_allowed;
  2954. if (!qlcnic_82xx_check(adapter)) {
  2955. netdev_err(netdev, "No Multi TX-Q support\n");
  2956. return -EINVAL;
  2957. }
  2958. if (!qlcnic_use_msi_x && !qlcnic_use_msi) {
  2959. netdev_err(netdev, "No Multi TX-Q support in INT-x mode\n");
  2960. return -EINVAL;
  2961. }
  2962. if (!qlcnic_check_multi_tx(adapter)) {
  2963. netdev_err(netdev, "No Multi TX-Q support\n");
  2964. return -EINVAL;
  2965. }
  2966. if (txq > QLCNIC_MAX_TX_RINGS) {
  2967. netdev_err(netdev, "Invalid ring count\n");
  2968. return -EINVAL;
  2969. }
  2970. max_allowed = rounddown_pow_of_two(min_t(int, max_hw,
  2971. num_online_cpus()));
  2972. if ((txq > max_allowed) || !is_power_of_2(txq)) {
  2973. if (!is_power_of_2(txq))
  2974. netdev_err(netdev,
  2975. "TX queue should be a power of 2\n");
  2976. if (txq > num_online_cpus())
  2977. netdev_err(netdev,
  2978. "Tx queue should not be higher than [%u], number of online CPUs in the system\n",
  2979. num_online_cpus());
  2980. netdev_err(netdev, "Unable to configure %u Tx rings\n", txq);
  2981. return -EINVAL;
  2982. }
  2983. return 0;
  2984. }
  2985. int qlcnic_validate_max_rss(struct qlcnic_adapter *adapter,
  2986. __u32 val)
  2987. {
  2988. struct net_device *netdev = adapter->netdev;
  2989. u8 max_hw = adapter->ahw->max_rx_ques;
  2990. u32 max_allowed;
  2991. if (qlcnic_82xx_check(adapter) && !qlcnic_use_msi_x &&
  2992. !qlcnic_use_msi) {
  2993. netdev_err(netdev, "No RSS support in INT-x mode\n");
  2994. return -EINVAL;
  2995. }
  2996. if (val > QLCNIC_MAX_SDS_RINGS) {
  2997. netdev_err(netdev, "RSS value should not be higher than %u\n",
  2998. QLCNIC_MAX_SDS_RINGS);
  2999. return -EINVAL;
  3000. }
  3001. max_allowed = rounddown_pow_of_two(min_t(int, max_hw,
  3002. num_online_cpus()));
  3003. if ((val > max_allowed) || (val < 2) || !is_power_of_2(val)) {
  3004. if (!is_power_of_2(val))
  3005. netdev_err(netdev, "RSS value should be a power of 2\n");
  3006. if (val < 2)
  3007. netdev_err(netdev, "RSS value should not be lower than 2\n");
  3008. if (val > max_hw)
  3009. netdev_err(netdev,
  3010. "RSS value should not be higher than[%u], the max RSS rings supported by the adapter\n",
  3011. max_hw);
  3012. if (val > num_online_cpus())
  3013. netdev_err(netdev,
  3014. "RSS value should not be higher than[%u], number of online CPUs in the system\n",
  3015. num_online_cpus());
  3016. netdev_err(netdev, "Unable to configure %u RSS rings\n", val);
  3017. return -EINVAL;
  3018. }
  3019. return 0;
  3020. }
  3021. int qlcnic_set_max_rss(struct qlcnic_adapter *adapter, u8 data, int txq)
  3022. {
  3023. int err;
  3024. struct net_device *netdev = adapter->netdev;
  3025. int num_msix;
  3026. if (test_bit(__QLCNIC_RESETTING, &adapter->state))
  3027. return -EBUSY;
  3028. if (qlcnic_82xx_check(adapter) && !qlcnic_use_msi_x &&
  3029. !qlcnic_use_msi) {
  3030. netdev_err(netdev, "No RSS support in INT-x mode\n");
  3031. return -EINVAL;
  3032. }
  3033. netif_device_detach(netdev);
  3034. if (netif_running(netdev))
  3035. __qlcnic_down(adapter, netdev);
  3036. qlcnic_detach(adapter);
  3037. if (qlcnic_82xx_check(adapter)) {
  3038. if (txq != 0)
  3039. adapter->max_drv_tx_rings = txq;
  3040. if (qlcnic_check_multi_tx(adapter) &&
  3041. (txq > adapter->max_drv_tx_rings))
  3042. num_msix = adapter->max_drv_tx_rings;
  3043. else
  3044. num_msix = data;
  3045. }
  3046. if (qlcnic_83xx_check(adapter)) {
  3047. qlcnic_83xx_free_mbx_intr(adapter);
  3048. qlcnic_83xx_enable_mbx_poll(adapter);
  3049. }
  3050. netif_set_real_num_tx_queues(netdev, adapter->max_drv_tx_rings);
  3051. qlcnic_teardown_intr(adapter);
  3052. err = qlcnic_setup_intr(adapter, data, txq);
  3053. if (err) {
  3054. kfree(adapter->msix_entries);
  3055. netdev_err(netdev, "failed to setup interrupt\n");
  3056. return err;
  3057. }
  3058. if (qlcnic_83xx_check(adapter)) {
  3059. /* register for NIC IDC AEN Events */
  3060. qlcnic_83xx_register_nic_idc_func(adapter, 1);
  3061. err = qlcnic_83xx_setup_mbx_intr(adapter);
  3062. qlcnic_83xx_disable_mbx_poll(adapter);
  3063. if (err) {
  3064. dev_err(&adapter->pdev->dev,
  3065. "failed to setup mbx interrupt\n");
  3066. goto done;
  3067. }
  3068. }
  3069. if (netif_running(netdev)) {
  3070. err = qlcnic_attach(adapter);
  3071. if (err)
  3072. goto done;
  3073. err = __qlcnic_up(adapter, netdev);
  3074. if (err)
  3075. goto done;
  3076. qlcnic_restore_indev_addr(netdev, NETDEV_UP);
  3077. }
  3078. done:
  3079. netif_device_attach(netdev);
  3080. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  3081. return err;
  3082. }
  3083. #ifdef CONFIG_INET
  3084. #define is_qlcnic_netdev(dev) (dev->netdev_ops == &qlcnic_netdev_ops)
  3085. static void
  3086. qlcnic_config_indev_addr(struct qlcnic_adapter *adapter,
  3087. struct net_device *dev, unsigned long event)
  3088. {
  3089. struct in_device *indev;
  3090. indev = in_dev_get(dev);
  3091. if (!indev)
  3092. return;
  3093. for_ifa(indev) {
  3094. switch (event) {
  3095. case NETDEV_UP:
  3096. qlcnic_config_ipaddr(adapter,
  3097. ifa->ifa_address, QLCNIC_IP_UP);
  3098. break;
  3099. case NETDEV_DOWN:
  3100. qlcnic_config_ipaddr(adapter,
  3101. ifa->ifa_address, QLCNIC_IP_DOWN);
  3102. break;
  3103. default:
  3104. break;
  3105. }
  3106. } endfor_ifa(indev);
  3107. in_dev_put(indev);
  3108. }
  3109. void qlcnic_restore_indev_addr(struct net_device *netdev, unsigned long event)
  3110. {
  3111. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  3112. struct net_device *dev;
  3113. u16 vid;
  3114. qlcnic_config_indev_addr(adapter, netdev, event);
  3115. rcu_read_lock();
  3116. for_each_set_bit(vid, adapter->vlans, VLAN_N_VID) {
  3117. dev = __vlan_find_dev_deep(netdev, htons(ETH_P_8021Q), vid);
  3118. if (!dev)
  3119. continue;
  3120. qlcnic_config_indev_addr(adapter, dev, event);
  3121. }
  3122. rcu_read_unlock();
  3123. }
  3124. static int qlcnic_netdev_event(struct notifier_block *this,
  3125. unsigned long event, void *ptr)
  3126. {
  3127. struct qlcnic_adapter *adapter;
  3128. struct net_device *dev = netdev_notifier_info_to_dev(ptr);
  3129. recheck:
  3130. if (dev == NULL)
  3131. goto done;
  3132. if (dev->priv_flags & IFF_802_1Q_VLAN) {
  3133. dev = vlan_dev_real_dev(dev);
  3134. goto recheck;
  3135. }
  3136. if (!is_qlcnic_netdev(dev))
  3137. goto done;
  3138. adapter = netdev_priv(dev);
  3139. if (!adapter)
  3140. goto done;
  3141. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  3142. goto done;
  3143. qlcnic_config_indev_addr(adapter, dev, event);
  3144. done:
  3145. return NOTIFY_DONE;
  3146. }
  3147. static int
  3148. qlcnic_inetaddr_event(struct notifier_block *this,
  3149. unsigned long event, void *ptr)
  3150. {
  3151. struct qlcnic_adapter *adapter;
  3152. struct net_device *dev;
  3153. struct in_ifaddr *ifa = (struct in_ifaddr *)ptr;
  3154. dev = ifa->ifa_dev ? ifa->ifa_dev->dev : NULL;
  3155. recheck:
  3156. if (dev == NULL)
  3157. goto done;
  3158. if (dev->priv_flags & IFF_802_1Q_VLAN) {
  3159. dev = vlan_dev_real_dev(dev);
  3160. goto recheck;
  3161. }
  3162. if (!is_qlcnic_netdev(dev))
  3163. goto done;
  3164. adapter = netdev_priv(dev);
  3165. if (!adapter)
  3166. goto done;
  3167. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  3168. goto done;
  3169. switch (event) {
  3170. case NETDEV_UP:
  3171. qlcnic_config_ipaddr(adapter, ifa->ifa_address, QLCNIC_IP_UP);
  3172. break;
  3173. case NETDEV_DOWN:
  3174. qlcnic_config_ipaddr(adapter, ifa->ifa_address, QLCNIC_IP_DOWN);
  3175. break;
  3176. default:
  3177. break;
  3178. }
  3179. done:
  3180. return NOTIFY_DONE;
  3181. }
  3182. static struct notifier_block qlcnic_netdev_cb = {
  3183. .notifier_call = qlcnic_netdev_event,
  3184. };
  3185. static struct notifier_block qlcnic_inetaddr_cb = {
  3186. .notifier_call = qlcnic_inetaddr_event,
  3187. };
  3188. #else
  3189. void qlcnic_restore_indev_addr(struct net_device *dev, unsigned long event)
  3190. { }
  3191. #endif
  3192. static const struct pci_error_handlers qlcnic_err_handler = {
  3193. .error_detected = qlcnic_io_error_detected,
  3194. .slot_reset = qlcnic_io_slot_reset,
  3195. .resume = qlcnic_io_resume,
  3196. };
  3197. static struct pci_driver qlcnic_driver = {
  3198. .name = qlcnic_driver_name,
  3199. .id_table = qlcnic_pci_tbl,
  3200. .probe = qlcnic_probe,
  3201. .remove = qlcnic_remove,
  3202. #ifdef CONFIG_PM
  3203. .suspend = qlcnic_suspend,
  3204. .resume = qlcnic_resume,
  3205. #endif
  3206. .shutdown = qlcnic_shutdown,
  3207. .err_handler = &qlcnic_err_handler,
  3208. #ifdef CONFIG_QLCNIC_SRIOV
  3209. .sriov_configure = qlcnic_pci_sriov_configure,
  3210. #endif
  3211. };
  3212. static int __init qlcnic_init_module(void)
  3213. {
  3214. int ret;
  3215. printk(KERN_INFO "%s\n", qlcnic_driver_string);
  3216. #ifdef CONFIG_INET
  3217. register_netdevice_notifier(&qlcnic_netdev_cb);
  3218. register_inetaddr_notifier(&qlcnic_inetaddr_cb);
  3219. #endif
  3220. ret = pci_register_driver(&qlcnic_driver);
  3221. if (ret) {
  3222. #ifdef CONFIG_INET
  3223. unregister_inetaddr_notifier(&qlcnic_inetaddr_cb);
  3224. unregister_netdevice_notifier(&qlcnic_netdev_cb);
  3225. #endif
  3226. }
  3227. return ret;
  3228. }
  3229. module_init(qlcnic_init_module);
  3230. static void __exit qlcnic_exit_module(void)
  3231. {
  3232. pci_unregister_driver(&qlcnic_driver);
  3233. #ifdef CONFIG_INET
  3234. unregister_inetaddr_notifier(&qlcnic_inetaddr_cb);
  3235. unregister_netdevice_notifier(&qlcnic_netdev_cb);
  3236. #endif
  3237. }
  3238. module_exit(qlcnic_exit_module);