pch_gbe_api.c 6.8 KB

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  1. /*
  2. * Copyright (C) 1999 - 2010 Intel Corporation.
  3. * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
  4. *
  5. * This code was derived from the Intel e1000e Linux driver.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  19. */
  20. #include "pch_gbe.h"
  21. #include "pch_gbe_phy.h"
  22. #include "pch_gbe_api.h"
  23. /* bus type values */
  24. #define pch_gbe_bus_type_unknown 0
  25. #define pch_gbe_bus_type_pci 1
  26. #define pch_gbe_bus_type_pcix 2
  27. #define pch_gbe_bus_type_pci_express 3
  28. #define pch_gbe_bus_type_reserved 4
  29. /* bus speed values */
  30. #define pch_gbe_bus_speed_unknown 0
  31. #define pch_gbe_bus_speed_33 1
  32. #define pch_gbe_bus_speed_66 2
  33. #define pch_gbe_bus_speed_100 3
  34. #define pch_gbe_bus_speed_120 4
  35. #define pch_gbe_bus_speed_133 5
  36. #define pch_gbe_bus_speed_2500 6
  37. #define pch_gbe_bus_speed_reserved 7
  38. /* bus width values */
  39. #define pch_gbe_bus_width_unknown 0
  40. #define pch_gbe_bus_width_pcie_x1 1
  41. #define pch_gbe_bus_width_pcie_x2 2
  42. #define pch_gbe_bus_width_pcie_x4 4
  43. #define pch_gbe_bus_width_32 5
  44. #define pch_gbe_bus_width_64 6
  45. #define pch_gbe_bus_width_reserved 7
  46. /**
  47. * pch_gbe_plat_get_bus_info - Obtain bus information for adapter
  48. * @hw: Pointer to the HW structure
  49. */
  50. static void pch_gbe_plat_get_bus_info(struct pch_gbe_hw *hw)
  51. {
  52. hw->bus.type = pch_gbe_bus_type_pci_express;
  53. hw->bus.speed = pch_gbe_bus_speed_2500;
  54. hw->bus.width = pch_gbe_bus_width_pcie_x1;
  55. }
  56. /**
  57. * pch_gbe_plat_init_hw - Initialize hardware
  58. * @hw: Pointer to the HW structure
  59. * Returns:
  60. * 0: Successfully
  61. * Negative value: Failed-EBUSY
  62. */
  63. static s32 pch_gbe_plat_init_hw(struct pch_gbe_hw *hw)
  64. {
  65. s32 ret_val;
  66. ret_val = pch_gbe_phy_get_id(hw);
  67. if (ret_val) {
  68. struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
  69. netdev_err(adapter->netdev, "pch_gbe_phy_get_id error\n");
  70. return ret_val;
  71. }
  72. pch_gbe_phy_init_setting(hw);
  73. /* Setup Mac interface option RGMII */
  74. #ifdef PCH_GBE_MAC_IFOP_RGMII
  75. pch_gbe_phy_set_rgmii(hw);
  76. #endif
  77. return ret_val;
  78. }
  79. static const struct pch_gbe_functions pch_gbe_ops = {
  80. .get_bus_info = pch_gbe_plat_get_bus_info,
  81. .init_hw = pch_gbe_plat_init_hw,
  82. .read_phy_reg = pch_gbe_phy_read_reg_miic,
  83. .write_phy_reg = pch_gbe_phy_write_reg_miic,
  84. .reset_phy = pch_gbe_phy_hw_reset,
  85. .sw_reset_phy = pch_gbe_phy_sw_reset,
  86. .power_up_phy = pch_gbe_phy_power_up,
  87. .power_down_phy = pch_gbe_phy_power_down,
  88. .read_mac_addr = pch_gbe_mac_read_mac_addr
  89. };
  90. /**
  91. * pch_gbe_plat_init_function_pointers - Init func ptrs
  92. * @hw: Pointer to the HW structure
  93. */
  94. static void pch_gbe_plat_init_function_pointers(struct pch_gbe_hw *hw)
  95. {
  96. /* Set PHY parameter */
  97. hw->phy.reset_delay_us = PCH_GBE_PHY_RESET_DELAY_US;
  98. /* Set function pointers */
  99. hw->func = &pch_gbe_ops;
  100. }
  101. /**
  102. * pch_gbe_hal_setup_init_funcs - Initializes function pointers
  103. * @hw: Pointer to the HW structure
  104. * Returns:
  105. * 0: Successfully
  106. * ENOSYS: Function is not registered
  107. */
  108. s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw)
  109. {
  110. if (!hw->reg) {
  111. struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
  112. netdev_err(adapter->netdev, "ERROR: Registers not mapped\n");
  113. return -ENOSYS;
  114. }
  115. pch_gbe_plat_init_function_pointers(hw);
  116. return 0;
  117. }
  118. /**
  119. * pch_gbe_hal_get_bus_info - Obtain bus information for adapter
  120. * @hw: Pointer to the HW structure
  121. */
  122. void pch_gbe_hal_get_bus_info(struct pch_gbe_hw *hw)
  123. {
  124. if (!hw->func->get_bus_info) {
  125. struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
  126. netdev_err(adapter->netdev, "ERROR: configuration\n");
  127. return;
  128. }
  129. hw->func->get_bus_info(hw);
  130. }
  131. /**
  132. * pch_gbe_hal_init_hw - Initialize hardware
  133. * @hw: Pointer to the HW structure
  134. * Returns:
  135. * 0: Successfully
  136. * ENOSYS: Function is not registered
  137. */
  138. s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw)
  139. {
  140. if (!hw->func->init_hw) {
  141. struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
  142. netdev_err(adapter->netdev, "ERROR: configuration\n");
  143. return -ENOSYS;
  144. }
  145. return hw->func->init_hw(hw);
  146. }
  147. /**
  148. * pch_gbe_hal_read_phy_reg - Reads PHY register
  149. * @hw: Pointer to the HW structure
  150. * @offset: The register to read
  151. * @data: The buffer to store the 16-bit read.
  152. * Returns:
  153. * 0: Successfully
  154. * Negative value: Failed
  155. */
  156. s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset,
  157. u16 *data)
  158. {
  159. if (!hw->func->read_phy_reg)
  160. return 0;
  161. return hw->func->read_phy_reg(hw, offset, data);
  162. }
  163. /**
  164. * pch_gbe_hal_write_phy_reg - Writes PHY register
  165. * @hw: Pointer to the HW structure
  166. * @offset: The register to read
  167. * @data: The value to write.
  168. * Returns:
  169. * 0: Successfully
  170. * Negative value: Failed
  171. */
  172. s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset,
  173. u16 data)
  174. {
  175. if (!hw->func->write_phy_reg)
  176. return 0;
  177. return hw->func->write_phy_reg(hw, offset, data);
  178. }
  179. /**
  180. * pch_gbe_hal_phy_hw_reset - Hard PHY reset
  181. * @hw: Pointer to the HW structure
  182. */
  183. void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw)
  184. {
  185. if (!hw->func->reset_phy) {
  186. struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
  187. netdev_err(adapter->netdev, "ERROR: configuration\n");
  188. return;
  189. }
  190. hw->func->reset_phy(hw);
  191. }
  192. /**
  193. * pch_gbe_hal_phy_sw_reset - Soft PHY reset
  194. * @hw: Pointer to the HW structure
  195. */
  196. void pch_gbe_hal_phy_sw_reset(struct pch_gbe_hw *hw)
  197. {
  198. if (!hw->func->sw_reset_phy) {
  199. struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
  200. netdev_err(adapter->netdev, "ERROR: configuration\n");
  201. return;
  202. }
  203. hw->func->sw_reset_phy(hw);
  204. }
  205. /**
  206. * pch_gbe_hal_read_mac_addr - Reads MAC address
  207. * @hw: Pointer to the HW structure
  208. * Returns:
  209. * 0: Successfully
  210. * ENOSYS: Function is not registered
  211. */
  212. s32 pch_gbe_hal_read_mac_addr(struct pch_gbe_hw *hw)
  213. {
  214. if (!hw->func->read_mac_addr) {
  215. struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
  216. netdev_err(adapter->netdev, "ERROR: configuration\n");
  217. return -ENOSYS;
  218. }
  219. return hw->func->read_mac_addr(hw);
  220. }
  221. /**
  222. * pch_gbe_hal_power_up_phy - Power up PHY
  223. * @hw: Pointer to the HW structure
  224. */
  225. void pch_gbe_hal_power_up_phy(struct pch_gbe_hw *hw)
  226. {
  227. if (hw->func->power_up_phy)
  228. hw->func->power_up_phy(hw);
  229. }
  230. /**
  231. * pch_gbe_hal_power_down_phy - Power down PHY
  232. * @hw: Pointer to the HW structure
  233. */
  234. void pch_gbe_hal_power_down_phy(struct pch_gbe_hw *hw)
  235. {
  236. if (hw->func->power_down_phy)
  237. hw->func->power_down_phy(hw);
  238. }