en_cq.c 5.0 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/mlx4/cq.h>
  34. #include <linux/mlx4/qp.h>
  35. #include <linux/mlx4/cmd.h>
  36. #include "mlx4_en.h"
  37. static void mlx4_en_cq_event(struct mlx4_cq *cq, enum mlx4_event event)
  38. {
  39. return;
  40. }
  41. int mlx4_en_create_cq(struct mlx4_en_priv *priv,
  42. struct mlx4_en_cq *cq,
  43. int entries, int ring, enum cq_type mode)
  44. {
  45. struct mlx4_en_dev *mdev = priv->mdev;
  46. int err;
  47. cq->size = entries;
  48. cq->buf_size = cq->size * mdev->dev->caps.cqe_size;
  49. cq->ring = ring;
  50. cq->is_tx = mode;
  51. spin_lock_init(&cq->lock);
  52. err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres,
  53. cq->buf_size, 2 * PAGE_SIZE);
  54. if (err)
  55. return err;
  56. err = mlx4_en_map_buffer(&cq->wqres.buf);
  57. if (err)
  58. mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
  59. else
  60. cq->buf = (struct mlx4_cqe *) cq->wqres.buf.direct.buf;
  61. return err;
  62. }
  63. int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
  64. int cq_idx)
  65. {
  66. struct mlx4_en_dev *mdev = priv->mdev;
  67. int err = 0;
  68. char name[25];
  69. int timestamp_en = 0;
  70. struct cpu_rmap *rmap =
  71. #ifdef CONFIG_RFS_ACCEL
  72. priv->dev->rx_cpu_rmap;
  73. #else
  74. NULL;
  75. #endif
  76. cq->dev = mdev->pndev[priv->port];
  77. cq->mcq.set_ci_db = cq->wqres.db.db;
  78. cq->mcq.arm_db = cq->wqres.db.db + 1;
  79. *cq->mcq.set_ci_db = 0;
  80. *cq->mcq.arm_db = 0;
  81. memset(cq->buf, 0, cq->buf_size);
  82. if (cq->is_tx == RX) {
  83. if (mdev->dev->caps.comp_pool) {
  84. if (!cq->vector) {
  85. sprintf(name, "%s-%d", priv->dev->name,
  86. cq->ring);
  87. /* Set IRQ for specific name (per ring) */
  88. if (mlx4_assign_eq(mdev->dev, name, rmap,
  89. &cq->vector)) {
  90. cq->vector = (cq->ring + 1 + priv->port)
  91. % mdev->dev->caps.num_comp_vectors;
  92. mlx4_warn(mdev, "Failed Assigning an EQ to "
  93. "%s ,Falling back to legacy EQ's\n",
  94. name);
  95. }
  96. }
  97. } else {
  98. cq->vector = (cq->ring + 1 + priv->port) %
  99. mdev->dev->caps.num_comp_vectors;
  100. }
  101. } else {
  102. /* For TX we use the same irq per
  103. ring we assigned for the RX */
  104. struct mlx4_en_cq *rx_cq;
  105. cq_idx = cq_idx % priv->rx_ring_num;
  106. rx_cq = &priv->rx_cq[cq_idx];
  107. cq->vector = rx_cq->vector;
  108. }
  109. if (!cq->is_tx)
  110. cq->size = priv->rx_ring[cq->ring].actual_size;
  111. if ((cq->is_tx && priv->hwtstamp_config.tx_type) ||
  112. (!cq->is_tx && priv->hwtstamp_config.rx_filter))
  113. timestamp_en = 1;
  114. err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt,
  115. &mdev->priv_uar, cq->wqres.db.dma, &cq->mcq,
  116. cq->vector, 0, timestamp_en);
  117. if (err)
  118. return err;
  119. cq->mcq.comp = cq->is_tx ? mlx4_en_tx_irq : mlx4_en_rx_irq;
  120. cq->mcq.event = mlx4_en_cq_event;
  121. if (!cq->is_tx) {
  122. netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_rx_cq, 64);
  123. napi_hash_add(&cq->napi);
  124. napi_enable(&cq->napi);
  125. }
  126. return 0;
  127. }
  128. void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
  129. {
  130. struct mlx4_en_dev *mdev = priv->mdev;
  131. mlx4_en_unmap_buffer(&cq->wqres.buf);
  132. mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
  133. if (priv->mdev->dev->caps.comp_pool && cq->vector)
  134. mlx4_release_eq(priv->mdev->dev, cq->vector);
  135. cq->vector = 0;
  136. cq->buf_size = 0;
  137. cq->buf = NULL;
  138. }
  139. void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
  140. {
  141. if (!cq->is_tx) {
  142. napi_disable(&cq->napi);
  143. napi_hash_del(&cq->napi);
  144. synchronize_rcu();
  145. netif_napi_del(&cq->napi);
  146. }
  147. mlx4_cq_free(priv->mdev->dev, &cq->mcq);
  148. }
  149. /* Set rx cq moderation parameters */
  150. int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
  151. {
  152. return mlx4_cq_modify(priv->mdev->dev, &cq->mcq,
  153. cq->moder_cnt, cq->moder_time);
  154. }
  155. int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
  156. {
  157. mlx4_cq_arm(&cq->mcq, MLX4_CQ_DB_REQ_NOT, priv->mdev->uar_map,
  158. &priv->mdev->uar_lock);
  159. return 0;
  160. }