bnx2x_stats.c 62 KB

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  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2013 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18. #include "bnx2x_stats.h"
  19. #include "bnx2x_cmn.h"
  20. #include "bnx2x_sriov.h"
  21. /* Statistics */
  22. /*
  23. * General service functions
  24. */
  25. static inline long bnx2x_hilo(u32 *hiref)
  26. {
  27. u32 lo = *(hiref + 1);
  28. #if (BITS_PER_LONG == 64)
  29. u32 hi = *hiref;
  30. return HILO_U64(hi, lo);
  31. #else
  32. return lo;
  33. #endif
  34. }
  35. static inline u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp)
  36. {
  37. u16 res = 0;
  38. /* 'newest' convention - shmem2 cotains the size of the port stats */
  39. if (SHMEM2_HAS(bp, sizeof_port_stats)) {
  40. u32 size = SHMEM2_RD(bp, sizeof_port_stats);
  41. if (size)
  42. res = size;
  43. /* prevent newer BC from causing buffer overflow */
  44. if (res > sizeof(struct host_port_stats))
  45. res = sizeof(struct host_port_stats);
  46. }
  47. /* Older convention - all BCs support the port stats' fields up until
  48. * the 'not_used' field
  49. */
  50. if (!res) {
  51. res = offsetof(struct host_port_stats, not_used) + 4;
  52. /* if PFC stats are supported by the MFW, DMA them as well */
  53. if (bp->flags & BC_SUPPORTS_PFC_STATS) {
  54. res += offsetof(struct host_port_stats,
  55. pfc_frames_rx_lo) -
  56. offsetof(struct host_port_stats,
  57. pfc_frames_tx_hi) + 4 ;
  58. }
  59. }
  60. res >>= 2;
  61. WARN_ON(res > 2 * DMAE_LEN32_RD_MAX);
  62. return res;
  63. }
  64. /*
  65. * Init service functions
  66. */
  67. static void bnx2x_dp_stats(struct bnx2x *bp)
  68. {
  69. int i;
  70. DP(BNX2X_MSG_STATS, "dumping stats:\n"
  71. "fw_stats_req\n"
  72. " hdr\n"
  73. " cmd_num %d\n"
  74. " reserved0 %d\n"
  75. " drv_stats_counter %d\n"
  76. " reserved1 %d\n"
  77. " stats_counters_addrs %x %x\n",
  78. bp->fw_stats_req->hdr.cmd_num,
  79. bp->fw_stats_req->hdr.reserved0,
  80. bp->fw_stats_req->hdr.drv_stats_counter,
  81. bp->fw_stats_req->hdr.reserved1,
  82. bp->fw_stats_req->hdr.stats_counters_addrs.hi,
  83. bp->fw_stats_req->hdr.stats_counters_addrs.lo);
  84. for (i = 0; i < bp->fw_stats_req->hdr.cmd_num; i++) {
  85. DP(BNX2X_MSG_STATS,
  86. "query[%d]\n"
  87. " kind %d\n"
  88. " index %d\n"
  89. " funcID %d\n"
  90. " reserved %d\n"
  91. " address %x %x\n",
  92. i, bp->fw_stats_req->query[i].kind,
  93. bp->fw_stats_req->query[i].index,
  94. bp->fw_stats_req->query[i].funcID,
  95. bp->fw_stats_req->query[i].reserved,
  96. bp->fw_stats_req->query[i].address.hi,
  97. bp->fw_stats_req->query[i].address.lo);
  98. }
  99. }
  100. /* Post the next statistics ramrod. Protect it with the spin in
  101. * order to ensure the strict order between statistics ramrods
  102. * (each ramrod has a sequence number passed in a
  103. * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
  104. * sent in order).
  105. */
  106. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  107. {
  108. if (!bp->stats_pending) {
  109. int rc;
  110. spin_lock_bh(&bp->stats_lock);
  111. if (bp->stats_pending) {
  112. spin_unlock_bh(&bp->stats_lock);
  113. return;
  114. }
  115. bp->fw_stats_req->hdr.drv_stats_counter =
  116. cpu_to_le16(bp->stats_counter++);
  117. DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n",
  118. bp->fw_stats_req->hdr.drv_stats_counter);
  119. /* adjust the ramrod to include VF queues statistics */
  120. bnx2x_iov_adjust_stats_req(bp);
  121. bnx2x_dp_stats(bp);
  122. /* send FW stats ramrod */
  123. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
  124. U64_HI(bp->fw_stats_req_mapping),
  125. U64_LO(bp->fw_stats_req_mapping),
  126. NONE_CONNECTION_TYPE);
  127. if (rc == 0)
  128. bp->stats_pending = 1;
  129. spin_unlock_bh(&bp->stats_lock);
  130. }
  131. }
  132. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  133. {
  134. struct dmae_command *dmae = &bp->stats_dmae;
  135. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  136. *stats_comp = DMAE_COMP_VAL;
  137. if (CHIP_REV_IS_SLOW(bp))
  138. return;
  139. /* Update MCP's statistics if possible */
  140. if (bp->func_stx)
  141. memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats,
  142. sizeof(bp->func_stats));
  143. /* loader */
  144. if (bp->executer_idx) {
  145. int loader_idx = PMF_DMAE_C(bp);
  146. u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  147. true, DMAE_COMP_GRC);
  148. opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
  149. memset(dmae, 0, sizeof(struct dmae_command));
  150. dmae->opcode = opcode;
  151. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  152. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  153. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  154. sizeof(struct dmae_command) *
  155. (loader_idx + 1)) >> 2;
  156. dmae->dst_addr_hi = 0;
  157. dmae->len = sizeof(struct dmae_command) >> 2;
  158. if (CHIP_IS_E1(bp))
  159. dmae->len--;
  160. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  161. dmae->comp_addr_hi = 0;
  162. dmae->comp_val = 1;
  163. *stats_comp = 0;
  164. bnx2x_post_dmae(bp, dmae, loader_idx);
  165. } else if (bp->func_stx) {
  166. *stats_comp = 0;
  167. bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
  168. }
  169. }
  170. static int bnx2x_stats_comp(struct bnx2x *bp)
  171. {
  172. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  173. int cnt = 10;
  174. might_sleep();
  175. while (*stats_comp != DMAE_COMP_VAL) {
  176. if (!cnt) {
  177. BNX2X_ERR("timeout waiting for stats finished\n");
  178. break;
  179. }
  180. cnt--;
  181. usleep_range(1000, 2000);
  182. }
  183. return 1;
  184. }
  185. /*
  186. * Statistics service functions
  187. */
  188. /* should be called under stats_sema */
  189. static void __bnx2x_stats_pmf_update(struct bnx2x *bp)
  190. {
  191. struct dmae_command *dmae;
  192. u32 opcode;
  193. int loader_idx = PMF_DMAE_C(bp);
  194. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  195. /* sanity */
  196. if (!bp->port.pmf || !bp->port.port_stx) {
  197. BNX2X_ERR("BUG!\n");
  198. return;
  199. }
  200. bp->executer_idx = 0;
  201. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
  202. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  203. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
  204. dmae->src_addr_lo = bp->port.port_stx >> 2;
  205. dmae->src_addr_hi = 0;
  206. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  207. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  208. dmae->len = DMAE_LEN32_RD_MAX;
  209. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  210. dmae->comp_addr_hi = 0;
  211. dmae->comp_val = 1;
  212. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  213. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  214. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  215. dmae->src_addr_hi = 0;
  216. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  217. DMAE_LEN32_RD_MAX * 4);
  218. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  219. DMAE_LEN32_RD_MAX * 4);
  220. dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX;
  221. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  222. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  223. dmae->comp_val = DMAE_COMP_VAL;
  224. *stats_comp = 0;
  225. bnx2x_hw_stats_post(bp);
  226. bnx2x_stats_comp(bp);
  227. }
  228. static void bnx2x_port_stats_init(struct bnx2x *bp)
  229. {
  230. struct dmae_command *dmae;
  231. int port = BP_PORT(bp);
  232. u32 opcode;
  233. int loader_idx = PMF_DMAE_C(bp);
  234. u32 mac_addr;
  235. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  236. /* sanity */
  237. if (!bp->link_vars.link_up || !bp->port.pmf) {
  238. BNX2X_ERR("BUG!\n");
  239. return;
  240. }
  241. bp->executer_idx = 0;
  242. /* MCP */
  243. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  244. true, DMAE_COMP_GRC);
  245. if (bp->port.port_stx) {
  246. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  247. dmae->opcode = opcode;
  248. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  249. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  250. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  251. dmae->dst_addr_hi = 0;
  252. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  253. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  254. dmae->comp_addr_hi = 0;
  255. dmae->comp_val = 1;
  256. }
  257. if (bp->func_stx) {
  258. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  259. dmae->opcode = opcode;
  260. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  261. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  262. dmae->dst_addr_lo = bp->func_stx >> 2;
  263. dmae->dst_addr_hi = 0;
  264. dmae->len = sizeof(struct host_func_stats) >> 2;
  265. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  266. dmae->comp_addr_hi = 0;
  267. dmae->comp_val = 1;
  268. }
  269. /* MAC */
  270. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  271. true, DMAE_COMP_GRC);
  272. /* EMAC is special */
  273. if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  274. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  275. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  276. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  277. dmae->opcode = opcode;
  278. dmae->src_addr_lo = (mac_addr +
  279. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  280. dmae->src_addr_hi = 0;
  281. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  282. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  283. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  284. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  285. dmae->comp_addr_hi = 0;
  286. dmae->comp_val = 1;
  287. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  288. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  289. dmae->opcode = opcode;
  290. dmae->src_addr_lo = (mac_addr +
  291. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  292. dmae->src_addr_hi = 0;
  293. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  294. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  295. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  296. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  297. dmae->len = 1;
  298. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  299. dmae->comp_addr_hi = 0;
  300. dmae->comp_val = 1;
  301. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  302. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  303. dmae->opcode = opcode;
  304. dmae->src_addr_lo = (mac_addr +
  305. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  306. dmae->src_addr_hi = 0;
  307. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  308. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  309. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  310. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  311. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  312. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  313. dmae->comp_addr_hi = 0;
  314. dmae->comp_val = 1;
  315. } else {
  316. u32 tx_src_addr_lo, rx_src_addr_lo;
  317. u16 rx_len, tx_len;
  318. /* configure the params according to MAC type */
  319. switch (bp->link_vars.mac_type) {
  320. case MAC_TYPE_BMAC:
  321. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  322. NIG_REG_INGRESS_BMAC0_MEM);
  323. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  324. BIGMAC_REGISTER_TX_STAT_GTBYT */
  325. if (CHIP_IS_E1x(bp)) {
  326. tx_src_addr_lo = (mac_addr +
  327. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  328. tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  329. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  330. rx_src_addr_lo = (mac_addr +
  331. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  332. rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  333. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  334. } else {
  335. tx_src_addr_lo = (mac_addr +
  336. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  337. tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
  338. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  339. rx_src_addr_lo = (mac_addr +
  340. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  341. rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
  342. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  343. }
  344. break;
  345. case MAC_TYPE_UMAC: /* handled by MSTAT */
  346. case MAC_TYPE_XMAC: /* handled by MSTAT */
  347. default:
  348. mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
  349. tx_src_addr_lo = (mac_addr +
  350. MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
  351. rx_src_addr_lo = (mac_addr +
  352. MSTAT_REG_RX_STAT_GR64_LO) >> 2;
  353. tx_len = sizeof(bp->slowpath->
  354. mac_stats.mstat_stats.stats_tx) >> 2;
  355. rx_len = sizeof(bp->slowpath->
  356. mac_stats.mstat_stats.stats_rx) >> 2;
  357. break;
  358. }
  359. /* TX stats */
  360. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  361. dmae->opcode = opcode;
  362. dmae->src_addr_lo = tx_src_addr_lo;
  363. dmae->src_addr_hi = 0;
  364. dmae->len = tx_len;
  365. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  366. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  367. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  368. dmae->comp_addr_hi = 0;
  369. dmae->comp_val = 1;
  370. /* RX stats */
  371. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  372. dmae->opcode = opcode;
  373. dmae->src_addr_hi = 0;
  374. dmae->src_addr_lo = rx_src_addr_lo;
  375. dmae->dst_addr_lo =
  376. U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  377. dmae->dst_addr_hi =
  378. U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  379. dmae->len = rx_len;
  380. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  381. dmae->comp_addr_hi = 0;
  382. dmae->comp_val = 1;
  383. }
  384. /* NIG */
  385. if (!CHIP_IS_E3(bp)) {
  386. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  387. dmae->opcode = opcode;
  388. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  389. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  390. dmae->src_addr_hi = 0;
  391. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  392. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  393. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  394. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  395. dmae->len = (2*sizeof(u32)) >> 2;
  396. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  397. dmae->comp_addr_hi = 0;
  398. dmae->comp_val = 1;
  399. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  400. dmae->opcode = opcode;
  401. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  402. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  403. dmae->src_addr_hi = 0;
  404. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  405. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  406. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  407. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  408. dmae->len = (2*sizeof(u32)) >> 2;
  409. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  410. dmae->comp_addr_hi = 0;
  411. dmae->comp_val = 1;
  412. }
  413. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  414. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  415. true, DMAE_COMP_PCI);
  416. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  417. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  418. dmae->src_addr_hi = 0;
  419. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  420. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  421. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  422. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  423. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  424. dmae->comp_val = DMAE_COMP_VAL;
  425. *stats_comp = 0;
  426. }
  427. static void bnx2x_func_stats_init(struct bnx2x *bp)
  428. {
  429. struct dmae_command *dmae = &bp->stats_dmae;
  430. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  431. /* sanity */
  432. if (!bp->func_stx) {
  433. BNX2X_ERR("BUG!\n");
  434. return;
  435. }
  436. bp->executer_idx = 0;
  437. memset(dmae, 0, sizeof(struct dmae_command));
  438. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  439. true, DMAE_COMP_PCI);
  440. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  441. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  442. dmae->dst_addr_lo = bp->func_stx >> 2;
  443. dmae->dst_addr_hi = 0;
  444. dmae->len = sizeof(struct host_func_stats) >> 2;
  445. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  446. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  447. dmae->comp_val = DMAE_COMP_VAL;
  448. *stats_comp = 0;
  449. }
  450. /* should be called under stats_sema */
  451. static void __bnx2x_stats_start(struct bnx2x *bp)
  452. {
  453. if (IS_PF(bp)) {
  454. if (bp->port.pmf)
  455. bnx2x_port_stats_init(bp);
  456. else if (bp->func_stx)
  457. bnx2x_func_stats_init(bp);
  458. bnx2x_hw_stats_post(bp);
  459. bnx2x_storm_stats_post(bp);
  460. }
  461. bp->stats_started = true;
  462. }
  463. static void bnx2x_stats_start(struct bnx2x *bp)
  464. {
  465. if (down_timeout(&bp->stats_sema, HZ/10))
  466. BNX2X_ERR("Unable to acquire stats lock\n");
  467. __bnx2x_stats_start(bp);
  468. up(&bp->stats_sema);
  469. }
  470. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  471. {
  472. if (down_timeout(&bp->stats_sema, HZ/10))
  473. BNX2X_ERR("Unable to acquire stats lock\n");
  474. bnx2x_stats_comp(bp);
  475. __bnx2x_stats_pmf_update(bp);
  476. __bnx2x_stats_start(bp);
  477. up(&bp->stats_sema);
  478. }
  479. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  480. {
  481. if (down_timeout(&bp->stats_sema, HZ/10))
  482. BNX2X_ERR("Unable to acquire stats lock\n");
  483. __bnx2x_stats_pmf_update(bp);
  484. up(&bp->stats_sema);
  485. }
  486. static void bnx2x_stats_restart(struct bnx2x *bp)
  487. {
  488. /* vfs travel through here as part of the statistics FSM, but no action
  489. * is required
  490. */
  491. if (IS_VF(bp))
  492. return;
  493. if (down_timeout(&bp->stats_sema, HZ/10))
  494. BNX2X_ERR("Unable to acquire stats lock\n");
  495. bnx2x_stats_comp(bp);
  496. __bnx2x_stats_start(bp);
  497. up(&bp->stats_sema);
  498. }
  499. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  500. {
  501. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  502. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  503. struct {
  504. u32 lo;
  505. u32 hi;
  506. } diff;
  507. if (CHIP_IS_E1x(bp)) {
  508. struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
  509. /* the macros below will use "bmac1_stats" type */
  510. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  511. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  512. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  513. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  514. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  515. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  516. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  517. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  518. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  519. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  520. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  521. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  522. UPDATE_STAT64(tx_stat_gt127,
  523. tx_stat_etherstatspkts65octetsto127octets);
  524. UPDATE_STAT64(tx_stat_gt255,
  525. tx_stat_etherstatspkts128octetsto255octets);
  526. UPDATE_STAT64(tx_stat_gt511,
  527. tx_stat_etherstatspkts256octetsto511octets);
  528. UPDATE_STAT64(tx_stat_gt1023,
  529. tx_stat_etherstatspkts512octetsto1023octets);
  530. UPDATE_STAT64(tx_stat_gt1518,
  531. tx_stat_etherstatspkts1024octetsto1522octets);
  532. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  533. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  534. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  535. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  536. UPDATE_STAT64(tx_stat_gterr,
  537. tx_stat_dot3statsinternalmactransmiterrors);
  538. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  539. } else {
  540. struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
  541. /* the macros below will use "bmac2_stats" type */
  542. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  543. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  544. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  545. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  546. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  547. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  548. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  549. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  550. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  551. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  552. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  553. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  554. UPDATE_STAT64(tx_stat_gt127,
  555. tx_stat_etherstatspkts65octetsto127octets);
  556. UPDATE_STAT64(tx_stat_gt255,
  557. tx_stat_etherstatspkts128octetsto255octets);
  558. UPDATE_STAT64(tx_stat_gt511,
  559. tx_stat_etherstatspkts256octetsto511octets);
  560. UPDATE_STAT64(tx_stat_gt1023,
  561. tx_stat_etherstatspkts512octetsto1023octets);
  562. UPDATE_STAT64(tx_stat_gt1518,
  563. tx_stat_etherstatspkts1024octetsto1522octets);
  564. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  565. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  566. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  567. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  568. UPDATE_STAT64(tx_stat_gterr,
  569. tx_stat_dot3statsinternalmactransmiterrors);
  570. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  571. /* collect PFC stats */
  572. pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
  573. pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
  574. pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
  575. pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
  576. }
  577. estats->pause_frames_received_hi =
  578. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  579. estats->pause_frames_received_lo =
  580. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  581. estats->pause_frames_sent_hi =
  582. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  583. estats->pause_frames_sent_lo =
  584. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  585. estats->pfc_frames_received_hi =
  586. pstats->pfc_frames_rx_hi;
  587. estats->pfc_frames_received_lo =
  588. pstats->pfc_frames_rx_lo;
  589. estats->pfc_frames_sent_hi =
  590. pstats->pfc_frames_tx_hi;
  591. estats->pfc_frames_sent_lo =
  592. pstats->pfc_frames_tx_lo;
  593. }
  594. static void bnx2x_mstat_stats_update(struct bnx2x *bp)
  595. {
  596. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  597. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  598. struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
  599. ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
  600. ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
  601. ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
  602. ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
  603. ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
  604. ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
  605. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
  606. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
  607. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
  608. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
  609. /* collect pfc stats */
  610. ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
  611. pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
  612. ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
  613. pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
  614. ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
  615. ADD_STAT64(stats_tx.tx_gt127,
  616. tx_stat_etherstatspkts65octetsto127octets);
  617. ADD_STAT64(stats_tx.tx_gt255,
  618. tx_stat_etherstatspkts128octetsto255octets);
  619. ADD_STAT64(stats_tx.tx_gt511,
  620. tx_stat_etherstatspkts256octetsto511octets);
  621. ADD_STAT64(stats_tx.tx_gt1023,
  622. tx_stat_etherstatspkts512octetsto1023octets);
  623. ADD_STAT64(stats_tx.tx_gt1518,
  624. tx_stat_etherstatspkts1024octetsto1522octets);
  625. ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
  626. ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
  627. ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
  628. ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
  629. ADD_STAT64(stats_tx.tx_gterr,
  630. tx_stat_dot3statsinternalmactransmiterrors);
  631. ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
  632. estats->etherstatspkts1024octetsto1522octets_hi =
  633. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi;
  634. estats->etherstatspkts1024octetsto1522octets_lo =
  635. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo;
  636. estats->etherstatspktsover1522octets_hi =
  637. pstats->mac_stx[1].tx_stat_mac_2047_hi;
  638. estats->etherstatspktsover1522octets_lo =
  639. pstats->mac_stx[1].tx_stat_mac_2047_lo;
  640. ADD_64(estats->etherstatspktsover1522octets_hi,
  641. pstats->mac_stx[1].tx_stat_mac_4095_hi,
  642. estats->etherstatspktsover1522octets_lo,
  643. pstats->mac_stx[1].tx_stat_mac_4095_lo);
  644. ADD_64(estats->etherstatspktsover1522octets_hi,
  645. pstats->mac_stx[1].tx_stat_mac_9216_hi,
  646. estats->etherstatspktsover1522octets_lo,
  647. pstats->mac_stx[1].tx_stat_mac_9216_lo);
  648. ADD_64(estats->etherstatspktsover1522octets_hi,
  649. pstats->mac_stx[1].tx_stat_mac_16383_hi,
  650. estats->etherstatspktsover1522octets_lo,
  651. pstats->mac_stx[1].tx_stat_mac_16383_lo);
  652. estats->pause_frames_received_hi =
  653. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  654. estats->pause_frames_received_lo =
  655. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  656. estats->pause_frames_sent_hi =
  657. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  658. estats->pause_frames_sent_lo =
  659. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  660. estats->pfc_frames_received_hi =
  661. pstats->pfc_frames_rx_hi;
  662. estats->pfc_frames_received_lo =
  663. pstats->pfc_frames_rx_lo;
  664. estats->pfc_frames_sent_hi =
  665. pstats->pfc_frames_tx_hi;
  666. estats->pfc_frames_sent_lo =
  667. pstats->pfc_frames_tx_lo;
  668. }
  669. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  670. {
  671. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  672. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  673. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  674. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  675. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  676. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  677. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  678. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  679. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  680. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  681. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  682. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  683. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  684. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  685. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  686. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  687. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  688. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  689. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  690. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  691. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  692. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  693. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  694. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  695. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  696. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  697. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  698. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  699. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  700. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  701. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  702. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  703. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  704. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  705. estats->pause_frames_received_hi =
  706. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  707. estats->pause_frames_received_lo =
  708. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  709. ADD_64(estats->pause_frames_received_hi,
  710. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  711. estats->pause_frames_received_lo,
  712. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  713. estats->pause_frames_sent_hi =
  714. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  715. estats->pause_frames_sent_lo =
  716. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  717. ADD_64(estats->pause_frames_sent_hi,
  718. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  719. estats->pause_frames_sent_lo,
  720. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  721. }
  722. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  723. {
  724. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  725. struct nig_stats *old = &(bp->port.old_nig_stats);
  726. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  727. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  728. struct {
  729. u32 lo;
  730. u32 hi;
  731. } diff;
  732. switch (bp->link_vars.mac_type) {
  733. case MAC_TYPE_BMAC:
  734. bnx2x_bmac_stats_update(bp);
  735. break;
  736. case MAC_TYPE_EMAC:
  737. bnx2x_emac_stats_update(bp);
  738. break;
  739. case MAC_TYPE_UMAC:
  740. case MAC_TYPE_XMAC:
  741. bnx2x_mstat_stats_update(bp);
  742. break;
  743. case MAC_TYPE_NONE: /* unreached */
  744. DP(BNX2X_MSG_STATS,
  745. "stats updated by DMAE but no MAC active\n");
  746. return -1;
  747. default: /* unreached */
  748. BNX2X_ERR("Unknown MAC type\n");
  749. }
  750. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  751. new->brb_discard - old->brb_discard);
  752. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  753. new->brb_truncate - old->brb_truncate);
  754. if (!CHIP_IS_E3(bp)) {
  755. UPDATE_STAT64_NIG(egress_mac_pkt0,
  756. etherstatspkts1024octetsto1522octets);
  757. UPDATE_STAT64_NIG(egress_mac_pkt1,
  758. etherstatspktsover1522octets);
  759. }
  760. memcpy(old, new, sizeof(struct nig_stats));
  761. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  762. sizeof(struct mac_stx));
  763. estats->brb_drop_hi = pstats->brb_drop_hi;
  764. estats->brb_drop_lo = pstats->brb_drop_lo;
  765. pstats->host_port_stats_counter++;
  766. if (CHIP_IS_E3(bp)) {
  767. u32 lpi_reg = BP_PORT(bp) ? MISC_REG_CPMU_LP_SM_ENT_CNT_P1
  768. : MISC_REG_CPMU_LP_SM_ENT_CNT_P0;
  769. estats->eee_tx_lpi += REG_RD(bp, lpi_reg);
  770. }
  771. if (!BP_NOMCP(bp)) {
  772. u32 nig_timer_max =
  773. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  774. if (nig_timer_max != estats->nig_timer_max) {
  775. estats->nig_timer_max = nig_timer_max;
  776. BNX2X_ERR("NIG timer max (%u)\n",
  777. estats->nig_timer_max);
  778. }
  779. }
  780. return 0;
  781. }
  782. static int bnx2x_storm_stats_validate_counters(struct bnx2x *bp)
  783. {
  784. struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
  785. u16 cur_stats_counter;
  786. /* Make sure we use the value of the counter
  787. * used for sending the last stats ramrod.
  788. */
  789. cur_stats_counter = bp->stats_counter - 1;
  790. /* are storm stats valid? */
  791. if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
  792. DP(BNX2X_MSG_STATS,
  793. "stats not updated by xstorm xstorm counter (0x%x) != stats_counter (0x%x)\n",
  794. le16_to_cpu(counters->xstats_counter), bp->stats_counter);
  795. return -EAGAIN;
  796. }
  797. if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
  798. DP(BNX2X_MSG_STATS,
  799. "stats not updated by ustorm ustorm counter (0x%x) != stats_counter (0x%x)\n",
  800. le16_to_cpu(counters->ustats_counter), bp->stats_counter);
  801. return -EAGAIN;
  802. }
  803. if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
  804. DP(BNX2X_MSG_STATS,
  805. "stats not updated by cstorm cstorm counter (0x%x) != stats_counter (0x%x)\n",
  806. le16_to_cpu(counters->cstats_counter), bp->stats_counter);
  807. return -EAGAIN;
  808. }
  809. if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
  810. DP(BNX2X_MSG_STATS,
  811. "stats not updated by tstorm tstorm counter (0x%x) != stats_counter (0x%x)\n",
  812. le16_to_cpu(counters->tstats_counter), bp->stats_counter);
  813. return -EAGAIN;
  814. }
  815. return 0;
  816. }
  817. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  818. {
  819. struct tstorm_per_port_stats *tport =
  820. &bp->fw_stats_data->port.tstorm_port_statistics;
  821. struct tstorm_per_pf_stats *tfunc =
  822. &bp->fw_stats_data->pf.tstorm_pf_statistics;
  823. struct host_func_stats *fstats = &bp->func_stats;
  824. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  825. struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old;
  826. int i;
  827. /* vfs stat counter is managed by pf */
  828. if (IS_PF(bp) && bnx2x_storm_stats_validate_counters(bp))
  829. return -EAGAIN;
  830. estats->error_bytes_received_hi = 0;
  831. estats->error_bytes_received_lo = 0;
  832. for_each_eth_queue(bp, i) {
  833. struct bnx2x_fastpath *fp = &bp->fp[i];
  834. struct tstorm_per_queue_stats *tclient =
  835. &bp->fw_stats_data->queue_stats[i].
  836. tstorm_queue_statistics;
  837. struct tstorm_per_queue_stats *old_tclient =
  838. &bnx2x_fp_stats(bp, fp)->old_tclient;
  839. struct ustorm_per_queue_stats *uclient =
  840. &bp->fw_stats_data->queue_stats[i].
  841. ustorm_queue_statistics;
  842. struct ustorm_per_queue_stats *old_uclient =
  843. &bnx2x_fp_stats(bp, fp)->old_uclient;
  844. struct xstorm_per_queue_stats *xclient =
  845. &bp->fw_stats_data->queue_stats[i].
  846. xstorm_queue_statistics;
  847. struct xstorm_per_queue_stats *old_xclient =
  848. &bnx2x_fp_stats(bp, fp)->old_xclient;
  849. struct bnx2x_eth_q_stats *qstats =
  850. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  851. struct bnx2x_eth_q_stats_old *qstats_old =
  852. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  853. u32 diff;
  854. DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n",
  855. i, xclient->ucast_pkts_sent,
  856. xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
  857. DP(BNX2X_MSG_STATS, "---------------\n");
  858. UPDATE_QSTAT(tclient->rcv_bcast_bytes,
  859. total_broadcast_bytes_received);
  860. UPDATE_QSTAT(tclient->rcv_mcast_bytes,
  861. total_multicast_bytes_received);
  862. UPDATE_QSTAT(tclient->rcv_ucast_bytes,
  863. total_unicast_bytes_received);
  864. /*
  865. * sum to total_bytes_received all
  866. * unicast/multicast/broadcast
  867. */
  868. qstats->total_bytes_received_hi =
  869. qstats->total_broadcast_bytes_received_hi;
  870. qstats->total_bytes_received_lo =
  871. qstats->total_broadcast_bytes_received_lo;
  872. ADD_64(qstats->total_bytes_received_hi,
  873. qstats->total_multicast_bytes_received_hi,
  874. qstats->total_bytes_received_lo,
  875. qstats->total_multicast_bytes_received_lo);
  876. ADD_64(qstats->total_bytes_received_hi,
  877. qstats->total_unicast_bytes_received_hi,
  878. qstats->total_bytes_received_lo,
  879. qstats->total_unicast_bytes_received_lo);
  880. qstats->valid_bytes_received_hi =
  881. qstats->total_bytes_received_hi;
  882. qstats->valid_bytes_received_lo =
  883. qstats->total_bytes_received_lo;
  884. UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
  885. total_unicast_packets_received);
  886. UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
  887. total_multicast_packets_received);
  888. UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
  889. total_broadcast_packets_received);
  890. UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard,
  891. etherstatsoverrsizepkts, 32);
  892. UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16);
  893. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  894. total_unicast_packets_received);
  895. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  896. total_multicast_packets_received);
  897. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  898. total_broadcast_packets_received);
  899. UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard);
  900. UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard);
  901. UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard);
  902. UPDATE_QSTAT(xclient->bcast_bytes_sent,
  903. total_broadcast_bytes_transmitted);
  904. UPDATE_QSTAT(xclient->mcast_bytes_sent,
  905. total_multicast_bytes_transmitted);
  906. UPDATE_QSTAT(xclient->ucast_bytes_sent,
  907. total_unicast_bytes_transmitted);
  908. /*
  909. * sum to total_bytes_transmitted all
  910. * unicast/multicast/broadcast
  911. */
  912. qstats->total_bytes_transmitted_hi =
  913. qstats->total_unicast_bytes_transmitted_hi;
  914. qstats->total_bytes_transmitted_lo =
  915. qstats->total_unicast_bytes_transmitted_lo;
  916. ADD_64(qstats->total_bytes_transmitted_hi,
  917. qstats->total_broadcast_bytes_transmitted_hi,
  918. qstats->total_bytes_transmitted_lo,
  919. qstats->total_broadcast_bytes_transmitted_lo);
  920. ADD_64(qstats->total_bytes_transmitted_hi,
  921. qstats->total_multicast_bytes_transmitted_hi,
  922. qstats->total_bytes_transmitted_lo,
  923. qstats->total_multicast_bytes_transmitted_lo);
  924. UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
  925. total_unicast_packets_transmitted);
  926. UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
  927. total_multicast_packets_transmitted);
  928. UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
  929. total_broadcast_packets_transmitted);
  930. UPDATE_EXTEND_TSTAT(checksum_discard,
  931. total_packets_received_checksum_discarded);
  932. UPDATE_EXTEND_TSTAT(ttl0_discard,
  933. total_packets_received_ttl0_discarded);
  934. UPDATE_EXTEND_XSTAT(error_drop_pkts,
  935. total_transmitted_dropped_packets_error);
  936. /* TPA aggregations completed */
  937. UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations);
  938. /* Number of network frames aggregated by TPA */
  939. UPDATE_EXTEND_E_USTAT(coalesced_pkts,
  940. total_tpa_aggregated_frames);
  941. /* Total number of bytes in completed TPA aggregations */
  942. UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes);
  943. UPDATE_ESTAT_QSTAT_64(total_tpa_bytes);
  944. UPDATE_FSTAT_QSTAT(total_bytes_received);
  945. UPDATE_FSTAT_QSTAT(total_bytes_transmitted);
  946. UPDATE_FSTAT_QSTAT(total_unicast_packets_received);
  947. UPDATE_FSTAT_QSTAT(total_multicast_packets_received);
  948. UPDATE_FSTAT_QSTAT(total_broadcast_packets_received);
  949. UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted);
  950. UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted);
  951. UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted);
  952. UPDATE_FSTAT_QSTAT(valid_bytes_received);
  953. }
  954. ADD_64(estats->total_bytes_received_hi,
  955. estats->rx_stat_ifhcinbadoctets_hi,
  956. estats->total_bytes_received_lo,
  957. estats->rx_stat_ifhcinbadoctets_lo);
  958. ADD_64_LE(estats->total_bytes_received_hi,
  959. tfunc->rcv_error_bytes.hi,
  960. estats->total_bytes_received_lo,
  961. tfunc->rcv_error_bytes.lo);
  962. ADD_64_LE(estats->error_bytes_received_hi,
  963. tfunc->rcv_error_bytes.hi,
  964. estats->error_bytes_received_lo,
  965. tfunc->rcv_error_bytes.lo);
  966. UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong);
  967. ADD_64(estats->error_bytes_received_hi,
  968. estats->rx_stat_ifhcinbadoctets_hi,
  969. estats->error_bytes_received_lo,
  970. estats->rx_stat_ifhcinbadoctets_lo);
  971. if (bp->port.pmf) {
  972. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  973. UPDATE_FW_STAT(mac_filter_discard);
  974. UPDATE_FW_STAT(mf_tag_discard);
  975. UPDATE_FW_STAT(brb_truncate_discard);
  976. UPDATE_FW_STAT(mac_discard);
  977. }
  978. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  979. bp->stats_pending = 0;
  980. return 0;
  981. }
  982. static void bnx2x_net_stats_update(struct bnx2x *bp)
  983. {
  984. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  985. struct net_device_stats *nstats = &bp->dev->stats;
  986. unsigned long tmp;
  987. int i;
  988. nstats->rx_packets =
  989. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  990. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  991. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  992. nstats->tx_packets =
  993. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  994. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  995. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  996. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  997. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  998. tmp = estats->mac_discard;
  999. for_each_rx_queue(bp, i) {
  1000. struct tstorm_per_queue_stats *old_tclient =
  1001. &bp->fp_stats[i].old_tclient;
  1002. tmp += le32_to_cpu(old_tclient->checksum_discard);
  1003. }
  1004. nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped;
  1005. nstats->tx_dropped = 0;
  1006. nstats->multicast =
  1007. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  1008. nstats->collisions =
  1009. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  1010. nstats->rx_length_errors =
  1011. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  1012. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  1013. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  1014. bnx2x_hilo(&estats->brb_truncate_hi);
  1015. nstats->rx_crc_errors =
  1016. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  1017. nstats->rx_frame_errors =
  1018. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  1019. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  1020. nstats->rx_missed_errors = 0;
  1021. nstats->rx_errors = nstats->rx_length_errors +
  1022. nstats->rx_over_errors +
  1023. nstats->rx_crc_errors +
  1024. nstats->rx_frame_errors +
  1025. nstats->rx_fifo_errors +
  1026. nstats->rx_missed_errors;
  1027. nstats->tx_aborted_errors =
  1028. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  1029. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  1030. nstats->tx_carrier_errors =
  1031. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  1032. nstats->tx_fifo_errors = 0;
  1033. nstats->tx_heartbeat_errors = 0;
  1034. nstats->tx_window_errors = 0;
  1035. nstats->tx_errors = nstats->tx_aborted_errors +
  1036. nstats->tx_carrier_errors +
  1037. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  1038. }
  1039. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  1040. {
  1041. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1042. int i;
  1043. for_each_queue(bp, i) {
  1044. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  1045. struct bnx2x_eth_q_stats_old *qstats_old =
  1046. &bp->fp_stats[i].eth_q_stats_old;
  1047. UPDATE_ESTAT_QSTAT(driver_xoff);
  1048. UPDATE_ESTAT_QSTAT(rx_err_discard_pkt);
  1049. UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed);
  1050. UPDATE_ESTAT_QSTAT(hw_csum_err);
  1051. UPDATE_ESTAT_QSTAT(driver_filtered_tx_pkt);
  1052. }
  1053. }
  1054. static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
  1055. {
  1056. u32 val;
  1057. if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
  1058. val = SHMEM2_RD(bp, edebug_driver_if[1]);
  1059. if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
  1060. return true;
  1061. }
  1062. return false;
  1063. }
  1064. static void bnx2x_stats_update(struct bnx2x *bp)
  1065. {
  1066. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1067. /* we run update from timer context, so give up
  1068. * if somebody is in the middle of transition
  1069. */
  1070. if (down_trylock(&bp->stats_sema))
  1071. return;
  1072. if (bnx2x_edebug_stats_stopped(bp) || !bp->stats_started)
  1073. goto out;
  1074. if (IS_PF(bp)) {
  1075. if (*stats_comp != DMAE_COMP_VAL)
  1076. goto out;
  1077. if (bp->port.pmf)
  1078. bnx2x_hw_stats_update(bp);
  1079. if (bnx2x_storm_stats_update(bp)) {
  1080. if (bp->stats_pending++ == 3) {
  1081. BNX2X_ERR("storm stats were not updated for 3 times\n");
  1082. bnx2x_panic();
  1083. }
  1084. goto out;
  1085. }
  1086. } else {
  1087. /* vf doesn't collect HW statistics, and doesn't get completions
  1088. * perform only update
  1089. */
  1090. bnx2x_storm_stats_update(bp);
  1091. }
  1092. bnx2x_net_stats_update(bp);
  1093. bnx2x_drv_stats_update(bp);
  1094. /* vf is done */
  1095. if (IS_VF(bp))
  1096. goto out;
  1097. if (netif_msg_timer(bp)) {
  1098. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1099. netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n",
  1100. estats->brb_drop_lo, estats->brb_truncate_lo);
  1101. }
  1102. bnx2x_hw_stats_post(bp);
  1103. bnx2x_storm_stats_post(bp);
  1104. out:
  1105. up(&bp->stats_sema);
  1106. }
  1107. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  1108. {
  1109. struct dmae_command *dmae;
  1110. u32 opcode;
  1111. int loader_idx = PMF_DMAE_C(bp);
  1112. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1113. bp->executer_idx = 0;
  1114. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
  1115. if (bp->port.port_stx) {
  1116. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1117. if (bp->func_stx)
  1118. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1119. opcode, DMAE_COMP_GRC);
  1120. else
  1121. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1122. opcode, DMAE_COMP_PCI);
  1123. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1124. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1125. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1126. dmae->dst_addr_hi = 0;
  1127. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1128. if (bp->func_stx) {
  1129. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  1130. dmae->comp_addr_hi = 0;
  1131. dmae->comp_val = 1;
  1132. } else {
  1133. dmae->comp_addr_lo =
  1134. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1135. dmae->comp_addr_hi =
  1136. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1137. dmae->comp_val = DMAE_COMP_VAL;
  1138. *stats_comp = 0;
  1139. }
  1140. }
  1141. if (bp->func_stx) {
  1142. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1143. dmae->opcode =
  1144. bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  1145. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1146. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1147. dmae->dst_addr_lo = bp->func_stx >> 2;
  1148. dmae->dst_addr_hi = 0;
  1149. dmae->len = sizeof(struct host_func_stats) >> 2;
  1150. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1151. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1152. dmae->comp_val = DMAE_COMP_VAL;
  1153. *stats_comp = 0;
  1154. }
  1155. }
  1156. static void bnx2x_stats_stop(struct bnx2x *bp)
  1157. {
  1158. int update = 0;
  1159. if (down_timeout(&bp->stats_sema, HZ/10))
  1160. BNX2X_ERR("Unable to acquire stats lock\n");
  1161. bp->stats_started = false;
  1162. bnx2x_stats_comp(bp);
  1163. if (bp->port.pmf)
  1164. update = (bnx2x_hw_stats_update(bp) == 0);
  1165. update |= (bnx2x_storm_stats_update(bp) == 0);
  1166. if (update) {
  1167. bnx2x_net_stats_update(bp);
  1168. if (bp->port.pmf)
  1169. bnx2x_port_stats_stop(bp);
  1170. bnx2x_hw_stats_post(bp);
  1171. bnx2x_stats_comp(bp);
  1172. }
  1173. up(&bp->stats_sema);
  1174. }
  1175. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1176. {
  1177. }
  1178. static const struct {
  1179. void (*action)(struct bnx2x *bp);
  1180. enum bnx2x_stats_state next_state;
  1181. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1182. /* state event */
  1183. {
  1184. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1185. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1186. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1187. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1188. },
  1189. {
  1190. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1191. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1192. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1193. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1194. }
  1195. };
  1196. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1197. {
  1198. enum bnx2x_stats_state state;
  1199. void (*action)(struct bnx2x *bp);
  1200. if (unlikely(bp->panic))
  1201. return;
  1202. spin_lock_bh(&bp->stats_lock);
  1203. state = bp->stats_state;
  1204. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1205. action = bnx2x_stats_stm[state][event].action;
  1206. spin_unlock_bh(&bp->stats_lock);
  1207. action(bp);
  1208. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1209. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1210. state, event, bp->stats_state);
  1211. }
  1212. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1213. {
  1214. struct dmae_command *dmae;
  1215. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1216. /* sanity */
  1217. if (!bp->port.pmf || !bp->port.port_stx) {
  1218. BNX2X_ERR("BUG!\n");
  1219. return;
  1220. }
  1221. bp->executer_idx = 0;
  1222. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1223. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  1224. true, DMAE_COMP_PCI);
  1225. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1226. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1227. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1228. dmae->dst_addr_hi = 0;
  1229. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1230. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1231. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1232. dmae->comp_val = DMAE_COMP_VAL;
  1233. *stats_comp = 0;
  1234. bnx2x_hw_stats_post(bp);
  1235. bnx2x_stats_comp(bp);
  1236. }
  1237. /* This function will prepare the statistics ramrod data the way
  1238. * we will only have to increment the statistics counter and
  1239. * send the ramrod each time we have to.
  1240. */
  1241. static void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
  1242. {
  1243. int i;
  1244. int first_queue_query_index;
  1245. struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
  1246. dma_addr_t cur_data_offset;
  1247. struct stats_query_entry *cur_query_entry;
  1248. stats_hdr->cmd_num = bp->fw_stats_num;
  1249. stats_hdr->drv_stats_counter = 0;
  1250. /* storm_counters struct contains the counters of completed
  1251. * statistics requests per storm which are incremented by FW
  1252. * each time it completes hadning a statistics ramrod. We will
  1253. * check these counters in the timer handler and discard a
  1254. * (statistics) ramrod completion.
  1255. */
  1256. cur_data_offset = bp->fw_stats_data_mapping +
  1257. offsetof(struct bnx2x_fw_stats_data, storm_counters);
  1258. stats_hdr->stats_counters_addrs.hi =
  1259. cpu_to_le32(U64_HI(cur_data_offset));
  1260. stats_hdr->stats_counters_addrs.lo =
  1261. cpu_to_le32(U64_LO(cur_data_offset));
  1262. /* prepare to the first stats ramrod (will be completed with
  1263. * the counters equal to zero) - init counters to somethig different.
  1264. */
  1265. memset(&bp->fw_stats_data->storm_counters, 0xff,
  1266. sizeof(struct stats_counter));
  1267. /**** Port FW statistics data ****/
  1268. cur_data_offset = bp->fw_stats_data_mapping +
  1269. offsetof(struct bnx2x_fw_stats_data, port);
  1270. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
  1271. cur_query_entry->kind = STATS_TYPE_PORT;
  1272. /* For port query index is a DONT CARE */
  1273. cur_query_entry->index = BP_PORT(bp);
  1274. /* For port query funcID is a DONT CARE */
  1275. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1276. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1277. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1278. /**** PF FW statistics data ****/
  1279. cur_data_offset = bp->fw_stats_data_mapping +
  1280. offsetof(struct bnx2x_fw_stats_data, pf);
  1281. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
  1282. cur_query_entry->kind = STATS_TYPE_PF;
  1283. /* For PF query index is a DONT CARE */
  1284. cur_query_entry->index = BP_PORT(bp);
  1285. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1286. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1287. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1288. /**** FCoE FW statistics data ****/
  1289. if (!NO_FCOE(bp)) {
  1290. cur_data_offset = bp->fw_stats_data_mapping +
  1291. offsetof(struct bnx2x_fw_stats_data, fcoe);
  1292. cur_query_entry =
  1293. &bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX];
  1294. cur_query_entry->kind = STATS_TYPE_FCOE;
  1295. /* For FCoE query index is a DONT CARE */
  1296. cur_query_entry->index = BP_PORT(bp);
  1297. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1298. cur_query_entry->address.hi =
  1299. cpu_to_le32(U64_HI(cur_data_offset));
  1300. cur_query_entry->address.lo =
  1301. cpu_to_le32(U64_LO(cur_data_offset));
  1302. }
  1303. /**** Clients' queries ****/
  1304. cur_data_offset = bp->fw_stats_data_mapping +
  1305. offsetof(struct bnx2x_fw_stats_data, queue_stats);
  1306. /* first queue query index depends whether FCoE offloaded request will
  1307. * be included in the ramrod
  1308. */
  1309. if (!NO_FCOE(bp))
  1310. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX;
  1311. else
  1312. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1;
  1313. for_each_eth_queue(bp, i) {
  1314. cur_query_entry =
  1315. &bp->fw_stats_req->
  1316. query[first_queue_query_index + i];
  1317. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1318. cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
  1319. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1320. cur_query_entry->address.hi =
  1321. cpu_to_le32(U64_HI(cur_data_offset));
  1322. cur_query_entry->address.lo =
  1323. cpu_to_le32(U64_LO(cur_data_offset));
  1324. cur_data_offset += sizeof(struct per_queue_stats);
  1325. }
  1326. /* add FCoE queue query if needed */
  1327. if (!NO_FCOE(bp)) {
  1328. cur_query_entry =
  1329. &bp->fw_stats_req->
  1330. query[first_queue_query_index + i];
  1331. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1332. cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX(bp)]);
  1333. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1334. cur_query_entry->address.hi =
  1335. cpu_to_le32(U64_HI(cur_data_offset));
  1336. cur_query_entry->address.lo =
  1337. cpu_to_le32(U64_LO(cur_data_offset));
  1338. }
  1339. }
  1340. void bnx2x_memset_stats(struct bnx2x *bp)
  1341. {
  1342. int i;
  1343. /* function stats */
  1344. for_each_queue(bp, i) {
  1345. struct bnx2x_fp_stats *fp_stats = &bp->fp_stats[i];
  1346. memset(&fp_stats->old_tclient, 0,
  1347. sizeof(fp_stats->old_tclient));
  1348. memset(&fp_stats->old_uclient, 0,
  1349. sizeof(fp_stats->old_uclient));
  1350. memset(&fp_stats->old_xclient, 0,
  1351. sizeof(fp_stats->old_xclient));
  1352. if (bp->stats_init) {
  1353. memset(&fp_stats->eth_q_stats, 0,
  1354. sizeof(fp_stats->eth_q_stats));
  1355. memset(&fp_stats->eth_q_stats_old, 0,
  1356. sizeof(fp_stats->eth_q_stats_old));
  1357. }
  1358. }
  1359. memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
  1360. if (bp->stats_init) {
  1361. memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old));
  1362. memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old));
  1363. memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old));
  1364. memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
  1365. memset(&bp->func_stats, 0, sizeof(bp->func_stats));
  1366. }
  1367. bp->stats_state = STATS_STATE_DISABLED;
  1368. if (bp->port.pmf && bp->port.port_stx)
  1369. bnx2x_port_stats_base_init(bp);
  1370. /* mark the end of statistics initializiation */
  1371. bp->stats_init = false;
  1372. }
  1373. void bnx2x_stats_init(struct bnx2x *bp)
  1374. {
  1375. int /*abs*/port = BP_PORT(bp);
  1376. int mb_idx = BP_FW_MB_IDX(bp);
  1377. bp->stats_pending = 0;
  1378. bp->executer_idx = 0;
  1379. bp->stats_counter = 0;
  1380. /* port and func stats for management */
  1381. if (!BP_NOMCP(bp)) {
  1382. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1383. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1384. } else {
  1385. bp->port.port_stx = 0;
  1386. bp->func_stx = 0;
  1387. }
  1388. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1389. bp->port.port_stx, bp->func_stx);
  1390. /* pmf should retrieve port statistics from SP on a non-init*/
  1391. if (!bp->stats_init && bp->port.pmf && bp->port.port_stx)
  1392. bnx2x_stats_handle(bp, STATS_EVENT_PMF);
  1393. port = BP_PORT(bp);
  1394. /* port stats */
  1395. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1396. bp->port.old_nig_stats.brb_discard =
  1397. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1398. bp->port.old_nig_stats.brb_truncate =
  1399. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1400. if (!CHIP_IS_E3(bp)) {
  1401. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1402. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1403. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1404. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1405. }
  1406. /* Prepare statistics ramrod data */
  1407. bnx2x_prep_fw_stats_req(bp);
  1408. /* Clean SP from previous statistics */
  1409. if (bp->stats_init) {
  1410. if (bp->func_stx) {
  1411. memset(bnx2x_sp(bp, func_stats), 0,
  1412. sizeof(struct host_func_stats));
  1413. bnx2x_func_stats_init(bp);
  1414. bnx2x_hw_stats_post(bp);
  1415. bnx2x_stats_comp(bp);
  1416. }
  1417. }
  1418. bnx2x_memset_stats(bp);
  1419. }
  1420. void bnx2x_save_statistics(struct bnx2x *bp)
  1421. {
  1422. int i;
  1423. struct net_device_stats *nstats = &bp->dev->stats;
  1424. /* save queue statistics */
  1425. for_each_eth_queue(bp, i) {
  1426. struct bnx2x_fastpath *fp = &bp->fp[i];
  1427. struct bnx2x_eth_q_stats *qstats =
  1428. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  1429. struct bnx2x_eth_q_stats_old *qstats_old =
  1430. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  1431. UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi);
  1432. UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo);
  1433. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi);
  1434. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo);
  1435. UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi);
  1436. UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo);
  1437. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi);
  1438. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo);
  1439. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi);
  1440. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo);
  1441. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi);
  1442. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo);
  1443. UPDATE_QSTAT_OLD(total_tpa_bytes_hi);
  1444. UPDATE_QSTAT_OLD(total_tpa_bytes_lo);
  1445. }
  1446. /* save net_device_stats statistics */
  1447. bp->net_stats_old.rx_dropped = nstats->rx_dropped;
  1448. /* store port firmware statistics */
  1449. if (bp->port.pmf && IS_MF(bp)) {
  1450. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1451. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  1452. UPDATE_FW_STAT_OLD(mac_filter_discard);
  1453. UPDATE_FW_STAT_OLD(mf_tag_discard);
  1454. UPDATE_FW_STAT_OLD(brb_truncate_discard);
  1455. UPDATE_FW_STAT_OLD(mac_discard);
  1456. }
  1457. }
  1458. void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,
  1459. u32 stats_type)
  1460. {
  1461. int i;
  1462. struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;
  1463. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1464. struct per_queue_stats *fcoe_q_stats =
  1465. &bp->fw_stats_data->queue_stats[FCOE_IDX(bp)];
  1466. struct tstorm_per_queue_stats *fcoe_q_tstorm_stats =
  1467. &fcoe_q_stats->tstorm_queue_statistics;
  1468. struct ustorm_per_queue_stats *fcoe_q_ustorm_stats =
  1469. &fcoe_q_stats->ustorm_queue_statistics;
  1470. struct xstorm_per_queue_stats *fcoe_q_xstorm_stats =
  1471. &fcoe_q_stats->xstorm_queue_statistics;
  1472. struct fcoe_statistics_params *fw_fcoe_stat =
  1473. &bp->fw_stats_data->fcoe;
  1474. memset(afex_stats, 0, sizeof(struct afex_stats));
  1475. for_each_eth_queue(bp, i) {
  1476. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  1477. ADD_64(afex_stats->rx_unicast_bytes_hi,
  1478. qstats->total_unicast_bytes_received_hi,
  1479. afex_stats->rx_unicast_bytes_lo,
  1480. qstats->total_unicast_bytes_received_lo);
  1481. ADD_64(afex_stats->rx_broadcast_bytes_hi,
  1482. qstats->total_broadcast_bytes_received_hi,
  1483. afex_stats->rx_broadcast_bytes_lo,
  1484. qstats->total_broadcast_bytes_received_lo);
  1485. ADD_64(afex_stats->rx_multicast_bytes_hi,
  1486. qstats->total_multicast_bytes_received_hi,
  1487. afex_stats->rx_multicast_bytes_lo,
  1488. qstats->total_multicast_bytes_received_lo);
  1489. ADD_64(afex_stats->rx_unicast_frames_hi,
  1490. qstats->total_unicast_packets_received_hi,
  1491. afex_stats->rx_unicast_frames_lo,
  1492. qstats->total_unicast_packets_received_lo);
  1493. ADD_64(afex_stats->rx_broadcast_frames_hi,
  1494. qstats->total_broadcast_packets_received_hi,
  1495. afex_stats->rx_broadcast_frames_lo,
  1496. qstats->total_broadcast_packets_received_lo);
  1497. ADD_64(afex_stats->rx_multicast_frames_hi,
  1498. qstats->total_multicast_packets_received_hi,
  1499. afex_stats->rx_multicast_frames_lo,
  1500. qstats->total_multicast_packets_received_lo);
  1501. /* sum to rx_frames_discarded all discraded
  1502. * packets due to size, ttl0 and checksum
  1503. */
  1504. ADD_64(afex_stats->rx_frames_discarded_hi,
  1505. qstats->total_packets_received_checksum_discarded_hi,
  1506. afex_stats->rx_frames_discarded_lo,
  1507. qstats->total_packets_received_checksum_discarded_lo);
  1508. ADD_64(afex_stats->rx_frames_discarded_hi,
  1509. qstats->total_packets_received_ttl0_discarded_hi,
  1510. afex_stats->rx_frames_discarded_lo,
  1511. qstats->total_packets_received_ttl0_discarded_lo);
  1512. ADD_64(afex_stats->rx_frames_discarded_hi,
  1513. qstats->etherstatsoverrsizepkts_hi,
  1514. afex_stats->rx_frames_discarded_lo,
  1515. qstats->etherstatsoverrsizepkts_lo);
  1516. ADD_64(afex_stats->rx_frames_dropped_hi,
  1517. qstats->no_buff_discard_hi,
  1518. afex_stats->rx_frames_dropped_lo,
  1519. qstats->no_buff_discard_lo);
  1520. ADD_64(afex_stats->tx_unicast_bytes_hi,
  1521. qstats->total_unicast_bytes_transmitted_hi,
  1522. afex_stats->tx_unicast_bytes_lo,
  1523. qstats->total_unicast_bytes_transmitted_lo);
  1524. ADD_64(afex_stats->tx_broadcast_bytes_hi,
  1525. qstats->total_broadcast_bytes_transmitted_hi,
  1526. afex_stats->tx_broadcast_bytes_lo,
  1527. qstats->total_broadcast_bytes_transmitted_lo);
  1528. ADD_64(afex_stats->tx_multicast_bytes_hi,
  1529. qstats->total_multicast_bytes_transmitted_hi,
  1530. afex_stats->tx_multicast_bytes_lo,
  1531. qstats->total_multicast_bytes_transmitted_lo);
  1532. ADD_64(afex_stats->tx_unicast_frames_hi,
  1533. qstats->total_unicast_packets_transmitted_hi,
  1534. afex_stats->tx_unicast_frames_lo,
  1535. qstats->total_unicast_packets_transmitted_lo);
  1536. ADD_64(afex_stats->tx_broadcast_frames_hi,
  1537. qstats->total_broadcast_packets_transmitted_hi,
  1538. afex_stats->tx_broadcast_frames_lo,
  1539. qstats->total_broadcast_packets_transmitted_lo);
  1540. ADD_64(afex_stats->tx_multicast_frames_hi,
  1541. qstats->total_multicast_packets_transmitted_hi,
  1542. afex_stats->tx_multicast_frames_lo,
  1543. qstats->total_multicast_packets_transmitted_lo);
  1544. ADD_64(afex_stats->tx_frames_dropped_hi,
  1545. qstats->total_transmitted_dropped_packets_error_hi,
  1546. afex_stats->tx_frames_dropped_lo,
  1547. qstats->total_transmitted_dropped_packets_error_lo);
  1548. }
  1549. /* now add FCoE statistics which are collected separately
  1550. * (both offloaded and non offloaded)
  1551. */
  1552. if (!NO_FCOE(bp)) {
  1553. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1554. LE32_0,
  1555. afex_stats->rx_unicast_bytes_lo,
  1556. fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt);
  1557. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1558. fcoe_q_tstorm_stats->rcv_ucast_bytes.hi,
  1559. afex_stats->rx_unicast_bytes_lo,
  1560. fcoe_q_tstorm_stats->rcv_ucast_bytes.lo);
  1561. ADD_64_LE(afex_stats->rx_broadcast_bytes_hi,
  1562. fcoe_q_tstorm_stats->rcv_bcast_bytes.hi,
  1563. afex_stats->rx_broadcast_bytes_lo,
  1564. fcoe_q_tstorm_stats->rcv_bcast_bytes.lo);
  1565. ADD_64_LE(afex_stats->rx_multicast_bytes_hi,
  1566. fcoe_q_tstorm_stats->rcv_mcast_bytes.hi,
  1567. afex_stats->rx_multicast_bytes_lo,
  1568. fcoe_q_tstorm_stats->rcv_mcast_bytes.lo);
  1569. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1570. LE32_0,
  1571. afex_stats->rx_unicast_frames_lo,
  1572. fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt);
  1573. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1574. LE32_0,
  1575. afex_stats->rx_unicast_frames_lo,
  1576. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1577. ADD_64_LE(afex_stats->rx_broadcast_frames_hi,
  1578. LE32_0,
  1579. afex_stats->rx_broadcast_frames_lo,
  1580. fcoe_q_tstorm_stats->rcv_bcast_pkts);
  1581. ADD_64_LE(afex_stats->rx_multicast_frames_hi,
  1582. LE32_0,
  1583. afex_stats->rx_multicast_frames_lo,
  1584. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1585. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1586. LE32_0,
  1587. afex_stats->rx_frames_discarded_lo,
  1588. fcoe_q_tstorm_stats->checksum_discard);
  1589. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1590. LE32_0,
  1591. afex_stats->rx_frames_discarded_lo,
  1592. fcoe_q_tstorm_stats->pkts_too_big_discard);
  1593. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1594. LE32_0,
  1595. afex_stats->rx_frames_discarded_lo,
  1596. fcoe_q_tstorm_stats->ttl0_discard);
  1597. ADD_64_LE16(afex_stats->rx_frames_dropped_hi,
  1598. LE16_0,
  1599. afex_stats->rx_frames_dropped_lo,
  1600. fcoe_q_tstorm_stats->no_buff_discard);
  1601. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1602. LE32_0,
  1603. afex_stats->rx_frames_dropped_lo,
  1604. fcoe_q_ustorm_stats->ucast_no_buff_pkts);
  1605. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1606. LE32_0,
  1607. afex_stats->rx_frames_dropped_lo,
  1608. fcoe_q_ustorm_stats->mcast_no_buff_pkts);
  1609. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1610. LE32_0,
  1611. afex_stats->rx_frames_dropped_lo,
  1612. fcoe_q_ustorm_stats->bcast_no_buff_pkts);
  1613. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1614. LE32_0,
  1615. afex_stats->rx_frames_dropped_lo,
  1616. fw_fcoe_stat->rx_stat1.fcoe_rx_drop_pkt_cnt);
  1617. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1618. LE32_0,
  1619. afex_stats->rx_frames_dropped_lo,
  1620. fw_fcoe_stat->rx_stat2.fcoe_rx_drop_pkt_cnt);
  1621. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1622. LE32_0,
  1623. afex_stats->tx_unicast_bytes_lo,
  1624. fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt);
  1625. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1626. fcoe_q_xstorm_stats->ucast_bytes_sent.hi,
  1627. afex_stats->tx_unicast_bytes_lo,
  1628. fcoe_q_xstorm_stats->ucast_bytes_sent.lo);
  1629. ADD_64_LE(afex_stats->tx_broadcast_bytes_hi,
  1630. fcoe_q_xstorm_stats->bcast_bytes_sent.hi,
  1631. afex_stats->tx_broadcast_bytes_lo,
  1632. fcoe_q_xstorm_stats->bcast_bytes_sent.lo);
  1633. ADD_64_LE(afex_stats->tx_multicast_bytes_hi,
  1634. fcoe_q_xstorm_stats->mcast_bytes_sent.hi,
  1635. afex_stats->tx_multicast_bytes_lo,
  1636. fcoe_q_xstorm_stats->mcast_bytes_sent.lo);
  1637. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1638. LE32_0,
  1639. afex_stats->tx_unicast_frames_lo,
  1640. fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt);
  1641. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1642. LE32_0,
  1643. afex_stats->tx_unicast_frames_lo,
  1644. fcoe_q_xstorm_stats->ucast_pkts_sent);
  1645. ADD_64_LE(afex_stats->tx_broadcast_frames_hi,
  1646. LE32_0,
  1647. afex_stats->tx_broadcast_frames_lo,
  1648. fcoe_q_xstorm_stats->bcast_pkts_sent);
  1649. ADD_64_LE(afex_stats->tx_multicast_frames_hi,
  1650. LE32_0,
  1651. afex_stats->tx_multicast_frames_lo,
  1652. fcoe_q_xstorm_stats->mcast_pkts_sent);
  1653. ADD_64_LE(afex_stats->tx_frames_dropped_hi,
  1654. LE32_0,
  1655. afex_stats->tx_frames_dropped_lo,
  1656. fcoe_q_xstorm_stats->error_drop_pkts);
  1657. }
  1658. /* if port stats are requested, add them to the PMF
  1659. * stats, as anyway they will be accumulated by the
  1660. * MCP before sent to the switch
  1661. */
  1662. if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) {
  1663. ADD_64(afex_stats->rx_frames_dropped_hi,
  1664. 0,
  1665. afex_stats->rx_frames_dropped_lo,
  1666. estats->mac_filter_discard);
  1667. ADD_64(afex_stats->rx_frames_dropped_hi,
  1668. 0,
  1669. afex_stats->rx_frames_dropped_lo,
  1670. estats->brb_truncate_discard);
  1671. ADD_64(afex_stats->rx_frames_discarded_hi,
  1672. 0,
  1673. afex_stats->rx_frames_discarded_lo,
  1674. estats->mac_discard);
  1675. }
  1676. }
  1677. void bnx2x_stats_safe_exec(struct bnx2x *bp,
  1678. void (func_to_exec)(void *cookie),
  1679. void *cookie){
  1680. if (down_timeout(&bp->stats_sema, HZ/10))
  1681. BNX2X_ERR("Unable to acquire stats lock\n");
  1682. bnx2x_stats_comp(bp);
  1683. func_to_exec(cookie);
  1684. __bnx2x_stats_start(bp);
  1685. up(&bp->stats_sema);
  1686. }