bnx2x_dcb.c 73 KB

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  1. /* bnx2x_dcb.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2013 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Dmitry Kravkov
  17. *
  18. */
  19. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20. #include <linux/netdevice.h>
  21. #include <linux/types.h>
  22. #include <linux/errno.h>
  23. #include <linux/rtnetlink.h>
  24. #include <net/dcbnl.h>
  25. #include "bnx2x.h"
  26. #include "bnx2x_cmn.h"
  27. #include "bnx2x_dcb.h"
  28. /* forward declarations of dcbx related functions */
  29. static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
  30. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
  31. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  32. u32 *set_configuration_ets_pg,
  33. u32 *pri_pg_tbl);
  34. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  35. u32 *pg_pri_orginal_spread,
  36. struct pg_help_data *help_data);
  37. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  38. struct pg_help_data *help_data,
  39. struct dcbx_ets_feature *ets,
  40. u32 *pg_pri_orginal_spread);
  41. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  42. struct cos_help_data *cos_data,
  43. u32 *pg_pri_orginal_spread,
  44. struct dcbx_ets_feature *ets);
  45. static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
  46. struct bnx2x_func_tx_start_params*);
  47. /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */
  48. static void bnx2x_read_data(struct bnx2x *bp, u32 *buff,
  49. u32 addr, u32 len)
  50. {
  51. int i;
  52. for (i = 0; i < len; i += 4, buff++)
  53. *buff = REG_RD(bp, addr + i);
  54. }
  55. static void bnx2x_write_data(struct bnx2x *bp, u32 *buff,
  56. u32 addr, u32 len)
  57. {
  58. int i;
  59. for (i = 0; i < len; i += 4, buff++)
  60. REG_WR(bp, addr + i, *buff);
  61. }
  62. static void bnx2x_pfc_set(struct bnx2x *bp)
  63. {
  64. struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
  65. u32 pri_bit, val = 0;
  66. int i;
  67. pfc_params.num_of_rx_cos_priority_mask =
  68. bp->dcbx_port_params.ets.num_of_cos;
  69. /* Tx COS configuration */
  70. for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++)
  71. /*
  72. * We configure only the pauseable bits (non pauseable aren't
  73. * configured at all) it's done to avoid false pauses from
  74. * network
  75. */
  76. pfc_params.rx_cos_priority_mask[i] =
  77. bp->dcbx_port_params.ets.cos_params[i].pri_bitmask
  78. & DCBX_PFC_PRI_PAUSE_MASK(bp);
  79. /*
  80. * Rx COS configuration
  81. * Changing PFC RX configuration .
  82. * In RX COS0 will always be configured to lossless and COS1 to lossy
  83. */
  84. for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) {
  85. pri_bit = 1 << i;
  86. if (!(pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp)))
  87. val |= 1 << (i * 4);
  88. }
  89. pfc_params.pkt_priority_to_cos = val;
  90. /* RX COS0 */
  91. pfc_params.llfc_low_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
  92. /* RX COS1 */
  93. pfc_params.llfc_high_priority_classes = 0;
  94. bnx2x_acquire_phy_lock(bp);
  95. bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
  96. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
  97. bnx2x_release_phy_lock(bp);
  98. }
  99. static void bnx2x_pfc_clear(struct bnx2x *bp)
  100. {
  101. struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
  102. nig_params.pause_enable = 1;
  103. bnx2x_acquire_phy_lock(bp);
  104. bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
  105. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
  106. bnx2x_release_phy_lock(bp);
  107. }
  108. static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
  109. struct dcbx_features *features,
  110. u32 error)
  111. {
  112. u8 i = 0;
  113. DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
  114. /* PG */
  115. DP(NETIF_MSG_LINK,
  116. "local_mib.features.ets.enabled %x\n", features->ets.enabled);
  117. for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
  118. DP(NETIF_MSG_LINK,
  119. "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
  120. DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
  121. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
  122. DP(NETIF_MSG_LINK,
  123. "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
  124. DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
  125. /* pfc */
  126. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n",
  127. features->pfc.pri_en_bitmap);
  128. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n",
  129. features->pfc.pfc_caps);
  130. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n",
  131. features->pfc.enabled);
  132. DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n",
  133. features->app.default_pri);
  134. DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n",
  135. features->app.tc_supported);
  136. DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n",
  137. features->app.enabled);
  138. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  139. DP(BNX2X_MSG_DCB,
  140. "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
  141. i, features->app.app_pri_tbl[i].app_id);
  142. DP(BNX2X_MSG_DCB,
  143. "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
  144. i, features->app.app_pri_tbl[i].pri_bitmap);
  145. DP(BNX2X_MSG_DCB,
  146. "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
  147. i, features->app.app_pri_tbl[i].appBitfield);
  148. }
  149. }
  150. static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
  151. u8 pri_bitmap,
  152. u8 llfc_traf_type)
  153. {
  154. u32 pri = MAX_PFC_PRIORITIES;
  155. u32 index = MAX_PFC_PRIORITIES - 1;
  156. u32 pri_mask;
  157. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  158. /* Choose the highest priority */
  159. while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
  160. pri_mask = 1 << index;
  161. if (GET_FLAGS(pri_bitmap, pri_mask))
  162. pri = index ;
  163. index--;
  164. }
  165. if (pri < MAX_PFC_PRIORITIES)
  166. ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
  167. }
  168. static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
  169. struct dcbx_app_priority_feature *app,
  170. u32 error) {
  171. u8 index;
  172. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  173. if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
  174. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n");
  175. if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH))
  176. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n");
  177. if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND))
  178. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n");
  179. if (app->enabled &&
  180. !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH |
  181. DCBX_REMOTE_APP_TLV_NOT_FOUND)) {
  182. bp->dcbx_port_params.app.enabled = true;
  183. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  184. ttp[index] = 0;
  185. if (app->default_pri < MAX_PFC_PRIORITIES)
  186. ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
  187. for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
  188. struct dcbx_app_priority_entry *entry =
  189. app->app_pri_tbl;
  190. if (GET_FLAGS(entry[index].appBitfield,
  191. DCBX_APP_SF_ETH_TYPE) &&
  192. ETH_TYPE_FCOE == entry[index].app_id)
  193. bnx2x_dcbx_get_ap_priority(bp,
  194. entry[index].pri_bitmap,
  195. LLFC_TRAFFIC_TYPE_FCOE);
  196. if (GET_FLAGS(entry[index].appBitfield,
  197. DCBX_APP_SF_PORT) &&
  198. TCP_PORT_ISCSI == entry[index].app_id)
  199. bnx2x_dcbx_get_ap_priority(bp,
  200. entry[index].pri_bitmap,
  201. LLFC_TRAFFIC_TYPE_ISCSI);
  202. }
  203. } else {
  204. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n");
  205. bp->dcbx_port_params.app.enabled = false;
  206. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  207. ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
  208. }
  209. }
  210. static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
  211. struct dcbx_ets_feature *ets,
  212. u32 error) {
  213. int i = 0;
  214. u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
  215. struct pg_help_data pg_help_data;
  216. struct bnx2x_dcbx_cos_params *cos_params =
  217. bp->dcbx_port_params.ets.cos_params;
  218. memset(&pg_help_data, 0, sizeof(struct pg_help_data));
  219. if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
  220. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n");
  221. if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND))
  222. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n");
  223. /* Clean up old settings of ets on COS */
  224. for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) {
  225. cos_params[i].pauseable = false;
  226. cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID;
  227. cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
  228. cos_params[i].pri_bitmask = 0;
  229. }
  230. if (bp->dcbx_port_params.app.enabled && ets->enabled &&
  231. !GET_FLAGS(error,
  232. DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) {
  233. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n");
  234. bp->dcbx_port_params.ets.enabled = true;
  235. bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
  236. pg_pri_orginal_spread,
  237. ets->pri_pg_tbl);
  238. bnx2x_dcbx_get_num_pg_traf_type(bp,
  239. pg_pri_orginal_spread,
  240. &pg_help_data);
  241. bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
  242. ets, pg_pri_orginal_spread);
  243. } else {
  244. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n");
  245. bp->dcbx_port_params.ets.enabled = false;
  246. ets->pri_pg_tbl[0] = 0;
  247. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
  248. DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
  249. }
  250. }
  251. static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
  252. struct dcbx_pfc_feature *pfc, u32 error)
  253. {
  254. if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
  255. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n");
  256. if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND))
  257. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n");
  258. if (bp->dcbx_port_params.app.enabled && pfc->enabled &&
  259. !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH |
  260. DCBX_REMOTE_PFC_TLV_NOT_FOUND)) {
  261. bp->dcbx_port_params.pfc.enabled = true;
  262. bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
  263. ~(pfc->pri_en_bitmap);
  264. } else {
  265. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n");
  266. bp->dcbx_port_params.pfc.enabled = false;
  267. bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
  268. }
  269. }
  270. /* maps unmapped priorities to to the same COS as L2 */
  271. static void bnx2x_dcbx_map_nw(struct bnx2x *bp)
  272. {
  273. int i;
  274. u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */
  275. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  276. u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW];
  277. struct bnx2x_dcbx_cos_params *cos_params =
  278. bp->dcbx_port_params.ets.cos_params;
  279. /* get unmapped priorities by clearing mapped bits */
  280. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  281. unmapped &= ~(1 << ttp[i]);
  282. /* find cos for nw prio and extend it with unmapped */
  283. for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) {
  284. if (cos_params[i].pri_bitmask & nw_prio) {
  285. /* extend the bitmask with unmapped */
  286. DP(BNX2X_MSG_DCB,
  287. "cos %d extended with 0x%08x\n", i, unmapped);
  288. cos_params[i].pri_bitmask |= unmapped;
  289. break;
  290. }
  291. }
  292. }
  293. static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
  294. struct dcbx_features *features,
  295. u32 error)
  296. {
  297. bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
  298. bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
  299. bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
  300. bnx2x_dcbx_map_nw(bp);
  301. }
  302. #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
  303. static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
  304. u32 *base_mib_addr,
  305. u32 offset,
  306. int read_mib_type)
  307. {
  308. int max_try_read = 0;
  309. u32 mib_size, prefix_seq_num, suffix_seq_num;
  310. struct lldp_remote_mib *remote_mib ;
  311. struct lldp_local_mib *local_mib;
  312. switch (read_mib_type) {
  313. case DCBX_READ_LOCAL_MIB:
  314. mib_size = sizeof(struct lldp_local_mib);
  315. break;
  316. case DCBX_READ_REMOTE_MIB:
  317. mib_size = sizeof(struct lldp_remote_mib);
  318. break;
  319. default:
  320. return 1; /*error*/
  321. }
  322. offset += BP_PORT(bp) * mib_size;
  323. do {
  324. bnx2x_read_data(bp, base_mib_addr, offset, mib_size);
  325. max_try_read++;
  326. switch (read_mib_type) {
  327. case DCBX_READ_LOCAL_MIB:
  328. local_mib = (struct lldp_local_mib *) base_mib_addr;
  329. prefix_seq_num = local_mib->prefix_seq_num;
  330. suffix_seq_num = local_mib->suffix_seq_num;
  331. break;
  332. case DCBX_READ_REMOTE_MIB:
  333. remote_mib = (struct lldp_remote_mib *) base_mib_addr;
  334. prefix_seq_num = remote_mib->prefix_seq_num;
  335. suffix_seq_num = remote_mib->suffix_seq_num;
  336. break;
  337. default:
  338. return 1; /*error*/
  339. }
  340. } while ((prefix_seq_num != suffix_seq_num) &&
  341. (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
  342. if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
  343. BNX2X_ERR("MIB could not be read\n");
  344. return 1;
  345. }
  346. return 0;
  347. }
  348. static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
  349. {
  350. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  351. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  352. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  353. if (bp->dcbx_port_params.pfc.enabled &&
  354. (!(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) || mfw_configured))
  355. /*
  356. * 1. Fills up common PFC structures if required
  357. * 2. Configure NIG, MAC and BRB via the elink
  358. */
  359. bnx2x_pfc_set(bp);
  360. else
  361. bnx2x_pfc_clear(bp);
  362. }
  363. int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
  364. {
  365. struct bnx2x_func_state_params func_params = {NULL};
  366. int rc;
  367. func_params.f_obj = &bp->func_obj;
  368. func_params.cmd = BNX2X_F_CMD_TX_STOP;
  369. __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);
  370. __set_bit(RAMROD_RETRY, &func_params.ramrod_flags);
  371. DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n");
  372. rc = bnx2x_func_state_change(bp, &func_params);
  373. if (rc) {
  374. BNX2X_ERR("Unable to hold traffic for HW configuration\n");
  375. bnx2x_panic();
  376. }
  377. return rc;
  378. }
  379. int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
  380. {
  381. struct bnx2x_func_state_params func_params = {NULL};
  382. struct bnx2x_func_tx_start_params *tx_params =
  383. &func_params.params.tx_start;
  384. int rc;
  385. func_params.f_obj = &bp->func_obj;
  386. func_params.cmd = BNX2X_F_CMD_TX_START;
  387. __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);
  388. __set_bit(RAMROD_RETRY, &func_params.ramrod_flags);
  389. bnx2x_dcbx_fw_struct(bp, tx_params);
  390. DP(BNX2X_MSG_DCB, "START TRAFFIC\n");
  391. rc = bnx2x_func_state_change(bp, &func_params);
  392. if (rc) {
  393. BNX2X_ERR("Unable to resume traffic after HW configuration\n");
  394. bnx2x_panic();
  395. }
  396. return rc;
  397. }
  398. static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp)
  399. {
  400. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  401. int rc = 0;
  402. if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) {
  403. BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos);
  404. return;
  405. }
  406. /* valid COS entries */
  407. if (ets->num_of_cos == 1) /* no ETS */
  408. return;
  409. /* sanity */
  410. if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) &&
  411. (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
  412. ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) &&
  413. (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
  414. BNX2X_ERR("all COS should have at least bw_limit or strict"
  415. "ets->cos_params[0].strict= %x"
  416. "ets->cos_params[0].bw_tbl= %x"
  417. "ets->cos_params[1].strict= %x"
  418. "ets->cos_params[1].bw_tbl= %x",
  419. ets->cos_params[0].strict,
  420. ets->cos_params[0].bw_tbl,
  421. ets->cos_params[1].strict,
  422. ets->cos_params[1].bw_tbl);
  423. return;
  424. }
  425. /* If we join a group and there is bw_tbl and strict then bw rules */
  426. if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
  427. (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
  428. u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
  429. u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
  430. /* Do not allow 0-100 configuration
  431. * since PBF does not support it
  432. * force 1-99 instead
  433. */
  434. if (bw_tbl_0 == 0) {
  435. bw_tbl_0 = 1;
  436. bw_tbl_1 = 99;
  437. } else if (bw_tbl_1 == 0) {
  438. bw_tbl_1 = 1;
  439. bw_tbl_0 = 99;
  440. }
  441. bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
  442. } else {
  443. if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST)
  444. rc = bnx2x_ets_strict(&bp->link_params, 0);
  445. else if (ets->cos_params[1].strict
  446. == BNX2X_DCBX_STRICT_COS_HIGHEST)
  447. rc = bnx2x_ets_strict(&bp->link_params, 1);
  448. if (rc)
  449. BNX2X_ERR("update_ets_params failed\n");
  450. }
  451. }
  452. /*
  453. * In E3B0 the configuration may have more than 2 COS.
  454. */
  455. static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp)
  456. {
  457. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  458. struct bnx2x_ets_params ets_params = { 0 };
  459. u8 i;
  460. ets_params.num_of_cos = ets->num_of_cos;
  461. for (i = 0; i < ets->num_of_cos; i++) {
  462. /* COS is SP */
  463. if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) {
  464. if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) {
  465. BNX2X_ERR("COS can't be not BW and not SP\n");
  466. return;
  467. }
  468. ets_params.cos[i].state = bnx2x_cos_state_strict;
  469. ets_params.cos[i].params.sp_params.pri =
  470. ets->cos_params[i].strict;
  471. } else { /* COS is BW */
  472. if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) {
  473. BNX2X_ERR("COS can't be not BW and not SP\n");
  474. return;
  475. }
  476. ets_params.cos[i].state = bnx2x_cos_state_bw;
  477. ets_params.cos[i].params.bw_params.bw =
  478. (u8)ets->cos_params[i].bw_tbl;
  479. }
  480. }
  481. /* Configure the ETS in HW */
  482. if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars,
  483. &ets_params)) {
  484. BNX2X_ERR("bnx2x_ets_e3b0_config failed\n");
  485. bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
  486. }
  487. }
  488. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
  489. {
  490. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  491. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  492. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  493. bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
  494. if (!bp->dcbx_port_params.ets.enabled ||
  495. ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured))
  496. return;
  497. if (CHIP_IS_E3B0(bp))
  498. bnx2x_dcbx_update_ets_config(bp);
  499. else
  500. bnx2x_dcbx_2cos_limit_update_ets_config(bp);
  501. }
  502. #ifdef BCM_DCBNL
  503. static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp)
  504. {
  505. struct lldp_remote_mib remote_mib = {0};
  506. u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset);
  507. int rc;
  508. DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n",
  509. dcbx_remote_mib_offset);
  510. if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) {
  511. BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n");
  512. return -EINVAL;
  513. }
  514. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset,
  515. DCBX_READ_REMOTE_MIB);
  516. if (rc) {
  517. BNX2X_ERR("Failed to read remote mib from FW\n");
  518. return rc;
  519. }
  520. /* save features and flags */
  521. bp->dcbx_remote_feat = remote_mib.features;
  522. bp->dcbx_remote_flags = remote_mib.flags;
  523. return 0;
  524. }
  525. #endif
  526. static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
  527. {
  528. struct lldp_local_mib local_mib = {0};
  529. u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
  530. int rc;
  531. DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
  532. if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
  533. BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
  534. return -EINVAL;
  535. }
  536. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
  537. DCBX_READ_LOCAL_MIB);
  538. if (rc) {
  539. BNX2X_ERR("Failed to read local mib from FW\n");
  540. return rc;
  541. }
  542. /* save features and error */
  543. bp->dcbx_local_feat = local_mib.features;
  544. bp->dcbx_error = local_mib.error;
  545. return 0;
  546. }
  547. #ifdef BCM_DCBNL
  548. static inline
  549. u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent)
  550. {
  551. u8 pri;
  552. /* Choose the highest priority */
  553. for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--)
  554. if (ent->pri_bitmap & (1 << pri))
  555. break;
  556. return pri;
  557. }
  558. static inline
  559. u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent)
  560. {
  561. return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) ==
  562. DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM :
  563. DCB_APP_IDTYPE_ETHTYPE;
  564. }
  565. int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall)
  566. {
  567. int i, err = 0;
  568. for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) {
  569. struct dcbx_app_priority_entry *ent =
  570. &bp->dcbx_local_feat.app.app_pri_tbl[i];
  571. if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
  572. u8 up = bnx2x_dcbx_dcbnl_app_up(ent);
  573. /* avoid invalid user-priority */
  574. if (up) {
  575. struct dcb_app app;
  576. app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
  577. app.protocol = ent->app_id;
  578. app.priority = delall ? 0 : up;
  579. err = dcb_setapp(bp->dev, &app);
  580. }
  581. }
  582. }
  583. return err;
  584. }
  585. #endif
  586. static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp)
  587. {
  588. u8 prio, cos;
  589. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) {
  590. for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
  591. if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask
  592. & (1 << prio)) {
  593. bp->prio_to_cos[prio] = cos;
  594. DP(BNX2X_MSG_DCB,
  595. "tx_mapping %d --> %d\n", prio, cos);
  596. }
  597. }
  598. }
  599. /* setup tc must be called under rtnl lock, but we can't take it here
  600. * as we are handling an attention on a work queue which must be
  601. * flushed at some rtnl-locked contexts (e.g. if down)
  602. */
  603. if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state))
  604. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  605. }
  606. void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
  607. {
  608. switch (state) {
  609. case BNX2X_DCBX_STATE_NEG_RECEIVED:
  610. {
  611. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
  612. #ifdef BCM_DCBNL
  613. /**
  614. * Delete app tlvs from dcbnl before reading new
  615. * negotiation results
  616. */
  617. bnx2x_dcbnl_update_applist(bp, true);
  618. /* Read remote mib if dcbx is in the FW */
  619. if (bnx2x_dcbx_read_shmem_remote_mib(bp))
  620. return;
  621. #endif
  622. /* Read neg results if dcbx is in the FW */
  623. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  624. return;
  625. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  626. bp->dcbx_error);
  627. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  628. bp->dcbx_error);
  629. /* mark DCBX result for PMF migration */
  630. bnx2x_update_drv_flags(bp,
  631. 1 << DRV_FLAGS_DCB_CONFIGURED,
  632. 1);
  633. #ifdef BCM_DCBNL
  634. /*
  635. * Add new app tlvs to dcbnl
  636. */
  637. bnx2x_dcbnl_update_applist(bp, false);
  638. #endif
  639. /*
  640. * reconfigure the netdevice with the results of the new
  641. * dcbx negotiation.
  642. */
  643. bnx2x_dcbx_update_tc_mapping(bp);
  644. /*
  645. * allow other functions to update their netdevices
  646. * accordingly
  647. */
  648. if (IS_MF(bp))
  649. bnx2x_link_sync_notify(bp);
  650. set_bit(BNX2X_SP_RTNL_TX_STOP, &bp->sp_rtnl_state);
  651. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  652. return;
  653. }
  654. case BNX2X_DCBX_STATE_TX_PAUSED:
  655. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n");
  656. bnx2x_pfc_set_pfc(bp);
  657. bnx2x_dcbx_update_ets_params(bp);
  658. /* ets may affect cmng configuration: reinit it in hw */
  659. bnx2x_set_local_cmng(bp);
  660. set_bit(BNX2X_SP_RTNL_TX_RESUME, &bp->sp_rtnl_state);
  661. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  662. return;
  663. case BNX2X_DCBX_STATE_TX_RELEASED:
  664. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n");
  665. bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
  666. #ifdef BCM_DCBNL
  667. /*
  668. * Send a notification for the new negotiated parameters
  669. */
  670. dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
  671. #endif
  672. return;
  673. default:
  674. BNX2X_ERR("Unknown DCBX_STATE\n");
  675. }
  676. }
  677. #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
  678. BP_PORT(bp)*sizeof(struct lldp_admin_mib))
  679. static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
  680. u32 dcbx_lldp_params_offset)
  681. {
  682. struct lldp_admin_mib admin_mib;
  683. u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
  684. u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
  685. /*shortcuts*/
  686. struct dcbx_features *af = &admin_mib.features;
  687. struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
  688. memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
  689. /* Read the data first */
  690. bnx2x_read_data(bp, (u32 *)&admin_mib, offset,
  691. sizeof(struct lldp_admin_mib));
  692. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON)
  693. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  694. else
  695. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  696. if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) {
  697. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
  698. admin_mib.ver_cfg_flags |=
  699. (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
  700. DCBX_CEE_VERSION_MASK;
  701. af->ets.enabled = (u8)dp->admin_ets_enable;
  702. af->pfc.enabled = (u8)dp->admin_pfc_enable;
  703. /* FOR IEEE dp->admin_tc_supported_tx_enable */
  704. if (dp->admin_ets_configuration_tx_enable)
  705. SET_FLAGS(admin_mib.ver_cfg_flags,
  706. DCBX_ETS_CONFIG_TX_ENABLED);
  707. else
  708. RESET_FLAGS(admin_mib.ver_cfg_flags,
  709. DCBX_ETS_CONFIG_TX_ENABLED);
  710. /* For IEEE admin_ets_recommendation_tx_enable */
  711. if (dp->admin_pfc_tx_enable)
  712. SET_FLAGS(admin_mib.ver_cfg_flags,
  713. DCBX_PFC_CONFIG_TX_ENABLED);
  714. else
  715. RESET_FLAGS(admin_mib.ver_cfg_flags,
  716. DCBX_PFC_CONFIG_TX_ENABLED);
  717. if (dp->admin_application_priority_tx_enable)
  718. SET_FLAGS(admin_mib.ver_cfg_flags,
  719. DCBX_APP_CONFIG_TX_ENABLED);
  720. else
  721. RESET_FLAGS(admin_mib.ver_cfg_flags,
  722. DCBX_APP_CONFIG_TX_ENABLED);
  723. if (dp->admin_ets_willing)
  724. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  725. else
  726. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  727. /* For IEEE admin_ets_reco_valid */
  728. if (dp->admin_pfc_willing)
  729. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  730. else
  731. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  732. if (dp->admin_app_priority_willing)
  733. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  734. else
  735. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  736. for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
  737. DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
  738. (u8)dp->admin_configuration_bw_precentage[i]);
  739. DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n",
  740. i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
  741. }
  742. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  743. DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
  744. (u8)dp->admin_configuration_ets_pg[i]);
  745. DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n",
  746. i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
  747. }
  748. /*For IEEE admin_recommendation_bw_percentage
  749. *For IEEE admin_recommendation_ets_pg */
  750. af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
  751. for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) {
  752. if (dp->admin_priority_app_table[i].valid) {
  753. struct bnx2x_admin_priority_app_table *table =
  754. dp->admin_priority_app_table;
  755. if ((ETH_TYPE_FCOE == table[i].app_id) &&
  756. (TRAFFIC_TYPE_ETH == table[i].traffic_type))
  757. traf_type = FCOE_APP_IDX;
  758. else if ((TCP_PORT_ISCSI == table[i].app_id) &&
  759. (TRAFFIC_TYPE_PORT == table[i].traffic_type))
  760. traf_type = ISCSI_APP_IDX;
  761. else
  762. traf_type = other_traf_type++;
  763. af->app.app_pri_tbl[traf_type].app_id =
  764. table[i].app_id;
  765. af->app.app_pri_tbl[traf_type].pri_bitmap =
  766. (u8)(1 << table[i].priority);
  767. af->app.app_pri_tbl[traf_type].appBitfield =
  768. (DCBX_APP_ENTRY_VALID);
  769. af->app.app_pri_tbl[traf_type].appBitfield |=
  770. (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
  771. DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
  772. }
  773. }
  774. af->app.default_pri = (u8)dp->admin_default_priority;
  775. }
  776. /* Write the data. */
  777. bnx2x_write_data(bp, (u32 *)&admin_mib, offset,
  778. sizeof(struct lldp_admin_mib));
  779. }
  780. void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
  781. {
  782. if (!CHIP_IS_E1x(bp)) {
  783. bp->dcb_state = dcb_on;
  784. bp->dcbx_enabled = dcbx_enabled;
  785. } else {
  786. bp->dcb_state = false;
  787. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID;
  788. }
  789. DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n",
  790. dcb_on ? "ON" : "OFF",
  791. dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" :
  792. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" :
  793. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ?
  794. "on-chip with negotiation" : "invalid");
  795. }
  796. void bnx2x_dcbx_init_params(struct bnx2x *bp)
  797. {
  798. bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
  799. bp->dcbx_config_params.admin_ets_willing = 1;
  800. bp->dcbx_config_params.admin_pfc_willing = 1;
  801. bp->dcbx_config_params.overwrite_settings = 1;
  802. bp->dcbx_config_params.admin_ets_enable = 1;
  803. bp->dcbx_config_params.admin_pfc_enable = 1;
  804. bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
  805. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  806. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  807. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  808. bp->dcbx_config_params.admin_ets_reco_valid = 1;
  809. bp->dcbx_config_params.admin_app_priority_willing = 1;
  810. bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100;
  811. bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0;
  812. bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0;
  813. bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
  814. bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
  815. bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
  816. bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
  817. bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
  818. bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0;
  819. bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
  820. bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
  821. bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0;
  822. bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
  823. bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
  824. bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
  825. bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
  826. bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100;
  827. bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0;
  828. bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0;
  829. bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
  830. bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0;
  831. bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0;
  832. bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0;
  833. bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0;
  834. bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
  835. bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
  836. bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
  837. bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
  838. bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
  839. bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
  840. bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
  841. bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
  842. bp->dcbx_config_params.admin_pfc_bitmap = 0x0;
  843. bp->dcbx_config_params.admin_priority_app_table[0].valid = 0;
  844. bp->dcbx_config_params.admin_priority_app_table[1].valid = 0;
  845. bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
  846. bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
  847. bp->dcbx_config_params.admin_default_priority = 0;
  848. }
  849. void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem)
  850. {
  851. u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
  852. /* only PMF can send ADMIN msg to MFW in old MFW versions */
  853. if ((!bp->port.pmf) && (!(bp->flags & BC_SUPPORTS_DCBX_MSG_NON_PMF)))
  854. return;
  855. if (bp->dcbx_enabled <= 0)
  856. return;
  857. /* validate:
  858. * chip of good for dcbx version,
  859. * dcb is wanted
  860. * shmem2 contains DCBX support fields
  861. */
  862. DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n",
  863. bp->dcb_state, bp->port.pmf);
  864. if (bp->dcb_state == BNX2X_DCB_STATE_ON &&
  865. SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
  866. dcbx_lldp_params_offset =
  867. SHMEM2_RD(bp, dcbx_lldp_params_offset);
  868. DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n",
  869. dcbx_lldp_params_offset);
  870. bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0);
  871. if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
  872. /* need HW lock to avoid scenario of two drivers
  873. * writing in parallel to shmem
  874. */
  875. bnx2x_acquire_hw_lock(bp,
  876. HW_LOCK_RESOURCE_DCBX_ADMIN_MIB);
  877. if (update_shmem)
  878. bnx2x_dcbx_admin_mib_updated_params(bp,
  879. dcbx_lldp_params_offset);
  880. /* Let HW start negotiation */
  881. bnx2x_fw_command(bp,
  882. DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
  883. /* release HW lock only after MFW acks that it finished
  884. * reading values from shmem
  885. */
  886. bnx2x_release_hw_lock(bp,
  887. HW_LOCK_RESOURCE_DCBX_ADMIN_MIB);
  888. }
  889. }
  890. }
  891. static void
  892. bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
  893. struct bnx2x_func_tx_start_params *pfc_fw_cfg)
  894. {
  895. u8 pri = 0;
  896. u8 cos = 0;
  897. DP(BNX2X_MSG_DCB,
  898. "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
  899. DP(BNX2X_MSG_DCB,
  900. "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n",
  901. bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
  902. for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
  903. DP(BNX2X_MSG_DCB,
  904. "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n",
  905. cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
  906. DP(BNX2X_MSG_DCB,
  907. "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n",
  908. cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
  909. DP(BNX2X_MSG_DCB,
  910. "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n",
  911. cos, bp->dcbx_port_params.ets.cos_params[cos].strict);
  912. DP(BNX2X_MSG_DCB,
  913. "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n",
  914. cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable);
  915. }
  916. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  917. DP(BNX2X_MSG_DCB,
  918. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n",
  919. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
  920. DP(BNX2X_MSG_DCB,
  921. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
  922. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
  923. }
  924. }
  925. /* fills help_data according to pg_info */
  926. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  927. u32 *pg_pri_orginal_spread,
  928. struct pg_help_data *help_data)
  929. {
  930. bool pg_found = false;
  931. u32 i, traf_type, add_traf_type, add_pg;
  932. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  933. struct pg_entry_help_data *data = help_data->data; /*shortcut*/
  934. /* Set to invalid */
  935. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  936. data[i].pg = DCBX_ILLEGAL_PG;
  937. for (add_traf_type = 0;
  938. add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
  939. pg_found = false;
  940. if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
  941. add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
  942. for (traf_type = 0;
  943. traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  944. traf_type++) {
  945. if (data[traf_type].pg == add_pg) {
  946. if (!(data[traf_type].pg_priority &
  947. (1 << ttp[add_traf_type])))
  948. data[traf_type].
  949. num_of_dif_pri++;
  950. data[traf_type].pg_priority |=
  951. (1 << ttp[add_traf_type]);
  952. pg_found = true;
  953. break;
  954. }
  955. }
  956. if (false == pg_found) {
  957. data[help_data->num_of_pg].pg = add_pg;
  958. data[help_data->num_of_pg].pg_priority =
  959. (1 << ttp[add_traf_type]);
  960. data[help_data->num_of_pg].num_of_dif_pri = 1;
  961. help_data->num_of_pg++;
  962. }
  963. }
  964. DP(BNX2X_MSG_DCB,
  965. "add_traf_type %d pg_found %s num_of_pg %d\n",
  966. add_traf_type, (false == pg_found) ? "NO" : "YES",
  967. help_data->num_of_pg);
  968. }
  969. }
  970. static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
  971. struct cos_help_data *cos_data,
  972. u32 pri_join_mask)
  973. {
  974. /* Only one priority than only one COS */
  975. cos_data->data[0].pausable =
  976. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  977. cos_data->data[0].pri_join_mask = pri_join_mask;
  978. cos_data->data[0].cos_bw = 100;
  979. cos_data->num_of_cos = 1;
  980. }
  981. static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
  982. struct cos_entry_help_data *data,
  983. u8 pg_bw)
  984. {
  985. if (data->cos_bw == DCBX_INVALID_COS_BW)
  986. data->cos_bw = pg_bw;
  987. else
  988. data->cos_bw += pg_bw;
  989. }
  990. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  991. struct cos_help_data *cos_data,
  992. u32 *pg_pri_orginal_spread,
  993. struct dcbx_ets_feature *ets)
  994. {
  995. u32 pri_tested = 0;
  996. u8 i = 0;
  997. u8 entry = 0;
  998. u8 pg_entry = 0;
  999. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  1000. cos_data->data[0].pausable = true;
  1001. cos_data->data[1].pausable = false;
  1002. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  1003. for (i = 0 ; i < num_of_pri ; i++) {
  1004. pri_tested = 1 << bp->dcbx_port_params.
  1005. app.traffic_type_priority[i];
  1006. if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
  1007. cos_data->data[1].pri_join_mask |= pri_tested;
  1008. entry = 1;
  1009. } else {
  1010. cos_data->data[0].pri_join_mask |= pri_tested;
  1011. entry = 0;
  1012. }
  1013. pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
  1014. app.traffic_type_priority[i]];
  1015. /* There can be only one strict pg */
  1016. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1017. bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
  1018. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
  1019. else
  1020. /* If we join a group and one is strict
  1021. * than the bw rules
  1022. */
  1023. cos_data->data[entry].strict =
  1024. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1025. }
  1026. if ((0 == cos_data->data[0].pri_join_mask) &&
  1027. (0 == cos_data->data[1].pri_join_mask))
  1028. BNX2X_ERR("dcbx error: Both groups must have priorities\n");
  1029. }
  1030. #ifndef POWER_OF_2
  1031. #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
  1032. #endif
  1033. static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp,
  1034. struct pg_help_data *pg_help_data,
  1035. struct cos_help_data *cos_data,
  1036. u32 pri_join_mask,
  1037. u8 num_of_dif_pri)
  1038. {
  1039. u8 i = 0;
  1040. u32 pri_tested = 0;
  1041. u32 pri_mask_without_pri = 0;
  1042. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1043. /*debug*/
  1044. if (num_of_dif_pri == 1) {
  1045. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
  1046. return;
  1047. }
  1048. /* single priority group */
  1049. if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1050. /* If there are both pauseable and non-pauseable priorities,
  1051. * the pauseable priorities go to the first queue and
  1052. * the non-pauseable priorities go to the second queue.
  1053. */
  1054. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1055. /* Pauseable */
  1056. cos_data->data[0].pausable = true;
  1057. /* Non pauseable.*/
  1058. cos_data->data[1].pausable = false;
  1059. if (2 == num_of_dif_pri) {
  1060. cos_data->data[0].cos_bw = 50;
  1061. cos_data->data[1].cos_bw = 50;
  1062. }
  1063. if (3 == num_of_dif_pri) {
  1064. if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
  1065. pri_join_mask))) {
  1066. cos_data->data[0].cos_bw = 33;
  1067. cos_data->data[1].cos_bw = 67;
  1068. } else {
  1069. cos_data->data[0].cos_bw = 67;
  1070. cos_data->data[1].cos_bw = 33;
  1071. }
  1072. }
  1073. } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
  1074. /* If there are only pauseable priorities,
  1075. * then one/two priorities go to the first queue
  1076. * and one priority goes to the second queue.
  1077. */
  1078. if (2 == num_of_dif_pri) {
  1079. cos_data->data[0].cos_bw = 50;
  1080. cos_data->data[1].cos_bw = 50;
  1081. } else {
  1082. cos_data->data[0].cos_bw = 67;
  1083. cos_data->data[1].cos_bw = 33;
  1084. }
  1085. cos_data->data[1].pausable = true;
  1086. cos_data->data[0].pausable = true;
  1087. /* All priorities except FCOE */
  1088. cos_data->data[0].pri_join_mask = (pri_join_mask &
  1089. ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
  1090. /* Only FCOE priority.*/
  1091. cos_data->data[1].pri_join_mask =
  1092. (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
  1093. } else
  1094. /* If there are only non-pauseable priorities,
  1095. * they will all go to the same queue.
  1096. */
  1097. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1098. cos_data, pri_join_mask);
  1099. } else {
  1100. /* priority group which is not BW limited (PG#15):*/
  1101. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1102. /* If there are both pauseable and non-pauseable
  1103. * priorities, the pauseable priorities go to the first
  1104. * queue and the non-pauseable priorities
  1105. * go to the second queue.
  1106. */
  1107. if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
  1108. DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
  1109. cos_data->data[0].strict =
  1110. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1111. cos_data->data[1].strict =
  1112. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1113. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1114. } else {
  1115. cos_data->data[0].strict =
  1116. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1117. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1118. cos_data->data[1].strict =
  1119. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1120. }
  1121. /* Pauseable */
  1122. cos_data->data[0].pausable = true;
  1123. /* Non pause-able.*/
  1124. cos_data->data[1].pausable = false;
  1125. } else {
  1126. /* If there are only pauseable priorities or
  1127. * only non-pauseable,* the lower priorities go
  1128. * to the first queue and the higher priorities go
  1129. * to the second queue.
  1130. */
  1131. cos_data->data[0].pausable =
  1132. cos_data->data[1].pausable =
  1133. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1134. for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
  1135. pri_tested = 1 << bp->dcbx_port_params.
  1136. app.traffic_type_priority[i];
  1137. /* Remove priority tested */
  1138. pri_mask_without_pri =
  1139. (pri_join_mask & ((u8)(~pri_tested)));
  1140. if (pri_mask_without_pri < pri_tested)
  1141. break;
  1142. }
  1143. if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
  1144. BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n");
  1145. cos_data->data[0].pri_join_mask = pri_mask_without_pri;
  1146. cos_data->data[1].pri_join_mask = pri_tested;
  1147. /* Both queues are strict priority,
  1148. * and that with the highest priority
  1149. * gets the highest strict priority in the arbiter.
  1150. */
  1151. cos_data->data[0].strict =
  1152. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1153. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1154. cos_data->data[1].strict =
  1155. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1156. }
  1157. }
  1158. }
  1159. static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
  1160. struct bnx2x *bp,
  1161. struct pg_help_data *pg_help_data,
  1162. struct dcbx_ets_feature *ets,
  1163. struct cos_help_data *cos_data,
  1164. u32 *pg_pri_orginal_spread,
  1165. u32 pri_join_mask,
  1166. u8 num_of_dif_pri)
  1167. {
  1168. u8 i = 0;
  1169. u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 };
  1170. /* If there are both pauseable and non-pauseable priorities,
  1171. * the pauseable priorities go to the first queue and
  1172. * the non-pauseable priorities go to the second queue.
  1173. */
  1174. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1175. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1176. pg_help_data->data[0].pg_priority) ||
  1177. IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1178. pg_help_data->data[1].pg_priority)) {
  1179. /* If one PG contains both pauseable and
  1180. * non-pauseable priorities then ETS is disabled.
  1181. */
  1182. bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
  1183. pg_pri_orginal_spread, ets);
  1184. bp->dcbx_port_params.ets.enabled = false;
  1185. return;
  1186. }
  1187. /* Pauseable */
  1188. cos_data->data[0].pausable = true;
  1189. /* Non pauseable. */
  1190. cos_data->data[1].pausable = false;
  1191. if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
  1192. pg_help_data->data[0].pg_priority)) {
  1193. /* 0 is pauseable */
  1194. cos_data->data[0].pri_join_mask =
  1195. pg_help_data->data[0].pg_priority;
  1196. pg[0] = pg_help_data->data[0].pg;
  1197. cos_data->data[1].pri_join_mask =
  1198. pg_help_data->data[1].pg_priority;
  1199. pg[1] = pg_help_data->data[1].pg;
  1200. } else {/* 1 is pauseable */
  1201. cos_data->data[0].pri_join_mask =
  1202. pg_help_data->data[1].pg_priority;
  1203. pg[0] = pg_help_data->data[1].pg;
  1204. cos_data->data[1].pri_join_mask =
  1205. pg_help_data->data[0].pg_priority;
  1206. pg[1] = pg_help_data->data[0].pg;
  1207. }
  1208. } else {
  1209. /* If there are only pauseable priorities or
  1210. * only non-pauseable, each PG goes to a queue.
  1211. */
  1212. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1213. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1214. cos_data->data[0].pri_join_mask =
  1215. pg_help_data->data[0].pg_priority;
  1216. pg[0] = pg_help_data->data[0].pg;
  1217. cos_data->data[1].pri_join_mask =
  1218. pg_help_data->data[1].pg_priority;
  1219. pg[1] = pg_help_data->data[1].pg;
  1220. }
  1221. /* There can be only one strict pg */
  1222. for (i = 0 ; i < ARRAY_SIZE(pg); i++) {
  1223. if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1224. cos_data->data[i].cos_bw =
  1225. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
  1226. else
  1227. cos_data->data[i].strict =
  1228. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1229. }
  1230. }
  1231. static int bnx2x_dcbx_join_pgs(
  1232. struct bnx2x *bp,
  1233. struct dcbx_ets_feature *ets,
  1234. struct pg_help_data *pg_help_data,
  1235. u8 required_num_of_pg)
  1236. {
  1237. u8 entry_joined = pg_help_data->num_of_pg - 1;
  1238. u8 entry_removed = entry_joined + 1;
  1239. u8 pg_joined = 0;
  1240. if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data)
  1241. <= pg_help_data->num_of_pg) {
  1242. BNX2X_ERR("required_num_of_pg can't be zero\n");
  1243. return -EINVAL;
  1244. }
  1245. while (required_num_of_pg < pg_help_data->num_of_pg) {
  1246. entry_joined = pg_help_data->num_of_pg - 2;
  1247. entry_removed = entry_joined + 1;
  1248. /* protect index */
  1249. entry_removed %= ARRAY_SIZE(pg_help_data->data);
  1250. pg_help_data->data[entry_joined].pg_priority |=
  1251. pg_help_data->data[entry_removed].pg_priority;
  1252. pg_help_data->data[entry_joined].num_of_dif_pri +=
  1253. pg_help_data->data[entry_removed].num_of_dif_pri;
  1254. if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG ||
  1255. pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG)
  1256. /* Entries joined strict priority rules */
  1257. pg_help_data->data[entry_joined].pg =
  1258. DCBX_STRICT_PRI_PG;
  1259. else {
  1260. /* Entries can be joined join BW */
  1261. pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1262. pg_help_data->data[entry_joined].pg) +
  1263. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1264. pg_help_data->data[entry_removed].pg);
  1265. DCBX_PG_BW_SET(ets->pg_bw_tbl,
  1266. pg_help_data->data[entry_joined].pg, pg_joined);
  1267. }
  1268. /* Joined the entries */
  1269. pg_help_data->num_of_pg--;
  1270. }
  1271. return 0;
  1272. }
  1273. static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
  1274. struct bnx2x *bp,
  1275. struct pg_help_data *pg_help_data,
  1276. struct dcbx_ets_feature *ets,
  1277. struct cos_help_data *cos_data,
  1278. u32 *pg_pri_orginal_spread,
  1279. u32 pri_join_mask,
  1280. u8 num_of_dif_pri)
  1281. {
  1282. u8 i = 0;
  1283. u32 pri_tested = 0;
  1284. u8 entry = 0;
  1285. u8 pg_entry = 0;
  1286. bool b_found_strict = false;
  1287. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  1288. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  1289. /* If there are both pauseable and non-pauseable priorities,
  1290. * the pauseable priorities go to the first queue and the
  1291. * non-pauseable priorities go to the second queue.
  1292. */
  1293. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
  1294. bnx2x_dcbx_separate_pauseable_from_non(bp,
  1295. cos_data, pg_pri_orginal_spread, ets);
  1296. else {
  1297. /* If two BW-limited PG-s were combined to one queue,
  1298. * the BW is their sum.
  1299. *
  1300. * If there are only pauseable priorities or only non-pauseable,
  1301. * and there are both BW-limited and non-BW-limited PG-s,
  1302. * the BW-limited PG/s go to one queue and the non-BW-limited
  1303. * PG/s go to the second queue.
  1304. *
  1305. * If there are only pauseable priorities or only non-pauseable
  1306. * and all are BW limited, then two priorities go to the first
  1307. * queue and one priority goes to the second queue.
  1308. *
  1309. * We will join this two cases:
  1310. * if one is BW limited it will go to the second queue
  1311. * otherwise the last priority will get it
  1312. */
  1313. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1314. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1315. for (i = 0 ; i < num_of_pri; i++) {
  1316. pri_tested = 1 << bp->dcbx_port_params.
  1317. app.traffic_type_priority[i];
  1318. pg_entry = (u8)pg_pri_orginal_spread[bp->
  1319. dcbx_port_params.app.traffic_type_priority[i]];
  1320. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1321. entry = 0;
  1322. if (i == (num_of_pri-1) &&
  1323. false == b_found_strict)
  1324. /* last entry will be handled separately
  1325. * If no priority is strict than last
  1326. * entry goes to last queue.
  1327. */
  1328. entry = 1;
  1329. cos_data->data[entry].pri_join_mask |=
  1330. pri_tested;
  1331. bnx2x_dcbx_add_to_cos_bw(bp,
  1332. &cos_data->data[entry],
  1333. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1334. pg_entry));
  1335. } else {
  1336. b_found_strict = true;
  1337. cos_data->data[1].pri_join_mask |= pri_tested;
  1338. /* If we join a group and one is strict
  1339. * than the bw rules
  1340. */
  1341. cos_data->data[1].strict =
  1342. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1343. }
  1344. }
  1345. }
  1346. }
  1347. static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp,
  1348. struct pg_help_data *help_data,
  1349. struct dcbx_ets_feature *ets,
  1350. struct cos_help_data *cos_data,
  1351. u32 *pg_pri_orginal_spread,
  1352. u32 pri_join_mask,
  1353. u8 num_of_dif_pri)
  1354. {
  1355. /* default E2 settings */
  1356. cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2;
  1357. switch (help_data->num_of_pg) {
  1358. case 1:
  1359. bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(
  1360. bp,
  1361. help_data,
  1362. cos_data,
  1363. pri_join_mask,
  1364. num_of_dif_pri);
  1365. break;
  1366. case 2:
  1367. bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
  1368. bp,
  1369. help_data,
  1370. ets,
  1371. cos_data,
  1372. pg_pri_orginal_spread,
  1373. pri_join_mask,
  1374. num_of_dif_pri);
  1375. break;
  1376. case 3:
  1377. bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
  1378. bp,
  1379. help_data,
  1380. ets,
  1381. cos_data,
  1382. pg_pri_orginal_spread,
  1383. pri_join_mask,
  1384. num_of_dif_pri);
  1385. break;
  1386. default:
  1387. BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
  1388. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1389. cos_data, pri_join_mask);
  1390. }
  1391. }
  1392. static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp,
  1393. struct cos_help_data *cos_data,
  1394. u8 entry,
  1395. u8 num_spread_of_entries,
  1396. u8 strict_app_pris)
  1397. {
  1398. u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST;
  1399. u8 num_of_app_pri = MAX_PFC_PRIORITIES;
  1400. u8 app_pri_bit = 0;
  1401. while (num_spread_of_entries && num_of_app_pri > 0) {
  1402. app_pri_bit = 1 << (num_of_app_pri - 1);
  1403. if (app_pri_bit & strict_app_pris) {
  1404. struct cos_entry_help_data *data = &cos_data->
  1405. data[entry];
  1406. num_spread_of_entries--;
  1407. if (num_spread_of_entries == 0) {
  1408. /* last entry needed put all the entries left */
  1409. data->cos_bw = DCBX_INVALID_COS_BW;
  1410. data->strict = strict_pri;
  1411. data->pri_join_mask = strict_app_pris;
  1412. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1413. data->pri_join_mask);
  1414. } else {
  1415. strict_app_pris &= ~app_pri_bit;
  1416. data->cos_bw = DCBX_INVALID_COS_BW;
  1417. data->strict = strict_pri;
  1418. data->pri_join_mask = app_pri_bit;
  1419. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1420. data->pri_join_mask);
  1421. }
  1422. strict_pri =
  1423. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri);
  1424. entry++;
  1425. }
  1426. num_of_app_pri--;
  1427. }
  1428. if (num_spread_of_entries) {
  1429. BNX2X_ERR("Didn't succeed to spread strict priorities\n");
  1430. return -EINVAL;
  1431. }
  1432. return 0;
  1433. }
  1434. static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp,
  1435. struct cos_help_data *cos_data,
  1436. u8 entry,
  1437. u8 num_spread_of_entries,
  1438. u8 strict_app_pris)
  1439. {
  1440. if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry,
  1441. num_spread_of_entries,
  1442. strict_app_pris)) {
  1443. struct cos_entry_help_data *data = &cos_data->
  1444. data[entry];
  1445. /* Fill BW entry */
  1446. data->cos_bw = DCBX_INVALID_COS_BW;
  1447. data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST;
  1448. data->pri_join_mask = strict_app_pris;
  1449. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1450. data->pri_join_mask);
  1451. return 1;
  1452. }
  1453. return num_spread_of_entries;
  1454. }
  1455. static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp,
  1456. struct pg_help_data *help_data,
  1457. struct dcbx_ets_feature *ets,
  1458. struct cos_help_data *cos_data,
  1459. u32 pri_join_mask)
  1460. {
  1461. u8 need_num_of_entries = 0;
  1462. u8 i = 0;
  1463. u8 entry = 0;
  1464. /*
  1465. * if the number of requested PG-s in CEE is greater than 3
  1466. * then the results are not determined since this is a violation
  1467. * of the standard.
  1468. */
  1469. if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) {
  1470. if (bnx2x_dcbx_join_pgs(bp, ets, help_data,
  1471. DCBX_COS_MAX_NUM_E3B0)) {
  1472. BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n");
  1473. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data,
  1474. pri_join_mask);
  1475. return;
  1476. }
  1477. }
  1478. for (i = 0 ; i < help_data->num_of_pg; i++) {
  1479. struct pg_entry_help_data *pg = &help_data->data[i];
  1480. if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1481. struct cos_entry_help_data *data = &cos_data->
  1482. data[entry];
  1483. /* Fill BW entry */
  1484. data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg);
  1485. data->strict = BNX2X_DCBX_STRICT_INVALID;
  1486. data->pri_join_mask = pg->pg_priority;
  1487. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1488. data->pri_join_mask);
  1489. entry++;
  1490. } else {
  1491. need_num_of_entries = min_t(u8,
  1492. (u8)pg->num_of_dif_pri,
  1493. (u8)DCBX_COS_MAX_NUM_E3B0 -
  1494. help_data->num_of_pg + 1);
  1495. /*
  1496. * If there are still VOQ-s which have no associated PG,
  1497. * then associate these VOQ-s to PG15. These PG-s will
  1498. * be used for SP between priorities on PG15.
  1499. */
  1500. entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data,
  1501. entry, need_num_of_entries, pg->pg_priority);
  1502. }
  1503. }
  1504. /* the entry will represent the number of COSes used */
  1505. cos_data->num_of_cos = entry;
  1506. }
  1507. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  1508. struct pg_help_data *help_data,
  1509. struct dcbx_ets_feature *ets,
  1510. u32 *pg_pri_orginal_spread)
  1511. {
  1512. struct cos_help_data cos_data;
  1513. u8 i = 0;
  1514. u32 pri_join_mask = 0;
  1515. u8 num_of_dif_pri = 0;
  1516. memset(&cos_data, 0, sizeof(cos_data));
  1517. /* Validate the pg value */
  1518. for (i = 0; i < help_data->num_of_pg ; i++) {
  1519. if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
  1520. DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
  1521. BNX2X_ERR("Invalid pg[%d] data %x\n", i,
  1522. help_data->data[i].pg);
  1523. pri_join_mask |= help_data->data[i].pg_priority;
  1524. num_of_dif_pri += help_data->data[i].num_of_dif_pri;
  1525. }
  1526. /* defaults */
  1527. cos_data.num_of_cos = 1;
  1528. for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) {
  1529. cos_data.data[i].pri_join_mask = 0;
  1530. cos_data.data[i].pausable = false;
  1531. cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID;
  1532. cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
  1533. }
  1534. if (CHIP_IS_E3B0(bp))
  1535. bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets,
  1536. &cos_data, pri_join_mask);
  1537. else /* E2 + E3A0 */
  1538. bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp,
  1539. help_data, ets,
  1540. &cos_data,
  1541. pg_pri_orginal_spread,
  1542. pri_join_mask,
  1543. num_of_dif_pri);
  1544. for (i = 0; i < cos_data.num_of_cos ; i++) {
  1545. struct bnx2x_dcbx_cos_params *p =
  1546. &bp->dcbx_port_params.ets.cos_params[i];
  1547. p->strict = cos_data.data[i].strict;
  1548. p->bw_tbl = cos_data.data[i].cos_bw;
  1549. p->pri_bitmask = cos_data.data[i].pri_join_mask;
  1550. p->pauseable = cos_data.data[i].pausable;
  1551. /* sanity */
  1552. if (p->bw_tbl != DCBX_INVALID_COS_BW ||
  1553. p->strict != BNX2X_DCBX_STRICT_INVALID) {
  1554. if (p->pri_bitmask == 0)
  1555. BNX2X_ERR("Invalid pri_bitmask for %d\n", i);
  1556. if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) {
  1557. if (p->pauseable &&
  1558. DCBX_PFC_PRI_GET_NON_PAUSE(bp,
  1559. p->pri_bitmask) != 0)
  1560. BNX2X_ERR("Inconsistent config for pausable COS %d\n",
  1561. i);
  1562. if (!p->pauseable &&
  1563. DCBX_PFC_PRI_GET_PAUSE(bp,
  1564. p->pri_bitmask) != 0)
  1565. BNX2X_ERR("Inconsistent config for nonpausable COS %d\n",
  1566. i);
  1567. }
  1568. }
  1569. if (p->pauseable)
  1570. DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n",
  1571. i, cos_data.data[i].pri_join_mask);
  1572. else
  1573. DP(BNX2X_MSG_DCB,
  1574. "COS %d NONPAUSABLE prijoinmask 0x%x\n",
  1575. i, cos_data.data[i].pri_join_mask);
  1576. }
  1577. bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
  1578. }
  1579. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  1580. u32 *set_configuration_ets_pg,
  1581. u32 *pri_pg_tbl)
  1582. {
  1583. int i;
  1584. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  1585. set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
  1586. DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n",
  1587. i, set_configuration_ets_pg[i]);
  1588. }
  1589. }
  1590. static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
  1591. struct bnx2x_func_tx_start_params *pfc_fw_cfg)
  1592. {
  1593. u16 pri_bit = 0;
  1594. u8 cos = 0, pri = 0;
  1595. struct priority_cos *tt2cos;
  1596. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1597. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  1598. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  1599. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  1600. memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg));
  1601. /* to disable DCB - the structure must be zeroed */
  1602. if ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured)
  1603. return;
  1604. /*shortcut*/
  1605. tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
  1606. /* Fw version should be incremented each update */
  1607. pfc_fw_cfg->dcb_version = ++bp->dcb_version;
  1608. pfc_fw_cfg->dcb_enabled = 1;
  1609. /* Fill priority parameters */
  1610. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  1611. tt2cos[pri].priority = ttp[pri];
  1612. pri_bit = 1 << tt2cos[pri].priority;
  1613. /* Fill COS parameters based on COS calculated to
  1614. * make it more general for future use */
  1615. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
  1616. if (bp->dcbx_port_params.ets.cos_params[cos].
  1617. pri_bitmask & pri_bit)
  1618. tt2cos[pri].cos = cos;
  1619. }
  1620. /* we never want the FW to add a 0 vlan tag */
  1621. pfc_fw_cfg->dont_add_pri_0_en = 1;
  1622. bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
  1623. }
  1624. void bnx2x_dcbx_pmf_update(struct bnx2x *bp)
  1625. {
  1626. /* if we need to synchronize DCBX result from prev PMF
  1627. * read it from shmem and update bp and netdev accordingly
  1628. */
  1629. if (SHMEM2_HAS(bp, drv_flags) &&
  1630. GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) {
  1631. /* Read neg results if dcbx is in the FW */
  1632. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  1633. return;
  1634. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  1635. bp->dcbx_error);
  1636. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  1637. bp->dcbx_error);
  1638. #ifdef BCM_DCBNL
  1639. /*
  1640. * Add new app tlvs to dcbnl
  1641. */
  1642. bnx2x_dcbnl_update_applist(bp, false);
  1643. /*
  1644. * Send a notification for the new negotiated parameters
  1645. */
  1646. dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
  1647. #endif
  1648. /*
  1649. * reconfigure the netdevice with the results of the new
  1650. * dcbx negotiation.
  1651. */
  1652. bnx2x_dcbx_update_tc_mapping(bp);
  1653. }
  1654. }
  1655. /* DCB netlink */
  1656. #ifdef BCM_DCBNL
  1657. #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \
  1658. DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC)
  1659. static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp)
  1660. {
  1661. /* validate dcbnl call that may change HW state:
  1662. * DCB is on and DCBX mode was SUCCESSFULLY set by the user.
  1663. */
  1664. return bp->dcb_state && bp->dcbx_mode_uset;
  1665. }
  1666. static u8 bnx2x_dcbnl_get_state(struct net_device *netdev)
  1667. {
  1668. struct bnx2x *bp = netdev_priv(netdev);
  1669. DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state);
  1670. return bp->dcb_state;
  1671. }
  1672. static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state)
  1673. {
  1674. struct bnx2x *bp = netdev_priv(netdev);
  1675. DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off");
  1676. /* Fail to set state to "enabled" if dcbx is disabled in nvram */
  1677. if (state && ((bp->dcbx_enabled == BNX2X_DCBX_ENABLED_OFF) ||
  1678. (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_INVALID))) {
  1679. DP(BNX2X_MSG_DCB, "Can not set dcbx to enabled while it is disabled in nvm\n");
  1680. return 1;
  1681. }
  1682. bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled);
  1683. return 0;
  1684. }
  1685. static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev,
  1686. u8 *perm_addr)
  1687. {
  1688. struct bnx2x *bp = netdev_priv(netdev);
  1689. DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n");
  1690. /* first the HW mac address */
  1691. memcpy(perm_addr, netdev->dev_addr, netdev->addr_len);
  1692. if (CNIC_LOADED(bp))
  1693. /* second SAN address */
  1694. memcpy(perm_addr+netdev->addr_len, bp->fip_mac,
  1695. netdev->addr_len);
  1696. }
  1697. static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio,
  1698. u8 prio_type, u8 pgid, u8 bw_pct,
  1699. u8 up_map)
  1700. {
  1701. struct bnx2x *bp = netdev_priv(netdev);
  1702. DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid);
  1703. if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1704. return;
  1705. /**
  1706. * bw_pct ignored - band-width percentage devision between user
  1707. * priorities within the same group is not
  1708. * standard and hence not supported
  1709. *
  1710. * prio_type ignored - priority levels within the same group are not
  1711. * standard and hence are not supported. According
  1712. * to the standard pgid 15 is dedicated to strict
  1713. * priority traffic (on the port level).
  1714. *
  1715. * up_map ignored
  1716. */
  1717. bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid;
  1718. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1719. }
  1720. static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev,
  1721. int pgid, u8 bw_pct)
  1722. {
  1723. struct bnx2x *bp = netdev_priv(netdev);
  1724. DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct);
  1725. if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1726. return;
  1727. bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct;
  1728. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1729. }
  1730. static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio,
  1731. u8 prio_type, u8 pgid, u8 bw_pct,
  1732. u8 up_map)
  1733. {
  1734. struct bnx2x *bp = netdev_priv(netdev);
  1735. DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n");
  1736. }
  1737. static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev,
  1738. int pgid, u8 bw_pct)
  1739. {
  1740. struct bnx2x *bp = netdev_priv(netdev);
  1741. DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n");
  1742. }
  1743. static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio,
  1744. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1745. u8 *up_map)
  1746. {
  1747. struct bnx2x *bp = netdev_priv(netdev);
  1748. DP(BNX2X_MSG_DCB, "prio = %d\n", prio);
  1749. /**
  1750. * bw_pct ignored - band-width percentage devision between user
  1751. * priorities within the same group is not
  1752. * standard and hence not supported
  1753. *
  1754. * prio_type ignored - priority levels within the same group are not
  1755. * standard and hence are not supported. According
  1756. * to the standard pgid 15 is dedicated to strict
  1757. * priority traffic (on the port level).
  1758. *
  1759. * up_map ignored
  1760. */
  1761. *up_map = *bw_pct = *prio_type = *pgid = 0;
  1762. if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1763. return;
  1764. *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio);
  1765. }
  1766. static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev,
  1767. int pgid, u8 *bw_pct)
  1768. {
  1769. struct bnx2x *bp = netdev_priv(netdev);
  1770. DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid);
  1771. *bw_pct = 0;
  1772. if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1773. return;
  1774. *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid);
  1775. }
  1776. static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio,
  1777. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1778. u8 *up_map)
  1779. {
  1780. struct bnx2x *bp = netdev_priv(netdev);
  1781. DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n");
  1782. *prio_type = *pgid = *bw_pct = *up_map = 0;
  1783. }
  1784. static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev,
  1785. int pgid, u8 *bw_pct)
  1786. {
  1787. struct bnx2x *bp = netdev_priv(netdev);
  1788. DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n");
  1789. *bw_pct = 0;
  1790. }
  1791. static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio,
  1792. u8 setting)
  1793. {
  1794. struct bnx2x *bp = netdev_priv(netdev);
  1795. DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting);
  1796. if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES)
  1797. return;
  1798. if (setting) {
  1799. bp->dcbx_config_params.admin_pfc_bitmap |= (1 << prio);
  1800. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  1801. } else {
  1802. bp->dcbx_config_params.admin_pfc_bitmap &= ~(1 << prio);
  1803. }
  1804. }
  1805. static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio,
  1806. u8 *setting)
  1807. {
  1808. struct bnx2x *bp = netdev_priv(netdev);
  1809. DP(BNX2X_MSG_DCB, "prio = %d\n", prio);
  1810. *setting = 0;
  1811. if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES)
  1812. return;
  1813. *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1;
  1814. }
  1815. static u8 bnx2x_dcbnl_set_all(struct net_device *netdev)
  1816. {
  1817. struct bnx2x *bp = netdev_priv(netdev);
  1818. int rc = 0;
  1819. DP(BNX2X_MSG_DCB, "SET-ALL\n");
  1820. if (!bnx2x_dcbnl_set_valid(bp))
  1821. return 1;
  1822. if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
  1823. netdev_err(bp->dev,
  1824. "Handling parity error recovery. Try again later\n");
  1825. return 1;
  1826. }
  1827. if (netif_running(bp->dev)) {
  1828. bnx2x_update_drv_flags(bp,
  1829. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED,
  1830. 1);
  1831. bnx2x_dcbx_init(bp, true);
  1832. }
  1833. DP(BNX2X_MSG_DCB, "set_dcbx_params done (%d)\n", rc);
  1834. if (rc)
  1835. return 1;
  1836. return 0;
  1837. }
  1838. static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
  1839. {
  1840. struct bnx2x *bp = netdev_priv(netdev);
  1841. u8 rval = 0;
  1842. if (bp->dcb_state) {
  1843. switch (capid) {
  1844. case DCB_CAP_ATTR_PG:
  1845. *cap = true;
  1846. break;
  1847. case DCB_CAP_ATTR_PFC:
  1848. *cap = true;
  1849. break;
  1850. case DCB_CAP_ATTR_UP2TC:
  1851. *cap = false;
  1852. break;
  1853. case DCB_CAP_ATTR_PG_TCS:
  1854. *cap = 0x80; /* 8 priorities for PGs */
  1855. break;
  1856. case DCB_CAP_ATTR_PFC_TCS:
  1857. *cap = 0x80; /* 8 priorities for PFC */
  1858. break;
  1859. case DCB_CAP_ATTR_GSP:
  1860. *cap = true;
  1861. break;
  1862. case DCB_CAP_ATTR_BCN:
  1863. *cap = false;
  1864. break;
  1865. case DCB_CAP_ATTR_DCBX:
  1866. *cap = BNX2X_DCBX_CAPS;
  1867. break;
  1868. default:
  1869. BNX2X_ERR("Non valid capability ID\n");
  1870. rval = 1;
  1871. break;
  1872. }
  1873. } else {
  1874. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  1875. rval = 1;
  1876. }
  1877. DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap);
  1878. return rval;
  1879. }
  1880. static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num)
  1881. {
  1882. struct bnx2x *bp = netdev_priv(netdev);
  1883. u8 rval = 0;
  1884. DP(BNX2X_MSG_DCB, "tcid %d\n", tcid);
  1885. if (bp->dcb_state) {
  1886. switch (tcid) {
  1887. case DCB_NUMTCS_ATTR_PG:
  1888. *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
  1889. DCBX_COS_MAX_NUM_E2;
  1890. break;
  1891. case DCB_NUMTCS_ATTR_PFC:
  1892. *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
  1893. DCBX_COS_MAX_NUM_E2;
  1894. break;
  1895. default:
  1896. BNX2X_ERR("Non valid TC-ID\n");
  1897. rval = 1;
  1898. break;
  1899. }
  1900. } else {
  1901. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  1902. rval = 1;
  1903. }
  1904. return rval;
  1905. }
  1906. static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num)
  1907. {
  1908. struct bnx2x *bp = netdev_priv(netdev);
  1909. DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num);
  1910. return -EINVAL;
  1911. }
  1912. static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
  1913. {
  1914. struct bnx2x *bp = netdev_priv(netdev);
  1915. DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
  1916. if (!bp->dcb_state)
  1917. return 0;
  1918. return bp->dcbx_local_feat.pfc.enabled;
  1919. }
  1920. static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state)
  1921. {
  1922. struct bnx2x *bp = netdev_priv(netdev);
  1923. DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off");
  1924. if (!bnx2x_dcbnl_set_valid(bp))
  1925. return;
  1926. bp->dcbx_config_params.admin_pfc_tx_enable =
  1927. bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0);
  1928. }
  1929. static void bnx2x_admin_app_set_ent(
  1930. struct bnx2x_admin_priority_app_table *app_ent,
  1931. u8 idtype, u16 idval, u8 up)
  1932. {
  1933. app_ent->valid = 1;
  1934. switch (idtype) {
  1935. case DCB_APP_IDTYPE_ETHTYPE:
  1936. app_ent->traffic_type = TRAFFIC_TYPE_ETH;
  1937. break;
  1938. case DCB_APP_IDTYPE_PORTNUM:
  1939. app_ent->traffic_type = TRAFFIC_TYPE_PORT;
  1940. break;
  1941. default:
  1942. break; /* never gets here */
  1943. }
  1944. app_ent->app_id = idval;
  1945. app_ent->priority = up;
  1946. }
  1947. static bool bnx2x_admin_app_is_equal(
  1948. struct bnx2x_admin_priority_app_table *app_ent,
  1949. u8 idtype, u16 idval)
  1950. {
  1951. if (!app_ent->valid)
  1952. return false;
  1953. switch (idtype) {
  1954. case DCB_APP_IDTYPE_ETHTYPE:
  1955. if (app_ent->traffic_type != TRAFFIC_TYPE_ETH)
  1956. return false;
  1957. break;
  1958. case DCB_APP_IDTYPE_PORTNUM:
  1959. if (app_ent->traffic_type != TRAFFIC_TYPE_PORT)
  1960. return false;
  1961. break;
  1962. default:
  1963. return false;
  1964. }
  1965. if (app_ent->app_id != idval)
  1966. return false;
  1967. return true;
  1968. }
  1969. static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up)
  1970. {
  1971. int i, ff;
  1972. /* iterate over the app entries looking for idtype and idval */
  1973. for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) {
  1974. struct bnx2x_admin_priority_app_table *app_ent =
  1975. &bp->dcbx_config_params.admin_priority_app_table[i];
  1976. if (bnx2x_admin_app_is_equal(app_ent, idtype, idval))
  1977. break;
  1978. if (ff < 0 && !app_ent->valid)
  1979. ff = i;
  1980. }
  1981. if (i < DCBX_CONFIG_MAX_APP_PROTOCOL)
  1982. /* if found overwrite up */
  1983. bp->dcbx_config_params.
  1984. admin_priority_app_table[i].priority = up;
  1985. else if (ff >= 0)
  1986. /* not found use first-free */
  1987. bnx2x_admin_app_set_ent(
  1988. &bp->dcbx_config_params.admin_priority_app_table[ff],
  1989. idtype, idval, up);
  1990. else {
  1991. /* app table is full */
  1992. BNX2X_ERR("Application table is too large\n");
  1993. return -EBUSY;
  1994. }
  1995. /* up configured, if not 0 make sure feature is enabled */
  1996. if (up)
  1997. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  1998. return 0;
  1999. }
  2000. static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype,
  2001. u16 idval, u8 up)
  2002. {
  2003. struct bnx2x *bp = netdev_priv(netdev);
  2004. DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n",
  2005. idtype, idval, up);
  2006. if (!bnx2x_dcbnl_set_valid(bp)) {
  2007. DP(BNX2X_MSG_DCB, "dcbnl call not valid\n");
  2008. return -EINVAL;
  2009. }
  2010. /* verify idtype */
  2011. switch (idtype) {
  2012. case DCB_APP_IDTYPE_ETHTYPE:
  2013. case DCB_APP_IDTYPE_PORTNUM:
  2014. break;
  2015. default:
  2016. DP(BNX2X_MSG_DCB, "Wrong ID type\n");
  2017. return -EINVAL;
  2018. }
  2019. return bnx2x_set_admin_app_up(bp, idtype, idval, up);
  2020. }
  2021. static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev)
  2022. {
  2023. struct bnx2x *bp = netdev_priv(netdev);
  2024. u8 state;
  2025. state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE;
  2026. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF)
  2027. state |= DCB_CAP_DCBX_STATIC;
  2028. return state;
  2029. }
  2030. static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state)
  2031. {
  2032. struct bnx2x *bp = netdev_priv(netdev);
  2033. DP(BNX2X_MSG_DCB, "state = %02x\n", state);
  2034. /* set dcbx mode */
  2035. if ((state & BNX2X_DCBX_CAPS) != state) {
  2036. BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n",
  2037. state);
  2038. return 1;
  2039. }
  2040. if (bp->dcb_state != BNX2X_DCB_STATE_ON) {
  2041. BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n");
  2042. return 1;
  2043. }
  2044. if (state & DCB_CAP_DCBX_STATIC)
  2045. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF;
  2046. else
  2047. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON;
  2048. bp->dcbx_mode_uset = true;
  2049. return 0;
  2050. }
  2051. static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
  2052. u8 *flags)
  2053. {
  2054. struct bnx2x *bp = netdev_priv(netdev);
  2055. u8 rval = 0;
  2056. DP(BNX2X_MSG_DCB, "featid %d\n", featid);
  2057. if (bp->dcb_state) {
  2058. *flags = 0;
  2059. switch (featid) {
  2060. case DCB_FEATCFG_ATTR_PG:
  2061. if (bp->dcbx_local_feat.ets.enabled)
  2062. *flags |= DCB_FEATCFG_ENABLE;
  2063. if (bp->dcbx_error & (DCBX_LOCAL_ETS_ERROR |
  2064. DCBX_REMOTE_MIB_ERROR))
  2065. *flags |= DCB_FEATCFG_ERROR;
  2066. break;
  2067. case DCB_FEATCFG_ATTR_PFC:
  2068. if (bp->dcbx_local_feat.pfc.enabled)
  2069. *flags |= DCB_FEATCFG_ENABLE;
  2070. if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR |
  2071. DCBX_LOCAL_PFC_MISMATCH |
  2072. DCBX_REMOTE_MIB_ERROR))
  2073. *flags |= DCB_FEATCFG_ERROR;
  2074. break;
  2075. case DCB_FEATCFG_ATTR_APP:
  2076. if (bp->dcbx_local_feat.app.enabled)
  2077. *flags |= DCB_FEATCFG_ENABLE;
  2078. if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR |
  2079. DCBX_LOCAL_APP_MISMATCH |
  2080. DCBX_REMOTE_MIB_ERROR))
  2081. *flags |= DCB_FEATCFG_ERROR;
  2082. break;
  2083. default:
  2084. BNX2X_ERR("Non valid feature-ID\n");
  2085. rval = 1;
  2086. break;
  2087. }
  2088. } else {
  2089. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  2090. rval = 1;
  2091. }
  2092. return rval;
  2093. }
  2094. static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
  2095. u8 flags)
  2096. {
  2097. struct bnx2x *bp = netdev_priv(netdev);
  2098. u8 rval = 0;
  2099. DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags);
  2100. /* ignore the 'advertise' flag */
  2101. if (bnx2x_dcbnl_set_valid(bp)) {
  2102. switch (featid) {
  2103. case DCB_FEATCFG_ATTR_PG:
  2104. bp->dcbx_config_params.admin_ets_enable =
  2105. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  2106. bp->dcbx_config_params.admin_ets_willing =
  2107. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2108. break;
  2109. case DCB_FEATCFG_ATTR_PFC:
  2110. bp->dcbx_config_params.admin_pfc_enable =
  2111. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  2112. bp->dcbx_config_params.admin_pfc_willing =
  2113. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2114. break;
  2115. case DCB_FEATCFG_ATTR_APP:
  2116. /* ignore enable, always enabled */
  2117. bp->dcbx_config_params.admin_app_priority_willing =
  2118. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2119. break;
  2120. default:
  2121. BNX2X_ERR("Non valid feature-ID\n");
  2122. rval = 1;
  2123. break;
  2124. }
  2125. } else {
  2126. DP(BNX2X_MSG_DCB, "dcbnl call not valid\n");
  2127. rval = 1;
  2128. }
  2129. return rval;
  2130. }
  2131. static int bnx2x_peer_appinfo(struct net_device *netdev,
  2132. struct dcb_peer_app_info *info, u16* app_count)
  2133. {
  2134. int i;
  2135. struct bnx2x *bp = netdev_priv(netdev);
  2136. DP(BNX2X_MSG_DCB, "APP-INFO\n");
  2137. info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0;
  2138. info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0;
  2139. *app_count = 0;
  2140. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
  2141. if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield &
  2142. DCBX_APP_ENTRY_VALID)
  2143. (*app_count)++;
  2144. return 0;
  2145. }
  2146. static int bnx2x_peer_apptable(struct net_device *netdev,
  2147. struct dcb_app *table)
  2148. {
  2149. int i, j;
  2150. struct bnx2x *bp = netdev_priv(netdev);
  2151. DP(BNX2X_MSG_DCB, "APP-TABLE\n");
  2152. for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  2153. struct dcbx_app_priority_entry *ent =
  2154. &bp->dcbx_remote_feat.app.app_pri_tbl[i];
  2155. if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
  2156. table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
  2157. table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent);
  2158. table[j++].protocol = ent->app_id;
  2159. }
  2160. }
  2161. return 0;
  2162. }
  2163. static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg)
  2164. {
  2165. int i;
  2166. struct bnx2x *bp = netdev_priv(netdev);
  2167. pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0;
  2168. for (i = 0; i < CEE_DCBX_MAX_PGS; i++) {
  2169. pg->pg_bw[i] =
  2170. DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i);
  2171. pg->prio_pg[i] =
  2172. DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i);
  2173. }
  2174. return 0;
  2175. }
  2176. static int bnx2x_cee_peer_getpfc(struct net_device *netdev,
  2177. struct cee_pfc *pfc)
  2178. {
  2179. struct bnx2x *bp = netdev_priv(netdev);
  2180. pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps;
  2181. pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap;
  2182. return 0;
  2183. }
  2184. const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = {
  2185. .getstate = bnx2x_dcbnl_get_state,
  2186. .setstate = bnx2x_dcbnl_set_state,
  2187. .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr,
  2188. .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx,
  2189. .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx,
  2190. .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx,
  2191. .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx,
  2192. .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx,
  2193. .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx,
  2194. .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx,
  2195. .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx,
  2196. .setpfccfg = bnx2x_dcbnl_set_pfc_cfg,
  2197. .getpfccfg = bnx2x_dcbnl_get_pfc_cfg,
  2198. .setall = bnx2x_dcbnl_set_all,
  2199. .getcap = bnx2x_dcbnl_get_cap,
  2200. .getnumtcs = bnx2x_dcbnl_get_numtcs,
  2201. .setnumtcs = bnx2x_dcbnl_set_numtcs,
  2202. .getpfcstate = bnx2x_dcbnl_get_pfc_state,
  2203. .setpfcstate = bnx2x_dcbnl_set_pfc_state,
  2204. .setapp = bnx2x_dcbnl_set_app_up,
  2205. .getdcbx = bnx2x_dcbnl_get_dcbx,
  2206. .setdcbx = bnx2x_dcbnl_set_dcbx,
  2207. .getfeatcfg = bnx2x_dcbnl_get_featcfg,
  2208. .setfeatcfg = bnx2x_dcbnl_set_featcfg,
  2209. .peer_getappinfo = bnx2x_peer_appinfo,
  2210. .peer_getapptable = bnx2x_peer_apptable,
  2211. .cee_peer_getpg = bnx2x_cee_peer_getpg,
  2212. .cee_peer_getpfc = bnx2x_cee_peer_getpfc,
  2213. };
  2214. #endif /* BCM_DCBNL */