sdhci-cns3xxx.c 2.7 KB

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  1. /*
  2. * SDHCI support for CNS3xxx SoC
  3. *
  4. * Copyright 2008 Cavium Networks
  5. * Copyright 2010 MontaVista Software, LLC.
  6. *
  7. * Authors: Scott Shu
  8. * Anton Vorontsov <avorontsov@mvista.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/device.h>
  16. #include <linux/mmc/host.h>
  17. #include <linux/module.h>
  18. #include "sdhci-pltfm.h"
  19. static unsigned int sdhci_cns3xxx_get_max_clk(struct sdhci_host *host)
  20. {
  21. return 150000000;
  22. }
  23. static void sdhci_cns3xxx_set_clock(struct sdhci_host *host, unsigned int clock)
  24. {
  25. struct device *dev = mmc_dev(host->mmc);
  26. int div = 1;
  27. u16 clk;
  28. unsigned long timeout;
  29. if (clock == host->clock)
  30. return;
  31. sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
  32. if (clock == 0)
  33. goto out;
  34. while (host->max_clk / div > clock) {
  35. /*
  36. * On CNS3xxx divider grows linearly up to 4, and then
  37. * exponentially up to 256.
  38. */
  39. if (div < 4)
  40. div += 1;
  41. else if (div < 256)
  42. div *= 2;
  43. else
  44. break;
  45. }
  46. dev_dbg(dev, "desired SD clock: %d, actual: %d\n",
  47. clock, host->max_clk / div);
  48. /* Divide by 3 is special. */
  49. if (div != 3)
  50. div >>= 1;
  51. clk = div << SDHCI_DIVIDER_SHIFT;
  52. clk |= SDHCI_CLOCK_INT_EN;
  53. sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
  54. timeout = 20;
  55. while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
  56. & SDHCI_CLOCK_INT_STABLE)) {
  57. if (timeout == 0) {
  58. dev_warn(dev, "clock is unstable");
  59. break;
  60. }
  61. timeout--;
  62. mdelay(1);
  63. }
  64. clk |= SDHCI_CLOCK_CARD_EN;
  65. sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
  66. out:
  67. host->clock = clock;
  68. }
  69. static const struct sdhci_ops sdhci_cns3xxx_ops = {
  70. .get_max_clock = sdhci_cns3xxx_get_max_clk,
  71. .set_clock = sdhci_cns3xxx_set_clock,
  72. };
  73. static const struct sdhci_pltfm_data sdhci_cns3xxx_pdata = {
  74. .ops = &sdhci_cns3xxx_ops,
  75. .quirks = SDHCI_QUIRK_BROKEN_DMA |
  76. SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
  77. SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
  78. SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
  79. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
  80. SDHCI_QUIRK_NONSTANDARD_CLOCK,
  81. };
  82. static int sdhci_cns3xxx_probe(struct platform_device *pdev)
  83. {
  84. return sdhci_pltfm_register(pdev, &sdhci_cns3xxx_pdata, 0);
  85. }
  86. static int sdhci_cns3xxx_remove(struct platform_device *pdev)
  87. {
  88. return sdhci_pltfm_unregister(pdev);
  89. }
  90. static struct platform_driver sdhci_cns3xxx_driver = {
  91. .driver = {
  92. .name = "sdhci-cns3xxx",
  93. .owner = THIS_MODULE,
  94. .pm = SDHCI_PLTFM_PMOPS,
  95. },
  96. .probe = sdhci_cns3xxx_probe,
  97. .remove = sdhci_cns3xxx_remove,
  98. };
  99. module_platform_driver(sdhci_cns3xxx_driver);
  100. MODULE_DESCRIPTION("SDHCI driver for CNS3xxx");
  101. MODULE_AUTHOR("Scott Shu, "
  102. "Anton Vorontsov <avorontsov@mvista.com>");
  103. MODULE_LICENSE("GPL v2");